2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/irq.h>
24 #include <linux/module.h>
28 #define DRIVER_AUTHOR "Sarah Sharp"
29 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
31 /* TODO: copied from ehci-hcd.c - can this be refactored? */
33 * handshake - spin reading hc until handshake completes or fails
34 * @ptr: address of hc register to be read
35 * @mask: bits to look at in result of read
36 * @done: value of those bits when handshake succeeds
37 * @usec: timeout in microseconds
39 * Returns negative errno, or zero on success
41 * Success happens when the "mask" bits have the specified value (hardware
42 * handshake done). There are two failure modes: "usec" have passed (major
43 * hardware flakeout), or the register reads as all-ones (hardware removed).
45 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
46 u32 mask, u32 done, int usec)
51 result = xhci_readl(xhci, ptr);
52 if (result == ~(u32)0) /* card removed */
64 * Force HC into halt state.
66 * Disable any IRQs and clear the run/stop bit.
67 * HC will complete any current and actively pipelined transactions, and
68 * should halt within 16 microframes of the run/stop bit being cleared.
69 * Read HC Halted bit in the status register to see when the HC is finished.
70 * XXX: shouldn't we set HC_STATE_HALT here somewhere?
72 int xhci_halt(struct xhci_hcd *xhci)
78 xhci_dbg(xhci, "// Halt the HC\n");
79 /* Disable all interrupts from the host controller */
81 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
85 cmd = xhci_readl(xhci, &xhci->op_regs->command);
87 xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 return handshake(xhci, &xhci->op_regs->status,
90 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
94 * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
96 * This resets pipelines, timers, counters, state machines, etc.
97 * Transactions will be terminated immediately, and operational registers
98 * will be set to their defaults.
100 int xhci_reset(struct xhci_hcd *xhci)
105 state = xhci_readl(xhci, &xhci->op_regs->status);
106 BUG_ON((state & STS_HALT) == 0);
108 xhci_dbg(xhci, "// Reset the HC\n");
109 command = xhci_readl(xhci, &xhci->op_regs->command);
110 command |= CMD_RESET;
111 xhci_writel(xhci, command, &xhci->op_regs->command);
112 /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
113 xhci_to_hcd(xhci)->state = HC_STATE_HALT;
115 return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
119 * Stop the HC from processing the endpoint queues.
121 static void xhci_quiesce(struct xhci_hcd *xhci)
124 * Queues are per endpoint, so we need to disable an endpoint or slot.
126 * To disable a slot, we need to insert a disable slot command on the
127 * command ring and ring the doorbell. This will also free any internal
128 * resources associated with the slot (which might not be what we want).
130 * A Release Endpoint command sounds better - doesn't free internal HC
131 * memory, but removes the endpoints from the schedule and releases the
132 * bandwidth, disables the doorbells, and clears the endpoint enable
133 * flag. Usually used prior to a set interface command.
135 * TODO: Implement after command ring code is done.
137 BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state));
138 xhci_dbg(xhci, "Finished quiescing -- code not written yet\n");
142 /* Set up MSI-X table for entry 0 (may claim other entries later) */
143 static int xhci_setup_msix(struct xhci_hcd *xhci)
146 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
148 xhci->msix_count = 0;
149 /* XXX: did I do this right? ixgbe does kcalloc for more than one */
150 xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
151 if (!xhci->msix_entries) {
152 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
155 xhci->msix_entries[0].entry = 0;
157 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
159 xhci_err(xhci, "Failed to enable MSI-X\n");
164 * Pass the xhci pointer value as the request_irq "cookie".
165 * If more irqs are added, this will need to be unique for each one.
167 ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
168 "xHCI", xhci_to_hcd(xhci));
170 xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
173 xhci_dbg(xhci, "Finished setting up MSI-X\n");
177 pci_disable_msix(pdev);
179 kfree(xhci->msix_entries);
180 xhci->msix_entries = NULL;
184 /* XXX: code duplication; can xhci_setup_msix call this? */
185 /* Free any IRQs and disable MSI-X */
186 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
188 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
189 if (!xhci->msix_entries)
192 free_irq(xhci->msix_entries[0].vector, xhci);
193 pci_disable_msix(pdev);
194 kfree(xhci->msix_entries);
195 xhci->msix_entries = NULL;
196 xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
201 * Initialize memory for HCD and xHC (one-time init).
203 * Program the PAGESIZE register, initialize the device context array, create
204 * device contexts (?), set up a command ring segment (or two?), create event
205 * ring (one for now).
207 int xhci_init(struct usb_hcd *hcd)
209 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
212 xhci_dbg(xhci, "xhci_init\n");
213 spin_lock_init(&xhci->lock);
214 retval = xhci_mem_init(xhci, GFP_KERNEL);
215 xhci_dbg(xhci, "Finished xhci_init\n");
221 * Start the HC after it was halted.
223 * This function is called by the USB core when the HC driver is added.
224 * Its opposite is xhci_stop().
226 * xhci_init() must be called once before this function can be called.
227 * Reset the HC, enable device slot contexts, program DCBAAP, and
228 * set command ring pointer and event ring pointer.
230 * Setup MSI-X vectors and enable interrupts.
232 int xhci_run(struct usb_hcd *hcd)
235 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
236 xhci_dbg(xhci, "xhci_run\n");
238 #if 0 /* FIXME: MSI not setup yet */
239 /* Do this at the very last minute */
240 ret = xhci_setup_msix(xhci);
246 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
247 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
250 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
252 /* Set the HCD state before we enable the irqs */
253 hcd->state = HC_STATE_RUNNING;
254 temp = xhci_readl(xhci, &xhci->op_regs->command);
256 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
258 xhci_writel(xhci, temp, &xhci->op_regs->command);
260 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
261 xhci_dbg(xhci, "// Enabling event ring interrupter 0x%x"
262 " by writing 0x%x to irq_pending\n",
263 (unsigned int) xhci->ir_set,
264 (unsigned int) ER_IRQ_ENABLE(temp));
265 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
266 &xhci->ir_set->irq_pending);
267 xhci_print_ir_set(xhci, xhci->ir_set, 0);
269 xhci_dbg(xhci, "Command ring memory map follows:\n");
270 xhci_debug_ring(xhci, xhci->cmd_ring);
271 xhci_dbg(xhci, "ERST memory map follows:\n");
272 xhci_dbg_erst(xhci, &xhci->erst);
274 temp = xhci_readl(xhci, &xhci->op_regs->command);
276 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
278 xhci_writel(xhci, temp, &xhci->op_regs->command);
279 /* Flush PCI posted writes */
280 temp = xhci_readl(xhci, &xhci->op_regs->command);
281 xhci_dbg(xhci, "// @%x = 0x%x\n",
282 (unsigned int) &xhci->op_regs->command, temp);
284 xhci_dbg(xhci, "Finished xhci_run\n");
291 * This function is called by the USB core when the HC driver is removed.
292 * Its opposite is xhci_run().
294 * Disable device contexts, disable IRQs, and quiesce the HC.
295 * Reset the HC, finish any completed transactions, and cleanup memory.
297 void xhci_stop(struct usb_hcd *hcd)
300 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
302 spin_lock_irq(&xhci->lock);
303 if (HC_IS_RUNNING(hcd->state))
307 spin_unlock_irq(&xhci->lock);
309 #if 0 /* No MSI yet */
310 xhci_cleanup_msix(xhci);
312 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
313 temp = xhci_readl(xhci, &xhci->op_regs->status);
314 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
315 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
316 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
317 &xhci->ir_set->irq_pending);
318 xhci_print_ir_set(xhci, xhci->ir_set, 0);
320 xhci_dbg(xhci, "cleaning up memory\n");
321 xhci_mem_cleanup(xhci);
322 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
323 xhci_readl(xhci, &xhci->op_regs->status));
327 * Shutdown HC (not bus-specific)
329 * This is called when the machine is rebooting or halting. We assume that the
330 * machine will be powered off, and the HC's internal state will be reset.
331 * Don't bother to free memory.
333 void xhci_shutdown(struct usb_hcd *hcd)
335 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
337 spin_lock_irq(&xhci->lock);
339 spin_unlock_irq(&xhci->lock);
342 xhci_cleanup_msix(xhci);
345 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
346 xhci_readl(xhci, &xhci->op_regs->status));
349 int xhci_get_frame(struct usb_hcd *hcd)
351 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
352 /* EHCI mods by the periodic size. Why? */
353 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
356 MODULE_DESCRIPTION(DRIVER_DESC);
357 MODULE_AUTHOR(DRIVER_AUTHOR);
358 MODULE_LICENSE("GPL");
360 static int __init xhci_hcd_init(void)
365 retval = xhci_register_pci();
368 printk(KERN_DEBUG "Problem registering PCI driver.");
374 module_init(xhci_hcd_init);
376 static void __exit xhci_hcd_cleanup(void)
379 xhci_unregister_pci();
382 module_exit(xhci_hcd_cleanup);