2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
23 * WARNING! The USB documentation is downright evil. Most of it
24 * is just crap, written by a committee. You're better off ignoring
25 * most of it, the important stuff is:
26 * - the low-level protocol (fairly simple but lots of small details)
27 * - working around the horridness of the rest
30 #include <linux/config.h>
31 #ifdef CONFIG_USB_DEBUG
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/kernel.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <linux/ioport.h>
42 #include <linux/sched.h>
43 #include <linux/slab.h>
44 #include <linux/smp_lock.h>
45 #include <linux/errno.h>
46 #include <linux/unistd.h>
47 #include <linux/interrupt.h>
48 #include <linux/spinlock.h>
49 #include <linux/debugfs.h>
51 #include <linux/dmapool.h>
52 #include <linux/dma-mapping.h>
53 #include <linux/usb.h>
54 #include <linux/bitops.h>
56 #include <asm/uaccess.h>
59 #include <asm/system.h>
61 #include "../core/hcd.h"
67 #define DRIVER_VERSION "v2.3"
68 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
69 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
71 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
74 * debug = 0, no debugging messages
75 * debug = 1, dump failed URB's except for stalls
76 * debug = 2, dump all failed URB's (including stalls)
77 * show all queues in /debug/uhci/[pci_addr]
78 * debug = 3, show all TD's in URB's when dumping
85 module_param(debug, int, S_IRUGO | S_IWUSR);
86 MODULE_PARM_DESC(debug, "Debug level");
88 #define ERRBUF_LEN (32 * 1024)
90 static kmem_cache_t *uhci_up_cachep; /* urb_priv */
92 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
94 /* If a transfer is still active after this much time, turn off FSBR */
95 #define IDLE_TIMEOUT msecs_to_jiffies(50)
96 #define FSBR_DELAY msecs_to_jiffies(50)
98 /* When we timeout an idle transfer for FSBR, we'll switch it over to */
99 /* depth first traversal. We'll do it in groups of this number of TD's */
100 /* to make sure it doesn't hog all of the bandwidth */
101 #define DEPTH_INTERVAL 5
103 static inline void restart_timer(struct uhci_hcd *uhci)
105 mod_timer(&uhci->stall_timer, jiffies + msecs_to_jiffies(100));
108 #include "uhci-hub.c"
109 #include "uhci-debug.c"
112 static void reset_hc(struct uhci_hcd *uhci)
114 unsigned long io_addr = uhci->io_addr;
116 /* Turn off PIRQ, SMI, and all interrupts. This also turns off
117 * the BIOS's USB Legacy Support.
119 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
120 outw(0, uhci->io_addr + USBINTR);
122 /* Global reset for 50ms */
123 outw(USBCMD_GRESET, io_addr + USBCMD);
125 outw(0, io_addr + USBCMD);
127 /* Another 10ms delay */
129 uhci->resume_detect = 0;
130 uhci->is_stopped = UHCI_IS_STOPPED;
131 uhci->rh_state = UHCI_RH_RESET;
134 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
138 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
142 case PCI_VENDOR_ID_GENESYS:
143 /* Genesys Logic's GL880S controllers don't generate
144 * resume-detect interrupts.
148 case PCI_VENDOR_ID_INTEL:
149 /* Some of Intel's USB controllers have a bug that causes
150 * resume-detect interrupts if any port has an over-current
151 * condition. To make matters worse, some motherboards
152 * hardwire unused USB ports' over-current inputs active!
153 * To prevent problems, we will not enable resume-detect
154 * interrupts if any ports are OC.
156 for (port = 0; port < uhci->rh_numports; ++port) {
157 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
166 static void suspend_hc(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
167 __releases(uhci->lock)
168 __acquires(uhci->lock)
173 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
174 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
175 (auto_stop ? " (auto-stop)" : ""));
177 /* If we get a suspend request when we're already auto-stopped
178 * then there's nothing to do.
180 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
181 uhci->rh_state = new_state;
185 /* Enable resume-detect interrupts if they work.
186 * Then enter Global Suspend mode, still configured.
188 int_enable = (resume_detect_interrupts_are_broken(uhci) ?
190 outw(int_enable, uhci->io_addr + USBINTR);
191 outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
194 /* If we're auto-stopping then no devices have been attached
195 * for a while, so there shouldn't be any active URBs and the
196 * controller should stop after a few microseconds. Otherwise
197 * we will give the controller one frame to stop.
199 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
200 uhci->rh_state = UHCI_RH_SUSPENDING;
201 spin_unlock_irq(&uhci->lock);
203 spin_lock_irq(&uhci->lock);
205 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
206 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
208 uhci_get_current_frame_number(uhci);
211 uhci->rh_state = new_state;
212 uhci->is_stopped = UHCI_IS_STOPPED;
213 uhci->resume_detect = 0;
215 uhci_scan_schedule(uhci, NULL);
218 static void wakeup_hc(struct uhci_hcd *uhci)
219 __releases(uhci->lock)
220 __acquires(uhci->lock)
222 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
223 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
224 " (auto-start)" : "");
226 /* If we are auto-stopped then no devices are attached so there's
227 * no need for wakeup signals. Otherwise we send Global Resume
230 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
231 uhci->rh_state = UHCI_RH_RESUMING;
232 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
233 uhci->io_addr + USBCMD);
234 spin_unlock_irq(&uhci->lock);
236 spin_lock_irq(&uhci->lock);
238 /* End Global Resume and wait for EOP to be sent */
239 outw(USBCMD_CF, uhci->io_addr + USBCMD);
241 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
242 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
245 uhci->rh_state = UHCI_RH_RUNNING;
246 uhci->is_stopped = 0;
249 /* Mark it configured and running with a 64-byte max packet.
250 * All interrupts are enabled, even though RD won't do anything.
252 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
253 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
254 uhci->io_addr + USBINTR);
257 static int start_hc(struct uhci_hcd *uhci)
259 unsigned long io_addr = uhci->io_addr;
263 * Reset the HC - this will force us to get a
264 * new notification of any already connected
265 * ports due to the virtual disconnect that it
268 outw(USBCMD_HCRESET, io_addr + USBCMD);
269 while (inw(io_addr + USBCMD) & USBCMD_HCRESET) {
271 dev_err(uhci_dev(uhci), "USBCMD_HCRESET timed out!\n");
277 /* Mark controller as running before we enable interrupts */
278 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
280 /* Turn on PIRQ and all interrupts */
281 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
283 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
286 /* Start at frame 0 */
287 outw(0, io_addr + USBFRNUM);
288 outl(uhci->fl->dma_handle, io_addr + USBFLBASEADD);
290 /* Run and mark it configured with a 64-byte max packet */
291 uhci->rh_state = UHCI_RH_RUNNING;
292 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, io_addr + USBCMD);
293 uhci->is_stopped = 0;
298 static void rh_state_transitions(struct uhci_hcd *uhci)
300 switch (uhci->rh_state) {
301 case UHCI_RH_RUNNING:
302 /* are any devices attached? */
303 if (!any_ports_active(uhci)) {
304 uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
305 uhci->auto_stop_time = jiffies + HZ;
309 case UHCI_RH_RUNNING_NODEVS:
310 /* auto-stop if nothing connected for 1 second */
311 if (any_ports_active(uhci))
312 uhci->rh_state = UHCI_RH_RUNNING;
313 else if (time_after_eq(jiffies, uhci->auto_stop_time))
314 suspend_hc(uhci, UHCI_RH_AUTO_STOPPED);
317 case UHCI_RH_AUTO_STOPPED:
318 /* wakeup if requested by a device */
319 if (uhci->resume_detect)
328 static void stall_callback(unsigned long _uhci)
330 struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
333 spin_lock_irqsave(&uhci->lock, flags);
334 uhci_scan_schedule(uhci, NULL);
337 /* Poll for and perform state transitions */
338 rh_state_transitions(uhci);
339 if (unlikely(uhci->suspended_ports))
340 uhci_check_ports(uhci);
343 spin_unlock_irqrestore(&uhci->lock, flags);
346 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
348 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
349 unsigned long io_addr = uhci->io_addr;
350 unsigned short status;
353 * Read the interrupt status, and write it back to clear the
354 * interrupt cause. Contrary to the UHCI specification, the
355 * "HC Halted" status bit is persistent: it is RO, not R/WC.
357 status = inw(io_addr + USBSTS);
358 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
360 outw(status, io_addr + USBSTS); /* Clear it */
362 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
363 if (status & USBSTS_HSE)
364 dev_err(uhci_dev(uhci), "host system error, "
366 if (status & USBSTS_HCPE)
367 dev_err(uhci_dev(uhci), "host controller process "
368 "error, something bad happened!\n");
369 if ((status & USBSTS_HCH) &&
370 uhci->rh_state >= UHCI_RH_RUNNING) {
371 dev_err(uhci_dev(uhci), "host controller halted, "
373 /* FIXME: Reset the controller, fix the offending TD */
377 if (status & USBSTS_RD)
378 uhci->resume_detect = 1;
380 spin_lock(&uhci->lock);
381 uhci_scan_schedule(uhci, regs);
382 spin_unlock(&uhci->lock);
388 * Store the current frame number in uhci->frame_number if the controller
391 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
393 if (!uhci->is_stopped)
394 uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
398 * De-allocate all resources
400 static void release_uhci(struct uhci_hcd *uhci)
404 for (i = 0; i < UHCI_NUM_SKELQH; i++)
405 if (uhci->skelqh[i]) {
406 uhci_free_qh(uhci, uhci->skelqh[i]);
407 uhci->skelqh[i] = NULL;
411 uhci_free_td(uhci, uhci->term_td);
412 uhci->term_td = NULL;
416 dma_pool_destroy(uhci->qh_pool);
417 uhci->qh_pool = NULL;
421 dma_pool_destroy(uhci->td_pool);
422 uhci->td_pool = NULL;
426 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
427 uhci->fl, uhci->fl->dma_handle);
432 debugfs_remove(uhci->dentry);
437 static int uhci_reset(struct usb_hcd *hcd)
439 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
441 uhci->io_addr = (unsigned long) hcd->rsrc_start;
443 /* Kick BIOS off this hardware and reset, so we won't get
444 * interrupts from any previous setup.
451 * Allocate a frame list, and then setup the skeleton
453 * The hardware doesn't really know any difference
454 * in the queues, but the order does matter for the
455 * protocols higher up. The order is:
457 * - any isochronous events handled before any
458 * of the queues. We don't do that here, because
459 * we'll create the actual TD entries on demand.
460 * - The first queue is the interrupt queue.
461 * - The second queue is the control queue, split into low- and full-speed
462 * - The third queue is bulk queue.
463 * - The fourth queue is the bandwidth reclamation queue, which loops back
464 * to the full-speed control queue.
466 static int uhci_start(struct usb_hcd *hcd)
468 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
472 dma_addr_t dma_handle;
473 struct usb_device *udev;
474 struct dentry *dentry;
476 io_size = (unsigned) hcd->rsrc_len;
478 dentry = debugfs_create_file(hcd->self.bus_name, S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, &uhci_debug_operations);
480 dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
482 goto err_create_debug_entry;
484 uhci->dentry = dentry;
487 uhci->fsbrtimeout = 0;
489 spin_lock_init(&uhci->lock);
490 INIT_LIST_HEAD(&uhci->qh_remove_list);
492 INIT_LIST_HEAD(&uhci->td_remove_list);
494 INIT_LIST_HEAD(&uhci->urb_remove_list);
496 INIT_LIST_HEAD(&uhci->urb_list);
498 INIT_LIST_HEAD(&uhci->complete_list);
500 init_waitqueue_head(&uhci->waitqh);
502 init_timer(&uhci->stall_timer);
503 uhci->stall_timer.function = stall_callback;
504 uhci->stall_timer.data = (unsigned long) uhci;
506 uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
509 dev_err(uhci_dev(uhci), "unable to allocate "
510 "consistent memory for frame list\n");
514 memset((void *)uhci->fl, 0, sizeof(*uhci->fl));
516 uhci->fl->dma_handle = dma_handle;
518 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
519 sizeof(struct uhci_td), 16, 0);
520 if (!uhci->td_pool) {
521 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
522 goto err_create_td_pool;
525 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
526 sizeof(struct uhci_qh), 16, 0);
527 if (!uhci->qh_pool) {
528 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
529 goto err_create_qh_pool;
532 /* Initialize the root hub */
534 /* UHCI specs says devices must have 2 ports, but goes on to say */
535 /* they may have more but give no way to determine how many they */
536 /* have. However, according to the UHCI spec, Bit 7 is always set */
537 /* to 1. So we try to use this to our advantage */
538 for (port = 0; port < (io_size - 0x10) / 2; port++) {
539 unsigned int portstatus;
541 portstatus = inw(uhci->io_addr + 0x10 + (port * 2));
542 if (!(portstatus & 0x0080))
546 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
548 /* This is experimental so anything less than 2 or greater than 8 is */
549 /* something weird and we'll ignore it */
550 if (port < 2 || port > UHCI_RH_MAXCHILD) {
551 dev_info(uhci_dev(uhci), "port count misdetected? "
552 "forcing to 2 ports\n");
556 uhci->rh_numports = port;
558 udev = usb_alloc_dev(NULL, &hcd->self, 0);
560 dev_err(uhci_dev(uhci), "unable to allocate root hub\n");
561 goto err_alloc_root_hub;
564 uhci->term_td = uhci_alloc_td(uhci, udev);
565 if (!uhci->term_td) {
566 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
567 goto err_alloc_term_td;
570 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
571 uhci->skelqh[i] = uhci_alloc_qh(uhci, udev);
572 if (!uhci->skelqh[i]) {
573 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
574 goto err_alloc_skelqh;
579 * 8 Interrupt queues; link all higher int queues to int1,
580 * then link int1 to control and control to bulk
582 uhci->skel_int128_qh->link =
583 uhci->skel_int64_qh->link =
584 uhci->skel_int32_qh->link =
585 uhci->skel_int16_qh->link =
586 uhci->skel_int8_qh->link =
587 uhci->skel_int4_qh->link =
588 uhci->skel_int2_qh->link =
589 cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH;
590 uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH;
592 uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
593 uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH;
594 uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH;
596 /* This dummy TD is to work around a bug in Intel PIIX controllers */
597 uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) |
598 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
599 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
601 uhci->skel_term_qh->link = UHCI_PTR_TERM;
602 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
605 * Fill the frame list: make all entries point to the proper
608 * The interrupt queues will be interleaved as evenly as possible.
609 * There's not much to be done about period-1 interrupts; they have
610 * to occur in every frame. But we can schedule period-2 interrupts
611 * in odd-numbered frames, period-4 interrupts in frames congruent
612 * to 2 (mod 4), and so on. This way each frame only has two
613 * interrupt QHs, which will help spread out bandwidth utilization.
615 for (i = 0; i < UHCI_NUMFRAMES; i++) {
619 * ffs (Find First bit Set) does exactly what we need:
620 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6],
621 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc.
622 * ffs > 6 => not on any high-period queue, so use
623 * skel_int1_qh = skelqh[7].
624 * Add UHCI_NUMFRAMES to insure at least one bit is set.
626 irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES);
630 /* Only place we don't use the frame list routines */
631 uhci->fl->frame[i] = UHCI_PTR_QH |
632 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
636 * Some architectures require a full mb() to enforce completion of
637 * the memory writes above before the I/O transfers in start_hc().
640 if ((retval = start_hc(uhci)) != 0)
641 goto err_alloc_skelqh;
645 udev->speed = USB_SPEED_FULL;
647 if (usb_hcd_register_root_hub(udev, hcd) != 0) {
648 dev_err(uhci_dev(uhci), "unable to start root hub\n");
650 goto err_start_root_hub;
661 del_timer_sync(&uhci->stall_timer);
664 for (i = 0; i < UHCI_NUM_SKELQH; i++)
665 if (uhci->skelqh[i]) {
666 uhci_free_qh(uhci, uhci->skelqh[i]);
667 uhci->skelqh[i] = NULL;
670 uhci_free_td(uhci, uhci->term_td);
671 uhci->term_td = NULL;
677 dma_pool_destroy(uhci->qh_pool);
678 uhci->qh_pool = NULL;
681 dma_pool_destroy(uhci->td_pool);
682 uhci->td_pool = NULL;
685 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
686 uhci->fl, uhci->fl->dma_handle);
690 debugfs_remove(uhci->dentry);
693 err_create_debug_entry:
697 static void uhci_stop(struct usb_hcd *hcd)
699 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
701 del_timer_sync(&uhci->stall_timer);
704 spin_lock_irq(&uhci->lock);
705 uhci_scan_schedule(uhci, NULL);
706 spin_unlock_irq(&uhci->lock);
712 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
714 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
716 spin_lock_irq(&uhci->lock);
717 suspend_hc(uhci, UHCI_RH_SUSPENDED);
718 spin_unlock_irq(&uhci->lock);
722 static int uhci_resume(struct usb_hcd *hcd)
724 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
726 spin_lock_irq(&uhci->lock);
727 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
730 * Some systems don't maintain the UHCI register values
731 * during a PM suspend/resume cycle, so reinitialize
732 * the Frame Number, Framelist Base Address, Interrupt
733 * Enable, and Legacy Support registers.
735 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
737 outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
738 outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
739 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC |
740 USBINTR_SP, uhci->io_addr + USBINTR);
741 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
745 spin_unlock_irq(&uhci->lock);
747 hcd->state = HC_STATE_RUNNING;
752 /* Wait until all the URBs for a particular device/endpoint are gone */
753 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
754 struct usb_host_endpoint *ep)
756 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
758 wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list));
761 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
763 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
768 /* Minimize latency by avoiding the spinlock */
769 local_irq_save(flags);
770 is_stopped = uhci->is_stopped;
772 frame_number = (is_stopped ? uhci->frame_number :
773 inw(uhci->io_addr + USBFRNUM));
774 local_irq_restore(flags);
778 static const char hcd_name[] = "uhci_hcd";
780 static const struct hc_driver uhci_driver = {
781 .description = hcd_name,
782 .product_desc = "UHCI Host Controller",
783 .hcd_priv_size = sizeof(struct uhci_hcd),
785 /* Generic hardware linkage */
789 /* Basic lifecycle operations */
793 .suspend = uhci_suspend,
794 .resume = uhci_resume,
798 .urb_enqueue = uhci_urb_enqueue,
799 .urb_dequeue = uhci_urb_dequeue,
801 .endpoint_disable = uhci_hcd_endpoint_disable,
802 .get_frame_number = uhci_hcd_get_frame_number,
804 .hub_status_data = uhci_hub_status_data,
805 .hub_control = uhci_hub_control,
808 static const struct pci_device_id uhci_pci_ids[] = { {
809 /* handle any USB UHCI controller */
810 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0),
811 .driver_data = (unsigned long) &uhci_driver,
812 }, { /* end: all zeroes */ }
815 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
817 static struct pci_driver uhci_pci_driver = {
818 .name = (char *)hcd_name,
819 .id_table = uhci_pci_ids,
821 .probe = usb_hcd_pci_probe,
822 .remove = usb_hcd_pci_remove,
825 .suspend = usb_hcd_pci_suspend,
826 .resume = usb_hcd_pci_resume,
830 static int __init uhci_hcd_init(void)
832 int retval = -ENOMEM;
834 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
840 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
845 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
846 if (!uhci_debugfs_root)
849 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
850 sizeof(struct urb_priv), 0, 0, NULL, NULL);
854 retval = pci_register_driver(&uhci_pci_driver);
861 if (kmem_cache_destroy(uhci_up_cachep))
862 warn("not all urb_priv's were freed!");
865 debugfs_remove(uhci_debugfs_root);
875 static void __exit uhci_hcd_cleanup(void)
877 pci_unregister_driver(&uhci_pci_driver);
879 if (kmem_cache_destroy(uhci_up_cachep))
880 warn("not all urb_priv's were freed!");
882 debugfs_remove(uhci_debugfs_root);
886 module_init(uhci_hcd_init);
887 module_exit(uhci_hcd_cleanup);
889 MODULE_AUTHOR(DRIVER_AUTHOR);
890 MODULE_DESCRIPTION(DRIVER_DESC);
891 MODULE_LICENSE("GPL");