SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/usb/host/uhci-hcd.c

   1 /*
   2  * Universal Host Controller Interface driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Linus Torvalds
   7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
   8  * (C) Copyright 1999 Randy Dunlap
   9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16  * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
  17  *
  18  * Intel documents this fairly well, and as far as I know there
  19  * are no royalties or anything like that, but even so there are
  20  * people who decided that they want to do the same thing in a
  21  * completely different way.
  22  *
  23  */
  24
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/pci.h>
  28 #include <linux/kernel.h>
  29 #include <linux/init.h>
  30 #include <linux/delay.h>
  31 #include <linux/ioport.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/errno.h>
  35 #include <linux/unistd.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/spinlock.h>
  38 #include <linux/debugfs.h>
  39 #include <linux/pm.h>
  40 #include <linux/dmapool.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/usb.h>
  43 #include <linux/bitops.h>
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/system.h>
  49
  50 #include "../core/hcd.h"
  51 #include "uhci-hcd.h"
  52 #include "pci-quirks.h"
  53
  54 /*
  55  * Version Information
  56  */
  57 #define DRIVER_VERSION "v3.0"
  58 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
  59 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
  60 Alan Stern"
  61 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
  62
  63 /*
  64  * debug = 0, no debugging messages
  65  * debug = 1, dump failed URBs except for stalls
  66  * debug = 2, dump all failed URBs (including stalls)
  67  *            show all queues in /debug/uhci/[pci_addr]
  68  * debug = 3, show all TDs in URBs when dumping
  69  */
  70 #ifdef DEBUG
  71 #define DEBUG_CONFIGURED        1
  72 static int debug = 1;
  73 module_param(debug, int, S_IRUGO | S_IWUSR);
  74 MODULE_PARM_DESC(debug, "Debug level");
  75
  76 #else
  77 #define DEBUG_CONFIGURED        0
  78 #define debug                   0
  79 #endif
  80
  81 static char *errbuf;
  82 #define ERRBUF_LEN    (32 * 1024)
  83
  84 static kmem_cache_t *uhci_up_cachep;    /* urb_priv */
  85
  86 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
  87 static void wakeup_rh(struct uhci_hcd *uhci);
  88 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
  89
  90 #include "uhci-debug.c"
  91 #include "uhci-q.c"
  92 #include "uhci-hub.c"
  93
  94 /*
  95  * Finish up a host controller reset and update the recorded state.
  96  */
  97 static void finish_reset(struct uhci_hcd *uhci)
  98 {
  99         int port;
 100
 101         /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
 102          * bits in the port status and control registers.
 103          * We have to clear them by hand.
 104          */
 105         for (port = 0; port < uhci->rh_numports; ++port)
 106                 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
 107
 108         uhci->port_c_suspend = uhci->resuming_ports = 0;
 109         uhci->rh_state = UHCI_RH_RESET;
 110         uhci->is_stopped = UHCI_IS_STOPPED;
 111         uhci_to_hcd(uhci)->state = HC_STATE_HALT;
 112         uhci_to_hcd(uhci)->poll_rh = 0;
 113 }
 114
 115 /*
 116  * Last rites for a defunct/nonfunctional controller
 117  * or one we don't want to use any more.
 118  */
 119 static void hc_died(struct uhci_hcd *uhci)
 120 {
 121         uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
 122         finish_reset(uhci);
 123         uhci->hc_inaccessible = 1;
 124 }
 125
 126 /*
 127  * Initialize a controller that was newly discovered or has just been
 128  * resumed.  In either case we can't be sure of its previous state.
 129  */
 130 static void check_and_reset_hc(struct uhci_hcd *uhci)
 131 {
 132         if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
 133                 finish_reset(uhci);
 134 }
 135
 136 /*
 137  * Store the basic register settings needed by the controller.
 138  */
 139 static void configure_hc(struct uhci_hcd *uhci)
 140 {
 141         /* Set the frame length to the default: 1 ms exactly */
 142         outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
 143
 144         /* Store the frame list base address */
 145         outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
 146
 147         /* Set the current frame number */
 148         outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
 149                         uhci->io_addr + USBFRNUM);
 150
 151         /* Mark controller as not halted before we enable interrupts */
 152         uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
 153         mb();
 154
 155         /* Enable PIRQ */
 156         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
 157                         USBLEGSUP_DEFAULT);
 158 }
 159
 160
 161 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
 162 {
 163         int port;
 164
 165         switch (to_pci_dev(uhci_dev(uhci))->vendor) {
 166             default:
 167                 break;
 168
 169             case PCI_VENDOR_ID_GENESYS:
 170                 /* Genesys Logic's GL880S controllers don't generate
 171                  * resume-detect interrupts.
 172                  */
 173                 return 1;
 174
 175             case PCI_VENDOR_ID_INTEL:
 176                 /* Some of Intel's USB controllers have a bug that causes
 177                  * resume-detect interrupts if any port has an over-current
 178                  * condition.  To make matters worse, some motherboards
 179                  * hardwire unused USB ports' over-current inputs active!
 180                  * To prevent problems, we will not enable resume-detect
 181                  * interrupts if any ports are OC.
 182                  */
 183                 for (port = 0; port < uhci->rh_numports; ++port) {
 184                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
 185                                         USBPORTSC_OC)
 186                                 return 1;
 187                 }
 188                 break;
 189         }
 190         return 0;
 191 }
 192
 193 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
 194 __releases(uhci->lock)
 195 __acquires(uhci->lock)
 196 {
 197         int auto_stop;
 198         int int_enable;
 199
 200         auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
 201         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
 202                         (auto_stop ? " (auto-stop)" : ""));
 203
 204         /* If we get a suspend request when we're already auto-stopped
 205          * then there's nothing to do.
 206          */
 207         if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
 208                 uhci->rh_state = new_state;
 209                 return;
 210         }
 211
 212         /* Enable resume-detect interrupts if they work.
 213          * Then enter Global Suspend mode, still configured.
 214          */
 215         uhci->working_RD = 1;
 216         int_enable = USBINTR_RESUME;
 217         if (resume_detect_interrupts_are_broken(uhci)) {
 218                 uhci->working_RD = int_enable = 0;
 219         }
 220         outw(int_enable, uhci->io_addr + USBINTR);
 221         outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
 222         mb();
 223         udelay(5);
 224
 225         /* If we're auto-stopping then no devices have been attached
 226          * for a while, so there shouldn't be any active URBs and the
 227          * controller should stop after a few microseconds.  Otherwise
 228          * we will give the controller one frame to stop.
 229          */
 230         if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
 231                 uhci->rh_state = UHCI_RH_SUSPENDING;
 232                 spin_unlock_irq(&uhci->lock);
 233                 msleep(1);
 234                 spin_lock_irq(&uhci->lock);
 235                 if (uhci->hc_inaccessible)      /* Died */
 236                         return;
 237         }
 238         if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
 239                 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
 240
 241         uhci_get_current_frame_number(uhci);
 242
 243         uhci->rh_state = new_state;
 244         uhci->is_stopped = UHCI_IS_STOPPED;
 245         uhci_to_hcd(uhci)->poll_rh = !int_enable;
 246
 247         uhci_scan_schedule(uhci, NULL);
 248         uhci_fsbr_off(uhci);
 249 }
 250
 251 static void start_rh(struct uhci_hcd *uhci)
 252 {
 253         uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
 254         uhci->is_stopped = 0;
 255
 256         /* Mark it configured and running with a 64-byte max packet.
 257          * All interrupts are enabled, even though RESUME won't do anything.
 258          */
 259         outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
 260         outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
 261                         uhci->io_addr + USBINTR);
 262         mb();
 263         uhci->rh_state = UHCI_RH_RUNNING;
 264         uhci_to_hcd(uhci)->poll_rh = 1;
 265 }
 266
 267 static void wakeup_rh(struct uhci_hcd *uhci)
 268 __releases(uhci->lock)
 269 __acquires(uhci->lock)
 270 {
 271         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
 272                         uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
 273                                 " (auto-start)" : "");
 274
 275         /* If we are auto-stopped then no devices are attached so there's
 276          * no need for wakeup signals.  Otherwise we send Global Resume
 277          * for 20 ms.
 278          */
 279         if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 280                 uhci->rh_state = UHCI_RH_RESUMING;
 281                 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
 282                                 uhci->io_addr + USBCMD);
 283                 spin_unlock_irq(&uhci->lock);
 284                 msleep(20);
 285                 spin_lock_irq(&uhci->lock);
 286                 if (uhci->hc_inaccessible)      /* Died */
 287                         return;
 288
 289                 /* End Global Resume and wait for EOP to be sent */
 290                 outw(USBCMD_CF, uhci->io_addr + USBCMD);
 291                 mb();
 292                 udelay(4);
 293                 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
 294                         dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
 295         }
 296
 297         start_rh(uhci);
 298
 299         /* Restart root hub polling */
 300         mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
 301 }
 302
 303 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
 304 {
 305         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 306         unsigned short status;
 307         unsigned long flags;
 308
 309         /*
 310          * Read the interrupt status, and write it back to clear the
 311          * interrupt cause.  Contrary to the UHCI specification, the
 312          * "HC Halted" status bit is persistent: it is RO, not R/WC.
 313          */
 314         status = inw(uhci->io_addr + USBSTS);
 315         if (!(status & ~USBSTS_HCH))    /* shared interrupt, not mine */
 316                 return IRQ_NONE;
 317         outw(status, uhci->io_addr + USBSTS);           /* Clear it */
 318
 319         if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
 320                 if (status & USBSTS_HSE)
 321                         dev_err(uhci_dev(uhci), "host system error, "
 322                                         "PCI problems?\n");
 323                 if (status & USBSTS_HCPE)
 324                         dev_err(uhci_dev(uhci), "host controller process "
 325                                         "error, something bad happened!\n");
 326                 if (status & USBSTS_HCH) {
 327                         spin_lock_irqsave(&uhci->lock, flags);
 328                         if (uhci->rh_state >= UHCI_RH_RUNNING) {
 329                                 dev_err(uhci_dev(uhci),
 330                                         "host controller halted, "
 331                                         "very bad!\n");
 332                                 if (debug > 1 && errbuf) {
 333                                         /* Print the schedule for debugging */
 334                                         uhci_sprint_schedule(uhci,
 335                                                         errbuf, ERRBUF_LEN);
 336                                         lprintk(errbuf);
 337                                 }
 338                                 hc_died(uhci);
 339
 340                                 /* Force a callback in case there are
 341                                  * pending unlinks */
 342                                 mod_timer(&hcd->rh_timer, jiffies);
 343                         }
 344                         spin_unlock_irqrestore(&uhci->lock, flags);
 345                 }
 346         }
 347
 348         if (status & USBSTS_RD)
 349                 usb_hcd_poll_rh_status(hcd);
 350         else {
 351                 spin_lock_irqsave(&uhci->lock, flags);
 352                 uhci_scan_schedule(uhci, regs);
 353                 spin_unlock_irqrestore(&uhci->lock, flags);
 354         }
 355
 356         return IRQ_HANDLED;
 357 }
 358
 359 /*
 360  * Store the current frame number in uhci->frame_number if the controller
 361  * is runnning.  Expand from 11 bits (of which we use only 10) to a
 362  * full-sized integer.
 363  *
 364  * Like many other parts of the driver, this code relies on being polled
 365  * more than once per second as long as the controller is running.
 366  */
 367 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
 368 {
 369         if (!uhci->is_stopped) {
 370                 unsigned delta;
 371
 372                 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
 373                                 (UHCI_NUMFRAMES - 1);
 374                 uhci->frame_number += delta;
 375         }
 376 }
 377
 378 /*
 379  * De-allocate all resources
 380  */
 381 static void release_uhci(struct uhci_hcd *uhci)
 382 {
 383         int i;
 384
 385         if (DEBUG_CONFIGURED) {
 386                 spin_lock_irq(&uhci->lock);
 387                 uhci->is_initialized = 0;
 388                 spin_unlock_irq(&uhci->lock);
 389
 390                 debugfs_remove(uhci->dentry);
 391         }
 392
 393         for (i = 0; i < UHCI_NUM_SKELQH; i++)
 394                 uhci_free_qh(uhci, uhci->skelqh[i]);
 395
 396         uhci_free_td(uhci, uhci->term_td);
 397
 398         dma_pool_destroy(uhci->qh_pool);
 399
 400         dma_pool_destroy(uhci->td_pool);
 401
 402         kfree(uhci->frame_cpu);
 403
 404         dma_free_coherent(uhci_dev(uhci),
 405                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 406                         uhci->frame, uhci->frame_dma_handle);
 407 }
 408
 409 static int uhci_reset(struct usb_hcd *hcd)
 410 {
 411         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 412         unsigned io_size = (unsigned) hcd->rsrc_len;
 413         int port;
 414
 415         uhci->io_addr = (unsigned long) hcd->rsrc_start;
 416
 417         /* The UHCI spec says devices must have 2 ports, and goes on to say
 418          * they may have more but gives no way to determine how many there
 419          * are.  However according to the UHCI spec, Bit 7 of the port
 420          * status and control register is always set to 1.  So we try to
 421          * use this to our advantage.  Another common failure mode when
 422          * a nonexistent register is addressed is to return all ones, so
 423          * we test for that also.
 424          */
 425         for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
 426                 unsigned int portstatus;
 427
 428                 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
 429                 if (!(portstatus & 0x0080) || portstatus == 0xffff)
 430                         break;
 431         }
 432         if (debug)
 433                 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
 434
 435         /* Anything greater than 7 is weird so we'll ignore it. */
 436         if (port > UHCI_RH_MAXCHILD) {
 437                 dev_info(uhci_dev(uhci), "port count misdetected? "
 438                                 "forcing to 2 ports\n");
 439                 port = 2;
 440         }
 441         uhci->rh_numports = port;
 442
 443         /* Kick BIOS off this hardware and reset if the controller
 444          * isn't already safely quiescent.
 445          */
 446         check_and_reset_hc(uhci);
 447         return 0;
 448 }
 449
 450 /* Make sure the controller is quiescent and that we're not using it
 451  * any more.  This is mainly for the benefit of programs which, like kexec,
 452  * expect the hardware to be idle: not doing DMA or generating IRQs.
 453  *
 454  * This routine may be called in a damaged or failing kernel.  Hence we
 455  * do not acquire the spinlock before shutting down the controller.
 456  */
 457 static void uhci_shutdown(struct pci_dev *pdev)
 458 {
 459         struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
 460
 461         hc_died(hcd_to_uhci(hcd));
 462 }
 463
 464 /*
 465  * Allocate a frame list, and then setup the skeleton
 466  *
 467  * The hardware doesn't really know any difference
 468  * in the queues, but the order does matter for the
 469  * protocols higher up. The order is:
 470  *
 471  *  - any isochronous events handled before any
 472  *    of the queues. We don't do that here, because
 473  *    we'll create the actual TD entries on demand.
 474  *  - The first queue is the interrupt queue.
 475  *  - The second queue is the control queue, split into low- and full-speed
 476  *  - The third queue is bulk queue.
 477  *  - The fourth queue is the bandwidth reclamation queue, which loops back
 478  *    to the full-speed control queue.
 479  */
 480 static int uhci_start(struct usb_hcd *hcd)
 481 {
 482         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 483         int retval = -EBUSY;
 484         int i;
 485         struct dentry *dentry;
 486
 487         hcd->uses_new_polling = 1;
 488
 489         spin_lock_init(&uhci->lock);
 490
 491         INIT_LIST_HEAD(&uhci->idle_qh_list);
 492
 493         init_waitqueue_head(&uhci->waitqh);
 494
 495         if (DEBUG_CONFIGURED) {
 496                 dentry = debugfs_create_file(hcd->self.bus_name,
 497                                 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
 498                                 uhci, &uhci_debug_operations);
 499                 if (!dentry) {
 500                         dev_err(uhci_dev(uhci), "couldn't create uhci "
 501                                         "debugfs entry\n");
 502                         retval = -ENOMEM;
 503                         goto err_create_debug_entry;
 504                 }
 505                 uhci->dentry = dentry;
 506         }
 507
 508         uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
 509                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 510                         &uhci->frame_dma_handle, 0);
 511         if (!uhci->frame) {
 512                 dev_err(uhci_dev(uhci), "unable to allocate "
 513                                 "consistent memory for frame list\n");
 514                 goto err_alloc_frame;
 515         }
 516         memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
 517
 518         uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
 519                         GFP_KERNEL);
 520         if (!uhci->frame_cpu) {
 521                 dev_err(uhci_dev(uhci), "unable to allocate "
 522                                 "memory for frame pointers\n");
 523                 goto err_alloc_frame_cpu;
 524         }
 525
 526         uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
 527                         sizeof(struct uhci_td), 16, 0);
 528         if (!uhci->td_pool) {
 529                 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
 530                 goto err_create_td_pool;
 531         }
 532
 533         uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
 534                         sizeof(struct uhci_qh), 16, 0);
 535         if (!uhci->qh_pool) {
 536                 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
 537                 goto err_create_qh_pool;
 538         }
 539
 540         uhci->term_td = uhci_alloc_td(uhci);
 541         if (!uhci->term_td) {
 542                 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
 543                 goto err_alloc_term_td;
 544         }
 545
 546         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 547                 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
 548                 if (!uhci->skelqh[i]) {
 549                         dev_err(uhci_dev(uhci), "unable to allocate QH\n");
 550                         goto err_alloc_skelqh;
 551                 }
 552         }
 553
 554         /*
 555          * 8 Interrupt queues; link all higher int queues to int1,
 556          * then link int1 to control and control to bulk
 557          */
 558         uhci->skel_int128_qh->link =
 559                         uhci->skel_int64_qh->link =
 560                         uhci->skel_int32_qh->link =
 561                         uhci->skel_int16_qh->link =
 562                         uhci->skel_int8_qh->link =
 563                         uhci->skel_int4_qh->link =
 564                         uhci->skel_int2_qh->link = UHCI_PTR_QH |
 565                         cpu_to_le32(uhci->skel_int1_qh->dma_handle);
 566
 567         uhci->skel_int1_qh->link = UHCI_PTR_QH |
 568                         cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
 569         uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
 570                         cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
 571         uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
 572                         cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
 573         uhci->skel_bulk_qh->link = UHCI_PTR_QH |
 574                         cpu_to_le32(uhci->skel_term_qh->dma_handle);
 575
 576         /* This dummy TD is to work around a bug in Intel PIIX controllers */
 577         uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
 578                 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
 579         uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
 580
 581         uhci->skel_term_qh->link = UHCI_PTR_TERM;
 582         uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
 583
 584         /*
 585          * Fill the frame list: make all entries point to the proper
 586          * interrupt queue.
 587          *
 588          * The interrupt queues will be interleaved as evenly as possible.
 589          * There's not much to be done about period-1 interrupts; they have
 590          * to occur in every frame.  But we can schedule period-2 interrupts
 591          * in odd-numbered frames, period-4 interrupts in frames congruent
 592          * to 2 (mod 4), and so on.  This way each frame only has two
 593          * interrupt QHs, which will help spread out bandwidth utilization.
 594          */
 595         for (i = 0; i < UHCI_NUMFRAMES; i++) {
 596                 int irq;
 597
 598                 /*
 599                  * ffs (Find First bit Set) does exactly what we need:
 600                  * 1,3,5,...  => ffs = 0 => use skel_int2_qh = skelqh[8],
 601                  * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
 602                  * ffs >= 7 => not on any high-period queue, so use
 603                  *      skel_int1_qh = skelqh[9].
 604                  * Add UHCI_NUMFRAMES to insure at least one bit is set.
 605                  */
 606                 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
 607                 if (irq <= 1)
 608                         irq = 9;
 609
 610                 /* Only place we don't use the frame list routines */
 611                 uhci->frame[i] = UHCI_PTR_QH |
 612                                 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
 613         }
 614
 615         /*
 616          * Some architectures require a full mb() to enforce completion of
 617          * the memory writes above before the I/O transfers in configure_hc().
 618          */
 619         mb();
 620
 621         configure_hc(uhci);
 622         uhci->is_initialized = 1;
 623         start_rh(uhci);
 624         return 0;
 625
 626 /*
 627  * error exits:
 628  */
 629 err_alloc_skelqh:
 630         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 631                 if (uhci->skelqh[i])
 632                         uhci_free_qh(uhci, uhci->skelqh[i]);
 633         }
 634
 635         uhci_free_td(uhci, uhci->term_td);
 636
 637 err_alloc_term_td:
 638         dma_pool_destroy(uhci->qh_pool);
 639
 640 err_create_qh_pool:
 641         dma_pool_destroy(uhci->td_pool);
 642
 643 err_create_td_pool:
 644         kfree(uhci->frame_cpu);
 645
 646 err_alloc_frame_cpu:
 647         dma_free_coherent(uhci_dev(uhci),
 648                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 649                         uhci->frame, uhci->frame_dma_handle);
 650
 651 err_alloc_frame:
 652         debugfs_remove(uhci->dentry);
 653
 654 err_create_debug_entry:
 655         return retval;
 656 }
 657
 658 static void uhci_stop(struct usb_hcd *hcd)
 659 {
 660         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 661
 662         spin_lock_irq(&uhci->lock);
 663         if (!uhci->hc_inaccessible)
 664                 hc_died(uhci);
 665         uhci_scan_schedule(uhci, NULL);
 666         spin_unlock_irq(&uhci->lock);
 667
 668         release_uhci(uhci);
 669 }
 670
 671 #ifdef CONFIG_PM
 672 static int uhci_rh_suspend(struct usb_hcd *hcd)
 673 {
 674         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 675
 676         spin_lock_irq(&uhci->lock);
 677         if (!uhci->hc_inaccessible)             /* Not dead */
 678                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 679         spin_unlock_irq(&uhci->lock);
 680         return 0;
 681 }
 682
 683 static int uhci_rh_resume(struct usb_hcd *hcd)
 684 {
 685         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 686         int rc = 0;
 687
 688         spin_lock_irq(&uhci->lock);
 689         if (uhci->hc_inaccessible) {
 690                 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 691                         dev_warn(uhci_dev(uhci), "HC isn't running!\n");
 692                         rc = -ENODEV;
 693                 }
 694                 /* Otherwise the HC is dead */
 695         } else
 696                 wakeup_rh(uhci);
 697         spin_unlock_irq(&uhci->lock);
 698         return rc;
 699 }
 700
 701 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
 702 {
 703         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 704         int rc = 0;
 705
 706         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 707
 708         spin_lock_irq(&uhci->lock);
 709         if (uhci->hc_inaccessible)      /* Dead or already suspended */
 710                 goto done;
 711
 712         if (uhci->rh_state > UHCI_RH_SUSPENDED) {
 713                 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
 714                 rc = -EBUSY;
 715                 goto done;
 716         };
 717
 718         /* All PCI host controllers are required to disable IRQ generation
 719          * at the source, so we must turn off PIRQ.
 720          */
 721         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
 722         mb();
 723         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 724         uhci->hc_inaccessible = 1;
 725         hcd->poll_rh = 0;
 726
 727         /* FIXME: Enable non-PME# remote wakeup? */
 728
 729 done:
 730         spin_unlock_irq(&uhci->lock);
 731         return rc;
 732 }
 733
 734 static int uhci_resume(struct usb_hcd *hcd)
 735 {
 736         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 737
 738         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 739
 740         /* Since we aren't in D3 any more, it's safe to set this flag
 741          * even if the controller was dead.  It might not even be dead
 742          * any more, if the firmware or quirks code has reset it.
 743          */
 744         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 745         mb();
 746
 747         if (uhci->rh_state == UHCI_RH_RESET)    /* Dead */
 748                 return 0;
 749         spin_lock_irq(&uhci->lock);
 750
 751         /* FIXME: Disable non-PME# remote wakeup? */
 752
 753         uhci->hc_inaccessible = 0;
 754
 755         /* The BIOS may have changed the controller settings during a
 756          * system wakeup.  Check it and reconfigure to avoid problems.
 757          */
 758         check_and_reset_hc(uhci);
 759         configure_hc(uhci);
 760
 761         if (uhci->rh_state == UHCI_RH_RESET) {
 762
 763                 /* The controller had to be reset */
 764                 usb_root_hub_lost_power(hcd->self.root_hub);
 765                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 766         }
 767
 768         spin_unlock_irq(&uhci->lock);
 769
 770         if (!uhci->working_RD) {
 771                 /* Suspended root hub needs to be polled */
 772                 hcd->poll_rh = 1;
 773                 usb_hcd_poll_rh_status(hcd);
 774         }
 775         return 0;
 776 }
 777 #endif
 778
 779 /* Wait until a particular device/endpoint's QH is idle, and free it */
 780 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
 781                 struct usb_host_endpoint *hep)
 782 {
 783         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 784         struct uhci_qh *qh;
 785
 786         spin_lock_irq(&uhci->lock);
 787         qh = (struct uhci_qh *) hep->hcpriv;
 788         if (qh == NULL)
 789                 goto done;
 790
 791         while (qh->state != QH_STATE_IDLE) {
 792                 ++uhci->num_waiting;
 793                 spin_unlock_irq(&uhci->lock);
 794                 wait_event_interruptible(uhci->waitqh,
 795                                 qh->state == QH_STATE_IDLE);
 796                 spin_lock_irq(&uhci->lock);
 797                 --uhci->num_waiting;
 798         }
 799
 800         uhci_free_qh(uhci, qh);
 801 done:
 802         spin_unlock_irq(&uhci->lock);
 803 }
 804
 805 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
 806 {
 807         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 808         unsigned frame_number;
 809         unsigned delta;
 810
 811         /* Minimize latency by avoiding the spinlock */
 812         frame_number = uhci->frame_number;
 813         barrier();
 814         delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
 815                         (UHCI_NUMFRAMES - 1);
 816         return frame_number + delta;
 817 }
 818
 819 static const char hcd_name[] = "uhci_hcd";
 820
 821 static const struct hc_driver uhci_driver = {
 822         .description =          hcd_name,
 823         .product_desc =         "UHCI Host Controller",
 824         .hcd_priv_size =        sizeof(struct uhci_hcd),
 825
 826         /* Generic hardware linkage */
 827         .irq =                  uhci_irq,
 828         .flags =                HCD_USB11,
 829
 830         /* Basic lifecycle operations */
 831         .reset =                uhci_reset,
 832         .start =                uhci_start,
 833 #ifdef CONFIG_PM
 834         .suspend =              uhci_suspend,
 835         .resume =               uhci_resume,
 836         .bus_suspend =          uhci_rh_suspend,
 837         .bus_resume =           uhci_rh_resume,
 838 #endif
 839         .stop =                 uhci_stop,
 840
 841         .urb_enqueue =          uhci_urb_enqueue,
 842         .urb_dequeue =          uhci_urb_dequeue,
 843
 844         .endpoint_disable =     uhci_hcd_endpoint_disable,
 845         .get_frame_number =     uhci_hcd_get_frame_number,
 846
 847         .hub_status_data =      uhci_hub_status_data,
 848         .hub_control =          uhci_hub_control,
 849 };
 850
 851 static const struct pci_device_id uhci_pci_ids[] = { {
 852         /* handle any USB UHCI controller */
 853         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
 854         .driver_data =  (unsigned long) &uhci_driver,
 855         }, { /* end: all zeroes */ }
 856 };
 857
 858 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
 859
 860 static struct pci_driver uhci_pci_driver = {
 861         .name =         (char *)hcd_name,
 862         .id_table =     uhci_pci_ids,
 863
 864         .probe =        usb_hcd_pci_probe,
 865         .remove =       usb_hcd_pci_remove,
 866         .shutdown =     uhci_shutdown,
 867
 868 #ifdef  CONFIG_PM
 869         .suspend =      usb_hcd_pci_suspend,
 870         .resume =       usb_hcd_pci_resume,
 871 #endif  /* PM */
 872 };
 873
 874 static int __init uhci_hcd_init(void)
 875 {
 876         int retval = -ENOMEM;
 877
 878         printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
 879
 880         if (usb_disabled())
 881                 return -ENODEV;
 882
 883         if (DEBUG_CONFIGURED) {
 884                 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
 885                 if (!errbuf)
 886                         goto errbuf_failed;
 887                 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
 888                 if (!uhci_debugfs_root)
 889                         goto debug_failed;
 890         }
 891
 892         uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
 893                 sizeof(struct urb_priv), 0, 0, NULL, NULL);
 894         if (!uhci_up_cachep)
 895                 goto up_failed;
 896
 897         retval = pci_register_driver(&uhci_pci_driver);
 898         if (retval)
 899                 goto init_failed;
 900
 901         return 0;
 902
 903 init_failed:
 904         if (kmem_cache_destroy(uhci_up_cachep))
 905                 warn("not all urb_privs were freed!");
 906
 907 up_failed:
 908         debugfs_remove(uhci_debugfs_root);
 909
 910 debug_failed:
 911         kfree(errbuf);
 912
 913 errbuf_failed:
 914
 915         return retval;
 916 }
 917
 918 static void __exit uhci_hcd_cleanup(void)
 919 {
 920         pci_unregister_driver(&uhci_pci_driver);
 921
 922         if (kmem_cache_destroy(uhci_up_cachep))
 923                 warn("not all urb_privs were freed!");
 924
 925         debugfs_remove(uhci_debugfs_root);
 926         kfree(errbuf);
 927 }
 928
 929 module_init(uhci_hcd_init);
 930 module_exit(uhci_hcd_cleanup);
 931
 932 MODULE_AUTHOR(DRIVER_AUTHOR);
 933 MODULE_DESCRIPTION(DRIVER_DESC);
 934 MODULE_LICENSE("GPL");