SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/usb/host/uhci-hcd.c

   1 /*
   2  * Universal Host Controller Interface driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Linus Torvalds
   7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
   8  * (C) Copyright 1999 Randy Dunlap
   9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16  * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
  17  *
  18  * Intel documents this fairly well, and as far as I know there
  19  * are no royalties or anything like that, but even so there are
  20  * people who decided that they want to do the same thing in a
  21  * completely different way.
  22  *
  23  */
  24
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/pci.h>
  28 #include <linux/kernel.h>
  29 #include <linux/init.h>
  30 #include <linux/delay.h>
  31 #include <linux/ioport.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/errno.h>
  35 #include <linux/unistd.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/spinlock.h>
  38 #include <linux/debugfs.h>
  39 #include <linux/pm.h>
  40 #include <linux/dmapool.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/usb.h>
  43 #include <linux/bitops.h>
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/system.h>
  49
  50 #include "../core/hcd.h"
  51 #include "uhci-hcd.h"
  52 #include "pci-quirks.h"
  53
  54 /*
  55  * Version Information
  56  */
  57 #define DRIVER_VERSION "v3.0"
  58 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
  59 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
  60 Alan Stern"
  61 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
  62
  63 /*
  64  * debug = 0, no debugging messages
  65  * debug = 1, dump failed URBs except for stalls
  66  * debug = 2, dump all failed URBs (including stalls)
  67  *            show all queues in /debug/uhci/[pci_addr]
  68  * debug = 3, show all TDs in URBs when dumping
  69  */
  70 #ifdef DEBUG
  71 #define DEBUG_CONFIGURED        1
  72 static int debug = 1;
  73 module_param(debug, int, S_IRUGO | S_IWUSR);
  74 MODULE_PARM_DESC(debug, "Debug level");
  75
  76 #else
  77 #define DEBUG_CONFIGURED        0
  78 #define debug                   0
  79 #endif
  80
  81 static char *errbuf;
  82 #define ERRBUF_LEN    (32 * 1024)
  83
  84 static kmem_cache_t *uhci_up_cachep;    /* urb_priv */
  85
  86 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
  87 static void wakeup_rh(struct uhci_hcd *uhci);
  88 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
  89
  90 #include "uhci-debug.c"
  91 #include "uhci-q.c"
  92 #include "uhci-hub.c"
  93
  94 /*
  95  * Finish up a host controller reset and update the recorded state.
  96  */
  97 static void finish_reset(struct uhci_hcd *uhci)
  98 {
  99         int port;
 100
 101         /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
 102          * bits in the port status and control registers.
 103          * We have to clear them by hand.
 104          */
 105         for (port = 0; port < uhci->rh_numports; ++port)
 106                 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
 107
 108         uhci->port_c_suspend = uhci->resuming_ports = 0;
 109         uhci->rh_state = UHCI_RH_RESET;
 110         uhci->is_stopped = UHCI_IS_STOPPED;
 111         uhci_to_hcd(uhci)->state = HC_STATE_HALT;
 112         uhci_to_hcd(uhci)->poll_rh = 0;
 113 }
 114
 115 /*
 116  * Last rites for a defunct/nonfunctional controller
 117  * or one we don't want to use any more.
 118  */
 119 static void hc_died(struct uhci_hcd *uhci)
 120 {
 121         uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
 122         finish_reset(uhci);
 123         uhci->hc_inaccessible = 1;
 124 }
 125
 126 /*
 127  * Initialize a controller that was newly discovered or has lost power
 128  * or otherwise been reset while it was suspended.  In none of these cases
 129  * can we be sure of its previous state.
 130  */
 131 static void check_and_reset_hc(struct uhci_hcd *uhci)
 132 {
 133         if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
 134                 finish_reset(uhci);
 135 }
 136
 137 /*
 138  * Store the basic register settings needed by the controller.
 139  */
 140 static void configure_hc(struct uhci_hcd *uhci)
 141 {
 142         /* Set the frame length to the default: 1 ms exactly */
 143         outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
 144
 145         /* Store the frame list base address */
 146         outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
 147
 148         /* Set the current frame number */
 149         outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
 150                         uhci->io_addr + USBFRNUM);
 151
 152         /* Mark controller as not halted before we enable interrupts */
 153         uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
 154         mb();
 155
 156         /* Enable PIRQ */
 157         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
 158                         USBLEGSUP_DEFAULT);
 159 }
 160
 161
 162 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
 163 {
 164         int port;
 165
 166         switch (to_pci_dev(uhci_dev(uhci))->vendor) {
 167             default:
 168                 break;
 169
 170             case PCI_VENDOR_ID_GENESYS:
 171                 /* Genesys Logic's GL880S controllers don't generate
 172                  * resume-detect interrupts.
 173                  */
 174                 return 1;
 175
 176             case PCI_VENDOR_ID_INTEL:
 177                 /* Some of Intel's USB controllers have a bug that causes
 178                  * resume-detect interrupts if any port has an over-current
 179                  * condition.  To make matters worse, some motherboards
 180                  * hardwire unused USB ports' over-current inputs active!
 181                  * To prevent problems, we will not enable resume-detect
 182                  * interrupts if any ports are OC.
 183                  */
 184                 for (port = 0; port < uhci->rh_numports; ++port) {
 185                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
 186                                         USBPORTSC_OC)
 187                                 return 1;
 188                 }
 189                 break;
 190         }
 191         return 0;
 192 }
 193
 194 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
 195 __releases(uhci->lock)
 196 __acquires(uhci->lock)
 197 {
 198         int auto_stop;
 199         int int_enable;
 200
 201         auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
 202         dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
 203                         "%s%s\n", __FUNCTION__,
 204                         (auto_stop ? " (auto-stop)" : ""));
 205
 206         /* If we get a suspend request when we're already auto-stopped
 207          * then there's nothing to do.
 208          */
 209         if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
 210                 uhci->rh_state = new_state;
 211                 return;
 212         }
 213
 214         /* Enable resume-detect interrupts if they work.
 215          * Then enter Global Suspend mode, still configured.
 216          */
 217         uhci->working_RD = 1;
 218         int_enable = USBINTR_RESUME;
 219         if (resume_detect_interrupts_are_broken(uhci)) {
 220                 uhci->working_RD = int_enable = 0;
 221         }
 222         outw(int_enable, uhci->io_addr + USBINTR);
 223         outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
 224         mb();
 225         udelay(5);
 226
 227         /* If we're auto-stopping then no devices have been attached
 228          * for a while, so there shouldn't be any active URBs and the
 229          * controller should stop after a few microseconds.  Otherwise
 230          * we will give the controller one frame to stop.
 231          */
 232         if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
 233                 uhci->rh_state = UHCI_RH_SUSPENDING;
 234                 spin_unlock_irq(&uhci->lock);
 235                 msleep(1);
 236                 spin_lock_irq(&uhci->lock);
 237                 if (uhci->hc_inaccessible)      /* Died */
 238                         return;
 239         }
 240         if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
 241                 dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev,
 242                         "Controller not stopped yet!\n");
 243
 244         uhci_get_current_frame_number(uhci);
 245
 246         uhci->rh_state = new_state;
 247         uhci->is_stopped = UHCI_IS_STOPPED;
 248         uhci_to_hcd(uhci)->poll_rh = !int_enable;
 249
 250         uhci_scan_schedule(uhci, NULL);
 251         uhci_fsbr_off(uhci);
 252 }
 253
 254 static void start_rh(struct uhci_hcd *uhci)
 255 {
 256         uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
 257         uhci->is_stopped = 0;
 258
 259         /* Mark it configured and running with a 64-byte max packet.
 260          * All interrupts are enabled, even though RESUME won't do anything.
 261          */
 262         outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
 263         outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
 264                         uhci->io_addr + USBINTR);
 265         mb();
 266         uhci->rh_state = UHCI_RH_RUNNING;
 267         uhci_to_hcd(uhci)->poll_rh = 1;
 268 }
 269
 270 static void wakeup_rh(struct uhci_hcd *uhci)
 271 __releases(uhci->lock)
 272 __acquires(uhci->lock)
 273 {
 274         dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
 275                         "%s%s\n", __FUNCTION__,
 276                         uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
 277                                 " (auto-start)" : "");
 278
 279         /* If we are auto-stopped then no devices are attached so there's
 280          * no need for wakeup signals.  Otherwise we send Global Resume
 281          * for 20 ms.
 282          */
 283         if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 284                 uhci->rh_state = UHCI_RH_RESUMING;
 285                 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
 286                                 uhci->io_addr + USBCMD);
 287                 spin_unlock_irq(&uhci->lock);
 288                 msleep(20);
 289                 spin_lock_irq(&uhci->lock);
 290                 if (uhci->hc_inaccessible)      /* Died */
 291                         return;
 292
 293                 /* End Global Resume and wait for EOP to be sent */
 294                 outw(USBCMD_CF, uhci->io_addr + USBCMD);
 295                 mb();
 296                 udelay(4);
 297                 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
 298                         dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
 299         }
 300
 301         start_rh(uhci);
 302
 303         /* Restart root hub polling */
 304         mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
 305 }
 306
 307 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
 308 {
 309         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 310         unsigned short status;
 311         unsigned long flags;
 312
 313         /*
 314          * Read the interrupt status, and write it back to clear the
 315          * interrupt cause.  Contrary to the UHCI specification, the
 316          * "HC Halted" status bit is persistent: it is RO, not R/WC.
 317          */
 318         status = inw(uhci->io_addr + USBSTS);
 319         if (!(status & ~USBSTS_HCH))    /* shared interrupt, not mine */
 320                 return IRQ_NONE;
 321         outw(status, uhci->io_addr + USBSTS);           /* Clear it */
 322
 323         if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
 324                 if (status & USBSTS_HSE)
 325                         dev_err(uhci_dev(uhci), "host system error, "
 326                                         "PCI problems?\n");
 327                 if (status & USBSTS_HCPE)
 328                         dev_err(uhci_dev(uhci), "host controller process "
 329                                         "error, something bad happened!\n");
 330                 if (status & USBSTS_HCH) {
 331                         spin_lock_irqsave(&uhci->lock, flags);
 332                         if (uhci->rh_state >= UHCI_RH_RUNNING) {
 333                                 dev_err(uhci_dev(uhci),
 334                                         "host controller halted, "
 335                                         "very bad!\n");
 336                                 if (debug > 1 && errbuf) {
 337                                         /* Print the schedule for debugging */
 338                                         uhci_sprint_schedule(uhci,
 339                                                         errbuf, ERRBUF_LEN);
 340                                         lprintk(errbuf);
 341                                 }
 342                                 hc_died(uhci);
 343
 344                                 /* Force a callback in case there are
 345                                  * pending unlinks */
 346                                 mod_timer(&hcd->rh_timer, jiffies);
 347                         }
 348                         spin_unlock_irqrestore(&uhci->lock, flags);
 349                 }
 350         }
 351
 352         if (status & USBSTS_RD)
 353                 usb_hcd_poll_rh_status(hcd);
 354         else {
 355                 spin_lock_irqsave(&uhci->lock, flags);
 356                 uhci_scan_schedule(uhci, regs);
 357                 spin_unlock_irqrestore(&uhci->lock, flags);
 358         }
 359
 360         return IRQ_HANDLED;
 361 }
 362
 363 /*
 364  * Store the current frame number in uhci->frame_number if the controller
 365  * is runnning.  Expand from 11 bits (of which we use only 10) to a
 366  * full-sized integer.
 367  *
 368  * Like many other parts of the driver, this code relies on being polled
 369  * more than once per second as long as the controller is running.
 370  */
 371 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
 372 {
 373         if (!uhci->is_stopped) {
 374                 unsigned delta;
 375
 376                 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
 377                                 (UHCI_NUMFRAMES - 1);
 378                 uhci->frame_number += delta;
 379         }
 380 }
 381
 382 /*
 383  * De-allocate all resources
 384  */
 385 static void release_uhci(struct uhci_hcd *uhci)
 386 {
 387         int i;
 388
 389         if (DEBUG_CONFIGURED) {
 390                 spin_lock_irq(&uhci->lock);
 391                 uhci->is_initialized = 0;
 392                 spin_unlock_irq(&uhci->lock);
 393
 394                 debugfs_remove(uhci->dentry);
 395         }
 396
 397         for (i = 0; i < UHCI_NUM_SKELQH; i++)
 398                 uhci_free_qh(uhci, uhci->skelqh[i]);
 399
 400         uhci_free_td(uhci, uhci->term_td);
 401
 402         dma_pool_destroy(uhci->qh_pool);
 403
 404         dma_pool_destroy(uhci->td_pool);
 405
 406         kfree(uhci->frame_cpu);
 407
 408         dma_free_coherent(uhci_dev(uhci),
 409                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 410                         uhci->frame, uhci->frame_dma_handle);
 411 }
 412
 413 static int uhci_init(struct usb_hcd *hcd)
 414 {
 415         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 416         unsigned io_size = (unsigned) hcd->rsrc_len;
 417         int port;
 418
 419         uhci->io_addr = (unsigned long) hcd->rsrc_start;
 420
 421         /* The UHCI spec says devices must have 2 ports, and goes on to say
 422          * they may have more but gives no way to determine how many there
 423          * are.  However according to the UHCI spec, Bit 7 of the port
 424          * status and control register is always set to 1.  So we try to
 425          * use this to our advantage.  Another common failure mode when
 426          * a nonexistent register is addressed is to return all ones, so
 427          * we test for that also.
 428          */
 429         for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
 430                 unsigned int portstatus;
 431
 432                 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
 433                 if (!(portstatus & 0x0080) || portstatus == 0xffff)
 434                         break;
 435         }
 436         if (debug)
 437                 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
 438
 439         /* Anything greater than 7 is weird so we'll ignore it. */
 440         if (port > UHCI_RH_MAXCHILD) {
 441                 dev_info(uhci_dev(uhci), "port count misdetected? "
 442                                 "forcing to 2 ports\n");
 443                 port = 2;
 444         }
 445         uhci->rh_numports = port;
 446
 447         /* Kick BIOS off this hardware and reset if the controller
 448          * isn't already safely quiescent.
 449          */
 450         check_and_reset_hc(uhci);
 451         return 0;
 452 }
 453
 454 /* Make sure the controller is quiescent and that we're not using it
 455  * any more.  This is mainly for the benefit of programs which, like kexec,
 456  * expect the hardware to be idle: not doing DMA or generating IRQs.
 457  *
 458  * This routine may be called in a damaged or failing kernel.  Hence we
 459  * do not acquire the spinlock before shutting down the controller.
 460  */
 461 static void uhci_shutdown(struct pci_dev *pdev)
 462 {
 463         struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
 464
 465         hc_died(hcd_to_uhci(hcd));
 466 }
 467
 468 /*
 469  * Allocate a frame list, and then setup the skeleton
 470  *
 471  * The hardware doesn't really know any difference
 472  * in the queues, but the order does matter for the
 473  * protocols higher up. The order is:
 474  *
 475  *  - any isochronous events handled before any
 476  *    of the queues. We don't do that here, because
 477  *    we'll create the actual TD entries on demand.
 478  *  - The first queue is the interrupt queue.
 479  *  - The second queue is the control queue, split into low- and full-speed
 480  *  - The third queue is bulk queue.
 481  *  - The fourth queue is the bandwidth reclamation queue, which loops back
 482  *    to the full-speed control queue.
 483  */
 484 static int uhci_start(struct usb_hcd *hcd)
 485 {
 486         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 487         int retval = -EBUSY;
 488         int i;
 489         struct dentry *dentry;
 490
 491         hcd->uses_new_polling = 1;
 492
 493         spin_lock_init(&uhci->lock);
 494
 495         INIT_LIST_HEAD(&uhci->idle_qh_list);
 496
 497         init_waitqueue_head(&uhci->waitqh);
 498
 499         if (DEBUG_CONFIGURED) {
 500                 dentry = debugfs_create_file(hcd->self.bus_name,
 501                                 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
 502                                 uhci, &uhci_debug_operations);
 503                 if (!dentry) {
 504                         dev_err(uhci_dev(uhci), "couldn't create uhci "
 505                                         "debugfs entry\n");
 506                         retval = -ENOMEM;
 507                         goto err_create_debug_entry;
 508                 }
 509                 uhci->dentry = dentry;
 510         }
 511
 512         uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
 513                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 514                         &uhci->frame_dma_handle, 0);
 515         if (!uhci->frame) {
 516                 dev_err(uhci_dev(uhci), "unable to allocate "
 517                                 "consistent memory for frame list\n");
 518                 goto err_alloc_frame;
 519         }
 520         memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
 521
 522         uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
 523                         GFP_KERNEL);
 524         if (!uhci->frame_cpu) {
 525                 dev_err(uhci_dev(uhci), "unable to allocate "
 526                                 "memory for frame pointers\n");
 527                 goto err_alloc_frame_cpu;
 528         }
 529
 530         uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
 531                         sizeof(struct uhci_td), 16, 0);
 532         if (!uhci->td_pool) {
 533                 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
 534                 goto err_create_td_pool;
 535         }
 536
 537         uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
 538                         sizeof(struct uhci_qh), 16, 0);
 539         if (!uhci->qh_pool) {
 540                 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
 541                 goto err_create_qh_pool;
 542         }
 543
 544         uhci->term_td = uhci_alloc_td(uhci);
 545         if (!uhci->term_td) {
 546                 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
 547                 goto err_alloc_term_td;
 548         }
 549
 550         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 551                 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
 552                 if (!uhci->skelqh[i]) {
 553                         dev_err(uhci_dev(uhci), "unable to allocate QH\n");
 554                         goto err_alloc_skelqh;
 555                 }
 556         }
 557
 558         /*
 559          * 8 Interrupt queues; link all higher int queues to int1,
 560          * then link int1 to control and control to bulk
 561          */
 562         uhci->skel_int128_qh->link =
 563                         uhci->skel_int64_qh->link =
 564                         uhci->skel_int32_qh->link =
 565                         uhci->skel_int16_qh->link =
 566                         uhci->skel_int8_qh->link =
 567                         uhci->skel_int4_qh->link =
 568                         uhci->skel_int2_qh->link = UHCI_PTR_QH |
 569                         cpu_to_le32(uhci->skel_int1_qh->dma_handle);
 570
 571         uhci->skel_int1_qh->link = UHCI_PTR_QH |
 572                         cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
 573         uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
 574                         cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
 575         uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
 576                         cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
 577         uhci->skel_bulk_qh->link = UHCI_PTR_QH |
 578                         cpu_to_le32(uhci->skel_term_qh->dma_handle);
 579
 580         /* This dummy TD is to work around a bug in Intel PIIX controllers */
 581         uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
 582                 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
 583         uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
 584
 585         uhci->skel_term_qh->link = UHCI_PTR_TERM;
 586         uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
 587
 588         /*
 589          * Fill the frame list: make all entries point to the proper
 590          * interrupt queue.
 591          *
 592          * The interrupt queues will be interleaved as evenly as possible.
 593          * There's not much to be done about period-1 interrupts; they have
 594          * to occur in every frame.  But we can schedule period-2 interrupts
 595          * in odd-numbered frames, period-4 interrupts in frames congruent
 596          * to 2 (mod 4), and so on.  This way each frame only has two
 597          * interrupt QHs, which will help spread out bandwidth utilization.
 598          */
 599         for (i = 0; i < UHCI_NUMFRAMES; i++) {
 600                 int irq;
 601
 602                 /*
 603                  * ffs (Find First bit Set) does exactly what we need:
 604                  * 1,3,5,...  => ffs = 0 => use skel_int2_qh = skelqh[8],
 605                  * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
 606                  * ffs >= 7 => not on any high-period queue, so use
 607                  *      skel_int1_qh = skelqh[9].
 608                  * Add UHCI_NUMFRAMES to insure at least one bit is set.
 609                  */
 610                 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
 611                 if (irq <= 1)
 612                         irq = 9;
 613
 614                 /* Only place we don't use the frame list routines */
 615                 uhci->frame[i] = UHCI_PTR_QH |
 616                                 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
 617         }
 618
 619         /*
 620          * Some architectures require a full mb() to enforce completion of
 621          * the memory writes above before the I/O transfers in configure_hc().
 622          */
 623         mb();
 624
 625         configure_hc(uhci);
 626         uhci->is_initialized = 1;
 627         start_rh(uhci);
 628         return 0;
 629
 630 /*
 631  * error exits:
 632  */
 633 err_alloc_skelqh:
 634         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 635                 if (uhci->skelqh[i])
 636                         uhci_free_qh(uhci, uhci->skelqh[i]);
 637         }
 638
 639         uhci_free_td(uhci, uhci->term_td);
 640
 641 err_alloc_term_td:
 642         dma_pool_destroy(uhci->qh_pool);
 643
 644 err_create_qh_pool:
 645         dma_pool_destroy(uhci->td_pool);
 646
 647 err_create_td_pool:
 648         kfree(uhci->frame_cpu);
 649
 650 err_alloc_frame_cpu:
 651         dma_free_coherent(uhci_dev(uhci),
 652                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 653                         uhci->frame, uhci->frame_dma_handle);
 654
 655 err_alloc_frame:
 656         debugfs_remove(uhci->dentry);
 657
 658 err_create_debug_entry:
 659         return retval;
 660 }
 661
 662 static void uhci_stop(struct usb_hcd *hcd)
 663 {
 664         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 665
 666         spin_lock_irq(&uhci->lock);
 667         if (!uhci->hc_inaccessible)
 668                 hc_died(uhci);
 669         uhci_scan_schedule(uhci, NULL);
 670         spin_unlock_irq(&uhci->lock);
 671
 672         release_uhci(uhci);
 673 }
 674
 675 #ifdef CONFIG_PM
 676 static int uhci_rh_suspend(struct usb_hcd *hcd)
 677 {
 678         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 679         int rc = 0;
 680
 681         spin_lock_irq(&uhci->lock);
 682         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
 683                 rc = -ESHUTDOWN;
 684         else if (!uhci->hc_inaccessible)
 685                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 686         spin_unlock_irq(&uhci->lock);
 687         return rc;
 688 }
 689
 690 static int uhci_rh_resume(struct usb_hcd *hcd)
 691 {
 692         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 693         int rc = 0;
 694
 695         spin_lock_irq(&uhci->lock);
 696         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 697                 dev_warn(&hcd->self.root_hub->dev, "HC isn't running!\n");
 698                 rc = -ESHUTDOWN;
 699         } else if (!uhci->hc_inaccessible)
 700                 wakeup_rh(uhci);
 701         spin_unlock_irq(&uhci->lock);
 702         return rc;
 703 }
 704
 705 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
 706 {
 707         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 708         int rc = 0;
 709
 710         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 711
 712         spin_lock_irq(&uhci->lock);
 713         if (uhci->hc_inaccessible)      /* Dead or already suspended */
 714                 goto done;
 715
 716         if (uhci->rh_state > UHCI_RH_SUSPENDED) {
 717                 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
 718                 rc = -EBUSY;
 719                 goto done;
 720         };
 721
 722         /* All PCI host controllers are required to disable IRQ generation
 723          * at the source, so we must turn off PIRQ.
 724          */
 725         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
 726         mb();
 727         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 728         uhci->hc_inaccessible = 1;
 729         hcd->poll_rh = 0;
 730
 731         /* FIXME: Enable non-PME# remote wakeup? */
 732
 733 done:
 734         spin_unlock_irq(&uhci->lock);
 735         return rc;
 736 }
 737
 738 static int uhci_resume(struct usb_hcd *hcd)
 739 {
 740         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 741
 742         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 743
 744         /* Since we aren't in D3 any more, it's safe to set this flag
 745          * even if the controller was dead.  It might not even be dead
 746          * any more, if the firmware or quirks code has reset it.
 747          */
 748         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 749         mb();
 750
 751         if (uhci->rh_state == UHCI_RH_RESET)    /* Dead */
 752                 return 0;
 753
 754         spin_lock_irq(&uhci->lock);
 755
 756         /* FIXME: Disable non-PME# remote wakeup? */
 757
 758         uhci->hc_inaccessible = 0;
 759
 760         /* The BIOS may have changed the controller settings during a
 761          * system wakeup.  Check it and reconfigure to avoid problems.
 762          */
 763         check_and_reset_hc(uhci);
 764         configure_hc(uhci);
 765
 766         if (uhci->rh_state == UHCI_RH_RESET) {
 767
 768                 /* The controller had to be reset */
 769                 usb_root_hub_lost_power(hcd->self.root_hub);
 770                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 771         }
 772
 773         spin_unlock_irq(&uhci->lock);
 774
 775         if (!uhci->working_RD) {
 776                 /* Suspended root hub needs to be polled */
 777                 hcd->poll_rh = 1;
 778                 usb_hcd_poll_rh_status(hcd);
 779         }
 780         return 0;
 781 }
 782 #endif
 783
 784 /* Wait until a particular device/endpoint's QH is idle, and free it */
 785 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
 786                 struct usb_host_endpoint *hep)
 787 {
 788         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 789         struct uhci_qh *qh;
 790
 791         spin_lock_irq(&uhci->lock);
 792         qh = (struct uhci_qh *) hep->hcpriv;
 793         if (qh == NULL)
 794                 goto done;
 795
 796         while (qh->state != QH_STATE_IDLE) {
 797                 ++uhci->num_waiting;
 798                 spin_unlock_irq(&uhci->lock);
 799                 wait_event_interruptible(uhci->waitqh,
 800                                 qh->state == QH_STATE_IDLE);
 801                 spin_lock_irq(&uhci->lock);
 802                 --uhci->num_waiting;
 803         }
 804
 805         uhci_free_qh(uhci, qh);
 806 done:
 807         spin_unlock_irq(&uhci->lock);
 808 }
 809
 810 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
 811 {
 812         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 813         unsigned frame_number;
 814         unsigned delta;
 815
 816         /* Minimize latency by avoiding the spinlock */
 817         frame_number = uhci->frame_number;
 818         barrier();
 819         delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
 820                         (UHCI_NUMFRAMES - 1);
 821         return frame_number + delta;
 822 }
 823
 824 static const char hcd_name[] = "uhci_hcd";
 825
 826 static const struct hc_driver uhci_driver = {
 827         .description =          hcd_name,
 828         .product_desc =         "UHCI Host Controller",
 829         .hcd_priv_size =        sizeof(struct uhci_hcd),
 830
 831         /* Generic hardware linkage */
 832         .irq =                  uhci_irq,
 833         .flags =                HCD_USB11,
 834
 835         /* Basic lifecycle operations */
 836         .reset =                uhci_init,
 837         .start =                uhci_start,
 838 #ifdef CONFIG_PM
 839         .suspend =              uhci_suspend,
 840         .resume =               uhci_resume,
 841         .bus_suspend =          uhci_rh_suspend,
 842         .bus_resume =           uhci_rh_resume,
 843 #endif
 844         .stop =                 uhci_stop,
 845
 846         .urb_enqueue =          uhci_urb_enqueue,
 847         .urb_dequeue =          uhci_urb_dequeue,
 848
 849         .endpoint_disable =     uhci_hcd_endpoint_disable,
 850         .get_frame_number =     uhci_hcd_get_frame_number,
 851
 852         .hub_status_data =      uhci_hub_status_data,
 853         .hub_control =          uhci_hub_control,
 854 };
 855
 856 static const struct pci_device_id uhci_pci_ids[] = { {
 857         /* handle any USB UHCI controller */
 858         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
 859         .driver_data =  (unsigned long) &uhci_driver,
 860         }, { /* end: all zeroes */ }
 861 };
 862
 863 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
 864
 865 static struct pci_driver uhci_pci_driver = {
 866         .name =         (char *)hcd_name,
 867         .id_table =     uhci_pci_ids,
 868
 869         .probe =        usb_hcd_pci_probe,
 870         .remove =       usb_hcd_pci_remove,
 871         .shutdown =     uhci_shutdown,
 872
 873 #ifdef  CONFIG_PM
 874         .suspend =      usb_hcd_pci_suspend,
 875         .resume =       usb_hcd_pci_resume,
 876 #endif  /* PM */
 877 };
 878
 879 static int __init uhci_hcd_init(void)
 880 {
 881         int retval = -ENOMEM;
 882
 883         printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
 884
 885         if (usb_disabled())
 886                 return -ENODEV;
 887
 888         if (DEBUG_CONFIGURED) {
 889                 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
 890                 if (!errbuf)
 891                         goto errbuf_failed;
 892                 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
 893                 if (!uhci_debugfs_root)
 894                         goto debug_failed;
 895         }
 896
 897         uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
 898                 sizeof(struct urb_priv), 0, 0, NULL, NULL);
 899         if (!uhci_up_cachep)
 900                 goto up_failed;
 901
 902         retval = pci_register_driver(&uhci_pci_driver);
 903         if (retval)
 904                 goto init_failed;
 905
 906         return 0;
 907
 908 init_failed:
 909         if (kmem_cache_destroy(uhci_up_cachep))
 910                 warn("not all urb_privs were freed!");
 911
 912 up_failed:
 913         debugfs_remove(uhci_debugfs_root);
 914
 915 debug_failed:
 916         kfree(errbuf);
 917
 918 errbuf_failed:
 919
 920         return retval;
 921 }
 922
 923 static void __exit uhci_hcd_cleanup(void)
 924 {
 925         pci_unregister_driver(&uhci_pci_driver);
 926
 927         if (kmem_cache_destroy(uhci_up_cachep))
 928                 warn("not all urb_privs were freed!");
 929
 930         debugfs_remove(uhci_debugfs_root);
 931         kfree(errbuf);
 932 }
 933
 934 module_init(uhci_hcd_init);
 935 module_exit(uhci_hcd_cleanup);
 936
 937 MODULE_AUTHOR(DRIVER_AUTHOR);
 938 MODULE_DESCRIPTION(DRIVER_DESC);
 939 MODULE_LICENSE("GPL");