[PATCH] UHCI: Reimplement FSBR
[safe/jmp/linux-2.6] / drivers / usb / host / uhci-hcd.c
1 /*
2  * Universal Host Controller Interface driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * (C) Copyright 1999 Linus Torvalds
7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8  * (C) Copyright 1999 Randy Dunlap
9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16  * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
17  *
18  * Intel documents this fairly well, and as far as I know there
19  * are no royalties or anything like that, but even so there are
20  * people who decided that they want to do the same thing in a
21  * completely different way.
22  *
23  */
24
25 #include <linux/config.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/delay.h>
31 #include <linux/ioport.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/smp_lock.h>
35 #include <linux/errno.h>
36 #include <linux/unistd.h>
37 #include <linux/interrupt.h>
38 #include <linux/spinlock.h>
39 #include <linux/debugfs.h>
40 #include <linux/pm.h>
41 #include <linux/dmapool.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/usb.h>
44 #include <linux/bitops.h>
45
46 #include <asm/uaccess.h>
47 #include <asm/io.h>
48 #include <asm/irq.h>
49 #include <asm/system.h>
50
51 #include "../core/hcd.h"
52 #include "uhci-hcd.h"
53 #include "pci-quirks.h"
54
55 /*
56  * Version Information
57  */
58 #define DRIVER_VERSION "v3.0"
59 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
60 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
61 Alan Stern"
62 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
63
64 /*
65  * debug = 0, no debugging messages
66  * debug = 1, dump failed URBs except for stalls
67  * debug = 2, dump all failed URBs (including stalls)
68  *            show all queues in /debug/uhci/[pci_addr]
69  * debug = 3, show all TDs in URBs when dumping
70  */
71 #ifdef DEBUG
72 #define DEBUG_CONFIGURED        1
73 static int debug = 1;
74 module_param(debug, int, S_IRUGO | S_IWUSR);
75 MODULE_PARM_DESC(debug, "Debug level");
76
77 #else
78 #define DEBUG_CONFIGURED        0
79 #define debug                   0
80 #endif
81
82 static char *errbuf;
83 #define ERRBUF_LEN    (32 * 1024)
84
85 static kmem_cache_t *uhci_up_cachep;    /* urb_priv */
86
87 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
88 static void wakeup_rh(struct uhci_hcd *uhci);
89 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
90
91 #include "uhci-debug.c"
92 #include "uhci-q.c"
93 #include "uhci-hub.c"
94
95 /*
96  * Finish up a host controller reset and update the recorded state.
97  */
98 static void finish_reset(struct uhci_hcd *uhci)
99 {
100         int port;
101
102         /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
103          * bits in the port status and control registers.
104          * We have to clear them by hand.
105          */
106         for (port = 0; port < uhci->rh_numports; ++port)
107                 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
108
109         uhci->port_c_suspend = uhci->resuming_ports = 0;
110         uhci->rh_state = UHCI_RH_RESET;
111         uhci->is_stopped = UHCI_IS_STOPPED;
112         uhci_to_hcd(uhci)->state = HC_STATE_HALT;
113         uhci_to_hcd(uhci)->poll_rh = 0;
114 }
115
116 /*
117  * Last rites for a defunct/nonfunctional controller
118  * or one we don't want to use any more.
119  */
120 static void hc_died(struct uhci_hcd *uhci)
121 {
122         uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
123         finish_reset(uhci);
124         uhci->hc_inaccessible = 1;
125 }
126
127 /*
128  * Initialize a controller that was newly discovered or has just been
129  * resumed.  In either case we can't be sure of its previous state.
130  */
131 static void check_and_reset_hc(struct uhci_hcd *uhci)
132 {
133         if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
134                 finish_reset(uhci);
135 }
136
137 /*
138  * Store the basic register settings needed by the controller.
139  */
140 static void configure_hc(struct uhci_hcd *uhci)
141 {
142         /* Set the frame length to the default: 1 ms exactly */
143         outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
144
145         /* Store the frame list base address */
146         outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
147
148         /* Set the current frame number */
149         outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
150
151         /* Mark controller as not halted before we enable interrupts */
152         uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
153         mb();
154
155         /* Enable PIRQ */
156         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
157                         USBLEGSUP_DEFAULT);
158 }
159
160
161 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
162 {
163         int port;
164
165         switch (to_pci_dev(uhci_dev(uhci))->vendor) {
166             default:
167                 break;
168
169             case PCI_VENDOR_ID_GENESYS:
170                 /* Genesys Logic's GL880S controllers don't generate
171                  * resume-detect interrupts.
172                  */
173                 return 1;
174
175             case PCI_VENDOR_ID_INTEL:
176                 /* Some of Intel's USB controllers have a bug that causes
177                  * resume-detect interrupts if any port has an over-current
178                  * condition.  To make matters worse, some motherboards
179                  * hardwire unused USB ports' over-current inputs active!
180                  * To prevent problems, we will not enable resume-detect
181                  * interrupts if any ports are OC.
182                  */
183                 for (port = 0; port < uhci->rh_numports; ++port) {
184                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
185                                         USBPORTSC_OC)
186                                 return 1;
187                 }
188                 break;
189         }
190         return 0;
191 }
192
193 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
194 __releases(uhci->lock)
195 __acquires(uhci->lock)
196 {
197         int auto_stop;
198         int int_enable;
199
200         auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
201         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
202                         (auto_stop ? " (auto-stop)" : ""));
203
204         /* If we get a suspend request when we're already auto-stopped
205          * then there's nothing to do.
206          */
207         if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
208                 uhci->rh_state = new_state;
209                 return;
210         }
211
212         /* Enable resume-detect interrupts if they work.
213          * Then enter Global Suspend mode, still configured.
214          */
215         uhci->working_RD = 1;
216         int_enable = USBINTR_RESUME;
217         if (resume_detect_interrupts_are_broken(uhci)) {
218                 uhci->working_RD = int_enable = 0;
219         }
220         outw(int_enable, uhci->io_addr + USBINTR);
221         outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
222         mb();
223         udelay(5);
224
225         /* If we're auto-stopping then no devices have been attached
226          * for a while, so there shouldn't be any active URBs and the
227          * controller should stop after a few microseconds.  Otherwise
228          * we will give the controller one frame to stop.
229          */
230         if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
231                 uhci->rh_state = UHCI_RH_SUSPENDING;
232                 spin_unlock_irq(&uhci->lock);
233                 msleep(1);
234                 spin_lock_irq(&uhci->lock);
235                 if (uhci->hc_inaccessible)      /* Died */
236                         return;
237         }
238         if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
239                 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
240
241         uhci_get_current_frame_number(uhci);
242         smp_wmb();
243
244         uhci->rh_state = new_state;
245         uhci->is_stopped = UHCI_IS_STOPPED;
246         uhci_to_hcd(uhci)->poll_rh = !int_enable;
247
248         uhci_scan_schedule(uhci, NULL);
249         uhci_fsbr_off(uhci);
250 }
251
252 static void start_rh(struct uhci_hcd *uhci)
253 {
254         uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
255         uhci->is_stopped = 0;
256         smp_wmb();
257
258         /* Mark it configured and running with a 64-byte max packet.
259          * All interrupts are enabled, even though RESUME won't do anything.
260          */
261         outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
262         outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
263                         uhci->io_addr + USBINTR);
264         mb();
265         uhci->rh_state = UHCI_RH_RUNNING;
266         uhci_to_hcd(uhci)->poll_rh = 1;
267 }
268
269 static void wakeup_rh(struct uhci_hcd *uhci)
270 __releases(uhci->lock)
271 __acquires(uhci->lock)
272 {
273         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
274                         uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
275                                 " (auto-start)" : "");
276
277         /* If we are auto-stopped then no devices are attached so there's
278          * no need for wakeup signals.  Otherwise we send Global Resume
279          * for 20 ms.
280          */
281         if (uhci->rh_state == UHCI_RH_SUSPENDED) {
282                 uhci->rh_state = UHCI_RH_RESUMING;
283                 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
284                                 uhci->io_addr + USBCMD);
285                 spin_unlock_irq(&uhci->lock);
286                 msleep(20);
287                 spin_lock_irq(&uhci->lock);
288                 if (uhci->hc_inaccessible)      /* Died */
289                         return;
290
291                 /* End Global Resume and wait for EOP to be sent */
292                 outw(USBCMD_CF, uhci->io_addr + USBCMD);
293                 mb();
294                 udelay(4);
295                 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
296                         dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
297         }
298
299         start_rh(uhci);
300
301         /* Restart root hub polling */
302         mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
303 }
304
305 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
306 {
307         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
308         unsigned short status;
309         unsigned long flags;
310
311         /*
312          * Read the interrupt status, and write it back to clear the
313          * interrupt cause.  Contrary to the UHCI specification, the
314          * "HC Halted" status bit is persistent: it is RO, not R/WC.
315          */
316         status = inw(uhci->io_addr + USBSTS);
317         if (!(status & ~USBSTS_HCH))    /* shared interrupt, not mine */
318                 return IRQ_NONE;
319         outw(status, uhci->io_addr + USBSTS);           /* Clear it */
320
321         if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
322                 if (status & USBSTS_HSE)
323                         dev_err(uhci_dev(uhci), "host system error, "
324                                         "PCI problems?\n");
325                 if (status & USBSTS_HCPE)
326                         dev_err(uhci_dev(uhci), "host controller process "
327                                         "error, something bad happened!\n");
328                 if (status & USBSTS_HCH) {
329                         spin_lock_irqsave(&uhci->lock, flags);
330                         if (uhci->rh_state >= UHCI_RH_RUNNING) {
331                                 dev_err(uhci_dev(uhci),
332                                         "host controller halted, "
333                                         "very bad!\n");
334                                 if (debug > 1 && errbuf) {
335                                         /* Print the schedule for debugging */
336                                         uhci_sprint_schedule(uhci,
337                                                         errbuf, ERRBUF_LEN);
338                                         lprintk(errbuf);
339                                 }
340                                 hc_died(uhci);
341
342                                 /* Force a callback in case there are
343                                  * pending unlinks */
344                                 mod_timer(&hcd->rh_timer, jiffies);
345                         }
346                         spin_unlock_irqrestore(&uhci->lock, flags);
347                 }
348         }
349
350         if (status & USBSTS_RD)
351                 usb_hcd_poll_rh_status(hcd);
352         else {
353                 spin_lock_irqsave(&uhci->lock, flags);
354                 uhci_scan_schedule(uhci, regs);
355                 spin_unlock_irqrestore(&uhci->lock, flags);
356         }
357
358         return IRQ_HANDLED;
359 }
360
361 /*
362  * Store the current frame number in uhci->frame_number if the controller
363  * is runnning
364  */
365 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
366 {
367         if (!uhci->is_stopped)
368                 uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
369 }
370
371 /*
372  * De-allocate all resources
373  */
374 static void release_uhci(struct uhci_hcd *uhci)
375 {
376         int i;
377
378         if (DEBUG_CONFIGURED) {
379                 spin_lock_irq(&uhci->lock);
380                 uhci->is_initialized = 0;
381                 spin_unlock_irq(&uhci->lock);
382
383                 debugfs_remove(uhci->dentry);
384         }
385
386         for (i = 0; i < UHCI_NUM_SKELQH; i++)
387                 uhci_free_qh(uhci, uhci->skelqh[i]);
388
389         uhci_free_td(uhci, uhci->term_td);
390
391         dma_pool_destroy(uhci->qh_pool);
392
393         dma_pool_destroy(uhci->td_pool);
394
395         kfree(uhci->frame_cpu);
396
397         dma_free_coherent(uhci_dev(uhci),
398                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
399                         uhci->frame, uhci->frame_dma_handle);
400 }
401
402 static int uhci_reset(struct usb_hcd *hcd)
403 {
404         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
405         unsigned io_size = (unsigned) hcd->rsrc_len;
406         int port;
407
408         uhci->io_addr = (unsigned long) hcd->rsrc_start;
409
410         /* The UHCI spec says devices must have 2 ports, and goes on to say
411          * they may have more but gives no way to determine how many there
412          * are.  However according to the UHCI spec, Bit 7 of the port
413          * status and control register is always set to 1.  So we try to
414          * use this to our advantage.  Another common failure mode when
415          * a nonexistent register is addressed is to return all ones, so
416          * we test for that also.
417          */
418         for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
419                 unsigned int portstatus;
420
421                 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
422                 if (!(portstatus & 0x0080) || portstatus == 0xffff)
423                         break;
424         }
425         if (debug)
426                 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
427
428         /* Anything greater than 7 is weird so we'll ignore it. */
429         if (port > UHCI_RH_MAXCHILD) {
430                 dev_info(uhci_dev(uhci), "port count misdetected? "
431                                 "forcing to 2 ports\n");
432                 port = 2;
433         }
434         uhci->rh_numports = port;
435
436         /* Kick BIOS off this hardware and reset if the controller
437          * isn't already safely quiescent.
438          */
439         check_and_reset_hc(uhci);
440         return 0;
441 }
442
443 /* Make sure the controller is quiescent and that we're not using it
444  * any more.  This is mainly for the benefit of programs which, like kexec,
445  * expect the hardware to be idle: not doing DMA or generating IRQs.
446  *
447  * This routine may be called in a damaged or failing kernel.  Hence we
448  * do not acquire the spinlock before shutting down the controller.
449  */
450 static void uhci_shutdown(struct pci_dev *pdev)
451 {
452         struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
453
454         hc_died(hcd_to_uhci(hcd));
455 }
456
457 /*
458  * Allocate a frame list, and then setup the skeleton
459  *
460  * The hardware doesn't really know any difference
461  * in the queues, but the order does matter for the
462  * protocols higher up. The order is:
463  *
464  *  - any isochronous events handled before any
465  *    of the queues. We don't do that here, because
466  *    we'll create the actual TD entries on demand.
467  *  - The first queue is the interrupt queue.
468  *  - The second queue is the control queue, split into low- and full-speed
469  *  - The third queue is bulk queue.
470  *  - The fourth queue is the bandwidth reclamation queue, which loops back
471  *    to the full-speed control queue.
472  */
473 static int uhci_start(struct usb_hcd *hcd)
474 {
475         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
476         int retval = -EBUSY;
477         int i;
478         struct dentry *dentry;
479
480         hcd->uses_new_polling = 1;
481
482         spin_lock_init(&uhci->lock);
483
484         INIT_LIST_HEAD(&uhci->idle_qh_list);
485
486         init_waitqueue_head(&uhci->waitqh);
487
488         if (DEBUG_CONFIGURED) {
489                 dentry = debugfs_create_file(hcd->self.bus_name,
490                                 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
491                                 uhci, &uhci_debug_operations);
492                 if (!dentry) {
493                         dev_err(uhci_dev(uhci), "couldn't create uhci "
494                                         "debugfs entry\n");
495                         retval = -ENOMEM;
496                         goto err_create_debug_entry;
497                 }
498                 uhci->dentry = dentry;
499         }
500
501         uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
502                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
503                         &uhci->frame_dma_handle, 0);
504         if (!uhci->frame) {
505                 dev_err(uhci_dev(uhci), "unable to allocate "
506                                 "consistent memory for frame list\n");
507                 goto err_alloc_frame;
508         }
509         memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
510
511         uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
512                         GFP_KERNEL);
513         if (!uhci->frame_cpu) {
514                 dev_err(uhci_dev(uhci), "unable to allocate "
515                                 "memory for frame pointers\n");
516                 goto err_alloc_frame_cpu;
517         }
518
519         uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
520                         sizeof(struct uhci_td), 16, 0);
521         if (!uhci->td_pool) {
522                 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
523                 goto err_create_td_pool;
524         }
525
526         uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
527                         sizeof(struct uhci_qh), 16, 0);
528         if (!uhci->qh_pool) {
529                 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
530                 goto err_create_qh_pool;
531         }
532
533         uhci->term_td = uhci_alloc_td(uhci);
534         if (!uhci->term_td) {
535                 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
536                 goto err_alloc_term_td;
537         }
538
539         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
540                 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
541                 if (!uhci->skelqh[i]) {
542                         dev_err(uhci_dev(uhci), "unable to allocate QH\n");
543                         goto err_alloc_skelqh;
544                 }
545         }
546
547         /*
548          * 8 Interrupt queues; link all higher int queues to int1,
549          * then link int1 to control and control to bulk
550          */
551         uhci->skel_int128_qh->link =
552                         uhci->skel_int64_qh->link =
553                         uhci->skel_int32_qh->link =
554                         uhci->skel_int16_qh->link =
555                         uhci->skel_int8_qh->link =
556                         uhci->skel_int4_qh->link =
557                         uhci->skel_int2_qh->link = UHCI_PTR_QH |
558                         cpu_to_le32(uhci->skel_int1_qh->dma_handle);
559
560         uhci->skel_int1_qh->link = UHCI_PTR_QH |
561                         cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
562         uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
563                         cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
564         uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
565                         cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
566         uhci->skel_bulk_qh->link = UHCI_PTR_QH |
567                         cpu_to_le32(uhci->skel_term_qh->dma_handle);
568
569         /* This dummy TD is to work around a bug in Intel PIIX controllers */
570         uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
571                 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
572         uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
573
574         uhci->skel_term_qh->link = UHCI_PTR_TERM;
575         uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
576
577         /*
578          * Fill the frame list: make all entries point to the proper
579          * interrupt queue.
580          *
581          * The interrupt queues will be interleaved as evenly as possible.
582          * There's not much to be done about period-1 interrupts; they have
583          * to occur in every frame.  But we can schedule period-2 interrupts
584          * in odd-numbered frames, period-4 interrupts in frames congruent
585          * to 2 (mod 4), and so on.  This way each frame only has two
586          * interrupt QHs, which will help spread out bandwidth utilization.
587          */
588         for (i = 0; i < UHCI_NUMFRAMES; i++) {
589                 int irq;
590
591                 /*
592                  * ffs (Find First bit Set) does exactly what we need:
593                  * 1,3,5,...  => ffs = 0 => use skel_int2_qh = skelqh[8],
594                  * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
595                  * ffs >= 7 => not on any high-period queue, so use
596                  *      skel_int1_qh = skelqh[9].
597                  * Add UHCI_NUMFRAMES to insure at least one bit is set.
598                  */
599                 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
600                 if (irq <= 1)
601                         irq = 9;
602
603                 /* Only place we don't use the frame list routines */
604                 uhci->frame[i] = UHCI_PTR_QH |
605                                 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
606         }
607
608         /*
609          * Some architectures require a full mb() to enforce completion of
610          * the memory writes above before the I/O transfers in configure_hc().
611          */
612         mb();
613
614         configure_hc(uhci);
615         uhci->is_initialized = 1;
616         start_rh(uhci);
617         return 0;
618
619 /*
620  * error exits:
621  */
622 err_alloc_skelqh:
623         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
624                 if (uhci->skelqh[i])
625                         uhci_free_qh(uhci, uhci->skelqh[i]);
626         }
627
628         uhci_free_td(uhci, uhci->term_td);
629
630 err_alloc_term_td:
631         dma_pool_destroy(uhci->qh_pool);
632
633 err_create_qh_pool:
634         dma_pool_destroy(uhci->td_pool);
635
636 err_create_td_pool:
637         kfree(uhci->frame_cpu);
638
639 err_alloc_frame_cpu:
640         dma_free_coherent(uhci_dev(uhci),
641                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
642                         uhci->frame, uhci->frame_dma_handle);
643
644 err_alloc_frame:
645         debugfs_remove(uhci->dentry);
646
647 err_create_debug_entry:
648         return retval;
649 }
650
651 static void uhci_stop(struct usb_hcd *hcd)
652 {
653         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
654
655         spin_lock_irq(&uhci->lock);
656         if (!uhci->hc_inaccessible)
657                 hc_died(uhci);
658         uhci_scan_schedule(uhci, NULL);
659         spin_unlock_irq(&uhci->lock);
660
661         release_uhci(uhci);
662 }
663
664 #ifdef CONFIG_PM
665 static int uhci_rh_suspend(struct usb_hcd *hcd)
666 {
667         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
668
669         spin_lock_irq(&uhci->lock);
670         if (!uhci->hc_inaccessible)             /* Not dead */
671                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
672         spin_unlock_irq(&uhci->lock);
673         return 0;
674 }
675
676 static int uhci_rh_resume(struct usb_hcd *hcd)
677 {
678         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
679         int rc = 0;
680
681         spin_lock_irq(&uhci->lock);
682         if (uhci->hc_inaccessible) {
683                 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
684                         dev_warn(uhci_dev(uhci), "HC isn't running!\n");
685                         rc = -ENODEV;
686                 }
687                 /* Otherwise the HC is dead */
688         } else
689                 wakeup_rh(uhci);
690         spin_unlock_irq(&uhci->lock);
691         return rc;
692 }
693
694 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
695 {
696         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
697         int rc = 0;
698
699         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
700
701         spin_lock_irq(&uhci->lock);
702         if (uhci->hc_inaccessible)      /* Dead or already suspended */
703                 goto done;
704
705         if (uhci->rh_state > UHCI_RH_SUSPENDED) {
706                 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
707                 rc = -EBUSY;
708                 goto done;
709         };
710
711         /* All PCI host controllers are required to disable IRQ generation
712          * at the source, so we must turn off PIRQ.
713          */
714         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
715         mb();
716         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
717         uhci->hc_inaccessible = 1;
718         hcd->poll_rh = 0;
719
720         /* FIXME: Enable non-PME# remote wakeup? */
721
722 done:
723         spin_unlock_irq(&uhci->lock);
724         return rc;
725 }
726
727 static int uhci_resume(struct usb_hcd *hcd)
728 {
729         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
730
731         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
732
733         /* Since we aren't in D3 any more, it's safe to set this flag
734          * even if the controller was dead.  It might not even be dead
735          * any more, if the firmware or quirks code has reset it.
736          */
737         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
738         mb();
739
740         if (uhci->rh_state == UHCI_RH_RESET)    /* Dead */
741                 return 0;
742         spin_lock_irq(&uhci->lock);
743
744         /* FIXME: Disable non-PME# remote wakeup? */
745
746         uhci->hc_inaccessible = 0;
747
748         /* The BIOS may have changed the controller settings during a
749          * system wakeup.  Check it and reconfigure to avoid problems.
750          */
751         check_and_reset_hc(uhci);
752         configure_hc(uhci);
753
754         if (uhci->rh_state == UHCI_RH_RESET) {
755
756                 /* The controller had to be reset */
757                 usb_root_hub_lost_power(hcd->self.root_hub);
758                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
759         }
760
761         spin_unlock_irq(&uhci->lock);
762
763         if (!uhci->working_RD) {
764                 /* Suspended root hub needs to be polled */
765                 hcd->poll_rh = 1;
766                 usb_hcd_poll_rh_status(hcd);
767         }
768         return 0;
769 }
770 #endif
771
772 /* Wait until a particular device/endpoint's QH is idle, and free it */
773 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
774                 struct usb_host_endpoint *hep)
775 {
776         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
777         struct uhci_qh *qh;
778
779         spin_lock_irq(&uhci->lock);
780         qh = (struct uhci_qh *) hep->hcpriv;
781         if (qh == NULL)
782                 goto done;
783
784         while (qh->state != QH_STATE_IDLE) {
785                 ++uhci->num_waiting;
786                 spin_unlock_irq(&uhci->lock);
787                 wait_event_interruptible(uhci->waitqh,
788                                 qh->state == QH_STATE_IDLE);
789                 spin_lock_irq(&uhci->lock);
790                 --uhci->num_waiting;
791         }
792
793         uhci_free_qh(uhci, qh);
794 done:
795         spin_unlock_irq(&uhci->lock);
796 }
797
798 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
799 {
800         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
801         unsigned long flags;
802         int is_stopped;
803         int frame_number;
804
805         /* Minimize latency by avoiding the spinlock */
806         local_irq_save(flags);
807         is_stopped = uhci->is_stopped;
808         smp_rmb();
809         frame_number = (is_stopped ? uhci->frame_number :
810                         inw(uhci->io_addr + USBFRNUM));
811         local_irq_restore(flags);
812         return frame_number;
813 }
814
815 static const char hcd_name[] = "uhci_hcd";
816
817 static const struct hc_driver uhci_driver = {
818         .description =          hcd_name,
819         .product_desc =         "UHCI Host Controller",
820         .hcd_priv_size =        sizeof(struct uhci_hcd),
821
822         /* Generic hardware linkage */
823         .irq =                  uhci_irq,
824         .flags =                HCD_USB11,
825
826         /* Basic lifecycle operations */
827         .reset =                uhci_reset,
828         .start =                uhci_start,
829 #ifdef CONFIG_PM
830         .suspend =              uhci_suspend,
831         .resume =               uhci_resume,
832         .bus_suspend =          uhci_rh_suspend,
833         .bus_resume =           uhci_rh_resume,
834 #endif
835         .stop =                 uhci_stop,
836
837         .urb_enqueue =          uhci_urb_enqueue,
838         .urb_dequeue =          uhci_urb_dequeue,
839
840         .endpoint_disable =     uhci_hcd_endpoint_disable,
841         .get_frame_number =     uhci_hcd_get_frame_number,
842
843         .hub_status_data =      uhci_hub_status_data,
844         .hub_control =          uhci_hub_control,
845 };
846
847 static const struct pci_device_id uhci_pci_ids[] = { {
848         /* handle any USB UHCI controller */
849         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
850         .driver_data =  (unsigned long) &uhci_driver,
851         }, { /* end: all zeroes */ }
852 };
853
854 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
855
856 static struct pci_driver uhci_pci_driver = {
857         .name =         (char *)hcd_name,
858         .id_table =     uhci_pci_ids,
859
860         .probe =        usb_hcd_pci_probe,
861         .remove =       usb_hcd_pci_remove,
862         .shutdown =     uhci_shutdown,
863
864 #ifdef  CONFIG_PM
865         .suspend =      usb_hcd_pci_suspend,
866         .resume =       usb_hcd_pci_resume,
867 #endif  /* PM */
868 };
869  
870 static int __init uhci_hcd_init(void)
871 {
872         int retval = -ENOMEM;
873
874         printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
875
876         if (usb_disabled())
877                 return -ENODEV;
878
879         if (DEBUG_CONFIGURED) {
880                 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
881                 if (!errbuf)
882                         goto errbuf_failed;
883                 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
884                 if (!uhci_debugfs_root)
885                         goto debug_failed;
886         }
887
888         uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
889                 sizeof(struct urb_priv), 0, 0, NULL, NULL);
890         if (!uhci_up_cachep)
891                 goto up_failed;
892
893         retval = pci_register_driver(&uhci_pci_driver);
894         if (retval)
895                 goto init_failed;
896
897         return 0;
898
899 init_failed:
900         if (kmem_cache_destroy(uhci_up_cachep))
901                 warn("not all urb_privs were freed!");
902
903 up_failed:
904         debugfs_remove(uhci_debugfs_root);
905
906 debug_failed:
907         kfree(errbuf);
908
909 errbuf_failed:
910
911         return retval;
912 }
913
914 static void __exit uhci_hcd_cleanup(void) 
915 {
916         pci_unregister_driver(&uhci_pci_driver);
917         
918         if (kmem_cache_destroy(uhci_up_cachep))
919                 warn("not all urb_privs were freed!");
920
921         debugfs_remove(uhci_debugfs_root);
922         kfree(errbuf);
923 }
924
925 module_init(uhci_hcd_init);
926 module_exit(uhci_hcd_cleanup);
927
928 MODULE_AUTHOR(DRIVER_AUTHOR);
929 MODULE_DESCRIPTION(DRIVER_DESC);
930 MODULE_LICENSE("GPL");