SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/usb/host/uhci-hcd.c

   1 /*
   2  * Universal Host Controller Interface driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Linus Torvalds
   7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
   8  * (C) Copyright 1999 Randy Dunlap
   9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16  * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
  17  *
  18  * Intel documents this fairly well, and as far as I know there
  19  * are no royalties or anything like that, but even so there are
  20  * people who decided that they want to do the same thing in a
  21  * completely different way.
  22  *
  23  */
  24
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/pci.h>
  28 #include <linux/kernel.h>
  29 #include <linux/init.h>
  30 #include <linux/delay.h>
  31 #include <linux/ioport.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/smp_lock.h>
  35 #include <linux/errno.h>
  36 #include <linux/unistd.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/debugfs.h>
  40 #include <linux/pm.h>
  41 #include <linux/dmapool.h>
  42 #include <linux/dma-mapping.h>
  43 #include <linux/usb.h>
  44 #include <linux/bitops.h>
  45
  46 #include <asm/uaccess.h>
  47 #include <asm/io.h>
  48 #include <asm/irq.h>
  49 #include <asm/system.h>
  50
  51 #include "../core/hcd.h"
  52 #include "uhci-hcd.h"
  53 #include "pci-quirks.h"
  54
  55 /*
  56  * Version Information
  57  */
  58 #define DRIVER_VERSION "v3.0"
  59 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
  60 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
  61 Alan Stern"
  62 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
  63
  64 /*
  65  * debug = 0, no debugging messages
  66  * debug = 1, dump failed URBs except for stalls
  67  * debug = 2, dump all failed URBs (including stalls)
  68  *            show all queues in /debug/uhci/[pci_addr]
  69  * debug = 3, show all TDs in URBs when dumping
  70  */
  71 #ifdef DEBUG
  72 #define DEBUG_CONFIGURED        1
  73 static int debug = 1;
  74 module_param(debug, int, S_IRUGO | S_IWUSR);
  75 MODULE_PARM_DESC(debug, "Debug level");
  76
  77 #else
  78 #define DEBUG_CONFIGURED        0
  79 #define debug                   0
  80 #endif
  81
  82 static char *errbuf;
  83 #define ERRBUF_LEN    (32 * 1024)
  84
  85 static kmem_cache_t *uhci_up_cachep;    /* urb_priv */
  86
  87 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
  88 static void wakeup_rh(struct uhci_hcd *uhci);
  89 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
  90
  91 /* If a transfer is still active after this much time, turn off FSBR */
  92 #define IDLE_TIMEOUT    msecs_to_jiffies(50)
  93 #define FSBR_DELAY      msecs_to_jiffies(50)
  94
  95 /* When we timeout an idle transfer for FSBR, we'll switch it over to */
  96 /* depth first traversal. We'll do it in groups of this number of TDs */
  97 /* to make sure it doesn't hog all of the bandwidth */
  98 #define DEPTH_INTERVAL 5
  99
 100 #include "uhci-debug.c"
 101 #include "uhci-q.c"
 102 #include "uhci-hub.c"
 103
 104 /*
 105  * Finish up a host controller reset and update the recorded state.
 106  */
 107 static void finish_reset(struct uhci_hcd *uhci)
 108 {
 109         int port;
 110
 111         /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
 112          * bits in the port status and control registers.
 113          * We have to clear them by hand.
 114          */
 115         for (port = 0; port < uhci->rh_numports; ++port)
 116                 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
 117
 118         uhci->port_c_suspend = uhci->suspended_ports =
 119                         uhci->resuming_ports = 0;
 120         uhci->rh_state = UHCI_RH_RESET;
 121         uhci->is_stopped = UHCI_IS_STOPPED;
 122         uhci_to_hcd(uhci)->state = HC_STATE_HALT;
 123         uhci_to_hcd(uhci)->poll_rh = 0;
 124 }
 125
 126 /*
 127  * Last rites for a defunct/nonfunctional controller
 128  * or one we don't want to use any more.
 129  */
 130 static void hc_died(struct uhci_hcd *uhci)
 131 {
 132         uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
 133         finish_reset(uhci);
 134         uhci->hc_inaccessible = 1;
 135 }
 136
 137 /*
 138  * Initialize a controller that was newly discovered or has just been
 139  * resumed.  In either case we can't be sure of its previous state.
 140  */
 141 static void check_and_reset_hc(struct uhci_hcd *uhci)
 142 {
 143         if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
 144                 finish_reset(uhci);
 145 }
 146
 147 /*
 148  * Store the basic register settings needed by the controller.
 149  */
 150 static void configure_hc(struct uhci_hcd *uhci)
 151 {
 152         /* Set the frame length to the default: 1 ms exactly */
 153         outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
 154
 155         /* Store the frame list base address */
 156         outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
 157
 158         /* Set the current frame number */
 159         outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
 160
 161         /* Mark controller as not halted before we enable interrupts */
 162         uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
 163         mb();
 164
 165         /* Enable PIRQ */
 166         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
 167                         USBLEGSUP_DEFAULT);
 168 }
 169
 170
 171 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
 172 {
 173         int port;
 174
 175         switch (to_pci_dev(uhci_dev(uhci))->vendor) {
 176             default:
 177                 break;
 178
 179             case PCI_VENDOR_ID_GENESYS:
 180                 /* Genesys Logic's GL880S controllers don't generate
 181                  * resume-detect interrupts.
 182                  */
 183                 return 1;
 184
 185             case PCI_VENDOR_ID_INTEL:
 186                 /* Some of Intel's USB controllers have a bug that causes
 187                  * resume-detect interrupts if any port has an over-current
 188                  * condition.  To make matters worse, some motherboards
 189                  * hardwire unused USB ports' over-current inputs active!
 190                  * To prevent problems, we will not enable resume-detect
 191                  * interrupts if any ports are OC.
 192                  */
 193                 for (port = 0; port < uhci->rh_numports; ++port) {
 194                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
 195                                         USBPORTSC_OC)
 196                                 return 1;
 197                 }
 198                 break;
 199         }
 200         return 0;
 201 }
 202
 203 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
 204 __releases(uhci->lock)
 205 __acquires(uhci->lock)
 206 {
 207         int auto_stop;
 208         int int_enable;
 209
 210         auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
 211         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
 212                         (auto_stop ? " (auto-stop)" : ""));
 213
 214         /* If we get a suspend request when we're already auto-stopped
 215          * then there's nothing to do.
 216          */
 217         if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
 218                 uhci->rh_state = new_state;
 219                 return;
 220         }
 221
 222         /* Enable resume-detect interrupts if they work.
 223          * Then enter Global Suspend mode, still configured.
 224          */
 225         uhci->working_RD = 1;
 226         int_enable = USBINTR_RESUME;
 227         if (resume_detect_interrupts_are_broken(uhci)) {
 228                 uhci->working_RD = int_enable = 0;
 229         }
 230         outw(int_enable, uhci->io_addr + USBINTR);
 231         outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
 232         mb();
 233         udelay(5);
 234
 235         /* If we're auto-stopping then no devices have been attached
 236          * for a while, so there shouldn't be any active URBs and the
 237          * controller should stop after a few microseconds.  Otherwise
 238          * we will give the controller one frame to stop.
 239          */
 240         if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
 241                 uhci->rh_state = UHCI_RH_SUSPENDING;
 242                 spin_unlock_irq(&uhci->lock);
 243                 msleep(1);
 244                 spin_lock_irq(&uhci->lock);
 245                 if (uhci->hc_inaccessible)      /* Died */
 246                         return;
 247         }
 248         if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
 249                 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
 250
 251         uhci_get_current_frame_number(uhci);
 252         smp_wmb();
 253
 254         uhci->rh_state = new_state;
 255         uhci->is_stopped = UHCI_IS_STOPPED;
 256         uhci_to_hcd(uhci)->poll_rh = !int_enable;
 257
 258         uhci_scan_schedule(uhci, NULL);
 259 }
 260
 261 static void start_rh(struct uhci_hcd *uhci)
 262 {
 263         uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
 264         uhci->is_stopped = 0;
 265         smp_wmb();
 266
 267         /* Mark it configured and running with a 64-byte max packet.
 268          * All interrupts are enabled, even though RESUME won't do anything.
 269          */
 270         outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
 271         outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
 272                         uhci->io_addr + USBINTR);
 273         mb();
 274         uhci->rh_state = UHCI_RH_RUNNING;
 275         uhci_to_hcd(uhci)->poll_rh = 1;
 276 }
 277
 278 static void wakeup_rh(struct uhci_hcd *uhci)
 279 __releases(uhci->lock)
 280 __acquires(uhci->lock)
 281 {
 282         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
 283                         uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
 284                                 " (auto-start)" : "");
 285
 286         /* If we are auto-stopped then no devices are attached so there's
 287          * no need for wakeup signals.  Otherwise we send Global Resume
 288          * for 20 ms.
 289          */
 290         if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 291                 uhci->rh_state = UHCI_RH_RESUMING;
 292                 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
 293                                 uhci->io_addr + USBCMD);
 294                 spin_unlock_irq(&uhci->lock);
 295                 msleep(20);
 296                 spin_lock_irq(&uhci->lock);
 297                 if (uhci->hc_inaccessible)      /* Died */
 298                         return;
 299
 300                 /* End Global Resume and wait for EOP to be sent */
 301                 outw(USBCMD_CF, uhci->io_addr + USBCMD);
 302                 mb();
 303                 udelay(4);
 304                 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
 305                         dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
 306         }
 307
 308         start_rh(uhci);
 309
 310         /* Restart root hub polling */
 311         mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
 312 }
 313
 314 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
 315 {
 316         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 317         unsigned short status;
 318         unsigned long flags;
 319
 320         /*
 321          * Read the interrupt status, and write it back to clear the
 322          * interrupt cause.  Contrary to the UHCI specification, the
 323          * "HC Halted" status bit is persistent: it is RO, not R/WC.
 324          */
 325         status = inw(uhci->io_addr + USBSTS);
 326         if (!(status & ~USBSTS_HCH))    /* shared interrupt, not mine */
 327                 return IRQ_NONE;
 328         outw(status, uhci->io_addr + USBSTS);           /* Clear it */
 329
 330         if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
 331                 if (status & USBSTS_HSE)
 332                         dev_err(uhci_dev(uhci), "host system error, "
 333                                         "PCI problems?\n");
 334                 if (status & USBSTS_HCPE)
 335                         dev_err(uhci_dev(uhci), "host controller process "
 336                                         "error, something bad happened!\n");
 337                 if (status & USBSTS_HCH) {
 338                         spin_lock_irqsave(&uhci->lock, flags);
 339                         if (uhci->rh_state >= UHCI_RH_RUNNING) {
 340                                 dev_err(uhci_dev(uhci),
 341                                         "host controller halted, "
 342                                         "very bad!\n");
 343                                 if (debug > 1 && errbuf) {
 344                                         /* Print the schedule for debugging */
 345                                         uhci_sprint_schedule(uhci,
 346                                                         errbuf, ERRBUF_LEN);
 347                                         lprintk(errbuf);
 348                                 }
 349                                 hc_died(uhci);
 350
 351                                 /* Force a callback in case there are
 352                                  * pending unlinks */
 353                                 mod_timer(&hcd->rh_timer, jiffies);
 354                         }
 355                         spin_unlock_irqrestore(&uhci->lock, flags);
 356                 }
 357         }
 358
 359         if (status & USBSTS_RD)
 360                 usb_hcd_poll_rh_status(hcd);
 361         else {
 362                 spin_lock_irqsave(&uhci->lock, flags);
 363                 uhci_scan_schedule(uhci, regs);
 364                 spin_unlock_irqrestore(&uhci->lock, flags);
 365         }
 366
 367         return IRQ_HANDLED;
 368 }
 369
 370 /*
 371  * Store the current frame number in uhci->frame_number if the controller
 372  * is runnning
 373  */
 374 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
 375 {
 376         if (!uhci->is_stopped)
 377                 uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
 378 }
 379
 380 /*
 381  * De-allocate all resources
 382  */
 383 static void release_uhci(struct uhci_hcd *uhci)
 384 {
 385         int i;
 386
 387         if (DEBUG_CONFIGURED) {
 388                 spin_lock_irq(&uhci->lock);
 389                 uhci->is_initialized = 0;
 390                 spin_unlock_irq(&uhci->lock);
 391
 392                 debugfs_remove(uhci->dentry);
 393         }
 394
 395         for (i = 0; i < UHCI_NUM_SKELQH; i++)
 396                 uhci_free_qh(uhci, uhci->skelqh[i]);
 397
 398         uhci_free_td(uhci, uhci->term_td);
 399
 400         dma_pool_destroy(uhci->qh_pool);
 401
 402         dma_pool_destroy(uhci->td_pool);
 403
 404         kfree(uhci->frame_cpu);
 405
 406         dma_free_coherent(uhci_dev(uhci),
 407                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 408                         uhci->frame, uhci->frame_dma_handle);
 409 }
 410
 411 static int uhci_reset(struct usb_hcd *hcd)
 412 {
 413         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 414         unsigned io_size = (unsigned) hcd->rsrc_len;
 415         int port;
 416
 417         uhci->io_addr = (unsigned long) hcd->rsrc_start;
 418
 419         /* The UHCI spec says devices must have 2 ports, and goes on to say
 420          * they may have more but gives no way to determine how many there
 421          * are.  However according to the UHCI spec, Bit 7 of the port
 422          * status and control register is always set to 1.  So we try to
 423          * use this to our advantage.  Another common failure mode when
 424          * a nonexistent register is addressed is to return all ones, so
 425          * we test for that also.
 426          */
 427         for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
 428                 unsigned int portstatus;
 429
 430                 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
 431                 if (!(portstatus & 0x0080) || portstatus == 0xffff)
 432                         break;
 433         }
 434         if (debug)
 435                 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
 436
 437         /* Anything greater than 7 is weird so we'll ignore it. */
 438         if (port > UHCI_RH_MAXCHILD) {
 439                 dev_info(uhci_dev(uhci), "port count misdetected? "
 440                                 "forcing to 2 ports\n");
 441                 port = 2;
 442         }
 443         uhci->rh_numports = port;
 444
 445         /* Kick BIOS off this hardware and reset if the controller
 446          * isn't already safely quiescent.
 447          */
 448         check_and_reset_hc(uhci);
 449         return 0;
 450 }
 451
 452 /* Make sure the controller is quiescent and that we're not using it
 453  * any more.  This is mainly for the benefit of programs which, like kexec,
 454  * expect the hardware to be idle: not doing DMA or generating IRQs.
 455  *
 456  * This routine may be called in a damaged or failing kernel.  Hence we
 457  * do not acquire the spinlock before shutting down the controller.
 458  */
 459 static void uhci_shutdown(struct pci_dev *pdev)
 460 {
 461         struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
 462
 463         hc_died(hcd_to_uhci(hcd));
 464 }
 465
 466 /*
 467  * Allocate a frame list, and then setup the skeleton
 468  *
 469  * The hardware doesn't really know any difference
 470  * in the queues, but the order does matter for the
 471  * protocols higher up. The order is:
 472  *
 473  *  - any isochronous events handled before any
 474  *    of the queues. We don't do that here, because
 475  *    we'll create the actual TD entries on demand.
 476  *  - The first queue is the interrupt queue.
 477  *  - The second queue is the control queue, split into low- and full-speed
 478  *  - The third queue is bulk queue.
 479  *  - The fourth queue is the bandwidth reclamation queue, which loops back
 480  *    to the full-speed control queue.
 481  */
 482 static int uhci_start(struct usb_hcd *hcd)
 483 {
 484         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 485         int retval = -EBUSY;
 486         int i;
 487         struct dentry *dentry;
 488
 489         hcd->uses_new_polling = 1;
 490
 491         uhci->fsbr = 0;
 492         uhci->fsbrtimeout = 0;
 493
 494         spin_lock_init(&uhci->lock);
 495
 496         INIT_LIST_HEAD(&uhci->td_remove_list);
 497         INIT_LIST_HEAD(&uhci->idle_qh_list);
 498
 499         init_waitqueue_head(&uhci->waitqh);
 500
 501         if (DEBUG_CONFIGURED) {
 502                 dentry = debugfs_create_file(hcd->self.bus_name,
 503                                 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
 504                                 uhci, &uhci_debug_operations);
 505                 if (!dentry) {
 506                         dev_err(uhci_dev(uhci), "couldn't create uhci "
 507                                         "debugfs entry\n");
 508                         retval = -ENOMEM;
 509                         goto err_create_debug_entry;
 510                 }
 511                 uhci->dentry = dentry;
 512         }
 513
 514         uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
 515                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 516                         &uhci->frame_dma_handle, 0);
 517         if (!uhci->frame) {
 518                 dev_err(uhci_dev(uhci), "unable to allocate "
 519                                 "consistent memory for frame list\n");
 520                 goto err_alloc_frame;
 521         }
 522         memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
 523
 524         uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
 525                         GFP_KERNEL);
 526         if (!uhci->frame_cpu) {
 527                 dev_err(uhci_dev(uhci), "unable to allocate "
 528                                 "memory for frame pointers\n");
 529                 goto err_alloc_frame_cpu;
 530         }
 531
 532         uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
 533                         sizeof(struct uhci_td), 16, 0);
 534         if (!uhci->td_pool) {
 535                 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
 536                 goto err_create_td_pool;
 537         }
 538
 539         uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
 540                         sizeof(struct uhci_qh), 16, 0);
 541         if (!uhci->qh_pool) {
 542                 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
 543                 goto err_create_qh_pool;
 544         }
 545
 546         uhci->term_td = uhci_alloc_td(uhci);
 547         if (!uhci->term_td) {
 548                 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
 549                 goto err_alloc_term_td;
 550         }
 551
 552         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 553                 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
 554                 if (!uhci->skelqh[i]) {
 555                         dev_err(uhci_dev(uhci), "unable to allocate QH\n");
 556                         goto err_alloc_skelqh;
 557                 }
 558         }
 559
 560         /*
 561          * 8 Interrupt queues; link all higher int queues to int1,
 562          * then link int1 to control and control to bulk
 563          */
 564         uhci->skel_int128_qh->link =
 565                         uhci->skel_int64_qh->link =
 566                         uhci->skel_int32_qh->link =
 567                         uhci->skel_int16_qh->link =
 568                         uhci->skel_int8_qh->link =
 569                         uhci->skel_int4_qh->link =
 570                         uhci->skel_int2_qh->link = UHCI_PTR_QH |
 571                         cpu_to_le32(uhci->skel_int1_qh->dma_handle);
 572
 573         uhci->skel_int1_qh->link = UHCI_PTR_QH |
 574                         cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
 575         uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
 576                         cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
 577         uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
 578                         cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
 579         uhci->skel_bulk_qh->link = UHCI_PTR_QH |
 580                         cpu_to_le32(uhci->skel_term_qh->dma_handle);
 581
 582         /* This dummy TD is to work around a bug in Intel PIIX controllers */
 583         uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
 584                 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
 585         uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
 586
 587         uhci->skel_term_qh->link = UHCI_PTR_TERM;
 588         uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
 589
 590         /*
 591          * Fill the frame list: make all entries point to the proper
 592          * interrupt queue.
 593          *
 594          * The interrupt queues will be interleaved as evenly as possible.
 595          * There's not much to be done about period-1 interrupts; they have
 596          * to occur in every frame.  But we can schedule period-2 interrupts
 597          * in odd-numbered frames, period-4 interrupts in frames congruent
 598          * to 2 (mod 4), and so on.  This way each frame only has two
 599          * interrupt QHs, which will help spread out bandwidth utilization.
 600          */
 601         for (i = 0; i < UHCI_NUMFRAMES; i++) {
 602                 int irq;
 603
 604                 /*
 605                  * ffs (Find First bit Set) does exactly what we need:
 606                  * 1,3,5,...  => ffs = 0 => use skel_int2_qh = skelqh[8],
 607                  * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
 608                  * ffs >= 7 => not on any high-period queue, so use
 609                  *      skel_int1_qh = skelqh[9].
 610                  * Add UHCI_NUMFRAMES to insure at least one bit is set.
 611                  */
 612                 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
 613                 if (irq <= 1)
 614                         irq = 9;
 615
 616                 /* Only place we don't use the frame list routines */
 617                 uhci->frame[i] = UHCI_PTR_QH |
 618                                 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
 619         }
 620
 621         /*
 622          * Some architectures require a full mb() to enforce completion of
 623          * the memory writes above before the I/O transfers in configure_hc().
 624          */
 625         mb();
 626
 627         configure_hc(uhci);
 628         uhci->is_initialized = 1;
 629         start_rh(uhci);
 630         return 0;
 631
 632 /*
 633  * error exits:
 634  */
 635 err_alloc_skelqh:
 636         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 637                 if (uhci->skelqh[i])
 638                         uhci_free_qh(uhci, uhci->skelqh[i]);
 639         }
 640
 641         uhci_free_td(uhci, uhci->term_td);
 642
 643 err_alloc_term_td:
 644         dma_pool_destroy(uhci->qh_pool);
 645
 646 err_create_qh_pool:
 647         dma_pool_destroy(uhci->td_pool);
 648
 649 err_create_td_pool:
 650         kfree(uhci->frame_cpu);
 651
 652 err_alloc_frame_cpu:
 653         dma_free_coherent(uhci_dev(uhci),
 654                         UHCI_NUMFRAMES * sizeof(*uhci->frame),
 655                         uhci->frame, uhci->frame_dma_handle);
 656
 657 err_alloc_frame:
 658         debugfs_remove(uhci->dentry);
 659
 660 err_create_debug_entry:
 661         return retval;
 662 }
 663
 664 static void uhci_stop(struct usb_hcd *hcd)
 665 {
 666         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 667
 668         spin_lock_irq(&uhci->lock);
 669         if (!uhci->hc_inaccessible)
 670                 hc_died(uhci);
 671         uhci_scan_schedule(uhci, NULL);
 672         spin_unlock_irq(&uhci->lock);
 673
 674         release_uhci(uhci);
 675 }
 676
 677 #ifdef CONFIG_PM
 678 static int uhci_rh_suspend(struct usb_hcd *hcd)
 679 {
 680         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 681
 682         spin_lock_irq(&uhci->lock);
 683         if (!uhci->hc_inaccessible)             /* Not dead */
 684                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 685         spin_unlock_irq(&uhci->lock);
 686         return 0;
 687 }
 688
 689 static int uhci_rh_resume(struct usb_hcd *hcd)
 690 {
 691         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 692         int rc = 0;
 693
 694         spin_lock_irq(&uhci->lock);
 695         if (uhci->hc_inaccessible) {
 696                 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 697                         dev_warn(uhci_dev(uhci), "HC isn't running!\n");
 698                         rc = -ENODEV;
 699                 }
 700                 /* Otherwise the HC is dead */
 701         } else
 702                 wakeup_rh(uhci);
 703         spin_unlock_irq(&uhci->lock);
 704         return rc;
 705 }
 706
 707 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
 708 {
 709         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 710         int rc = 0;
 711
 712         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 713
 714         spin_lock_irq(&uhci->lock);
 715         if (uhci->hc_inaccessible)      /* Dead or already suspended */
 716                 goto done;
 717
 718         if (uhci->rh_state > UHCI_RH_SUSPENDED) {
 719                 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
 720                 rc = -EBUSY;
 721                 goto done;
 722         };
 723
 724         /* All PCI host controllers are required to disable IRQ generation
 725          * at the source, so we must turn off PIRQ.
 726          */
 727         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
 728         mb();
 729         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 730         uhci->hc_inaccessible = 1;
 731         hcd->poll_rh = 0;
 732
 733         /* FIXME: Enable non-PME# remote wakeup? */
 734
 735 done:
 736         spin_unlock_irq(&uhci->lock);
 737         return rc;
 738 }
 739
 740 static int uhci_resume(struct usb_hcd *hcd)
 741 {
 742         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 743
 744         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 745
 746         /* Since we aren't in D3 any more, it's safe to set this flag
 747          * even if the controller was dead.  It might not even be dead
 748          * any more, if the firmware or quirks code has reset it.
 749          */
 750         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 751         mb();
 752
 753         if (uhci->rh_state == UHCI_RH_RESET)    /* Dead */
 754                 return 0;
 755         spin_lock_irq(&uhci->lock);
 756
 757         /* FIXME: Disable non-PME# remote wakeup? */
 758
 759         uhci->hc_inaccessible = 0;
 760
 761         /* The BIOS may have changed the controller settings during a
 762          * system wakeup.  Check it and reconfigure to avoid problems.
 763          */
 764         check_and_reset_hc(uhci);
 765         configure_hc(uhci);
 766
 767         if (uhci->rh_state == UHCI_RH_RESET) {
 768
 769                 /* The controller had to be reset */
 770                 usb_root_hub_lost_power(hcd->self.root_hub);
 771                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 772         }
 773
 774         spin_unlock_irq(&uhci->lock);
 775
 776         if (!uhci->working_RD) {
 777                 /* Suspended root hub needs to be polled */
 778                 hcd->poll_rh = 1;
 779                 usb_hcd_poll_rh_status(hcd);
 780         }
 781         return 0;
 782 }
 783 #endif
 784
 785 /* Wait until a particular device/endpoint's QH is idle, and free it */
 786 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
 787                 struct usb_host_endpoint *hep)
 788 {
 789         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 790         struct uhci_qh *qh;
 791
 792         spin_lock_irq(&uhci->lock);
 793         qh = (struct uhci_qh *) hep->hcpriv;
 794         if (qh == NULL)
 795                 goto done;
 796
 797         while (qh->state != QH_STATE_IDLE) {
 798                 ++uhci->num_waiting;
 799                 spin_unlock_irq(&uhci->lock);
 800                 wait_event_interruptible(uhci->waitqh,
 801                                 qh->state == QH_STATE_IDLE);
 802                 spin_lock_irq(&uhci->lock);
 803                 --uhci->num_waiting;
 804         }
 805
 806         uhci_free_qh(uhci, qh);
 807 done:
 808         spin_unlock_irq(&uhci->lock);
 809 }
 810
 811 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
 812 {
 813         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 814         unsigned long flags;
 815         int is_stopped;
 816         int frame_number;
 817
 818         /* Minimize latency by avoiding the spinlock */
 819         local_irq_save(flags);
 820         is_stopped = uhci->is_stopped;
 821         smp_rmb();
 822         frame_number = (is_stopped ? uhci->frame_number :
 823                         inw(uhci->io_addr + USBFRNUM));
 824         local_irq_restore(flags);
 825         return frame_number;
 826 }
 827
 828 static const char hcd_name[] = "uhci_hcd";
 829
 830 static const struct hc_driver uhci_driver = {
 831         .description =          hcd_name,
 832         .product_desc =         "UHCI Host Controller",
 833         .hcd_priv_size =        sizeof(struct uhci_hcd),
 834
 835         /* Generic hardware linkage */
 836         .irq =                  uhci_irq,
 837         .flags =                HCD_USB11,
 838
 839         /* Basic lifecycle operations */
 840         .reset =                uhci_reset,
 841         .start =                uhci_start,
 842 #ifdef CONFIG_PM
 843         .suspend =              uhci_suspend,
 844         .resume =               uhci_resume,
 845         .bus_suspend =          uhci_rh_suspend,
 846         .bus_resume =           uhci_rh_resume,
 847 #endif
 848         .stop =                 uhci_stop,
 849
 850         .urb_enqueue =          uhci_urb_enqueue,
 851         .urb_dequeue =          uhci_urb_dequeue,
 852
 853         .endpoint_disable =     uhci_hcd_endpoint_disable,
 854         .get_frame_number =     uhci_hcd_get_frame_number,
 855
 856         .hub_status_data =      uhci_hub_status_data,
 857         .hub_control =          uhci_hub_control,
 858 };
 859
 860 static const struct pci_device_id uhci_pci_ids[] = { {
 861         /* handle any USB UHCI controller */
 862         PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0),
 863         .driver_data =  (unsigned long) &uhci_driver,
 864         }, { /* end: all zeroes */ }
 865 };
 866
 867 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
 868
 869 static struct pci_driver uhci_pci_driver = {
 870         .name =         (char *)hcd_name,
 871         .id_table =     uhci_pci_ids,
 872
 873         .probe =        usb_hcd_pci_probe,
 874         .remove =       usb_hcd_pci_remove,
 875         .shutdown =     uhci_shutdown,
 876
 877 #ifdef  CONFIG_PM
 878         .suspend =      usb_hcd_pci_suspend,
 879         .resume =       usb_hcd_pci_resume,
 880 #endif  /* PM */
 881 };
 882
 883 static int __init uhci_hcd_init(void)
 884 {
 885         int retval = -ENOMEM;
 886
 887         printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
 888
 889         if (usb_disabled())
 890                 return -ENODEV;
 891
 892         if (DEBUG_CONFIGURED) {
 893                 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
 894                 if (!errbuf)
 895                         goto errbuf_failed;
 896                 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
 897                 if (!uhci_debugfs_root)
 898                         goto debug_failed;
 899         }
 900
 901         uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
 902                 sizeof(struct urb_priv), 0, 0, NULL, NULL);
 903         if (!uhci_up_cachep)
 904                 goto up_failed;
 905
 906         retval = pci_register_driver(&uhci_pci_driver);
 907         if (retval)
 908                 goto init_failed;
 909
 910         return 0;
 911
 912 init_failed:
 913         if (kmem_cache_destroy(uhci_up_cachep))
 914                 warn("not all urb_privs were freed!");
 915
 916 up_failed:
 917         debugfs_remove(uhci_debugfs_root);
 918
 919 debug_failed:
 920         kfree(errbuf);
 921
 922 errbuf_failed:
 923
 924         return retval;
 925 }
 926
 927 static void __exit uhci_hcd_cleanup(void)
 928 {
 929         pci_unregister_driver(&uhci_pci_driver);
 930
 931         if (kmem_cache_destroy(uhci_up_cachep))
 932                 warn("not all urb_privs were freed!");
 933
 934         debugfs_remove(uhci_debugfs_root);
 935         kfree(errbuf);
 936 }
 937
 938 module_init(uhci_hcd_init);
 939 module_exit(uhci_hcd_cleanup);
 940
 941 MODULE_AUTHOR(DRIVER_AUTHOR);
 942 MODULE_DESCRIPTION(DRIVER_DESC);
 943 MODULE_LICENSE("GPL");