SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/usb/host/uhci-hcd.c

   1 /*
   2  * Universal Host Controller Interface driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Linus Torvalds
   7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
   8  * (C) Copyright 1999 Randy Dunlap
   9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16  * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
  17  *
  18  * Intel documents this fairly well, and as far as I know there
  19  * are no royalties or anything like that, but even so there are
  20  * people who decided that they want to do the same thing in a
  21  * completely different way.
  22  *
  23  */
  24
  25 #include <linux/config.h>
  26 #ifdef CONFIG_USB_DEBUG
  27 #define DEBUG
  28 #else
  29 #undef DEBUG
  30 #endif
  31 #include <linux/module.h>
  32 #include <linux/pci.h>
  33 #include <linux/kernel.h>
  34 #include <linux/init.h>
  35 #include <linux/delay.h>
  36 #include <linux/ioport.h>
  37 #include <linux/sched.h>
  38 #include <linux/slab.h>
  39 #include <linux/smp_lock.h>
  40 #include <linux/errno.h>
  41 #include <linux/unistd.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/spinlock.h>
  44 #include <linux/debugfs.h>
  45 #include <linux/pm.h>
  46 #include <linux/dmapool.h>
  47 #include <linux/dma-mapping.h>
  48 #include <linux/usb.h>
  49 #include <linux/bitops.h>
  50
  51 #include <asm/uaccess.h>
  52 #include <asm/io.h>
  53 #include <asm/irq.h>
  54 #include <asm/system.h>
  55
  56 #include "../core/hcd.h"
  57 #include "uhci-hcd.h"
  58
  59 /*
  60  * Version Information
  61  */
  62 #define DRIVER_VERSION "v2.3"
  63 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
  64 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
  65 Alan Stern"
  66 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
  67
  68 /*
  69  * debug = 0, no debugging messages
  70  * debug = 1, dump failed URB's except for stalls
  71  * debug = 2, dump all failed URB's (including stalls)
  72  *            show all queues in /debug/uhci/[pci_addr]
  73  * debug = 3, show all TD's in URB's when dumping
  74  */
  75 #ifdef DEBUG
  76 static int debug = 1;
  77 #else
  78 static int debug = 0;
  79 #endif
  80 module_param(debug, int, S_IRUGO | S_IWUSR);
  81 MODULE_PARM_DESC(debug, "Debug level");
  82 static char *errbuf;
  83 #define ERRBUF_LEN    (32 * 1024)
  84
  85 static kmem_cache_t *uhci_up_cachep;    /* urb_priv */
  86
  87 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
  88
  89 /* If a transfer is still active after this much time, turn off FSBR */
  90 #define IDLE_TIMEOUT    msecs_to_jiffies(50)
  91 #define FSBR_DELAY      msecs_to_jiffies(50)
  92
  93 /* When we timeout an idle transfer for FSBR, we'll switch it over to */
  94 /* depth first traversal. We'll do it in groups of this number of TD's */
  95 /* to make sure it doesn't hog all of the bandwidth */
  96 #define DEPTH_INTERVAL 5
  97
  98 static inline void restart_timer(struct uhci_hcd *uhci)
  99 {
 100         mod_timer(&uhci->stall_timer, jiffies + msecs_to_jiffies(100));
 101 }
 102
 103 #include "uhci-hub.c"
 104 #include "uhci-debug.c"
 105 #include "uhci-q.c"
 106
 107 /*
 108  * Make sure the controller is completely inactive, unable to
 109  * generate interrupts or do DMA.
 110  */
 111 static void reset_hc(struct uhci_hcd *uhci)
 112 {
 113         /* Turn off PIRQ enable and SMI enable.  (This also turns off the
 114          * BIOS's USB Legacy Support.)  Turn off all the R/WC bits too.
 115          */
 116         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
 117                         USBLEGSUP_RWC);
 118
 119         /* Reset the HC - this will force us to get a
 120          * new notification of any already connected
 121          * ports due to the virtual disconnect that it
 122          * implies.
 123          */
 124         outw(USBCMD_HCRESET, uhci->io_addr + USBCMD);
 125         mb();
 126         udelay(5);
 127         if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET)
 128                 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
 129
 130         /* Just to be safe, disable interrupt requests and
 131          * make sure the controller is stopped.
 132          */
 133         outw(0, uhci->io_addr + USBINTR);
 134         outw(0, uhci->io_addr + USBCMD);
 135
 136         uhci->resume_detect = 0;
 137         uhci->port_c_suspend = uhci->suspended_ports =
 138                         uhci->resuming_ports = 0;
 139         uhci->rh_state = UHCI_RH_RESET;
 140         uhci->is_stopped = UHCI_IS_STOPPED;
 141         uhci_to_hcd(uhci)->state = HC_STATE_HALT;
 142 }
 143
 144 /*
 145  * Last rites for a defunct/nonfunctional controller
 146  */
 147 static void hc_died(struct uhci_hcd *uhci)
 148 {
 149         reset_hc(uhci);
 150         uhci->hc_inaccessible = 1;
 151 }
 152
 153 /*
 154  * Initialize a controller that was newly discovered or has just been
 155  * resumed.  In either case we can't be sure of its previous state.
 156  */
 157 static void check_and_reset_hc(struct uhci_hcd *uhci)
 158 {
 159         u16 legsup;
 160         unsigned int cmd, intr;
 161
 162         /*
 163          * When restarting a suspended controller, we expect all the
 164          * settings to be the same as we left them:
 165          *
 166          *      PIRQ and SMI disabled, no R/WC bits set in USBLEGSUP;
 167          *      Controller is stopped and configured with EGSM set;
 168          *      No interrupts enabled except possibly Resume Detect.
 169          *
 170          * If any of these conditions are violated we do a complete reset.
 171          */
 172         pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup);
 173         if (legsup & ~USBLEGSUP_RO) {
 174                 dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n",
 175                                 __FUNCTION__, legsup);
 176                 goto reset_needed;
 177         }
 178
 179         cmd = inw(uhci->io_addr + USBCMD);
 180         if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
 181                 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
 182                                 __FUNCTION__, cmd);
 183                 goto reset_needed;
 184         }
 185
 186         intr = inw(uhci->io_addr + USBINTR);
 187         if (intr & (~USBINTR_RESUME)) {
 188                 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
 189                                 __FUNCTION__, intr);
 190                 goto reset_needed;
 191         }
 192         return;
 193
 194 reset_needed:
 195         dev_dbg(uhci_dev(uhci), "Performing full reset\n");
 196         reset_hc(uhci);
 197 }
 198
 199 /*
 200  * Store the basic register settings needed by the controller.
 201  */
 202 static void configure_hc(struct uhci_hcd *uhci)
 203 {
 204         /* Set the frame length to the default: 1 ms exactly */
 205         outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
 206
 207         /* Store the frame list base address */
 208         outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
 209
 210         /* Set the current frame number */
 211         outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
 212
 213         /* Mark controller as running before we enable interrupts */
 214         uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
 215         mb();
 216
 217         /* Enable PIRQ */
 218         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
 219                         USBLEGSUP_DEFAULT);
 220 }
 221
 222
 223 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
 224 {
 225         int port;
 226
 227         switch (to_pci_dev(uhci_dev(uhci))->vendor) {
 228             default:
 229                 break;
 230
 231             case PCI_VENDOR_ID_GENESYS:
 232                 /* Genesys Logic's GL880S controllers don't generate
 233                  * resume-detect interrupts.
 234                  */
 235                 return 1;
 236
 237             case PCI_VENDOR_ID_INTEL:
 238                 /* Some of Intel's USB controllers have a bug that causes
 239                  * resume-detect interrupts if any port has an over-current
 240                  * condition.  To make matters worse, some motherboards
 241                  * hardwire unused USB ports' over-current inputs active!
 242                  * To prevent problems, we will not enable resume-detect
 243                  * interrupts if any ports are OC.
 244                  */
 245                 for (port = 0; port < uhci->rh_numports; ++port) {
 246                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
 247                                         USBPORTSC_OC)
 248                                 return 1;
 249                 }
 250                 break;
 251         }
 252         return 0;
 253 }
 254
 255 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
 256 __releases(uhci->lock)
 257 __acquires(uhci->lock)
 258 {
 259         int auto_stop;
 260         int int_enable;
 261
 262         auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
 263         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
 264                         (auto_stop ? " (auto-stop)" : ""));
 265
 266         /* If we get a suspend request when we're already auto-stopped
 267          * then there's nothing to do.
 268          */
 269         if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
 270                 uhci->rh_state = new_state;
 271                 return;
 272         }
 273
 274         /* Enable resume-detect interrupts if they work.
 275          * Then enter Global Suspend mode, still configured.
 276          */
 277         int_enable = (resume_detect_interrupts_are_broken(uhci) ?
 278                         0 : USBINTR_RESUME);
 279         outw(int_enable, uhci->io_addr + USBINTR);
 280         outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
 281         mb();
 282         udelay(5);
 283
 284         /* If we're auto-stopping then no devices have been attached
 285          * for a while, so there shouldn't be any active URBs and the
 286          * controller should stop after a few microseconds.  Otherwise
 287          * we will give the controller one frame to stop.
 288          */
 289         if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
 290                 uhci->rh_state = UHCI_RH_SUSPENDING;
 291                 spin_unlock_irq(&uhci->lock);
 292                 msleep(1);
 293                 spin_lock_irq(&uhci->lock);
 294                 if (uhci->hc_inaccessible)      /* Died */
 295                         return;
 296         }
 297         if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
 298                 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
 299
 300         uhci_get_current_frame_number(uhci);
 301         smp_wmb();
 302
 303         uhci->rh_state = new_state;
 304         uhci->is_stopped = UHCI_IS_STOPPED;
 305         uhci->resume_detect = 0;
 306
 307         uhci_scan_schedule(uhci, NULL);
 308 }
 309
 310 static void start_rh(struct uhci_hcd *uhci)
 311 {
 312         uhci->rh_state = UHCI_RH_RUNNING;
 313         uhci->is_stopped = 0;
 314         smp_wmb();
 315
 316         /* Mark it configured and running with a 64-byte max packet.
 317          * All interrupts are enabled, even though RESUME won't do anything.
 318          */
 319         outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
 320         outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
 321                         uhci->io_addr + USBINTR);
 322         mb();
 323 }
 324
 325 static void wakeup_rh(struct uhci_hcd *uhci)
 326 __releases(uhci->lock)
 327 __acquires(uhci->lock)
 328 {
 329         dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
 330                         uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
 331                                 " (auto-start)" : "");
 332
 333         /* If we are auto-stopped then no devices are attached so there's
 334          * no need for wakeup signals.  Otherwise we send Global Resume
 335          * for 20 ms.
 336          */
 337         if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 338                 uhci->rh_state = UHCI_RH_RESUMING;
 339                 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
 340                                 uhci->io_addr + USBCMD);
 341                 spin_unlock_irq(&uhci->lock);
 342                 msleep(20);
 343                 spin_lock_irq(&uhci->lock);
 344                 if (uhci->hc_inaccessible)      /* Died */
 345                         return;
 346
 347                 /* End Global Resume and wait for EOP to be sent */
 348                 outw(USBCMD_CF, uhci->io_addr + USBCMD);
 349                 mb();
 350                 udelay(4);
 351                 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
 352                         dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
 353         }
 354
 355         start_rh(uhci);
 356 }
 357
 358 static void rh_state_transitions(struct uhci_hcd *uhci)
 359 {
 360         switch (uhci->rh_state) {
 361             case UHCI_RH_RUNNING:
 362                 /* are any devices attached? */
 363                 if (!any_ports_active(uhci)) {
 364                         uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
 365                         uhci->auto_stop_time = jiffies + HZ;
 366                 }
 367                 break;
 368
 369             case UHCI_RH_RUNNING_NODEVS:
 370                 /* auto-stop if nothing connected for 1 second */
 371                 if (any_ports_active(uhci))
 372                         uhci->rh_state = UHCI_RH_RUNNING;
 373                 else if (time_after_eq(jiffies, uhci->auto_stop_time))
 374                         suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
 375                 break;
 376
 377             case UHCI_RH_AUTO_STOPPED:
 378                 /* wakeup if requested by a device */
 379                 if (uhci->resume_detect)
 380                         wakeup_rh(uhci);
 381                 break;
 382
 383             default:
 384                 break;
 385         }
 386 }
 387
 388 static void stall_callback(unsigned long _uhci)
 389 {
 390         struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
 391         unsigned long flags;
 392
 393         spin_lock_irqsave(&uhci->lock, flags);
 394         uhci_scan_schedule(uhci, NULL);
 395         check_fsbr(uhci);
 396
 397         /* Poll for and perform state transitions */
 398         if (!uhci->hc_inaccessible) {
 399                 rh_state_transitions(uhci);
 400                 if (uhci->suspended_ports)
 401                         uhci_check_ports(uhci);
 402         }
 403
 404         restart_timer(uhci);
 405         spin_unlock_irqrestore(&uhci->lock, flags);
 406 }
 407
 408 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
 409 {
 410         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 411         unsigned short status;
 412         unsigned long flags;
 413
 414         /*
 415          * Read the interrupt status, and write it back to clear the
 416          * interrupt cause.  Contrary to the UHCI specification, the
 417          * "HC Halted" status bit is persistent: it is RO, not R/WC.
 418          */
 419         status = inw(uhci->io_addr + USBSTS);
 420         if (!(status & ~USBSTS_HCH))    /* shared interrupt, not mine */
 421                 return IRQ_NONE;
 422         outw(status, uhci->io_addr + USBSTS);           /* Clear it */
 423
 424         if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
 425                 if (status & USBSTS_HSE)
 426                         dev_err(uhci_dev(uhci), "host system error, "
 427                                         "PCI problems?\n");
 428                 if (status & USBSTS_HCPE)
 429                         dev_err(uhci_dev(uhci), "host controller process "
 430                                         "error, something bad happened!\n");
 431                 if (status & USBSTS_HCH) {
 432                         spin_lock_irqsave(&uhci->lock, flags);
 433                         if (uhci->rh_state >= UHCI_RH_RUNNING) {
 434                                 dev_err(uhci_dev(uhci),
 435                                         "host controller halted, "
 436                                         "very bad!\n");
 437                                 hc_died(uhci);
 438                                 spin_unlock_irqrestore(&uhci->lock, flags);
 439                                 return IRQ_HANDLED;
 440                         }
 441                         spin_unlock_irqrestore(&uhci->lock, flags);
 442                 }
 443         }
 444
 445         if (status & USBSTS_RD)
 446                 uhci->resume_detect = 1;
 447
 448         spin_lock_irqsave(&uhci->lock, flags);
 449         uhci_scan_schedule(uhci, regs);
 450         spin_unlock_irqrestore(&uhci->lock, flags);
 451
 452         return IRQ_HANDLED;
 453 }
 454
 455 /*
 456  * Store the current frame number in uhci->frame_number if the controller
 457  * is runnning
 458  */
 459 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
 460 {
 461         if (!uhci->is_stopped)
 462                 uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
 463 }
 464
 465 /*
 466  * De-allocate all resources
 467  */
 468 static void release_uhci(struct uhci_hcd *uhci)
 469 {
 470         int i;
 471
 472         for (i = 0; i < UHCI_NUM_SKELQH; i++)
 473                 if (uhci->skelqh[i]) {
 474                         uhci_free_qh(uhci, uhci->skelqh[i]);
 475                         uhci->skelqh[i] = NULL;
 476                 }
 477
 478         if (uhci->term_td) {
 479                 uhci_free_td(uhci, uhci->term_td);
 480                 uhci->term_td = NULL;
 481         }
 482
 483         if (uhci->qh_pool) {
 484                 dma_pool_destroy(uhci->qh_pool);
 485                 uhci->qh_pool = NULL;
 486         }
 487
 488         if (uhci->td_pool) {
 489                 dma_pool_destroy(uhci->td_pool);
 490                 uhci->td_pool = NULL;
 491         }
 492
 493         if (uhci->fl) {
 494                 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
 495                                 uhci->fl, uhci->fl->dma_handle);
 496                 uhci->fl = NULL;
 497         }
 498
 499         if (uhci->dentry) {
 500                 debugfs_remove(uhci->dentry);
 501                 uhci->dentry = NULL;
 502         }
 503 }
 504
 505 static int uhci_reset(struct usb_hcd *hcd)
 506 {
 507         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 508
 509         uhci->io_addr = (unsigned long) hcd->rsrc_start;
 510
 511         /* Kick BIOS off this hardware and reset if the controller
 512          * isn't already safely quiescent.
 513          */
 514         check_and_reset_hc(uhci);
 515         return 0;
 516 }
 517
 518 /*
 519  * Allocate a frame list, and then setup the skeleton
 520  *
 521  * The hardware doesn't really know any difference
 522  * in the queues, but the order does matter for the
 523  * protocols higher up. The order is:
 524  *
 525  *  - any isochronous events handled before any
 526  *    of the queues. We don't do that here, because
 527  *    we'll create the actual TD entries on demand.
 528  *  - The first queue is the interrupt queue.
 529  *  - The second queue is the control queue, split into low- and full-speed
 530  *  - The third queue is bulk queue.
 531  *  - The fourth queue is the bandwidth reclamation queue, which loops back
 532  *    to the full-speed control queue.
 533  */
 534 static int uhci_start(struct usb_hcd *hcd)
 535 {
 536         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 537         int retval = -EBUSY;
 538         int i, port;
 539         unsigned io_size;
 540         dma_addr_t dma_handle;
 541         struct usb_device *udev;
 542         struct dentry *dentry;
 543
 544         io_size = (unsigned) hcd->rsrc_len;
 545         if (pci_find_capability(to_pci_dev(uhci_dev(uhci)), PCI_CAP_ID_PM))
 546                 hcd->can_wakeup = 1;            /* Assume it supports PME# */
 547
 548         dentry = debugfs_create_file(hcd->self.bus_name,
 549                         S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci,
 550                         &uhci_debug_operations);
 551         if (!dentry) {
 552                 dev_err(uhci_dev(uhci),
 553                                 "couldn't create uhci debugfs entry\n");
 554                 retval = -ENOMEM;
 555                 goto err_create_debug_entry;
 556         }
 557         uhci->dentry = dentry;
 558
 559         uhci->fsbr = 0;
 560         uhci->fsbrtimeout = 0;
 561
 562         spin_lock_init(&uhci->lock);
 563         INIT_LIST_HEAD(&uhci->qh_remove_list);
 564
 565         INIT_LIST_HEAD(&uhci->td_remove_list);
 566
 567         INIT_LIST_HEAD(&uhci->urb_remove_list);
 568
 569         INIT_LIST_HEAD(&uhci->urb_list);
 570
 571         INIT_LIST_HEAD(&uhci->complete_list);
 572
 573         init_waitqueue_head(&uhci->waitqh);
 574
 575         init_timer(&uhci->stall_timer);
 576         uhci->stall_timer.function = stall_callback;
 577         uhci->stall_timer.data = (unsigned long) uhci;
 578
 579         uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
 580                         &dma_handle, 0);
 581         if (!uhci->fl) {
 582                 dev_err(uhci_dev(uhci), "unable to allocate "
 583                                 "consistent memory for frame list\n");
 584                 goto err_alloc_fl;
 585         }
 586
 587         memset((void *)uhci->fl, 0, sizeof(*uhci->fl));
 588
 589         uhci->fl->dma_handle = dma_handle;
 590
 591         uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
 592                         sizeof(struct uhci_td), 16, 0);
 593         if (!uhci->td_pool) {
 594                 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
 595                 goto err_create_td_pool;
 596         }
 597
 598         uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
 599                         sizeof(struct uhci_qh), 16, 0);
 600         if (!uhci->qh_pool) {
 601                 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
 602                 goto err_create_qh_pool;
 603         }
 604
 605         /* Initialize the root hub */
 606
 607         /* UHCI specs says devices must have 2 ports, but goes on to say */
 608         /*  they may have more but give no way to determine how many they */
 609         /*  have. However, according to the UHCI spec, Bit 7 is always set */
 610         /*  to 1. So we try to use this to our advantage */
 611         for (port = 0; port < (io_size - 0x10) / 2; port++) {
 612                 unsigned int portstatus;
 613
 614                 portstatus = inw(uhci->io_addr + 0x10 + (port * 2));
 615                 if (!(portstatus & 0x0080))
 616                         break;
 617         }
 618         if (debug)
 619                 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
 620
 621         /* This is experimental so anything less than 2 or greater than 8 is */
 622         /*  something weird and we'll ignore it */
 623         if (port < 2 || port > UHCI_RH_MAXCHILD) {
 624                 dev_info(uhci_dev(uhci), "port count misdetected? "
 625                                 "forcing to 2 ports\n");
 626                 port = 2;
 627         }
 628
 629         uhci->rh_numports = port;
 630
 631         udev = usb_alloc_dev(NULL, &hcd->self, 0);
 632         if (!udev) {
 633                 dev_err(uhci_dev(uhci), "unable to allocate root hub\n");
 634                 goto err_alloc_root_hub;
 635         }
 636
 637         uhci->term_td = uhci_alloc_td(uhci, udev);
 638         if (!uhci->term_td) {
 639                 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
 640                 goto err_alloc_term_td;
 641         }
 642
 643         for (i = 0; i < UHCI_NUM_SKELQH; i++) {
 644                 uhci->skelqh[i] = uhci_alloc_qh(uhci, udev);
 645                 if (!uhci->skelqh[i]) {
 646                         dev_err(uhci_dev(uhci), "unable to allocate QH\n");
 647                         goto err_alloc_skelqh;
 648                 }
 649         }
 650
 651         /*
 652          * 8 Interrupt queues; link all higher int queues to int1,
 653          * then link int1 to control and control to bulk
 654          */
 655         uhci->skel_int128_qh->link =
 656                         uhci->skel_int64_qh->link =
 657                         uhci->skel_int32_qh->link =
 658                         uhci->skel_int16_qh->link =
 659                         uhci->skel_int8_qh->link =
 660                         uhci->skel_int4_qh->link =
 661                         uhci->skel_int2_qh->link =
 662                         cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH;
 663         uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH;
 664
 665         uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
 666         uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH;
 667         uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH;
 668
 669         /* This dummy TD is to work around a bug in Intel PIIX controllers */
 670         uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) |
 671                 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
 672         uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
 673
 674         uhci->skel_term_qh->link = UHCI_PTR_TERM;
 675         uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
 676
 677         /*
 678          * Fill the frame list: make all entries point to the proper
 679          * interrupt queue.
 680          *
 681          * The interrupt queues will be interleaved as evenly as possible.
 682          * There's not much to be done about period-1 interrupts; they have
 683          * to occur in every frame.  But we can schedule period-2 interrupts
 684          * in odd-numbered frames, period-4 interrupts in frames congruent
 685          * to 2 (mod 4), and so on.  This way each frame only has two
 686          * interrupt QHs, which will help spread out bandwidth utilization.
 687          */
 688         for (i = 0; i < UHCI_NUMFRAMES; i++) {
 689                 int irq;
 690
 691                 /*
 692                  * ffs (Find First bit Set) does exactly what we need:
 693                  * 1,3,5,...  => ffs = 0 => use skel_int2_qh = skelqh[6],
 694                  * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc.
 695                  * ffs > 6 => not on any high-period queue, so use
 696                  *      skel_int1_qh = skelqh[7].
 697                  * Add UHCI_NUMFRAMES to insure at least one bit is set.
 698                  */
 699                 irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES);
 700                 if (irq < 0)
 701                         irq = 7;
 702
 703                 /* Only place we don't use the frame list routines */
 704                 uhci->fl->frame[i] = UHCI_PTR_QH |
 705                                 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
 706         }
 707
 708         /*
 709          * Some architectures require a full mb() to enforce completion of
 710          * the memory writes above before the I/O transfers in configure_hc().
 711          */
 712         mb();
 713
 714         configure_hc(uhci);
 715         start_rh(uhci);
 716
 717         restart_timer(uhci);
 718
 719         udev->speed = USB_SPEED_FULL;
 720
 721         if (usb_hcd_register_root_hub(udev, hcd) != 0) {
 722                 dev_err(uhci_dev(uhci), "unable to start root hub\n");
 723                 retval = -ENOMEM;
 724                 goto err_start_root_hub;
 725         }
 726
 727         return 0;
 728
 729 /*
 730  * error exits:
 731  */
 732 err_start_root_hub:
 733         del_timer_sync(&uhci->stall_timer);
 734         reset_hc(uhci);
 735
 736 err_alloc_skelqh:
 737         for (i = 0; i < UHCI_NUM_SKELQH; i++)
 738                 if (uhci->skelqh[i]) {
 739                         uhci_free_qh(uhci, uhci->skelqh[i]);
 740                         uhci->skelqh[i] = NULL;
 741                 }
 742
 743         uhci_free_td(uhci, uhci->term_td);
 744         uhci->term_td = NULL;
 745
 746 err_alloc_term_td:
 747         usb_put_dev(udev);
 748
 749 err_alloc_root_hub:
 750         dma_pool_destroy(uhci->qh_pool);
 751         uhci->qh_pool = NULL;
 752
 753 err_create_qh_pool:
 754         dma_pool_destroy(uhci->td_pool);
 755         uhci->td_pool = NULL;
 756
 757 err_create_td_pool:
 758         dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
 759                         uhci->fl, uhci->fl->dma_handle);
 760         uhci->fl = NULL;
 761
 762 err_alloc_fl:
 763         debugfs_remove(uhci->dentry);
 764         uhci->dentry = NULL;
 765
 766 err_create_debug_entry:
 767         return retval;
 768 }
 769
 770 static void uhci_stop(struct usb_hcd *hcd)
 771 {
 772         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 773
 774         del_timer_sync(&uhci->stall_timer);
 775
 776         spin_lock_irq(&uhci->lock);
 777         reset_hc(uhci);
 778         uhci_scan_schedule(uhci, NULL);
 779         spin_unlock_irq(&uhci->lock);
 780
 781         release_uhci(uhci);
 782 }
 783
 784 #ifdef CONFIG_PM
 785 static int uhci_rh_suspend(struct usb_hcd *hcd)
 786 {
 787         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 788
 789         spin_lock_irq(&uhci->lock);
 790         if (!uhci->hc_inaccessible)             /* Not dead */
 791                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 792         spin_unlock_irq(&uhci->lock);
 793         return 0;
 794 }
 795
 796 static int uhci_rh_resume(struct usb_hcd *hcd)
 797 {
 798         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 799         int rc = 0;
 800
 801         spin_lock_irq(&uhci->lock);
 802         if (uhci->hc_inaccessible) {
 803                 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
 804                         dev_warn(uhci_dev(uhci), "HC isn't running!\n");
 805                         rc = -ENODEV;
 806                 }
 807                 /* Otherwise the HC is dead */
 808         } else
 809                 wakeup_rh(uhci);
 810         spin_unlock_irq(&uhci->lock);
 811         return rc;
 812 }
 813
 814 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
 815 {
 816         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 817         int rc = 0;
 818
 819         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 820
 821         spin_lock_irq(&uhci->lock);
 822         if (uhci->hc_inaccessible)      /* Dead or already suspended */
 823                 goto done;
 824
 825 #ifndef CONFIG_USB_SUSPEND
 826         /* Otherwise this would never happen */
 827         suspend_rh(uhci, UHCI_RH_SUSPENDED);
 828 #endif
 829
 830         if (uhci->rh_state > UHCI_RH_SUSPENDED) {
 831                 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
 832                 hcd->state = HC_STATE_RUNNING;
 833                 rc = -EBUSY;
 834                 goto done;
 835         };
 836
 837         /* All PCI host controllers are required to disable IRQ generation
 838          * at the source, so we must turn off PIRQ.
 839          */
 840         pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
 841         uhci->hc_inaccessible = 1;
 842
 843         /* FIXME: Enable non-PME# remote wakeup? */
 844
 845 done:
 846         spin_unlock_irq(&uhci->lock);
 847         return rc;
 848 }
 849
 850 static int uhci_resume(struct usb_hcd *hcd)
 851 {
 852         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 853
 854         dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
 855
 856         if (uhci->rh_state == UHCI_RH_RESET)    /* Dead */
 857                 return 0;
 858         spin_lock_irq(&uhci->lock);
 859
 860         /* FIXME: Disable non-PME# remote wakeup? */
 861
 862         uhci->hc_inaccessible = 0;
 863
 864         /* The BIOS may have changed the controller settings during a
 865          * system wakeup.  Check it and reconfigure to avoid problems.
 866          */
 867         check_and_reset_hc(uhci);
 868         configure_hc(uhci);
 869
 870 #ifndef CONFIG_USB_SUSPEND
 871         /* Otherwise this would never happen */
 872         wakeup_rh(uhci);
 873 #endif
 874         if (uhci->rh_state == UHCI_RH_RESET)
 875                 suspend_rh(uhci, UHCI_RH_SUSPENDED);
 876
 877         spin_unlock_irq(&uhci->lock);
 878         return 0;
 879 }
 880 #endif
 881
 882 /* Wait until all the URBs for a particular device/endpoint are gone */
 883 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
 884                 struct usb_host_endpoint *ep)
 885 {
 886         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 887
 888         wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list));
 889 }
 890
 891 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
 892 {
 893         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 894         unsigned long flags;
 895         int is_stopped;
 896         int frame_number;
 897
 898         /* Minimize latency by avoiding the spinlock */
 899         local_irq_save(flags);
 900         is_stopped = uhci->is_stopped;
 901         smp_rmb();
 902         frame_number = (is_stopped ? uhci->frame_number :
 903                         inw(uhci->io_addr + USBFRNUM));
 904         local_irq_restore(flags);
 905         return frame_number;
 906 }
 907
 908 static const char hcd_name[] = "uhci_hcd";
 909
 910 static const struct hc_driver uhci_driver = {
 911         .description =          hcd_name,
 912         .product_desc =         "UHCI Host Controller",
 913         .hcd_priv_size =        sizeof(struct uhci_hcd),
 914
 915         /* Generic hardware linkage */
 916         .irq =                  uhci_irq,
 917         .flags =                HCD_USB11,
 918
 919         /* Basic lifecycle operations */
 920         .reset =                uhci_reset,
 921         .start =                uhci_start,
 922 #ifdef CONFIG_PM
 923         .suspend =              uhci_suspend,
 924         .resume =               uhci_resume,
 925         .hub_suspend =          uhci_rh_suspend,
 926         .hub_resume =           uhci_rh_resume,
 927 #endif
 928         .stop =                 uhci_stop,
 929
 930         .urb_enqueue =          uhci_urb_enqueue,
 931         .urb_dequeue =          uhci_urb_dequeue,
 932
 933         .endpoint_disable =     uhci_hcd_endpoint_disable,
 934         .get_frame_number =     uhci_hcd_get_frame_number,
 935
 936         .hub_status_data =      uhci_hub_status_data,
 937         .hub_control =          uhci_hub_control,
 938 };
 939
 940 static const struct pci_device_id uhci_pci_ids[] = { {
 941         /* handle any USB UHCI controller */
 942         PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0),
 943         .driver_data =  (unsigned long) &uhci_driver,
 944         }, { /* end: all zeroes */ }
 945 };
 946
 947 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
 948
 949 static struct pci_driver uhci_pci_driver = {
 950         .name =         (char *)hcd_name,
 951         .id_table =     uhci_pci_ids,
 952
 953         .probe =        usb_hcd_pci_probe,
 954         .remove =       usb_hcd_pci_remove,
 955
 956 #ifdef  CONFIG_PM
 957         .suspend =      usb_hcd_pci_suspend,
 958         .resume =       usb_hcd_pci_resume,
 959 #endif  /* PM */
 960 };
 961
 962 static int __init uhci_hcd_init(void)
 963 {
 964         int retval = -ENOMEM;
 965
 966         printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
 967
 968         if (usb_disabled())
 969                 return -ENODEV;
 970
 971         if (debug) {
 972                 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
 973                 if (!errbuf)
 974                         goto errbuf_failed;
 975         }
 976
 977         uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
 978         if (!uhci_debugfs_root)
 979                 goto debug_failed;
 980
 981         uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
 982                 sizeof(struct urb_priv), 0, 0, NULL, NULL);
 983         if (!uhci_up_cachep)
 984                 goto up_failed;
 985
 986         retval = pci_register_driver(&uhci_pci_driver);
 987         if (retval)
 988                 goto init_failed;
 989
 990         return 0;
 991
 992 init_failed:
 993         if (kmem_cache_destroy(uhci_up_cachep))
 994                 warn("not all urb_priv's were freed!");
 995
 996 up_failed:
 997         debugfs_remove(uhci_debugfs_root);
 998
 999 debug_failed:
1000         kfree(errbuf);
1001
1002 errbuf_failed:
1003
1004         return retval;
1005 }
1006
1007 static void __exit uhci_hcd_cleanup(void)
1008 {
1009         pci_unregister_driver(&uhci_pci_driver);
1010
1011         if (kmem_cache_destroy(uhci_up_cachep))
1012                 warn("not all urb_priv's were freed!");
1013
1014         debugfs_remove(uhci_debugfs_root);
1015         kfree(errbuf);
1016 }
1017
1018 module_init(uhci_hcd_init);
1019 module_exit(uhci_hcd_cleanup);
1020
1021 MODULE_AUTHOR(DRIVER_AUTHOR);
1022 MODULE_DESCRIPTION(DRIVER_DESC);
1023 MODULE_LICENSE("GPL");