2 * Copyright (c) 2001-2004 by David Brownell
3 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 /* this file is part of ehci-hcd.c */
22 /*-------------------------------------------------------------------------*/
25 * EHCI scheduled transaction support: interrupt, iso, split iso
26 * These are called "periodic" transactions in the EHCI spec.
28 * Note that for interrupt transfers, the QH/QTD manipulation is shared
29 * with the "asynchronous" transaction support (control/bulk transfers).
30 * The only real difference is in how interrupt transfers are scheduled.
32 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33 * It keeps track of every ITD (or SITD) that's linked, and holds enough
34 * pre-calculated schedule data to make appending to the queue be quick.
37 static int ehci_get_frame (struct usb_hcd *hcd);
39 /*-------------------------------------------------------------------------*/
42 * periodic_next_shadow - return "next" pointer on shadow list
43 * @periodic: host pointer to qh/itd/sitd
44 * @tag: hardware tag for type of this record
46 static union ehci_shadow *
47 periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
50 switch (hc32_to_cpu(ehci, tag)) {
52 return &periodic->qh->qh_next;
54 return &periodic->fstn->fstn_next;
56 return &periodic->itd->itd_next;
59 return &periodic->sitd->sitd_next;
64 shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic,
67 switch (hc32_to_cpu(ehci, tag)) {
68 /* our ehci_shadow.qh is actually software part */
70 return &periodic->qh->hw->hw_next;
71 /* others are hw parts */
73 return periodic->hw_next;
77 /* caller must hold ehci->lock */
78 static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
80 union ehci_shadow *prev_p = &ehci->pshadow[frame];
81 __hc32 *hw_p = &ehci->periodic[frame];
82 union ehci_shadow here = *prev_p;
84 /* find predecessor of "ptr"; hw and shadow lists are in sync */
85 while (here.ptr && here.ptr != ptr) {
86 prev_p = periodic_next_shadow(ehci, prev_p,
87 Q_NEXT_TYPE(ehci, *hw_p));
88 hw_p = shadow_next_periodic(ehci, &here,
89 Q_NEXT_TYPE(ehci, *hw_p));
92 /* an interrupt entry (at list end) could have been shared */
96 /* update shadow and hardware lists ... the old "next" pointers
97 * from ptr may still be in use, the caller updates them.
99 *prev_p = *periodic_next_shadow(ehci, &here,
100 Q_NEXT_TYPE(ehci, *hw_p));
101 *hw_p = *shadow_next_periodic(ehci, &here, Q_NEXT_TYPE(ehci, *hw_p));
104 /* how many of the uframe's 125 usecs are allocated? */
105 static unsigned short
106 periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
108 __hc32 *hw_p = &ehci->periodic [frame];
109 union ehci_shadow *q = &ehci->pshadow [frame];
111 struct ehci_qh_hw *hw;
114 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
117 /* is it in the S-mask? */
118 if (hw->hw_info2 & cpu_to_hc32(ehci, 1 << uframe))
119 usecs += q->qh->usecs;
121 if (hw->hw_info2 & cpu_to_hc32(ehci,
123 usecs += q->qh->c_usecs;
129 /* for "save place" FSTNs, count the relevant INTR
130 * bandwidth from the previous frame
132 if (q->fstn->hw_prev != EHCI_LIST_END(ehci)) {
133 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
135 hw_p = &q->fstn->hw_next;
136 q = &q->fstn->fstn_next;
139 if (q->itd->hw_transaction[uframe])
140 usecs += q->itd->stream->usecs;
141 hw_p = &q->itd->hw_next;
142 q = &q->itd->itd_next;
145 /* is it in the S-mask? (count SPLIT, DATA) */
146 if (q->sitd->hw_uframe & cpu_to_hc32(ehci,
148 if (q->sitd->hw_fullspeed_ep &
149 cpu_to_hc32(ehci, 1<<31))
150 usecs += q->sitd->stream->usecs;
151 else /* worst case for OUT start-split */
152 usecs += HS_USECS_ISO (188);
155 /* ... C-mask? (count CSPLIT, DATA) */
156 if (q->sitd->hw_uframe &
157 cpu_to_hc32(ehci, 1 << (8 + uframe))) {
158 /* worst case for IN complete-split */
159 usecs += q->sitd->stream->c_usecs;
162 hw_p = &q->sitd->hw_next;
163 q = &q->sitd->sitd_next;
169 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
170 frame * 8 + uframe, usecs);
175 /*-------------------------------------------------------------------------*/
177 static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
179 if (!dev1->tt || !dev2->tt)
181 if (dev1->tt != dev2->tt)
184 return dev1->ttport == dev2->ttport;
189 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
191 /* Which uframe does the low/fullspeed transfer start in?
193 * The parameter is the mask of ssplits in "H-frame" terms
194 * and this returns the transfer start uframe in "B-frame" terms,
195 * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
196 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
197 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
199 static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
201 unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask);
203 ehci_err(ehci, "invalid empty smask!\n");
204 /* uframe 7 can't have bw so this will indicate failure */
207 return ffs(smask) - 1;
210 static const unsigned char
211 max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
213 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
214 static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
217 for (i=0; i<7; i++) {
218 if (max_tt_usecs[i] < tt_usecs[i]) {
219 tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
220 tt_usecs[i] = max_tt_usecs[i];
225 /* How many of the tt's periodic downstream 1000 usecs are allocated?
227 * While this measures the bandwidth in terms of usecs/uframe,
228 * the low/fullspeed bus has no notion of uframes, so any particular
229 * low/fullspeed transfer can "carry over" from one uframe to the next,
230 * since the TT just performs downstream transfers in sequence.
232 * For example two separate 100 usec transfers can start in the same uframe,
233 * and the second one would "carry over" 75 usecs into the next uframe.
237 struct ehci_hcd *ehci,
238 struct usb_device *dev,
240 unsigned short tt_usecs[8]
243 __hc32 *hw_p = &ehci->periodic [frame];
244 union ehci_shadow *q = &ehci->pshadow [frame];
247 memset(tt_usecs, 0, 16);
250 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
252 hw_p = &q->itd->hw_next;
253 q = &q->itd->itd_next;
256 if (same_tt(dev, q->qh->dev)) {
257 uf = tt_start_uframe(ehci, q->qh->hw->hw_info2);
258 tt_usecs[uf] += q->qh->tt_usecs;
260 hw_p = &q->qh->hw->hw_next;
264 if (same_tt(dev, q->sitd->urb->dev)) {
265 uf = tt_start_uframe(ehci, q->sitd->hw_uframe);
266 tt_usecs[uf] += q->sitd->stream->tt_usecs;
268 hw_p = &q->sitd->hw_next;
269 q = &q->sitd->sitd_next;
273 ehci_dbg(ehci, "ignoring periodic frame %d FSTN\n",
275 hw_p = &q->fstn->hw_next;
276 q = &q->fstn->fstn_next;
280 carryover_tt_bandwidth(tt_usecs);
282 if (max_tt_usecs[7] < tt_usecs[7])
283 ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n",
284 frame, tt_usecs[7] - max_tt_usecs[7]);
288 * Return true if the device's tt's downstream bus is available for a
289 * periodic transfer of the specified length (usecs), starting at the
290 * specified frame/uframe. Note that (as summarized in section 11.19
291 * of the usb 2.0 spec) TTs can buffer multiple transactions for each
294 * The uframe parameter is when the fullspeed/lowspeed transfer
295 * should be executed in "B-frame" terms, which is the same as the
296 * highspeed ssplit's uframe (which is in "H-frame" terms). For example
297 * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
298 * See the EHCI spec sec 4.5 and fig 4.7.
300 * This checks if the full/lowspeed bus, at the specified starting uframe,
301 * has the specified bandwidth available, according to rules listed
302 * in USB 2.0 spec section 11.18.1 fig 11-60.
304 * This does not check if the transfer would exceed the max ssplit
305 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
306 * since proper scheduling limits ssplits to less than 16 per uframe.
308 static int tt_available (
309 struct ehci_hcd *ehci,
311 struct usb_device *dev,
317 if ((period == 0) || (uframe >= 7)) /* error */
320 for (; frame < ehci->periodic_size; frame += period) {
321 unsigned short tt_usecs[8];
323 periodic_tt_usecs (ehci, dev, frame, tt_usecs);
325 ehci_vdbg(ehci, "tt frame %d check %d usecs start uframe %d in"
326 " schedule %d/%d/%d/%d/%d/%d/%d/%d\n",
327 frame, usecs, uframe,
328 tt_usecs[0], tt_usecs[1], tt_usecs[2], tt_usecs[3],
329 tt_usecs[4], tt_usecs[5], tt_usecs[6], tt_usecs[7]);
331 if (max_tt_usecs[uframe] <= tt_usecs[uframe]) {
332 ehci_vdbg(ehci, "frame %d uframe %d fully scheduled\n",
337 /* special case for isoc transfers larger than 125us:
338 * the first and each subsequent fully used uframe
339 * must be empty, so as to not illegally delay
340 * already scheduled transactions
343 int ufs = (usecs / 125);
345 for (i = uframe; i < (uframe + ufs) && i < 8; i++)
346 if (0 < tt_usecs[i]) {
348 "multi-uframe xfer can't fit "
349 "in frame %d uframe %d\n",
355 tt_usecs[uframe] += usecs;
357 carryover_tt_bandwidth(tt_usecs);
359 /* fail if the carryover pushed bw past the last uframe's limit */
360 if (max_tt_usecs[7] < tt_usecs[7]) {
362 "tt unavailable usecs %d frame %d uframe %d\n",
363 usecs, frame, uframe);
373 /* return true iff the device's transaction translator is available
374 * for a periodic transfer starting at the specified frame, using
375 * all the uframes in the mask.
377 static int tt_no_collision (
378 struct ehci_hcd *ehci,
380 struct usb_device *dev,
385 if (period == 0) /* error */
388 /* note bandwidth wastage: split never follows csplit
389 * (different dev or endpoint) until the next uframe.
390 * calling convention doesn't make that distinction.
392 for (; frame < ehci->periodic_size; frame += period) {
393 union ehci_shadow here;
395 struct ehci_qh_hw *hw;
397 here = ehci->pshadow [frame];
398 type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]);
400 switch (hc32_to_cpu(ehci, type)) {
402 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
403 here = here.itd->itd_next;
407 if (same_tt (dev, here.qh->dev)) {
410 mask = hc32_to_cpu(ehci,
412 /* "knows" no gap is needed */
417 type = Q_NEXT_TYPE(ehci, hw->hw_next);
418 here = here.qh->qh_next;
421 if (same_tt (dev, here.sitd->urb->dev)) {
424 mask = hc32_to_cpu(ehci, here.sitd
426 /* FIXME assumes no gap for IN! */
431 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
432 here = here.sitd->sitd_next;
437 "periodic frame %d bogus type %d\n",
441 /* collision or error */
450 #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
452 /*-------------------------------------------------------------------------*/
454 static int enable_periodic (struct ehci_hcd *ehci)
459 if (ehci->periodic_sched++)
462 /* did clearing PSE did take effect yet?
463 * takes effect only at frame boundaries...
465 status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
466 STS_PSS, 0, 9 * 125);
470 cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
471 ehci_writel(ehci, cmd, &ehci->regs->command);
472 /* posted write ... PSS happens later */
473 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
475 /* make sure ehci_work scans these */
476 ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index)
477 % (ehci->periodic_size << 3);
481 static int disable_periodic (struct ehci_hcd *ehci)
486 if (--ehci->periodic_sched)
489 /* did setting PSE not take effect yet?
490 * takes effect only at frame boundaries...
492 status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
493 STS_PSS, STS_PSS, 9 * 125);
497 cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
498 ehci_writel(ehci, cmd, &ehci->regs->command);
499 /* posted write ... */
501 ehci->next_uframe = -1;
505 /*-------------------------------------------------------------------------*/
507 /* periodic schedule slots have iso tds (normal or split) first, then a
508 * sparse tree for active interrupt transfers.
510 * this just links in a qh; caller guarantees uframe masks are set right.
511 * no FSTN support (yet; ehci 0.96+)
513 static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
516 unsigned period = qh->period;
518 dev_dbg (&qh->dev->dev,
519 "link qh%d-%04x/%p start %d [%d/%d us]\n",
520 period, hc32_to_cpup(ehci, &qh->hw->hw_info2)
521 & (QH_CMASK | QH_SMASK),
522 qh, qh->start, qh->usecs, qh->c_usecs);
524 /* high bandwidth, or otherwise every microframe */
528 for (i = qh->start; i < ehci->periodic_size; i += period) {
529 union ehci_shadow *prev = &ehci->pshadow[i];
530 __hc32 *hw_p = &ehci->periodic[i];
531 union ehci_shadow here = *prev;
534 /* skip the iso nodes at list head */
536 type = Q_NEXT_TYPE(ehci, *hw_p);
537 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
539 prev = periodic_next_shadow(ehci, prev, type);
540 hw_p = shadow_next_periodic(ehci, &here, type);
544 /* sorting each branch by period (slow-->fast)
545 * enables sharing interior tree nodes
547 while (here.ptr && qh != here.qh) {
548 if (qh->period > here.qh->period)
550 prev = &here.qh->qh_next;
551 hw_p = &here.qh->hw->hw_next;
554 /* link in this qh, unless some earlier pass did that */
558 qh->hw->hw_next = *hw_p;
561 *hw_p = QH_NEXT (ehci, qh->qh_dma);
564 qh->qh_state = QH_STATE_LINKED;
568 /* update per-qh bandwidth for usbfs */
569 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
570 ? ((qh->usecs + qh->c_usecs) / qh->period)
573 /* maybe enable periodic schedule processing */
574 return enable_periodic(ehci);
577 static int qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
583 // IF this isn't high speed
584 // and this qh is active in the current uframe
585 // (and overlay token SplitXstate is false?)
587 // qh->hw_info1 |= cpu_to_hc32(1 << 7 /* "ignore" */);
589 /* high bandwidth, or otherwise part of every microframe */
590 if ((period = qh->period) == 0)
593 for (i = qh->start; i < ehci->periodic_size; i += period)
594 periodic_unlink (ehci, i, qh);
596 /* update per-qh bandwidth for usbfs */
597 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
598 ? ((qh->usecs + qh->c_usecs) / qh->period)
601 dev_dbg (&qh->dev->dev,
602 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
604 hc32_to_cpup(ehci, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
605 qh, qh->start, qh->usecs, qh->c_usecs);
607 /* qh->qh_next still "live" to HC */
608 qh->qh_state = QH_STATE_UNLINK;
609 qh->qh_next.ptr = NULL;
612 /* maybe turn off periodic schedule */
613 return disable_periodic(ehci);
616 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
619 struct ehci_qh_hw *hw = qh->hw;
621 qh_unlink_periodic (ehci, qh);
623 /* simple/paranoid: always delay, expecting the HC needs to read
624 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
625 * expect khubd to clean up after any CSPLITs we won't issue.
626 * active high speed queues may need bigger delays...
628 if (list_empty (&qh->qtd_list)
629 || (cpu_to_hc32(ehci, QH_CMASK)
630 & hw->hw_info2) != 0)
633 wait = 55; /* worst case: 3 * 1024 */
636 qh->qh_state = QH_STATE_IDLE;
637 hw->hw_next = EHCI_LIST_END(ehci);
641 /*-------------------------------------------------------------------------*/
643 static int check_period (
644 struct ehci_hcd *ehci,
652 /* complete split running into next frame?
653 * given FSTN support, we could sometimes check...
659 * 80% periodic == 100 usec/uframe available
660 * convert "usecs we need" to "max already claimed"
664 /* we "know" 2 and 4 uframe intervals were rejected; so
665 * for period 0, check _every_ microframe in the schedule.
667 if (unlikely (period == 0)) {
669 for (uframe = 0; uframe < 7; uframe++) {
670 claimed = periodic_usecs (ehci, frame, uframe);
674 } while ((frame += 1) < ehci->periodic_size);
676 /* just check the specified uframe, at that period */
679 claimed = periodic_usecs (ehci, frame, uframe);
682 } while ((frame += period) < ehci->periodic_size);
689 static int check_intr_schedule (
690 struct ehci_hcd *ehci,
693 const struct ehci_qh *qh,
697 int retval = -ENOSPC;
700 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
703 if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
711 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
712 if (tt_available (ehci, qh->period, qh->dev, frame, uframe,
716 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
717 for (i=uframe+1; i<8 && i<uframe+4; i++)
718 if (!check_period (ehci, frame, i,
719 qh->period, qh->c_usecs))
726 *c_maskp = cpu_to_hc32(ehci, mask << 8);
729 /* Make sure this tt's buffer is also available for CSPLITs.
730 * We pessimize a bit; probably the typical full speed case
731 * doesn't need the second CSPLIT.
733 * NOTE: both SPLIT and CSPLIT could be checked in just
736 mask = 0x03 << (uframe + qh->gap_uf);
737 *c_maskp = cpu_to_hc32(ehci, mask << 8);
740 if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
741 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
742 qh->period, qh->c_usecs))
744 if (!check_period (ehci, frame, uframe + qh->gap_uf,
745 qh->period, qh->c_usecs))
754 /* "first fit" scheduling policy used the first time through,
755 * or when the previous schedule slot can't be re-used.
757 static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
762 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
763 struct ehci_qh_hw *hw = qh->hw;
765 qh_refresh(ehci, qh);
766 hw->hw_next = EHCI_LIST_END(ehci);
769 /* reuse the previous schedule slots, if we can */
770 if (frame < qh->period) {
771 uframe = ffs(hc32_to_cpup(ehci, &hw->hw_info2) & QH_SMASK);
772 status = check_intr_schedule (ehci, frame, --uframe,
780 /* else scan the schedule to find a group of slots such that all
781 * uframes have enough periodic bandwidth available.
784 /* "normal" case, uframing flexible except with splits */
788 for (i = qh->period; status && i > 0; --i) {
789 frame = ++ehci->random_frame % qh->period;
790 for (uframe = 0; uframe < 8; uframe++) {
791 status = check_intr_schedule (ehci,
799 /* qh->period == 0 means every uframe */
802 status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
808 /* reset S-frame and (maybe) C-frame masks */
809 hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
810 hw->hw_info2 |= qh->period
811 ? cpu_to_hc32(ehci, 1 << uframe)
812 : cpu_to_hc32(ehci, QH_SMASK);
813 hw->hw_info2 |= c_mask;
815 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
817 /* stuff into the periodic schedule */
818 status = qh_link_periodic (ehci, qh);
823 static int intr_submit (
824 struct ehci_hcd *ehci,
826 struct list_head *qtd_list,
833 struct list_head empty;
835 /* get endpoint and transfer/schedule data */
836 epnum = urb->ep->desc.bEndpointAddress;
838 spin_lock_irqsave (&ehci->lock, flags);
840 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
841 &ehci_to_hcd(ehci)->flags))) {
843 goto done_not_linked;
845 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
846 if (unlikely(status))
847 goto done_not_linked;
849 /* get qh and force any scheduling errors */
850 INIT_LIST_HEAD (&empty);
851 qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
856 if (qh->qh_state == QH_STATE_IDLE) {
857 if ((status = qh_schedule (ehci, qh)) != 0)
861 /* then queue the urb's tds to the qh */
862 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
865 /* ... update usbfs periodic stats */
866 ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
869 if (unlikely(status))
870 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
872 spin_unlock_irqrestore (&ehci->lock, flags);
874 qtd_list_free (ehci, urb, qtd_list);
879 /*-------------------------------------------------------------------------*/
881 /* ehci_iso_stream ops work with both ITD and SITD */
883 static struct ehci_iso_stream *
884 iso_stream_alloc (gfp_t mem_flags)
886 struct ehci_iso_stream *stream;
888 stream = kzalloc(sizeof *stream, mem_flags);
889 if (likely (stream != NULL)) {
890 INIT_LIST_HEAD(&stream->td_list);
891 INIT_LIST_HEAD(&stream->free_list);
892 stream->next_uframe = -1;
893 stream->refcount = 1;
900 struct ehci_hcd *ehci,
901 struct ehci_iso_stream *stream,
902 struct usb_device *dev,
907 static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
910 unsigned epnum, maxp;
915 * this might be a "high bandwidth" highspeed endpoint,
916 * as encoded in the ep descriptor's wMaxPacket field
918 epnum = usb_pipeendpoint (pipe);
919 is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
920 maxp = usb_maxpacket(dev, pipe, !is_input);
927 /* knows about ITD vs SITD */
928 if (dev->speed == USB_SPEED_HIGH) {
929 unsigned multi = hb_mult(maxp);
931 stream->highspeed = 1;
933 maxp = max_packet(maxp);
937 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
938 stream->buf1 = cpu_to_hc32(ehci, buf1);
939 stream->buf2 = cpu_to_hc32(ehci, multi);
941 /* usbfs wants to report the average usecs per frame tied up
942 * when transfers on this endpoint are scheduled ...
944 stream->usecs = HS_USECS_ISO (maxp);
945 bandwidth = stream->usecs * 8;
946 bandwidth /= interval;
953 addr = dev->ttport << 24;
954 if (!ehci_is_TDI(ehci)
956 ehci_to_hcd(ehci)->self.root_hub))
957 addr |= dev->tt->hub->devnum << 16;
960 stream->usecs = HS_USECS_ISO (maxp);
961 think_time = dev->tt ? dev->tt->think_time : 0;
962 stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time (
963 dev->speed, is_input, 1, maxp));
964 hs_transfers = max (1u, (maxp + 187) / 188);
969 stream->c_usecs = stream->usecs;
970 stream->usecs = HS_USECS_ISO (1);
971 stream->raw_mask = 1;
973 /* c-mask as specified in USB 2.0 11.18.4 3.c */
974 tmp = (1 << (hs_transfers + 2)) - 1;
975 stream->raw_mask |= tmp << (8 + 2);
977 stream->raw_mask = smask_out [hs_transfers - 1];
978 bandwidth = stream->usecs + stream->c_usecs;
979 bandwidth /= interval << 3;
981 /* stream->splits gets created from raw_mask later */
982 stream->address = cpu_to_hc32(ehci, addr);
984 stream->bandwidth = bandwidth;
988 stream->bEndpointAddress = is_input | epnum;
989 stream->interval = interval;
994 iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
998 /* free whenever just a dev->ep reference remains.
999 * not like a QH -- no persistent state (toggle, halt)
1001 if (stream->refcount == 1) {
1004 // BUG_ON (!list_empty(&stream->td_list));
1006 while (!list_empty (&stream->free_list)) {
1007 struct list_head *entry;
1009 entry = stream->free_list.next;
1012 /* knows about ITD vs SITD */
1013 if (stream->highspeed) {
1014 struct ehci_itd *itd;
1016 itd = list_entry (entry, struct ehci_itd,
1018 dma_pool_free (ehci->itd_pool, itd,
1021 struct ehci_sitd *sitd;
1023 sitd = list_entry (entry, struct ehci_sitd,
1025 dma_pool_free (ehci->sitd_pool, sitd,
1030 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
1031 stream->bEndpointAddress &= 0x0f;
1033 stream->ep->hcpriv = NULL;
1035 if (stream->rescheduled) {
1036 ehci_info (ehci, "ep%d%s-iso rescheduled "
1037 "%lu times in %lu seconds\n",
1038 stream->bEndpointAddress, is_in ? "in" : "out",
1039 stream->rescheduled,
1040 ((jiffies - stream->start)/HZ)
1048 static inline struct ehci_iso_stream *
1049 iso_stream_get (struct ehci_iso_stream *stream)
1051 if (likely (stream != NULL))
1056 static struct ehci_iso_stream *
1057 iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1060 struct ehci_iso_stream *stream;
1061 struct usb_host_endpoint *ep;
1062 unsigned long flags;
1064 epnum = usb_pipeendpoint (urb->pipe);
1065 if (usb_pipein(urb->pipe))
1066 ep = urb->dev->ep_in[epnum];
1068 ep = urb->dev->ep_out[epnum];
1070 spin_lock_irqsave (&ehci->lock, flags);
1071 stream = ep->hcpriv;
1073 if (unlikely (stream == NULL)) {
1074 stream = iso_stream_alloc(GFP_ATOMIC);
1075 if (likely (stream != NULL)) {
1076 /* dev->ep owns the initial refcount */
1077 ep->hcpriv = stream;
1079 iso_stream_init(ehci, stream, urb->dev, urb->pipe,
1083 /* if dev->ep [epnum] is a QH, info1.maxpacket is nonzero */
1084 } else if (unlikely (stream->hw_info1 != 0)) {
1085 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
1086 urb->dev->devpath, epnum,
1087 usb_pipein(urb->pipe) ? "in" : "out");
1091 /* caller guarantees an eventual matching iso_stream_put */
1092 stream = iso_stream_get (stream);
1094 spin_unlock_irqrestore (&ehci->lock, flags);
1098 /*-------------------------------------------------------------------------*/
1100 /* ehci_iso_sched ops can be ITD-only or SITD-only */
1102 static struct ehci_iso_sched *
1103 iso_sched_alloc (unsigned packets, gfp_t mem_flags)
1105 struct ehci_iso_sched *iso_sched;
1106 int size = sizeof *iso_sched;
1108 size += packets * sizeof (struct ehci_iso_packet);
1109 iso_sched = kzalloc(size, mem_flags);
1110 if (likely (iso_sched != NULL)) {
1111 INIT_LIST_HEAD (&iso_sched->td_list);
1118 struct ehci_hcd *ehci,
1119 struct ehci_iso_sched *iso_sched,
1120 struct ehci_iso_stream *stream,
1125 dma_addr_t dma = urb->transfer_dma;
1127 /* how many uframes are needed for these transfers */
1128 iso_sched->span = urb->number_of_packets * stream->interval;
1130 /* figure out per-uframe itd fields that we'll need later
1131 * when we fit new itds into the schedule.
1133 for (i = 0; i < urb->number_of_packets; i++) {
1134 struct ehci_iso_packet *uframe = &iso_sched->packet [i];
1139 length = urb->iso_frame_desc [i].length;
1140 buf = dma + urb->iso_frame_desc [i].offset;
1142 trans = EHCI_ISOC_ACTIVE;
1143 trans |= buf & 0x0fff;
1144 if (unlikely (((i + 1) == urb->number_of_packets))
1145 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1146 trans |= EHCI_ITD_IOC;
1147 trans |= length << 16;
1148 uframe->transaction = cpu_to_hc32(ehci, trans);
1150 /* might need to cross a buffer page within a uframe */
1151 uframe->bufp = (buf & ~(u64)0x0fff);
1153 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
1160 struct ehci_iso_stream *stream,
1161 struct ehci_iso_sched *iso_sched
1166 // caller must hold ehci->lock!
1167 list_splice (&iso_sched->td_list, &stream->free_list);
1172 itd_urb_transaction (
1173 struct ehci_iso_stream *stream,
1174 struct ehci_hcd *ehci,
1179 struct ehci_itd *itd;
1183 struct ehci_iso_sched *sched;
1184 unsigned long flags;
1186 sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1187 if (unlikely (sched == NULL))
1190 itd_sched_init(ehci, sched, stream, urb);
1192 if (urb->interval < 8)
1193 num_itds = 1 + (sched->span + 7) / 8;
1195 num_itds = urb->number_of_packets;
1197 /* allocate/init ITDs */
1198 spin_lock_irqsave (&ehci->lock, flags);
1199 for (i = 0; i < num_itds; i++) {
1201 /* free_list.next might be cache-hot ... but maybe
1202 * the HC caches it too. avoid that issue for now.
1205 /* prefer previously-allocated itds */
1206 if (likely (!list_empty(&stream->free_list))) {
1207 itd = list_entry (stream->free_list.prev,
1208 struct ehci_itd, itd_list);
1209 list_del (&itd->itd_list);
1210 itd_dma = itd->itd_dma;
1212 spin_unlock_irqrestore (&ehci->lock, flags);
1213 itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
1215 spin_lock_irqsave (&ehci->lock, flags);
1217 iso_sched_free(stream, sched);
1218 spin_unlock_irqrestore(&ehci->lock, flags);
1223 memset (itd, 0, sizeof *itd);
1224 itd->itd_dma = itd_dma;
1225 list_add (&itd->itd_list, &sched->td_list);
1227 spin_unlock_irqrestore (&ehci->lock, flags);
1229 /* temporarily store schedule info in hcpriv */
1230 urb->hcpriv = sched;
1231 urb->error_count = 0;
1235 /*-------------------------------------------------------------------------*/
1239 struct ehci_hcd *ehci,
1248 /* can't commit more than 80% periodic == 100 usec */
1249 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
1253 /* we know urb->interval is 2^N uframes */
1255 } while (uframe < mod);
1261 struct ehci_hcd *ehci,
1263 struct ehci_iso_stream *stream,
1265 struct ehci_iso_sched *sched,
1272 mask = stream->raw_mask << (uframe & 7);
1274 /* for IN, don't wrap CSPLIT into the next frame */
1278 /* this multi-pass logic is simple, but performance may
1279 * suffer when the schedule data isn't cached.
1282 /* check bandwidth */
1283 uframe %= period_uframes;
1287 frame = uframe >> 3;
1290 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1291 /* The tt's fullspeed bus bandwidth must be available.
1292 * tt_available scheduling guarantees 10+% for control/bulk.
1294 if (!tt_available (ehci, period_uframes << 3,
1295 stream->udev, frame, uf, stream->tt_usecs))
1298 /* tt must be idle for start(s), any gap, and csplit.
1299 * assume scheduling slop leaves 10+% for control/bulk.
1301 if (!tt_no_collision (ehci, period_uframes << 3,
1302 stream->udev, frame, mask))
1306 /* check starts (OUT uses more than one) */
1307 max_used = 100 - stream->usecs;
1308 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1309 if (periodic_usecs (ehci, frame, uf) > max_used)
1313 /* for IN, check CSPLIT */
1314 if (stream->c_usecs) {
1316 max_used = 100 - stream->c_usecs;
1320 if ((stream->raw_mask & tmp) == 0)
1322 if (periodic_usecs (ehci, frame, uf)
1328 /* we know urb->interval is 2^N uframes */
1329 uframe += period_uframes;
1330 } while (uframe < mod);
1332 stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7));
1337 * This scheduler plans almost as far into the future as it has actual
1338 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
1339 * "as small as possible" to be cache-friendlier.) That limits the size
1340 * transfers you can stream reliably; avoid more than 64 msec per urb.
1341 * Also avoid queue depths of less than ehci's worst irq latency (affected
1342 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1343 * and other factors); or more than about 230 msec total (for portability,
1344 * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler!
1347 #define SCHEDULE_SLOP 10 /* frames */
1350 iso_stream_schedule (
1351 struct ehci_hcd *ehci,
1353 struct ehci_iso_stream *stream
1356 u32 now, start, max, period;
1358 unsigned mod = ehci->periodic_size << 3;
1359 struct ehci_iso_sched *sched = urb->hcpriv;
1361 if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
1362 ehci_dbg (ehci, "iso request %p too long\n", urb);
1367 if ((stream->depth + sched->span) > mod) {
1368 ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
1369 urb, stream->depth, sched->span, mod);
1374 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
1376 /* when's the last uframe this urb could start? */
1379 /* Typical case: reuse current schedule, stream is still active.
1380 * Hopefully there are no gaps from the host falling behind
1381 * (irq delays etc), but if there are we'll take the next
1382 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
1384 if (likely (!list_empty (&stream->td_list))) {
1385 start = stream->next_uframe;
1389 /* Fell behind (by up to twice the slop amount)? */
1390 if (start >= max - 2 * 8 * SCHEDULE_SLOP)
1391 start += stream->interval * DIV_ROUND_UP(
1392 max - start, stream->interval) - mod;
1394 /* Tried to schedule too far into the future? */
1395 if (unlikely((start + sched->span) >= max)) {
1402 /* need to schedule; when's the next (u)frame we could start?
1403 * this is bigger than ehci->i_thresh allows; scheduling itself
1404 * isn't free, the slop should handle reasonably slow cpus. it
1405 * can also help high bandwidth if the dma and irq loads don't
1406 * jump until after the queue is primed.
1408 start = SCHEDULE_SLOP * 8 + (now & ~0x07);
1410 stream->next_uframe = start;
1412 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
1414 period = urb->interval;
1415 if (!stream->highspeed)
1418 /* find a uframe slot with enough bandwidth */
1419 for (; start < (stream->next_uframe + period); start++) {
1422 /* check schedule: enough space? */
1423 if (stream->highspeed)
1424 enough_space = itd_slot_ok (ehci, mod, start,
1425 stream->usecs, period);
1427 if ((start % 8) >= 6)
1429 enough_space = sitd_slot_ok (ehci, mod, stream,
1430 start, sched, period);
1433 /* schedule it here if there's enough bandwidth */
1435 stream->next_uframe = start % mod;
1440 /* no room in the schedule */
1441 ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
1442 list_empty (&stream->td_list) ? "" : "re",
1447 iso_sched_free (stream, sched);
1452 /* report high speed start in uframes; full speed, in frames */
1453 urb->start_frame = stream->next_uframe;
1454 if (!stream->highspeed)
1455 urb->start_frame >>= 3;
1459 /*-------------------------------------------------------------------------*/
1462 itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1463 struct ehci_itd *itd)
1467 /* it's been recently zeroed */
1468 itd->hw_next = EHCI_LIST_END(ehci);
1469 itd->hw_bufp [0] = stream->buf0;
1470 itd->hw_bufp [1] = stream->buf1;
1471 itd->hw_bufp [2] = stream->buf2;
1473 for (i = 0; i < 8; i++)
1476 /* All other fields are filled when scheduling */
1481 struct ehci_hcd *ehci,
1482 struct ehci_itd *itd,
1483 struct ehci_iso_sched *iso_sched,
1488 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1489 unsigned pg = itd->pg;
1491 // BUG_ON (pg == 6 && uf->cross);
1494 itd->index [uframe] = index;
1496 itd->hw_transaction[uframe] = uf->transaction;
1497 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1498 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1499 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1501 /* iso_frame_desc[].offset must be strictly increasing */
1502 if (unlikely (uf->cross)) {
1503 u64 bufp = uf->bufp + 4096;
1506 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1507 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1512 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1514 /* always prepend ITD/SITD ... only QH tree is order-sensitive */
1515 itd->itd_next = ehci->pshadow [frame];
1516 itd->hw_next = ehci->periodic [frame];
1517 ehci->pshadow [frame].itd = itd;
1520 ehci->periodic[frame] = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1523 /* fit urb's itds into the selected schedule slot; activate as needed */
1526 struct ehci_hcd *ehci,
1529 struct ehci_iso_stream *stream
1533 unsigned next_uframe, uframe, frame;
1534 struct ehci_iso_sched *iso_sched = urb->hcpriv;
1535 struct ehci_itd *itd;
1537 next_uframe = stream->next_uframe % mod;
1539 if (unlikely (list_empty(&stream->td_list))) {
1540 ehci_to_hcd(ehci)->self.bandwidth_allocated
1541 += stream->bandwidth;
1543 "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1544 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1545 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1547 next_uframe >> 3, next_uframe & 0x7);
1548 stream->start = jiffies;
1550 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1552 /* fill iTDs uframe by uframe */
1553 for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1555 /* ASSERT: we have all necessary itds */
1556 // BUG_ON (list_empty (&iso_sched->td_list));
1558 /* ASSERT: no itds for this endpoint in this uframe */
1560 itd = list_entry (iso_sched->td_list.next,
1561 struct ehci_itd, itd_list);
1562 list_move_tail (&itd->itd_list, &stream->td_list);
1563 itd->stream = iso_stream_get (stream);
1565 itd_init (ehci, stream, itd);
1568 uframe = next_uframe & 0x07;
1569 frame = next_uframe >> 3;
1571 itd_patch(ehci, itd, iso_sched, packet, uframe);
1573 next_uframe += stream->interval;
1574 stream->depth += stream->interval;
1578 /* link completed itds into the schedule */
1579 if (((next_uframe >> 3) != frame)
1580 || packet == urb->number_of_packets) {
1581 itd_link (ehci, frame % ehci->periodic_size, itd);
1585 stream->next_uframe = next_uframe;
1587 /* don't need that schedule data any more */
1588 iso_sched_free (stream, iso_sched);
1591 timer_action (ehci, TIMER_IO_WATCHDOG);
1592 return enable_periodic(ehci);
1595 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1597 /* Process and recycle a completed ITD. Return true iff its urb completed,
1598 * and hence its completion callback probably added things to the hardware
1601 * Note that we carefully avoid recycling this descriptor until after any
1602 * completion callback runs, so that it won't be reused quickly. That is,
1603 * assuming (a) no more than two urbs per frame on this endpoint, and also
1604 * (b) only this endpoint's completions submit URBs. It seems some silicon
1605 * corrupts things if you reuse completed descriptors very quickly...
1609 struct ehci_hcd *ehci,
1610 struct ehci_itd *itd
1612 struct urb *urb = itd->urb;
1613 struct usb_iso_packet_descriptor *desc;
1617 struct ehci_iso_stream *stream = itd->stream;
1618 struct usb_device *dev;
1619 unsigned retval = false;
1621 /* for each uframe with a packet */
1622 for (uframe = 0; uframe < 8; uframe++) {
1623 if (likely (itd->index[uframe] == -1))
1625 urb_index = itd->index[uframe];
1626 desc = &urb->iso_frame_desc [urb_index];
1628 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]);
1629 itd->hw_transaction [uframe] = 0;
1630 stream->depth -= stream->interval;
1632 /* report transfer status */
1633 if (unlikely (t & ISO_ERRS)) {
1635 if (t & EHCI_ISOC_BUF_ERR)
1636 desc->status = usb_pipein (urb->pipe)
1637 ? -ENOSR /* hc couldn't read */
1638 : -ECOMM; /* hc couldn't write */
1639 else if (t & EHCI_ISOC_BABBLE)
1640 desc->status = -EOVERFLOW;
1641 else /* (t & EHCI_ISOC_XACTERR) */
1642 desc->status = -EPROTO;
1644 /* HC need not update length with this error */
1645 if (!(t & EHCI_ISOC_BABBLE)) {
1646 desc->actual_length = EHCI_ITD_LENGTH(t);
1647 urb->actual_length += desc->actual_length;
1649 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1651 desc->actual_length = EHCI_ITD_LENGTH(t);
1652 urb->actual_length += desc->actual_length;
1654 /* URB was too late */
1655 desc->status = -EXDEV;
1659 /* handle completion now? */
1660 if (likely ((urb_index + 1) != urb->number_of_packets))
1663 /* ASSERT: it's really the last itd for this urb
1664 list_for_each_entry (itd, &stream->td_list, itd_list)
1665 BUG_ON (itd->urb == urb);
1668 /* give urb back to the driver; completion often (re)submits */
1670 ehci_urb_done(ehci, urb, 0);
1673 (void) disable_periodic(ehci);
1674 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1676 if (unlikely(list_is_singular(&stream->td_list))) {
1677 ehci_to_hcd(ehci)->self.bandwidth_allocated
1678 -= stream->bandwidth;
1680 "deschedule devp %s ep%d%s-iso\n",
1681 dev->devpath, stream->bEndpointAddress & 0x0f,
1682 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1684 iso_stream_put (ehci, stream);
1688 if (ehci->clock_frame != itd->frame || itd->index[7] != -1) {
1689 /* OK to recycle this ITD now. */
1691 list_move(&itd->itd_list, &stream->free_list);
1692 iso_stream_put(ehci, stream);
1694 /* HW might remember this ITD, so we can't recycle it yet.
1695 * Move it to a safe place until a new frame starts.
1697 list_move(&itd->itd_list, &ehci->cached_itd_list);
1698 if (stream->refcount == 2) {
1699 /* If iso_stream_put() were called here, stream
1700 * would be freed. Instead, just prevent reuse.
1702 stream->ep->hcpriv = NULL;
1709 /*-------------------------------------------------------------------------*/
1711 static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1714 int status = -EINVAL;
1715 unsigned long flags;
1716 struct ehci_iso_stream *stream;
1718 /* Get iso_stream head */
1719 stream = iso_stream_find (ehci, urb);
1720 if (unlikely (stream == NULL)) {
1721 ehci_dbg (ehci, "can't get iso stream\n");
1724 if (unlikely (urb->interval != stream->interval)) {
1725 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1726 stream->interval, urb->interval);
1730 #ifdef EHCI_URB_TRACE
1732 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1733 __func__, urb->dev->devpath, urb,
1734 usb_pipeendpoint (urb->pipe),
1735 usb_pipein (urb->pipe) ? "in" : "out",
1736 urb->transfer_buffer_length,
1737 urb->number_of_packets, urb->interval,
1741 /* allocate ITDs w/o locking anything */
1742 status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1743 if (unlikely (status < 0)) {
1744 ehci_dbg (ehci, "can't init itds\n");
1748 /* schedule ... need to lock */
1749 spin_lock_irqsave (&ehci->lock, flags);
1750 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1751 &ehci_to_hcd(ehci)->flags))) {
1752 status = -ESHUTDOWN;
1753 goto done_not_linked;
1755 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1756 if (unlikely(status))
1757 goto done_not_linked;
1758 status = iso_stream_schedule(ehci, urb, stream);
1759 if (likely (status == 0))
1760 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1762 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1764 spin_unlock_irqrestore (&ehci->lock, flags);
1767 if (unlikely (status < 0))
1768 iso_stream_put (ehci, stream);
1772 /*-------------------------------------------------------------------------*/
1775 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1776 * TTs in USB 2.0 hubs. These need microframe scheduling.
1781 struct ehci_hcd *ehci,
1782 struct ehci_iso_sched *iso_sched,
1783 struct ehci_iso_stream *stream,
1788 dma_addr_t dma = urb->transfer_dma;
1790 /* how many frames are needed for these transfers */
1791 iso_sched->span = urb->number_of_packets * stream->interval;
1793 /* figure out per-frame sitd fields that we'll need later
1794 * when we fit new sitds into the schedule.
1796 for (i = 0; i < urb->number_of_packets; i++) {
1797 struct ehci_iso_packet *packet = &iso_sched->packet [i];
1802 length = urb->iso_frame_desc [i].length & 0x03ff;
1803 buf = dma + urb->iso_frame_desc [i].offset;
1805 trans = SITD_STS_ACTIVE;
1806 if (((i + 1) == urb->number_of_packets)
1807 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1809 trans |= length << 16;
1810 packet->transaction = cpu_to_hc32(ehci, trans);
1812 /* might need to cross a buffer page within a td */
1814 packet->buf1 = (buf + length) & ~0x0fff;
1815 if (packet->buf1 != (buf & ~(u64)0x0fff))
1818 /* OUT uses multiple start-splits */
1819 if (stream->bEndpointAddress & USB_DIR_IN)
1821 length = (length + 187) / 188;
1822 if (length > 1) /* BEGIN vs ALL */
1824 packet->buf1 |= length;
1829 sitd_urb_transaction (
1830 struct ehci_iso_stream *stream,
1831 struct ehci_hcd *ehci,
1836 struct ehci_sitd *sitd;
1837 dma_addr_t sitd_dma;
1839 struct ehci_iso_sched *iso_sched;
1840 unsigned long flags;
1842 iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1843 if (iso_sched == NULL)
1846 sitd_sched_init(ehci, iso_sched, stream, urb);
1848 /* allocate/init sITDs */
1849 spin_lock_irqsave (&ehci->lock, flags);
1850 for (i = 0; i < urb->number_of_packets; i++) {
1852 /* NOTE: for now, we don't try to handle wraparound cases
1853 * for IN (using sitd->hw_backpointer, like a FSTN), which
1854 * means we never need two sitds for full speed packets.
1857 /* free_list.next might be cache-hot ... but maybe
1858 * the HC caches it too. avoid that issue for now.
1861 /* prefer previously-allocated sitds */
1862 if (!list_empty(&stream->free_list)) {
1863 sitd = list_entry (stream->free_list.prev,
1864 struct ehci_sitd, sitd_list);
1865 list_del (&sitd->sitd_list);
1866 sitd_dma = sitd->sitd_dma;
1868 spin_unlock_irqrestore (&ehci->lock, flags);
1869 sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1871 spin_lock_irqsave (&ehci->lock, flags);
1873 iso_sched_free(stream, iso_sched);
1874 spin_unlock_irqrestore(&ehci->lock, flags);
1879 memset (sitd, 0, sizeof *sitd);
1880 sitd->sitd_dma = sitd_dma;
1881 list_add (&sitd->sitd_list, &iso_sched->td_list);
1884 /* temporarily store schedule info in hcpriv */
1885 urb->hcpriv = iso_sched;
1886 urb->error_count = 0;
1888 spin_unlock_irqrestore (&ehci->lock, flags);
1892 /*-------------------------------------------------------------------------*/
1896 struct ehci_hcd *ehci,
1897 struct ehci_iso_stream *stream,
1898 struct ehci_sitd *sitd,
1899 struct ehci_iso_sched *iso_sched,
1903 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1904 u64 bufp = uf->bufp;
1906 sitd->hw_next = EHCI_LIST_END(ehci);
1907 sitd->hw_fullspeed_ep = stream->address;
1908 sitd->hw_uframe = stream->splits;
1909 sitd->hw_results = uf->transaction;
1910 sitd->hw_backpointer = EHCI_LIST_END(ehci);
1913 sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
1914 sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
1916 sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
1919 sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
1920 sitd->index = index;
1924 sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1926 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1927 sitd->sitd_next = ehci->pshadow [frame];
1928 sitd->hw_next = ehci->periodic [frame];
1929 ehci->pshadow [frame].sitd = sitd;
1930 sitd->frame = frame;
1932 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
1935 /* fit urb's sitds into the selected schedule slot; activate as needed */
1938 struct ehci_hcd *ehci,
1941 struct ehci_iso_stream *stream
1945 unsigned next_uframe;
1946 struct ehci_iso_sched *sched = urb->hcpriv;
1947 struct ehci_sitd *sitd;
1949 next_uframe = stream->next_uframe;
1951 if (list_empty(&stream->td_list)) {
1952 /* usbfs ignores TT bandwidth */
1953 ehci_to_hcd(ehci)->self.bandwidth_allocated
1954 += stream->bandwidth;
1956 "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
1957 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1958 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1959 (next_uframe >> 3) % ehci->periodic_size,
1960 stream->interval, hc32_to_cpu(ehci, stream->splits));
1961 stream->start = jiffies;
1963 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1965 /* fill sITDs frame by frame */
1966 for (packet = 0, sitd = NULL;
1967 packet < urb->number_of_packets;
1970 /* ASSERT: we have all necessary sitds */
1971 BUG_ON (list_empty (&sched->td_list));
1973 /* ASSERT: no itds for this endpoint in this frame */
1975 sitd = list_entry (sched->td_list.next,
1976 struct ehci_sitd, sitd_list);
1977 list_move_tail (&sitd->sitd_list, &stream->td_list);
1978 sitd->stream = iso_stream_get (stream);
1981 sitd_patch(ehci, stream, sitd, sched, packet);
1982 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
1985 next_uframe += stream->interval << 3;
1986 stream->depth += stream->interval << 3;
1988 stream->next_uframe = next_uframe % mod;
1990 /* don't need that schedule data any more */
1991 iso_sched_free (stream, sched);
1994 timer_action (ehci, TIMER_IO_WATCHDOG);
1995 return enable_periodic(ehci);
1998 /*-------------------------------------------------------------------------*/
2000 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
2001 | SITD_STS_XACT | SITD_STS_MMF)
2003 /* Process and recycle a completed SITD. Return true iff its urb completed,
2004 * and hence its completion callback probably added things to the hardware
2007 * Note that we carefully avoid recycling this descriptor until after any
2008 * completion callback runs, so that it won't be reused quickly. That is,
2009 * assuming (a) no more than two urbs per frame on this endpoint, and also
2010 * (b) only this endpoint's completions submit URBs. It seems some silicon
2011 * corrupts things if you reuse completed descriptors very quickly...
2015 struct ehci_hcd *ehci,
2016 struct ehci_sitd *sitd
2018 struct urb *urb = sitd->urb;
2019 struct usb_iso_packet_descriptor *desc;
2022 struct ehci_iso_stream *stream = sitd->stream;
2023 struct usb_device *dev;
2024 unsigned retval = false;
2026 urb_index = sitd->index;
2027 desc = &urb->iso_frame_desc [urb_index];
2028 t = hc32_to_cpup(ehci, &sitd->hw_results);
2030 /* report transfer status */
2031 if (t & SITD_ERRS) {
2033 if (t & SITD_STS_DBE)
2034 desc->status = usb_pipein (urb->pipe)
2035 ? -ENOSR /* hc couldn't read */
2036 : -ECOMM; /* hc couldn't write */
2037 else if (t & SITD_STS_BABBLE)
2038 desc->status = -EOVERFLOW;
2039 else /* XACT, MMF, etc */
2040 desc->status = -EPROTO;
2043 desc->actual_length = desc->length - SITD_LENGTH(t);
2044 urb->actual_length += desc->actual_length;
2046 stream->depth -= stream->interval << 3;
2048 /* handle completion now? */
2049 if ((urb_index + 1) != urb->number_of_packets)
2052 /* ASSERT: it's really the last sitd for this urb
2053 list_for_each_entry (sitd, &stream->td_list, sitd_list)
2054 BUG_ON (sitd->urb == urb);
2057 /* give urb back to the driver; completion often (re)submits */
2059 ehci_urb_done(ehci, urb, 0);
2062 (void) disable_periodic(ehci);
2063 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2065 if (list_is_singular(&stream->td_list)) {
2066 ehci_to_hcd(ehci)->self.bandwidth_allocated
2067 -= stream->bandwidth;
2069 "deschedule devp %s ep%d%s-iso\n",
2070 dev->devpath, stream->bEndpointAddress & 0x0f,
2071 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
2073 iso_stream_put (ehci, stream);
2074 /* OK to recycle this SITD now that its completion callback ran. */
2077 sitd->stream = NULL;
2078 list_move(&sitd->sitd_list, &stream->free_list);
2079 iso_stream_put(ehci, stream);
2085 static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2088 int status = -EINVAL;
2089 unsigned long flags;
2090 struct ehci_iso_stream *stream;
2092 /* Get iso_stream head */
2093 stream = iso_stream_find (ehci, urb);
2094 if (stream == NULL) {
2095 ehci_dbg (ehci, "can't get iso stream\n");
2098 if (urb->interval != stream->interval) {
2099 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
2100 stream->interval, urb->interval);
2104 #ifdef EHCI_URB_TRACE
2106 "submit %p dev%s ep%d%s-iso len %d\n",
2107 urb, urb->dev->devpath,
2108 usb_pipeendpoint (urb->pipe),
2109 usb_pipein (urb->pipe) ? "in" : "out",
2110 urb->transfer_buffer_length);
2113 /* allocate SITDs */
2114 status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
2116 ehci_dbg (ehci, "can't init sitds\n");
2120 /* schedule ... need to lock */
2121 spin_lock_irqsave (&ehci->lock, flags);
2122 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
2123 &ehci_to_hcd(ehci)->flags))) {
2124 status = -ESHUTDOWN;
2125 goto done_not_linked;
2127 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2128 if (unlikely(status))
2129 goto done_not_linked;
2130 status = iso_stream_schedule(ehci, urb, stream);
2132 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
2134 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2136 spin_unlock_irqrestore (&ehci->lock, flags);
2140 iso_stream_put (ehci, stream);
2144 /*-------------------------------------------------------------------------*/
2146 static void free_cached_itd_list(struct ehci_hcd *ehci)
2148 struct ehci_itd *itd, *n;
2150 list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
2151 struct ehci_iso_stream *stream = itd->stream;
2153 list_move(&itd->itd_list, &stream->free_list);
2154 iso_stream_put(ehci, stream);
2158 /*-------------------------------------------------------------------------*/
2161 scan_periodic (struct ehci_hcd *ehci)
2163 unsigned now_uframe, frame, clock, clock_frame, mod;
2166 mod = ehci->periodic_size << 3;
2169 * When running, scan from last scan point up to "now"
2170 * else clean up by scanning everything that's left.
2171 * Touches as few pages as possible: cache-friendly.
2173 now_uframe = ehci->next_uframe;
2174 if (HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2175 clock = ehci_readl(ehci, &ehci->regs->frame_index);
2176 clock_frame = (clock >> 3) % ehci->periodic_size;
2178 clock = now_uframe + mod - 1;
2181 if (ehci->clock_frame != clock_frame) {
2182 free_cached_itd_list(ehci);
2183 ehci->clock_frame = clock_frame;
2186 clock_frame = clock >> 3;
2189 union ehci_shadow q, *q_p;
2191 unsigned incomplete = false;
2193 frame = now_uframe >> 3;
2196 /* scan each element in frame's queue for completions */
2197 q_p = &ehci->pshadow [frame];
2198 hw_p = &ehci->periodic [frame];
2200 type = Q_NEXT_TYPE(ehci, *hw_p);
2203 while (q.ptr != NULL) {
2205 union ehci_shadow temp;
2208 live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
2209 switch (hc32_to_cpu(ehci, type)) {
2211 /* handle any completions */
2212 temp.qh = qh_get (q.qh);
2213 type = Q_NEXT_TYPE(ehci, q.qh->hw->hw_next);
2215 modified = qh_completions (ehci, temp.qh);
2216 if (unlikely (list_empty (&temp.qh->qtd_list)))
2217 intr_deschedule (ehci, temp.qh);
2221 /* for "save place" FSTNs, look at QH entries
2222 * in the previous frame for completions.
2224 if (q.fstn->hw_prev != EHCI_LIST_END(ehci)) {
2225 dbg ("ignoring completions from FSTNs");
2227 type = Q_NEXT_TYPE(ehci, q.fstn->hw_next);
2228 q = q.fstn->fstn_next;
2231 /* If this ITD is still active, leave it for
2232 * later processing ... check the next entry.
2233 * No need to check for activity unless the
2236 if (frame == clock_frame && live) {
2238 for (uf = 0; uf < 8; uf++) {
2239 if (q.itd->hw_transaction[uf] &
2245 q_p = &q.itd->itd_next;
2246 hw_p = &q.itd->hw_next;
2247 type = Q_NEXT_TYPE(ehci,
2254 /* Take finished ITDs out of the schedule
2255 * and process them: recycle, maybe report
2256 * URB completion. HC won't cache the
2257 * pointer for much longer, if at all.
2259 *q_p = q.itd->itd_next;
2260 *hw_p = q.itd->hw_next;
2261 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2263 modified = itd_complete (ehci, q.itd);
2267 /* If this SITD is still active, leave it for
2268 * later processing ... check the next entry.
2269 * No need to check for activity unless the
2272 if (frame == clock_frame && live &&
2273 (q.sitd->hw_results &
2274 SITD_ACTIVE(ehci))) {
2276 q_p = &q.sitd->sitd_next;
2277 hw_p = &q.sitd->hw_next;
2278 type = Q_NEXT_TYPE(ehci,
2284 /* Take finished SITDs out of the schedule
2285 * and process them: recycle, maybe report
2288 *q_p = q.sitd->sitd_next;
2289 *hw_p = q.sitd->hw_next;
2290 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2292 modified = sitd_complete (ehci, q.sitd);
2296 dbg ("corrupt type %d frame %d shadow %p",
2297 type, frame, q.ptr);
2302 /* assume completion callbacks modify the queue */
2303 if (unlikely (modified)) {
2304 if (likely(ehci->periodic_sched > 0))
2306 /* short-circuit this scan */
2312 /* If we can tell we caught up to the hardware, stop now.
2313 * We can't advance our scan without collecting the ISO
2314 * transfers that are still pending in this frame.
2316 if (incomplete && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2317 ehci->next_uframe = now_uframe;
2321 // FIXME: this assumes we won't get lapped when
2322 // latencies climb; that should be rare, but...
2323 // detect it, and just go all the way around.
2324 // FLR might help detect this case, so long as latencies
2325 // don't exceed periodic_size msec (default 1.024 sec).
2327 // FIXME: likewise assumes HC doesn't halt mid-scan
2329 if (now_uframe == clock) {
2332 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
2333 || ehci->periodic_sched == 0)
2335 ehci->next_uframe = now_uframe;
2336 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
2337 if (now_uframe == now)
2340 /* rescan the rest of this frame, then ... */
2342 clock_frame = clock >> 3;
2343 if (ehci->clock_frame != clock_frame) {
2344 free_cached_itd_list(ehci);
2345 ehci->clock_frame = clock_frame;