2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
69 if ((count + 0x1000) < len)
75 /* short packets may only terminate transfers */
77 count -= (count % maxpacket);
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
85 /*-------------------------------------------------------------------------*/
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
90 struct ehci_qh_hw *hw = qh->hw;
92 /* writes to an active overlay are unsafe */
93 BUG_ON(qh->qh_state != QH_STATE_IDLE);
95 hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 hw->hw_alt_next = EHCI_LIST_END(ehci);
98 /* Except for control endpoints, we make hardware maintain data
99 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
103 if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
104 unsigned is_out, epnum;
106 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
107 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
108 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
109 hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
110 usb_settoggle (qh->dev, epnum, is_out, 1);
114 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
116 hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
119 /* if it weren't for a common silicon quirk (writing the dummy into the qh
120 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
121 * recovery (including urb dequeue) would need software changes to a QH...
124 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
126 struct ehci_qtd *qtd;
128 if (list_empty (&qh->qtd_list))
131 qtd = list_entry (qh->qtd_list.next,
132 struct ehci_qtd, qtd_list);
133 /* first qtd may already be partially processed */
134 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)
139 qh_update (ehci, qh, qtd);
142 /*-------------------------------------------------------------------------*/
144 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
146 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
147 struct usb_host_endpoint *ep)
149 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
150 struct ehci_qh *qh = ep->hcpriv;
153 spin_lock_irqsave(&ehci->lock, flags);
155 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
156 && HC_IS_RUNNING(hcd->state))
157 qh_link_async(ehci, qh);
158 spin_unlock_irqrestore(&ehci->lock, flags);
161 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
162 struct urb *urb, u32 token)
165 /* If an async split transaction gets an error or is unlinked,
166 * the TT buffer may be left in an indeterminate state. We
167 * have to clear the TT buffer.
169 * Note: this routine is never called for Isochronous transfers.
171 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
173 struct usb_device *tt = urb->dev->tt->hub;
175 "clear tt buffer port %d, a%d ep%d t%08x\n",
176 urb->dev->ttport, urb->dev->devnum,
177 usb_pipeendpoint(urb->pipe), token);
179 if (!ehci_is_TDI(ehci)
180 || urb->dev->tt->hub !=
181 ehci_to_hcd(ehci)->self.root_hub) {
182 if (usb_hub_clear_tt_buffer(urb) == 0)
186 /* REVISIT ARC-derived cores don't clear the root
187 * hub TT buffer in this way...
193 static int qtd_copy_status (
194 struct ehci_hcd *ehci,
200 int status = -EINPROGRESS;
202 /* count IN/OUT bytes, not SETUP (even short packets) */
203 if (likely (QTD_PID (token) != 2))
204 urb->actual_length += length - QTD_LENGTH (token);
206 /* don't modify error codes */
207 if (unlikely(urb->unlinked))
210 /* force cleanup after short read; not always an error */
211 if (unlikely (IS_SHORT_READ (token)))
214 /* serious "can't proceed" faults reported by the hardware */
215 if (token & QTD_STS_HALT) {
216 if (token & QTD_STS_BABBLE) {
217 /* FIXME "must" disable babbling device's port too */
219 /* CERR nonzero + halt --> stall */
220 } else if (QTD_CERR(token)) {
223 /* In theory, more than one of the following bits can be set
224 * since they are sticky and the transaction is retried.
225 * Which to test first is rather arbitrary.
227 } else if (token & QTD_STS_MMF) {
228 /* fs/ls interrupt xfer missed the complete-split */
230 } else if (token & QTD_STS_DBE) {
231 status = (QTD_PID (token) == 1) /* IN ? */
232 ? -ENOSR /* hc couldn't read data */
233 : -ECOMM; /* hc couldn't write data */
234 } else if (token & QTD_STS_XACT) {
235 /* timeout, bad CRC, wrong PID, etc */
236 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
238 usb_pipeendpoint(urb->pipe),
239 usb_pipein(urb->pipe) ? "in" : "out");
241 } else { /* unknown */
246 "dev%d ep%d%s qtd token %08x --> status %d\n",
247 usb_pipedevice (urb->pipe),
248 usb_pipeendpoint (urb->pipe),
249 usb_pipein (urb->pipe) ? "in" : "out",
257 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
258 __releases(ehci->lock)
259 __acquires(ehci->lock)
261 if (likely (urb->hcpriv != NULL)) {
262 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
264 /* S-mask in a QH means it's an interrupt urb */
265 if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
267 /* ... update hc-wide periodic stats (for usbfs) */
268 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
273 if (unlikely(urb->unlinked)) {
274 COUNT(ehci->stats.unlink);
276 /* report non-error and short read status as zero */
277 if (status == -EINPROGRESS || status == -EREMOTEIO)
279 COUNT(ehci->stats.complete);
282 #ifdef EHCI_URB_TRACE
284 "%s %s urb %p ep%d%s status %d len %d/%d\n",
285 __func__, urb->dev->devpath, urb,
286 usb_pipeendpoint (urb->pipe),
287 usb_pipein (urb->pipe) ? "in" : "out",
289 urb->actual_length, urb->transfer_buffer_length);
292 /* complete() can reenter this HCD */
293 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
294 spin_unlock (&ehci->lock);
295 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
296 spin_lock (&ehci->lock);
299 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
300 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
302 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
303 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
306 * Process and free completed qtds for a qh, returning URBs to drivers.
307 * Chases up to qh->hw_current. Returns number of completions called,
308 * indicating how much "real" work we did.
311 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
313 struct ehci_qtd *last, *end = qh->dummy;
314 struct list_head *entry, *tmp;
319 const __le32 halt = HALT_BIT(ehci);
320 struct ehci_qh_hw *hw = qh->hw;
322 if (unlikely (list_empty (&qh->qtd_list)))
325 /* completions (or tasks on other cpus) must never clobber HALT
326 * till we've gone through and cleaned everything up, even when
327 * they add urbs to this qh's queue or mark them for unlinking.
329 * NOTE: unlinking expects to be done in queue order.
331 * It's a bug for qh->qh_state to be anything other than
332 * QH_STATE_IDLE, unless our caller is scan_async() or
335 state = qh->qh_state;
336 qh->qh_state = QH_STATE_COMPLETING;
337 stopped = (state == QH_STATE_IDLE);
341 last_status = -EINPROGRESS;
342 qh->needs_rescan = 0;
344 /* remove de-activated QTDs from front of queue.
345 * after faults (including short reads), cleanup this urb
346 * then let the queue advance.
347 * if queue is stopped, handles unlinks.
349 list_for_each_safe (entry, tmp, &qh->qtd_list) {
350 struct ehci_qtd *qtd;
354 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
357 /* clean up any state from previous QTD ...*/
359 if (likely (last->urb != urb)) {
360 ehci_urb_done(ehci, last->urb, last_status);
362 last_status = -EINPROGRESS;
364 ehci_qtd_free (ehci, last);
368 /* ignore urbs submitted during completions we reported */
372 /* hardware copies qtd out of qh overlay */
374 token = hc32_to_cpu(ehci, qtd->hw_token);
376 /* always clean up qtds the hc de-activated */
378 if ((token & QTD_STS_ACTIVE) == 0) {
380 /* on STALL, error, and short reads this urb must
381 * complete and all its qtds must be recycled.
383 if ((token & QTD_STS_HALT) != 0) {
385 /* retry transaction errors until we
386 * reach the software xacterr limit
388 if ((token & QTD_STS_XACT) &&
389 QTD_CERR(token) == 0 &&
390 ++qh->xacterrs < QH_XACTERR_MAX &&
393 "detected XactErr len %zu/%zu retry %d\n",
394 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
396 /* reset the token in the qtd and the
397 * qh overlay (which still contains
398 * the qtd) so that we pick up from
401 token &= ~QTD_STS_HALT;
402 token |= QTD_STS_ACTIVE |
403 (EHCI_TUNE_CERR << 10);
404 qtd->hw_token = cpu_to_hc32(ehci,
407 hw->hw_token = cpu_to_hc32(ehci,
413 /* magic dummy for some short reads; qh won't advance.
414 * that silicon quirk can kick in with this dummy too.
416 * other short reads won't stop the queue, including
417 * control transfers (status stage handles that) or
418 * most other single-qtd reads ... the queue stops if
419 * URB_SHORT_NOT_OK was set so the driver submitting
420 * the urbs could clean it up.
422 } else if (IS_SHORT_READ (token)
423 && !(qtd->hw_alt_next
424 & EHCI_LIST_END(ehci))) {
429 /* stop scanning when we reach qtds the hc is using */
430 } else if (likely (!stopped
431 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
434 /* scan the whole queue for unlinks whenever it stops */
438 /* cancel everything if we halt, suspend, etc */
439 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
440 last_status = -ESHUTDOWN;
442 /* this qtd is active; skip it unless a previous qtd
443 * for its urb faulted, or its urb was canceled.
445 else if (last_status == -EINPROGRESS && !urb->unlinked)
448 /* qh unlinked; token in overlay may be most current */
449 if (state == QH_STATE_IDLE
450 && cpu_to_hc32(ehci, qtd->qtd_dma)
452 token = hc32_to_cpu(ehci, hw->hw_token);
454 /* An unlink may leave an incomplete
455 * async transaction in the TT buffer.
456 * We have to clear it.
458 ehci_clear_tt_buffer(ehci, qh, urb, token);
461 /* force halt for unlinked or blocked qh, so we'll
462 * patch the qh later and so that completions can't
463 * activate it while we "know" it's stopped.
465 if ((halt & hw->hw_token) == 0) {
467 hw->hw_token |= halt;
472 /* unless we already know the urb's status, collect qtd status
473 * and update count of bytes transferred. in common short read
474 * cases with only one data qtd (including control transfers),
475 * queue processing won't halt. but with two or more qtds (for
476 * example, with a 32 KB transfer), when the first qtd gets a
477 * short read the second must be removed by hand.
479 if (last_status == -EINPROGRESS) {
480 last_status = qtd_copy_status(ehci, urb,
482 if (last_status == -EREMOTEIO
484 & EHCI_LIST_END(ehci)))
485 last_status = -EINPROGRESS;
487 /* As part of low/full-speed endpoint-halt processing
488 * we must clear the TT buffer (11.17.5).
490 if (unlikely(last_status != -EINPROGRESS &&
491 last_status != -EREMOTEIO))
492 ehci_clear_tt_buffer(ehci, qh, urb, token);
495 /* if we're removing something not at the queue head,
496 * patch the hardware queue pointer.
498 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
499 last = list_entry (qtd->qtd_list.prev,
500 struct ehci_qtd, qtd_list);
501 last->hw_next = qtd->hw_next;
504 /* remove qtd; it's recycled after possible urb completion */
505 list_del (&qtd->qtd_list);
508 /* reinit the xacterr counter for the next qtd */
512 /* last urb's completion might still need calling */
513 if (likely (last != NULL)) {
514 ehci_urb_done(ehci, last->urb, last_status);
516 ehci_qtd_free (ehci, last);
519 /* Do we need to rescan for URBs dequeued during a giveback? */
520 if (unlikely(qh->needs_rescan)) {
521 /* If the QH is already unlinked, do the rescan now. */
522 if (state == QH_STATE_IDLE)
525 /* Otherwise we have to wait until the QH is fully unlinked.
526 * Our caller will start an unlink if qh->needs_rescan is
527 * set. But if an unlink has already started, nothing needs
530 if (state != QH_STATE_LINKED)
531 qh->needs_rescan = 0;
534 /* restore original state; caller must unlink or relink */
535 qh->qh_state = state;
537 /* be sure the hardware's done with the qh before refreshing
538 * it after fault cleanup, or recovering from silicon wrongly
539 * overlaying the dummy qtd (which reduces DMA chatter).
541 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
544 qh_refresh(ehci, qh);
546 case QH_STATE_LINKED:
547 /* We won't refresh a QH that's linked (after the HC
548 * stopped the queue). That avoids a race:
549 * - HC reads first part of QH;
550 * - CPU updates that first part and the token;
551 * - HC reads rest of that QH, including token
552 * Result: HC gets an inconsistent image, and then
553 * DMAs to/from the wrong memory (corrupting it).
555 * That should be rare for interrupt transfers,
556 * except maybe high bandwidth ...
558 if ((cpu_to_hc32(ehci, QH_SMASK)
559 & hw->hw_info2) != 0) {
560 intr_deschedule (ehci, qh);
561 (void) qh_schedule (ehci, qh);
563 /* Tell the caller to start an unlink */
564 qh->needs_rescan = 1;
567 /* otherwise, unlink already started */
574 /*-------------------------------------------------------------------------*/
576 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
577 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
578 // ... and packet size, for any kind of endpoint descriptor
579 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
582 * reverse of qh_urb_transaction: free a list of TDs.
583 * used for cleanup after errors, before HC sees an URB's TDs.
585 static void qtd_list_free (
586 struct ehci_hcd *ehci,
588 struct list_head *qtd_list
590 struct list_head *entry, *temp;
592 list_for_each_safe (entry, temp, qtd_list) {
593 struct ehci_qtd *qtd;
595 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
596 list_del (&qtd->qtd_list);
597 ehci_qtd_free (ehci, qtd);
602 * create a list of filled qtds for this URB; won't link into qh.
604 static struct list_head *
606 struct ehci_hcd *ehci,
608 struct list_head *head,
611 struct ehci_qtd *qtd, *qtd_prev;
618 * URBs map to sequences of QTDs: one logical transaction
620 qtd = ehci_qtd_alloc (ehci, flags);
623 list_add_tail (&qtd->qtd_list, head);
626 token = QTD_STS_ACTIVE;
627 token |= (EHCI_TUNE_CERR << 10);
628 /* for split transactions, SplitXState initialized to zero */
630 len = urb->transfer_buffer_length;
631 is_input = usb_pipein (urb->pipe);
632 if (usb_pipecontrol (urb->pipe)) {
634 qtd_fill(ehci, qtd, urb->setup_dma,
635 sizeof (struct usb_ctrlrequest),
636 token | (2 /* "setup" */ << 8), 8);
638 /* ... and always at least one more pid */
641 qtd = ehci_qtd_alloc (ehci, flags);
645 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
646 list_add_tail (&qtd->qtd_list, head);
648 /* for zero length DATA stages, STATUS is always IN */
650 token |= (1 /* "in" */ << 8);
654 * data transfer stage: buffer setup
656 buf = urb->transfer_dma;
659 token |= (1 /* "in" */ << 8);
660 /* else it's already initted to "out" pid (0 << 8) */
662 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
665 * buffer gets wrapped in one or more qtds;
666 * last one may be "short" (including zero len)
667 * and may serve as a control status ack
672 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
677 * short reads advance to a "magic" dummy instead of the next
678 * qtd ... that forces the queue to stop, for manual cleanup.
679 * (this will usually be overridden later.)
682 qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
684 /* qh makes control packets use qtd toggle; maybe switch it */
685 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
688 if (likely (len <= 0))
692 qtd = ehci_qtd_alloc (ehci, flags);
696 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
697 list_add_tail (&qtd->qtd_list, head);
701 * unless the caller requires manual cleanup after short reads,
702 * have the alt_next mechanism keep the queue running after the
703 * last data qtd (the only one, for control and most other cases).
705 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
706 || usb_pipecontrol (urb->pipe)))
707 qtd->hw_alt_next = EHCI_LIST_END(ehci);
710 * control requests may need a terminating data "status" ack;
711 * bulk ones may need a terminating short packet (zero length).
713 if (likely (urb->transfer_buffer_length != 0)) {
716 if (usb_pipecontrol (urb->pipe)) {
718 token ^= 0x0100; /* "in" <--> "out" */
719 token |= QTD_TOGGLE; /* force DATA1 */
720 } else if (usb_pipebulk (urb->pipe)
721 && (urb->transfer_flags & URB_ZERO_PACKET)
722 && !(urb->transfer_buffer_length % maxpacket)) {
727 qtd = ehci_qtd_alloc (ehci, flags);
731 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
732 list_add_tail (&qtd->qtd_list, head);
734 /* never any data in such packets */
735 qtd_fill(ehci, qtd, 0, 0, token, 0);
739 /* by default, enable interrupt on urb completion */
740 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
741 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
745 qtd_list_free (ehci, urb, head);
749 /*-------------------------------------------------------------------------*/
751 // Would be best to create all qh's from config descriptors,
752 // when each interface/altsetting is established. Unlink
753 // any previous qh and cancel its urbs first; endpoints are
754 // implicitly reset then (data toggle too).
755 // That'd mean updating how usbcore talks to HCDs. (2.7?)
759 * Each QH holds a qtd list; a QH is used for everything except iso.
761 * For interrupt urbs, the scheduler must set the microframe scheduling
762 * mask(s) each time the QH gets scheduled. For highspeed, that's
763 * just one microframe in the s-mask. For split interrupt transactions
764 * there are additional complications: c-mask, maybe FSTNs.
766 static struct ehci_qh *
768 struct ehci_hcd *ehci,
772 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
773 u32 info1 = 0, info2 = 0;
776 struct usb_tt *tt = urb->dev->tt;
777 struct ehci_qh_hw *hw;
783 * init endpoint/device data for this QH
785 info1 |= usb_pipeendpoint (urb->pipe) << 8;
786 info1 |= usb_pipedevice (urb->pipe) << 0;
788 is_input = usb_pipein (urb->pipe);
789 type = usb_pipetype (urb->pipe);
790 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
792 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
793 * acts like up to 3KB, but is built from smaller packets.
795 if (max_packet(maxp) > 1024) {
796 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
800 /* Compute interrupt scheduling parameters just once, and save.
801 * - allowing for high bandwidth, how many nsec/uframe are used?
802 * - split transactions need a second CSPLIT uframe; same question
803 * - splits also need a schedule gap (for full/low speed I/O)
804 * - qh has a polling interval
806 * For control/bulk requests, the HC or TT handles these.
808 if (type == PIPE_INTERRUPT) {
809 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
811 hb_mult(maxp) * max_packet(maxp)));
812 qh->start = NO_FRAME;
814 if (urb->dev->speed == USB_SPEED_HIGH) {
818 qh->period = urb->interval >> 3;
819 if (qh->period == 0 && urb->interval != 1) {
820 /* NOTE interval 2 or 4 uframes could work.
821 * But interval 1 scheduling is simpler, and
822 * includes high bandwidth.
824 dbg ("intr period %d uframes, NYET!",
831 /* gap is f(FS/LS transfer times) */
832 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
833 is_input, 0, maxp) / (125 * 1000);
835 /* FIXME this just approximates SPLIT/CSPLIT times */
836 if (is_input) { // SPLIT, gap, CSPLIT+DATA
837 qh->c_usecs = qh->usecs + HS_USECS (0);
838 qh->usecs = HS_USECS (1);
839 } else { // SPLIT+DATA, gap, CSPLIT
840 qh->usecs += HS_USECS (1);
841 qh->c_usecs = HS_USECS (0);
844 think_time = tt ? tt->think_time : 0;
845 qh->tt_usecs = NS_TO_US (think_time +
846 usb_calc_bus_time (urb->dev->speed,
847 is_input, 0, max_packet (maxp)));
848 qh->period = urb->interval;
852 /* support for tt scheduling, and access to toggles */
856 switch (urb->dev->speed) {
858 info1 |= (1 << 12); /* EPS "low" */
862 /* EPS 0 means "full" */
863 if (type != PIPE_INTERRUPT)
864 info1 |= (EHCI_TUNE_RL_TT << 28);
865 if (type == PIPE_CONTROL) {
866 info1 |= (1 << 27); /* for TT */
867 info1 |= 1 << 14; /* toggle from qtd */
871 info2 |= (EHCI_TUNE_MULT_TT << 30);
873 /* Some Freescale processors have an erratum in which the
874 * port number in the queue head was 0..N-1 instead of 1..N.
876 if (ehci_has_fsl_portno_bug(ehci))
877 info2 |= (urb->dev->ttport-1) << 23;
879 info2 |= urb->dev->ttport << 23;
881 /* set the address of the TT; for TDI's integrated
882 * root hub tt, leave it zeroed.
884 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
885 info2 |= tt->hub->devnum << 16;
887 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
891 case USB_SPEED_HIGH: /* no TT involved */
892 info1 |= (2 << 12); /* EPS "high" */
893 if (type == PIPE_CONTROL) {
894 info1 |= (EHCI_TUNE_RL_HS << 28);
895 info1 |= 64 << 16; /* usb2 fixed maxpacket */
896 info1 |= 1 << 14; /* toggle from qtd */
897 info2 |= (EHCI_TUNE_MULT_HS << 30);
898 } else if (type == PIPE_BULK) {
899 info1 |= (EHCI_TUNE_RL_HS << 28);
900 /* The USB spec says that high speed bulk endpoints
901 * always use 512 byte maxpacket. But some device
902 * vendors decided to ignore that, and MSFT is happy
903 * to help them do so. So now people expect to use
904 * such nonconformant devices with Linux too; sigh.
906 info1 |= max_packet(maxp) << 16;
907 info2 |= (EHCI_TUNE_MULT_HS << 30);
908 } else { /* PIPE_INTERRUPT */
909 info1 |= max_packet (maxp) << 16;
910 info2 |= hb_mult (maxp) << 30;
914 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
920 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
922 /* init as live, toggle clear, advance to dummy */
923 qh->qh_state = QH_STATE_IDLE;
925 hw->hw_info1 = cpu_to_hc32(ehci, info1);
926 hw->hw_info2 = cpu_to_hc32(ehci, info2);
927 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
928 qh_refresh (ehci, qh);
932 /*-------------------------------------------------------------------------*/
934 /* move qh (and its qtds) onto async queue; maybe enable queue. */
936 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
938 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
939 struct ehci_qh *head;
941 /* Don't link a QH if there's a Clear-TT-Buffer pending */
942 if (unlikely(qh->clearing_tt))
945 WARN_ON(qh->qh_state != QH_STATE_IDLE);
947 /* (re)start the async schedule? */
949 timer_action_done (ehci, TIMER_ASYNC_OFF);
950 if (!head->qh_next.qh) {
951 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
953 if (!(cmd & CMD_ASE)) {
954 /* in case a clear of CMD_ASE didn't take yet */
955 (void)handshake(ehci, &ehci->regs->status,
957 cmd |= CMD_ASE | CMD_RUN;
958 ehci_writel(ehci, cmd, &ehci->regs->command);
959 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
960 /* posted write need not be known to HC yet ... */
964 /* clear halt and/or toggle; and maybe recover from silicon quirk */
965 qh_refresh(ehci, qh);
967 /* splice right after start */
968 qh->qh_next = head->qh_next;
969 qh->hw->hw_next = head->hw->hw_next;
972 head->qh_next.qh = qh;
973 head->hw->hw_next = dma;
977 qh->qh_state = QH_STATE_LINKED;
978 /* qtd completions reported later by interrupt */
981 /*-------------------------------------------------------------------------*/
984 * For control/bulk/interrupt, return QH with these TDs appended.
985 * Allocates and initializes the QH if necessary.
986 * Returns null if it can't allocate a QH it needs to.
987 * If the QH has TDs (urbs) already, that's great.
989 static struct ehci_qh *qh_append_tds (
990 struct ehci_hcd *ehci,
992 struct list_head *qtd_list,
997 struct ehci_qh *qh = NULL;
998 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1000 qh = (struct ehci_qh *) *ptr;
1001 if (unlikely (qh == NULL)) {
1002 /* can't sleep here, we have ehci->lock... */
1003 qh = qh_make (ehci, urb, GFP_ATOMIC);
1006 if (likely (qh != NULL)) {
1007 struct ehci_qtd *qtd;
1009 if (unlikely (list_empty (qtd_list)))
1012 qtd = list_entry (qtd_list->next, struct ehci_qtd,
1015 /* control qh may need patching ... */
1016 if (unlikely (epnum == 0)) {
1018 /* usb_reset_device() briefly reverts to address 0 */
1019 if (usb_pipedevice (urb->pipe) == 0)
1020 qh->hw->hw_info1 &= ~qh_addr_mask;
1023 /* just one way to queue requests: swap with the dummy qtd.
1024 * only hc or qh_refresh() ever modify the overlay.
1026 if (likely (qtd != NULL)) {
1027 struct ehci_qtd *dummy;
1031 /* to avoid racing the HC, use the dummy td instead of
1032 * the first td of our list (becomes new dummy). both
1033 * tds stay deactivated until we're done, when the
1034 * HC is allowed to fetch the old dummy (4.10.2).
1036 token = qtd->hw_token;
1037 qtd->hw_token = HALT_BIT(ehci);
1041 dma = dummy->qtd_dma;
1043 dummy->qtd_dma = dma;
1045 list_del (&qtd->qtd_list);
1046 list_add (&dummy->qtd_list, qtd_list);
1047 list_splice_tail(qtd_list, &qh->qtd_list);
1049 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1052 /* hc must see the new dummy at list end */
1054 qtd = list_entry (qh->qtd_list.prev,
1055 struct ehci_qtd, qtd_list);
1056 qtd->hw_next = QTD_NEXT(ehci, dma);
1058 /* let the hc process these next qtds */
1060 dummy->hw_token = token;
1062 urb->hcpriv = qh_get (qh);
1068 /*-------------------------------------------------------------------------*/
1072 struct ehci_hcd *ehci,
1074 struct list_head *qtd_list,
1077 struct ehci_qtd *qtd;
1079 unsigned long flags;
1080 struct ehci_qh *qh = NULL;
1083 qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
1084 epnum = urb->ep->desc.bEndpointAddress;
1086 #ifdef EHCI_URB_TRACE
1088 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1089 __func__, urb->dev->devpath, urb,
1090 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1091 urb->transfer_buffer_length,
1092 qtd, urb->ep->hcpriv);
1095 spin_lock_irqsave (&ehci->lock, flags);
1096 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1097 &ehci_to_hcd(ehci)->flags))) {
1101 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1105 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1106 if (unlikely(qh == NULL)) {
1107 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1112 /* Control/bulk operations through TTs don't need scheduling,
1113 * the HC and TT handle it when the TT has a buffer ready.
1115 if (likely (qh->qh_state == QH_STATE_IDLE))
1116 qh_link_async(ehci, qh);
1118 spin_unlock_irqrestore (&ehci->lock, flags);
1119 if (unlikely (qh == NULL))
1120 qtd_list_free (ehci, urb, qtd_list);
1124 /*-------------------------------------------------------------------------*/
1126 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
1128 static void end_unlink_async (struct ehci_hcd *ehci)
1130 struct ehci_qh *qh = ehci->reclaim;
1131 struct ehci_qh *next;
1133 iaa_watchdog_done(ehci);
1135 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
1136 qh->qh_state = QH_STATE_IDLE;
1137 qh->qh_next.qh = NULL;
1138 qh_put (qh); // refcount from reclaim
1140 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1142 ehci->reclaim = next;
1145 qh_completions (ehci, qh);
1147 if (!list_empty (&qh->qtd_list)
1148 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1149 qh_link_async (ehci, qh);
1151 /* it's not free to turn the async schedule on/off; leave it
1152 * active but idle for a while once it empties.
1154 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1155 && ehci->async->qh_next.qh == NULL)
1156 timer_action (ehci, TIMER_ASYNC_OFF);
1158 qh_put(qh); /* refcount from async list */
1161 ehci->reclaim = NULL;
1162 start_unlink_async (ehci, next);
1166 /* makes sure the async qh will become idle */
1167 /* caller must own ehci->lock */
1169 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1171 int cmd = ehci_readl(ehci, &ehci->regs->command);
1172 struct ehci_qh *prev;
1175 assert_spin_locked(&ehci->lock);
1177 || (qh->qh_state != QH_STATE_LINKED
1178 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1183 /* stop async schedule right now? */
1184 if (unlikely (qh == ehci->async)) {
1185 /* can't get here without STS_ASS set */
1186 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1187 && !ehci->reclaim) {
1188 /* ... and CMD_IAAD clear */
1189 ehci_writel(ehci, cmd & ~CMD_ASE,
1190 &ehci->regs->command);
1192 // handshake later, if we need to
1193 timer_action_done (ehci, TIMER_ASYNC_OFF);
1198 qh->qh_state = QH_STATE_UNLINK;
1199 ehci->reclaim = qh = qh_get (qh);
1202 while (prev->qh_next.qh != qh)
1203 prev = prev->qh_next.qh;
1205 prev->hw->hw_next = qh->hw->hw_next;
1206 prev->qh_next = qh->qh_next;
1209 /* If the controller isn't running, we don't have to wait for it */
1210 if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
1211 /* if (unlikely (qh->reclaim != 0))
1212 * this will recurse, probably not much
1214 end_unlink_async (ehci);
1219 ehci_writel(ehci, cmd, &ehci->regs->command);
1220 (void)ehci_readl(ehci, &ehci->regs->command);
1221 iaa_watchdog_start(ehci);
1224 /*-------------------------------------------------------------------------*/
1226 static void scan_async (struct ehci_hcd *ehci)
1229 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1231 ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
1232 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1234 qh = ehci->async->qh_next.qh;
1235 if (likely (qh != NULL)) {
1237 /* clean any finished work for this qh */
1238 if (!list_empty (&qh->qtd_list)
1239 && qh->stamp != ehci->stamp) {
1242 /* unlinks could happen here; completion
1243 * reporting drops the lock. rescan using
1244 * the latest schedule, but don't rescan
1245 * qhs we already finished (no looping).
1248 qh->stamp = ehci->stamp;
1249 temp = qh_completions (ehci, qh);
1250 if (qh->needs_rescan)
1251 unlink_async(ehci, qh);
1258 /* unlink idle entries, reducing DMA usage as well
1259 * as HCD schedule-scanning costs. delay for any qh
1260 * we just scanned, there's a not-unusual case that it
1261 * doesn't stay idle for long.
1262 * (plus, avoids some kind of re-activation race.)
1264 if (list_empty(&qh->qtd_list)
1265 && qh->qh_state == QH_STATE_LINKED) {
1267 && ((ehci->stamp - qh->stamp) & 0x1fff)
1268 >= (EHCI_SHRINK_FRAMES * 8))
1269 start_unlink_async(ehci, qh);
1271 action = TIMER_ASYNC_SHRINK;
1274 qh = qh->qh_next.qh;
1277 if (action == TIMER_ASYNC_SHRINK)
1278 timer_action (ehci, TIMER_ASYNC_SHRINK);