2 * linux/drivers/usb/gadget/pxa2xx_udc.c
3 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
5 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
6 * Copyright (C) 2003 Robert Schwebel, Pengutronix
7 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
8 * Copyright (C) 2003 David Brownell
9 * Copyright (C) 2003 Joshua Wise
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 // #define VERBOSE DBG_VERBOSE
29 #include <linux/device.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/types.h>
34 #include <linux/errno.h>
35 #include <linux/delay.h>
36 #include <linux/slab.h>
37 #include <linux/init.h>
38 #include <linux/timer.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/proc_fs.h>
43 #include <linux/platform_device.h>
44 #include <linux/dma-mapping.h>
45 #include <linux/irq.h>
46 #include <linux/clk.h>
47 #include <linux/err.h>
49 #include <asm/byteorder.h>
53 #include <asm/system.h>
54 #include <asm/mach-types.h>
55 #include <asm/unaligned.h>
56 #include <asm/hardware.h>
58 #include <linux/usb/ch9.h>
59 #include <linux/usb/gadget.h>
61 #include <asm/mach/udc_pxa2xx.h>
65 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
66 * series processors. The UDC for the IXP 4xx series is very similar.
67 * There are fifteen endpoints, in addition to ep0.
69 * Such controller drivers work with a gadget driver. The gadget driver
70 * returns descriptors, implements configuration and data protocols used
71 * by the host to interact with this device, and allocates endpoints to
72 * the different protocol interfaces. The controller driver virtualizes
73 * usb hardware so that the gadget drivers will be more portable.
75 * This UDC hardware wants to implement a bit too much USB protocol, so
76 * it constrains the sorts of USB configuration change events that work.
77 * The errata for these chips are misleading; some "fixed" bugs from
78 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
80 * Note that the UDC hardware supports DMA (except on IXP) but that's
81 * not used here. IN-DMA (to host) is simple enough, when the data is
82 * suitably aligned (16 bytes) ... the network stack doesn't do that,
83 * other software can. OUT-DMA is buggy in most chip versions, as well
84 * as poorly designed (data toggle not automatic). So this driver won't
85 * bother using DMA. (Mostly-working IN-DMA support was available in
86 * kernels before 2.6.23, but was never enabled or well tested.)
89 #define DRIVER_VERSION "30-June-2007"
90 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
93 static const char driver_name [] = "pxa2xx_udc";
95 static const char ep0name [] = "ep0";
98 #ifdef CONFIG_ARCH_IXP4XX
100 /* cpu-specific register addresses are compiled in to this code */
101 #ifdef CONFIG_ARCH_PXA
102 #error "Can't configure both IXP and PXA"
107 #include "pxa2xx_udc.h"
110 #ifdef CONFIG_USB_PXA2XX_SMALL
111 #define SIZE_STR " (small)"
116 /* ---------------------------------------------------------------------------
117 * endpoint related parts of the api to the usb controller hardware,
118 * used by gadget driver; and the inner talker-to-hardware core.
119 * ---------------------------------------------------------------------------
122 static void pxa2xx_ep_fifo_flush (struct usb_ep *ep);
123 static void nuke (struct pxa2xx_ep *, int status);
125 /* one GPIO should be used to detect VBUS from the host */
126 static int is_vbus_present(void)
128 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
130 if (mach->gpio_vbus) {
131 int value = gpio_get_value(mach->gpio_vbus);
132 return mach->gpio_vbus_inverted ? !value : value;
134 if (mach->udc_is_connected)
135 return mach->udc_is_connected();
139 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
140 static void pullup_off(void)
142 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
144 if (mach->gpio_pullup)
145 gpio_set_value(mach->gpio_pullup, 0);
146 else if (mach->udc_command)
147 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
150 static void pullup_on(void)
152 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
154 if (mach->gpio_pullup)
155 gpio_set_value(mach->gpio_pullup, 1);
156 else if (mach->udc_command)
157 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
160 static void pio_irq_enable(int bEndpointAddress)
162 bEndpointAddress &= 0xf;
163 if (bEndpointAddress < 8)
164 UICR0 &= ~(1 << bEndpointAddress);
166 bEndpointAddress -= 8;
167 UICR1 &= ~(1 << bEndpointAddress);
171 static void pio_irq_disable(int bEndpointAddress)
173 bEndpointAddress &= 0xf;
174 if (bEndpointAddress < 8)
175 UICR0 |= 1 << bEndpointAddress;
177 bEndpointAddress -= 8;
178 UICR1 |= 1 << bEndpointAddress;
182 /* The UDCCR reg contains mask and interrupt status bits,
183 * so using '|=' isn't safe as it may ack an interrupt.
185 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
187 static inline void udc_set_mask_UDCCR(int mask)
189 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
192 static inline void udc_clear_mask_UDCCR(int mask)
194 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
197 static inline void udc_ack_int_UDCCR(int mask)
199 /* udccr contains the bits we dont want to change */
200 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
202 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
206 * endpoint enable/disable
208 * we need to verify the descriptors used to enable endpoints. since pxa2xx
209 * endpoint configurations are fixed, and are pretty much always enabled,
210 * there's not a lot to manage here.
212 * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints,
213 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
214 * for a single interface (with only the default altsetting) and for gadget
215 * drivers that don't halt endpoints (not reset by set_interface). that also
216 * means that if you use ISO, you must violate the USB spec rule that all
217 * iso endpoints must be in non-default altsettings.
219 static int pxa2xx_ep_enable (struct usb_ep *_ep,
220 const struct usb_endpoint_descriptor *desc)
222 struct pxa2xx_ep *ep;
223 struct pxa2xx_udc *dev;
225 ep = container_of (_ep, struct pxa2xx_ep, ep);
226 if (!_ep || !desc || ep->desc || _ep->name == ep0name
227 || desc->bDescriptorType != USB_DT_ENDPOINT
228 || ep->bEndpointAddress != desc->bEndpointAddress
229 || ep->fifo_size < le16_to_cpu
230 (desc->wMaxPacketSize)) {
231 DMSG("%s, bad ep or descriptor\n", __FUNCTION__);
235 /* xfer types must match, except that interrupt ~= bulk */
236 if (ep->bmAttributes != desc->bmAttributes
237 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
238 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
239 DMSG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
243 /* hardware _could_ do smaller, but driver doesn't */
244 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
245 && le16_to_cpu (desc->wMaxPacketSize)
247 || !desc->wMaxPacketSize) {
248 DMSG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
253 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
254 DMSG("%s, bogus device state\n", __FUNCTION__);
261 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
263 /* flush fifo (mostly for OUT buffers) */
264 pxa2xx_ep_fifo_flush (_ep);
266 /* ... reset halt state too, if we could ... */
268 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
272 static int pxa2xx_ep_disable (struct usb_ep *_ep)
274 struct pxa2xx_ep *ep;
277 ep = container_of (_ep, struct pxa2xx_ep, ep);
278 if (!_ep || !ep->desc) {
279 DMSG("%s, %s not enabled\n", __FUNCTION__,
280 _ep ? ep->ep.name : NULL);
283 local_irq_save(flags);
285 nuke (ep, -ESHUTDOWN);
287 /* flush fifo (mostly for IN buffers) */
288 pxa2xx_ep_fifo_flush (_ep);
293 local_irq_restore(flags);
294 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
298 /*-------------------------------------------------------------------------*/
300 /* for the pxa2xx, these can just wrap kmalloc/kfree. gadget drivers
301 * must still pass correctly initialized endpoints, since other controller
302 * drivers may care about how it's currently set up (dma issues etc).
306 * pxa2xx_ep_alloc_request - allocate a request data structure
308 static struct usb_request *
309 pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
311 struct pxa2xx_request *req;
313 req = kzalloc(sizeof(*req), gfp_flags);
317 INIT_LIST_HEAD (&req->queue);
323 * pxa2xx_ep_free_request - deallocate a request data structure
326 pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
328 struct pxa2xx_request *req;
330 req = container_of (_req, struct pxa2xx_request, req);
331 WARN_ON (!list_empty (&req->queue));
335 /*-------------------------------------------------------------------------*/
338 * done - retire a request; caller blocked irqs
340 static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status)
342 unsigned stopped = ep->stopped;
344 list_del_init(&req->queue);
346 if (likely (req->req.status == -EINPROGRESS))
347 req->req.status = status;
349 status = req->req.status;
351 if (status && status != -ESHUTDOWN)
352 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
353 ep->ep.name, &req->req, status,
354 req->req.actual, req->req.length);
356 /* don't modify queue heads during completion callback */
358 req->req.complete(&ep->ep, &req->req);
359 ep->stopped = stopped;
363 static inline void ep0_idle (struct pxa2xx_udc *dev)
365 dev->ep0state = EP0_IDLE;
369 write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
372 unsigned length, count;
374 buf = req->req.buf + req->req.actual;
377 /* how big will this packet be? */
378 length = min(req->req.length - req->req.actual, max);
379 req->req.actual += length;
382 while (likely(count--))
389 * write to an IN endpoint fifo, as many packets as possible.
390 * irqs will use this to write the rest later.
391 * caller guarantees at least one packet buffer is ready (or a zlp).
394 write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
398 max = le16_to_cpu(ep->desc->wMaxPacketSize);
401 int is_last, is_short;
403 count = write_packet(ep->reg_uddr, req, max);
405 /* last packet is usually short (or a zlp) */
406 if (unlikely (count != max))
407 is_last = is_short = 1;
409 if (likely(req->req.length != req->req.actual)
414 /* interrupt/iso maxpacket may not fill the fifo */
415 is_short = unlikely (max < ep->fifo_size);
418 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
420 is_last ? "/L" : "", is_short ? "/S" : "",
421 req->req.length - req->req.actual, req);
423 /* let loose that packet. maybe try writing another one,
424 * double buffering might work. TSP, TPC, and TFS
425 * bit values are the same for all normal IN endpoints.
427 *ep->reg_udccs = UDCCS_BI_TPC;
429 *ep->reg_udccs = UDCCS_BI_TSP;
431 /* requests complete when all IN data is in the FIFO */
434 if (list_empty(&ep->queue))
435 pio_irq_disable (ep->bEndpointAddress);
439 // TODO experiment: how robust can fifo mode tweaking be?
440 // double buffering is off in the default fifo mode, which
441 // prevents TFS from being set here.
443 } while (*ep->reg_udccs & UDCCS_BI_TFS);
447 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
448 * ep0 data stage. these chips want very simple state transitions.
451 void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag)
453 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
455 dev->req_pending = 0;
456 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
457 __FUNCTION__, tag, UDCCS0, flags);
461 write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
466 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
467 ep->dev->stats.write.bytes += count;
469 /* last packet "must be" short (or a zlp) */
470 is_short = (count != EP0_FIFO_SIZE);
472 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
473 req->req.length - req->req.actual, req);
475 if (unlikely (is_short)) {
476 if (ep->dev->req_pending)
477 ep0start(ep->dev, UDCCS0_IPR, "short IN");
481 count = req->req.length;
484 #ifndef CONFIG_ARCH_IXP4XX
486 /* This seems to get rid of lost status irqs in some cases:
487 * host responds quickly, or next request involves config
488 * change automagic, or should have been hidden, or ...
490 * FIXME get rid of all udelays possible...
492 if (count >= EP0_FIFO_SIZE) {
495 if ((UDCCS0 & UDCCS0_OPR) != 0) {
496 /* clear OPR, generate ack */
506 } else if (ep->dev->req_pending)
507 ep0start(ep->dev, 0, "IN");
513 * read_fifo - unload packet(s) from the fifo we use for usb OUT
514 * transfers and put them into the request. caller should have made
515 * sure there's at least one packet ready.
517 * returns true if the request completed because of short packet or the
518 * request buffer having filled (and maybe overran till end-of-packet).
521 read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
526 unsigned bufferspace, count, is_short;
528 /* make sure there's a packet in the FIFO.
529 * UDCCS_{BO,IO}_RPC are all the same bit value.
530 * UDCCS_{BO,IO}_RNE are all the same bit value.
532 udccs = *ep->reg_udccs;
533 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
535 buf = req->req.buf + req->req.actual;
537 bufferspace = req->req.length - req->req.actual;
539 /* read all bytes from this packet */
540 if (likely (udccs & UDCCS_BO_RNE)) {
541 count = 1 + (0x0ff & *ep->reg_ubcr);
542 req->req.actual += min (count, bufferspace);
545 is_short = (count < ep->ep.maxpacket);
546 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
547 ep->ep.name, udccs, count,
548 is_short ? "/S" : "",
549 req, req->req.actual, req->req.length);
550 while (likely (count-- != 0)) {
551 u8 byte = (u8) *ep->reg_uddr;
553 if (unlikely (bufferspace == 0)) {
554 /* this happens when the driver's buffer
555 * is smaller than what the host sent.
556 * discard the extra data.
558 if (req->req.status != -EOVERFLOW)
559 DMSG("%s overflow %d\n",
561 req->req.status = -EOVERFLOW;
567 *ep->reg_udccs = UDCCS_BO_RPC;
568 /* RPC/RSP/RNE could now reflect the other packet buffer */
570 /* iso is one request per packet */
571 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
572 if (udccs & UDCCS_IO_ROF)
573 req->req.status = -EHOSTUNREACH;
574 /* more like "is_done" */
579 if (is_short || req->req.actual == req->req.length) {
581 if (list_empty(&ep->queue))
582 pio_irq_disable (ep->bEndpointAddress);
586 /* finished that packet. the next one may be waiting... */
592 * special ep0 version of the above. no UBCR0 or double buffering; status
593 * handshaking is magic. most device protocols don't need control-OUT.
594 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
595 * protocols do use them.
598 read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
601 unsigned bufferspace;
603 buf = req->req.buf + req->req.actual;
604 bufferspace = req->req.length - req->req.actual;
606 while (UDCCS0 & UDCCS0_RNE) {
609 if (unlikely (bufferspace == 0)) {
610 /* this happens when the driver's buffer
611 * is smaller than what the host sent.
612 * discard the extra data.
614 if (req->req.status != -EOVERFLOW)
615 DMSG("%s overflow\n", ep->ep.name);
616 req->req.status = -EOVERFLOW;
624 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
627 if (req->req.actual >= req->req.length)
630 /* finished that packet. the next one may be waiting... */
634 /*-------------------------------------------------------------------------*/
637 pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
639 struct pxa2xx_request *req;
640 struct pxa2xx_ep *ep;
641 struct pxa2xx_udc *dev;
644 req = container_of(_req, struct pxa2xx_request, req);
645 if (unlikely (!_req || !_req->complete || !_req->buf
646 || !list_empty(&req->queue))) {
647 DMSG("%s, bad params\n", __FUNCTION__);
651 ep = container_of(_ep, struct pxa2xx_ep, ep);
652 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
653 DMSG("%s, bad ep\n", __FUNCTION__);
658 if (unlikely (!dev->driver
659 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
660 DMSG("%s, bogus device state\n", __FUNCTION__);
664 /* iso is always one packet per request, that's the only way
665 * we can report per-packet status. that also helps with dma.
667 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
668 && req->req.length > le16_to_cpu
669 (ep->desc->wMaxPacketSize)))
672 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
673 _ep->name, _req, _req->length, _req->buf);
675 local_irq_save(flags);
677 _req->status = -EINPROGRESS;
680 /* kickstart this i/o queue? */
681 if (list_empty(&ep->queue) && !ep->stopped) {
682 if (ep->desc == 0 /* ep0 */) {
683 unsigned length = _req->length;
685 switch (dev->ep0state) {
686 case EP0_IN_DATA_PHASE:
687 dev->stats.write.ops++;
688 if (write_ep0_fifo(ep, req))
692 case EP0_OUT_DATA_PHASE:
693 dev->stats.read.ops++;
695 if (dev->req_config) {
696 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
697 dev->has_cfr ? "" : " raced");
699 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
702 dev->ep0state = EP0_END_XFER;
703 local_irq_restore (flags);
706 if (dev->req_pending)
707 ep0start(dev, UDCCS0_IPR, "OUT");
708 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
709 && read_ep0_fifo(ep, req))) {
717 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
718 local_irq_restore (flags);
721 /* can the FIFO can satisfy the request immediately? */
722 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
723 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
724 && write_fifo(ep, req))
726 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
727 && read_fifo(ep, req)) {
731 if (likely (req && ep->desc))
732 pio_irq_enable(ep->bEndpointAddress);
735 /* pio or dma irq handler advances the queue. */
736 if (likely (req != 0))
737 list_add_tail(&req->queue, &ep->queue);
738 local_irq_restore(flags);
745 * nuke - dequeue ALL requests
747 static void nuke(struct pxa2xx_ep *ep, int status)
749 struct pxa2xx_request *req;
751 /* called with irqs blocked */
752 while (!list_empty(&ep->queue)) {
753 req = list_entry(ep->queue.next,
754 struct pxa2xx_request,
756 done(ep, req, status);
759 pio_irq_disable (ep->bEndpointAddress);
763 /* dequeue JUST ONE request */
764 static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
766 struct pxa2xx_ep *ep;
767 struct pxa2xx_request *req;
770 ep = container_of(_ep, struct pxa2xx_ep, ep);
771 if (!_ep || ep->ep.name == ep0name)
774 local_irq_save(flags);
776 /* make sure it's actually queued on this endpoint */
777 list_for_each_entry (req, &ep->queue, queue) {
778 if (&req->req == _req)
781 if (&req->req != _req) {
782 local_irq_restore(flags);
786 done(ep, req, -ECONNRESET);
788 local_irq_restore(flags);
792 /*-------------------------------------------------------------------------*/
794 static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value)
796 struct pxa2xx_ep *ep;
799 ep = container_of(_ep, struct pxa2xx_ep, ep);
801 || (!ep->desc && ep->ep.name != ep0name))
802 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
803 DMSG("%s, bad ep\n", __FUNCTION__);
807 /* this path (reset toggle+halt) is needed to implement
808 * SET_INTERFACE on normal hardware. but it can't be
809 * done from software on the PXA UDC, and the hardware
810 * forgets to do it as part of SET_INTERFACE automagic.
812 DMSG("only host can clear %s halt\n", _ep->name);
816 local_irq_save(flags);
818 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
819 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
820 || !list_empty(&ep->queue))) {
821 local_irq_restore(flags);
825 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
826 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
828 /* ep0 needs special care */
830 start_watchdog(ep->dev);
831 ep->dev->req_pending = 0;
832 ep->dev->ep0state = EP0_STALL;
834 /* and bulk/intr endpoints like dropping stalls too */
837 for (i = 0; i < 1000; i += 20) {
838 if (*ep->reg_udccs & UDCCS_BI_SST)
843 local_irq_restore(flags);
845 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
849 static int pxa2xx_ep_fifo_status(struct usb_ep *_ep)
851 struct pxa2xx_ep *ep;
853 ep = container_of(_ep, struct pxa2xx_ep, ep);
855 DMSG("%s, bad ep\n", __FUNCTION__);
858 /* pxa can't report unclaimed bytes from IN fifos */
859 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
861 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
862 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
865 return (*ep->reg_ubcr & 0xfff) + 1;
868 static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep)
870 struct pxa2xx_ep *ep;
872 ep = container_of(_ep, struct pxa2xx_ep, ep);
873 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
874 DMSG("%s, bad ep\n", __FUNCTION__);
878 /* toggle and halt bits stay unchanged */
880 /* for OUT, just read and discard the FIFO contents. */
881 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
882 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
883 (void) *ep->reg_uddr;
887 /* most IN status is the same, but ISO can't stall */
888 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
889 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
894 static struct usb_ep_ops pxa2xx_ep_ops = {
895 .enable = pxa2xx_ep_enable,
896 .disable = pxa2xx_ep_disable,
898 .alloc_request = pxa2xx_ep_alloc_request,
899 .free_request = pxa2xx_ep_free_request,
901 .queue = pxa2xx_ep_queue,
902 .dequeue = pxa2xx_ep_dequeue,
904 .set_halt = pxa2xx_ep_set_halt,
905 .fifo_status = pxa2xx_ep_fifo_status,
906 .fifo_flush = pxa2xx_ep_fifo_flush,
910 /* ---------------------------------------------------------------------------
911 * device-scoped parts of the api to the usb controller hardware
912 * ---------------------------------------------------------------------------
915 static int pxa2xx_udc_get_frame(struct usb_gadget *_gadget)
917 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
920 static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget)
922 /* host may not have enabled remote wakeup */
923 if ((UDCCS0 & UDCCS0_DRWF) == 0)
924 return -EHOSTUNREACH;
925 udc_set_mask_UDCCR(UDCCR_RSM);
929 static void stop_activity(struct pxa2xx_udc *, struct usb_gadget_driver *);
930 static void udc_enable (struct pxa2xx_udc *);
931 static void udc_disable(struct pxa2xx_udc *);
933 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
936 static int pullup(struct pxa2xx_udc *udc, int is_active)
938 is_active = is_active && udc->vbus && udc->pullup;
939 DMSG("%s\n", is_active ? "active" : "inactive");
943 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
944 DMSG("disconnect %s\n", udc->driver
945 ? udc->driver->driver.name
947 stop_activity(udc, udc->driver);
954 /* VBUS reporting logically comes from a transceiver */
955 static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
957 struct pxa2xx_udc *udc;
959 udc = container_of(_gadget, struct pxa2xx_udc, gadget);
960 udc->vbus = is_active = (is_active != 0);
961 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
962 pullup(udc, is_active);
966 /* drivers may have software control over D+ pullup */
967 static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active)
969 struct pxa2xx_udc *udc;
971 udc = container_of(_gadget, struct pxa2xx_udc, gadget);
973 /* not all boards support pullup control */
974 if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
977 is_active = (is_active != 0);
978 udc->pullup = is_active;
979 pullup(udc, is_active);
983 static const struct usb_gadget_ops pxa2xx_udc_ops = {
984 .get_frame = pxa2xx_udc_get_frame,
985 .wakeup = pxa2xx_udc_wakeup,
986 .vbus_session = pxa2xx_udc_vbus_session,
987 .pullup = pxa2xx_udc_pullup,
989 // .vbus_draw ... boards may consume current from VBUS, up to
990 // 100-500mA based on config. the 500uA suspend ceiling means
991 // that exclusively vbus-powered PXA designs violate USB specs.
994 /*-------------------------------------------------------------------------*/
996 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
998 static const char proc_node_name [] = "driver/udc";
1001 udc_proc_read(char *page, char **start, off_t off, int count,
1002 int *eof, void *_dev)
1005 struct pxa2xx_udc *dev = _dev;
1007 unsigned size = count;
1008 unsigned long flags;
1015 local_irq_save(flags);
1017 /* basic device status */
1018 t = scnprintf(next, size, DRIVER_DESC "\n"
1019 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1020 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1021 dev->driver ? dev->driver->driver.name : "(none)",
1022 is_vbus_present() ? "full speed" : "disconnected");
1026 /* registers for device and ep0 */
1027 t = scnprintf(next, size,
1028 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1029 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1034 t = scnprintf(next, size,
1035 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1036 (tmp & UDCCR_REM) ? " rem" : "",
1037 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1038 (tmp & UDCCR_SRM) ? " srm" : "",
1039 (tmp & UDCCR_SUSIR) ? " susir" : "",
1040 (tmp & UDCCR_RESIR) ? " resir" : "",
1041 (tmp & UDCCR_RSM) ? " rsm" : "",
1042 (tmp & UDCCR_UDA) ? " uda" : "",
1043 (tmp & UDCCR_UDE) ? " ude" : "");
1048 t = scnprintf(next, size,
1049 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1050 (tmp & UDCCS0_SA) ? " sa" : "",
1051 (tmp & UDCCS0_RNE) ? " rne" : "",
1052 (tmp & UDCCS0_FST) ? " fst" : "",
1053 (tmp & UDCCS0_SST) ? " sst" : "",
1054 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1055 (tmp & UDCCS0_FTF) ? " ftf" : "",
1056 (tmp & UDCCS0_IPR) ? " ipr" : "",
1057 (tmp & UDCCS0_OPR) ? " opr" : "");
1063 t = scnprintf(next, size,
1064 "udccfr %02X =%s%s\n", tmp,
1065 (tmp & UDCCFR_AREN) ? " aren" : "",
1066 (tmp & UDCCFR_ACM) ? " acm" : "");
1071 if (!is_vbus_present() || !dev->driver)
1074 t = scnprintf(next, size, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1075 dev->stats.write.bytes, dev->stats.write.ops,
1076 dev->stats.read.bytes, dev->stats.read.ops,
1081 /* dump endpoint queues */
1082 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1083 struct pxa2xx_ep *ep = &dev->ep [i];
1084 struct pxa2xx_request *req;
1087 const struct usb_endpoint_descriptor *d;
1092 tmp = *dev->ep [i].reg_udccs;
1093 t = scnprintf(next, size,
1094 "%s max %d %s udccs %02x irqs %lu\n",
1095 ep->ep.name, le16_to_cpu (d->wMaxPacketSize),
1096 "pio", tmp, ep->pio_irqs);
1097 /* TODO translate all five groups of udccs bits! */
1099 } else /* ep0 should only have one transfer queued */
1100 t = scnprintf(next, size, "ep0 max 16 pio irqs %lu\n",
1102 if (t <= 0 || t > size)
1107 if (list_empty(&ep->queue)) {
1108 t = scnprintf(next, size, "\t(nothing queued)\n");
1109 if (t <= 0 || t > size)
1115 list_for_each_entry(req, &ep->queue, queue) {
1116 t = scnprintf(next, size,
1117 "\treq %p len %d/%d buf %p\n",
1118 &req->req, req->req.actual,
1119 req->req.length, req->req.buf);
1120 if (t <= 0 || t > size)
1128 local_irq_restore(flags);
1130 return count - size;
1133 #define create_proc_files() \
1134 create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
1135 #define remove_proc_files() \
1136 remove_proc_entry(proc_node_name, NULL)
1138 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1140 #define create_proc_files() do {} while (0)
1141 #define remove_proc_files() do {} while (0)
1143 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1145 /*-------------------------------------------------------------------------*/
1148 * udc_disable - disable USB device controller
1150 static void udc_disable(struct pxa2xx_udc *dev)
1152 /* block all irqs */
1153 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1154 UICR0 = UICR1 = 0xff;
1157 /* if hardware supports it, disconnect from usb */
1160 udc_clear_mask_UDCCR(UDCCR_UDE);
1162 #ifdef CONFIG_ARCH_PXA
1163 /* Disable clock for USB device */
1164 clk_disable(dev->clk);
1168 dev->gadget.speed = USB_SPEED_UNKNOWN;
1173 * udc_reinit - initialize software state
1175 static void udc_reinit(struct pxa2xx_udc *dev)
1179 /* device/ep0 records init */
1180 INIT_LIST_HEAD (&dev->gadget.ep_list);
1181 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1182 dev->ep0state = EP0_IDLE;
1184 /* basic endpoint records init */
1185 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1186 struct pxa2xx_ep *ep = &dev->ep[i];
1189 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1193 INIT_LIST_HEAD (&ep->queue);
1197 /* the rest was statically initialized, and is read-only */
1200 /* until it's enabled, this UDC should be completely invisible
1203 static void udc_enable (struct pxa2xx_udc *dev)
1205 udc_clear_mask_UDCCR(UDCCR_UDE);
1207 #ifdef CONFIG_ARCH_PXA
1208 /* Enable clock for USB device */
1209 clk_enable(dev->clk);
1212 /* try to clear these bits before we enable the udc */
1213 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1216 dev->gadget.speed = USB_SPEED_UNKNOWN;
1217 dev->stats.irqs = 0;
1220 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1222 * - if RESET is already in progress, ack interrupt
1223 * - unmask reset interrupt
1225 udc_set_mask_UDCCR(UDCCR_UDE);
1226 if (!(UDCCR & UDCCR_UDA))
1227 udc_ack_int_UDCCR(UDCCR_RSTIR);
1229 if (dev->has_cfr /* UDC_RES2 is defined */) {
1230 /* pxa255 (a0+) can avoid a set_config race that could
1231 * prevent gadget drivers from configuring correctly
1233 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1235 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1236 * which could result in missing packets and interrupts.
1237 * supposedly one bit per endpoint, controlling whether it
1238 * double buffers or not; ACM/AREN bits fit into the holes.
1239 * zero bits (like USIR0_IRx) disable double buffering.
1245 /* enable suspend/resume and reset irqs */
1246 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1248 /* enable ep0 irqs */
1249 UICR0 &= ~UICR0_IM0;
1251 /* if hardware supports it, pullup D+ and wait for reset */
1256 /* when a driver is successfully registered, it will receive
1257 * control requests including set_configuration(), which enables
1258 * non-control requests. then usb traffic follows until a
1259 * disconnect is reported. then a host may connect again, or
1260 * the driver might get unbound.
1262 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1264 struct pxa2xx_udc *dev = the_controller;
1268 || driver->speed < USB_SPEED_FULL
1270 || !driver->disconnect
1278 /* first hook up the driver ... */
1279 dev->driver = driver;
1280 dev->gadget.dev.driver = &driver->driver;
1283 retval = device_add (&dev->gadget.dev);
1287 dev->gadget.dev.driver = NULL;
1290 retval = driver->bind(&dev->gadget);
1292 DMSG("bind to driver %s --> error %d\n",
1293 driver->driver.name, retval);
1294 device_del (&dev->gadget.dev);
1298 /* ... then enable host detection and ep0; and we're ready
1299 * for set_configuration as well as eventual disconnect.
1301 DMSG("registered gadget driver '%s'\n", driver->driver.name);
1306 EXPORT_SYMBOL(usb_gadget_register_driver);
1309 stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
1313 /* don't disconnect drivers more than once */
1314 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1316 dev->gadget.speed = USB_SPEED_UNKNOWN;
1318 /* prevent new request submissions, kill any outstanding requests */
1319 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1320 struct pxa2xx_ep *ep = &dev->ep[i];
1323 nuke(ep, -ESHUTDOWN);
1325 del_timer_sync(&dev->timer);
1327 /* report disconnect; the driver is already quiesced */
1329 driver->disconnect(&dev->gadget);
1331 /* re-init driver-visible data structures */
1335 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1337 struct pxa2xx_udc *dev = the_controller;
1341 if (!driver || driver != dev->driver || !driver->unbind)
1344 local_irq_disable();
1346 stop_activity(dev, driver);
1349 driver->unbind(&dev->gadget);
1350 dev->gadget.dev.driver = NULL;
1353 device_del (&dev->gadget.dev);
1355 DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1359 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1362 /*-------------------------------------------------------------------------*/
1364 #ifdef CONFIG_ARCH_LUBBOCK
1366 /* Lubbock has separate connect and disconnect irqs. More typical designs
1367 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1371 lubbock_vbus_irq(int irq, void *_dev)
1373 struct pxa2xx_udc *dev = _dev;
1378 case LUBBOCK_USB_IRQ:
1380 disable_irq(LUBBOCK_USB_IRQ);
1381 enable_irq(LUBBOCK_USB_DISC_IRQ);
1383 case LUBBOCK_USB_DISC_IRQ:
1385 disable_irq(LUBBOCK_USB_DISC_IRQ);
1386 enable_irq(LUBBOCK_USB_IRQ);
1392 pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1398 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1400 struct pxa2xx_udc *dev = _dev;
1401 int vbus = gpio_get_value(dev->mach->gpio_vbus);
1403 if (dev->mach->gpio_vbus_inverted)
1406 pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1411 /*-------------------------------------------------------------------------*/
1413 static inline void clear_ep_state (struct pxa2xx_udc *dev)
1417 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1418 * fifos, and pending transactions mustn't be continued in any case.
1420 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1421 nuke(&dev->ep[i], -ECONNABORTED);
1424 static void udc_watchdog(unsigned long _dev)
1426 struct pxa2xx_udc *dev = (void *)_dev;
1428 local_irq_disable();
1429 if (dev->ep0state == EP0_STALL
1430 && (UDCCS0 & UDCCS0_FST) == 0
1431 && (UDCCS0 & UDCCS0_SST) == 0) {
1432 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1433 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1434 start_watchdog(dev);
1439 static void handle_ep0 (struct pxa2xx_udc *dev)
1441 u32 udccs0 = UDCCS0;
1442 struct pxa2xx_ep *ep = &dev->ep [0];
1443 struct pxa2xx_request *req;
1445 struct usb_ctrlrequest r;
1450 if (list_empty(&ep->queue))
1453 req = list_entry(ep->queue.next, struct pxa2xx_request, queue);
1455 /* clear stall status */
1456 if (udccs0 & UDCCS0_SST) {
1458 UDCCS0 = UDCCS0_SST;
1459 del_timer(&dev->timer);
1463 /* previous request unfinished? non-error iff back-to-back ... */
1464 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1466 del_timer(&dev->timer);
1470 switch (dev->ep0state) {
1472 /* late-breaking status? */
1475 /* start control request? */
1476 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1477 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1482 /* read SETUP packet */
1483 for (i = 0; i < 8; i++) {
1484 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1486 DMSG("SETUP %d!\n", i);
1489 u.raw [i] = (u8) UDDR0;
1491 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1495 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1496 u.r.bRequestType, u.r.bRequest,
1497 le16_to_cpu(u.r.wValue),
1498 le16_to_cpu(u.r.wIndex),
1499 le16_to_cpu(u.r.wLength));
1501 /* cope with automagic for some standard requests. */
1502 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1503 == USB_TYPE_STANDARD;
1504 dev->req_config = 0;
1505 dev->req_pending = 1;
1506 switch (u.r.bRequest) {
1507 /* hardware restricts gadget drivers here! */
1508 case USB_REQ_SET_CONFIGURATION:
1509 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1510 /* reflect hardware's automagic
1511 * up to the gadget driver.
1514 dev->req_config = 1;
1515 clear_ep_state(dev);
1516 /* if !has_cfr, there's no synch
1517 * else use AREN (later) not SA|OPR
1518 * USIR0_IR0 acts edge sensitive
1522 /* ... and here, even more ... */
1523 case USB_REQ_SET_INTERFACE:
1524 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1525 /* udc hardware is broken by design:
1526 * - altsetting may only be zero;
1527 * - hw resets all interfaces' eps;
1528 * - ep reset doesn't include halt(?).
1530 DMSG("broken set_interface (%d/%d)\n",
1531 le16_to_cpu(u.r.wIndex),
1532 le16_to_cpu(u.r.wValue));
1536 /* hardware was supposed to hide this */
1537 case USB_REQ_SET_ADDRESS:
1538 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1539 ep0start(dev, 0, "address");
1545 if (u.r.bRequestType & USB_DIR_IN)
1546 dev->ep0state = EP0_IN_DATA_PHASE;
1548 dev->ep0state = EP0_OUT_DATA_PHASE;
1550 i = dev->driver->setup(&dev->gadget, &u.r);
1552 /* hardware automagic preventing STALL... */
1553 if (dev->req_config) {
1554 /* hardware sometimes neglects to tell
1555 * tell us about config change events,
1556 * so later ones may fail...
1558 WARN("config change %02x fail %d?\n",
1561 /* TODO experiment: if has_cfr,
1562 * hardware didn't ACK; maybe we
1563 * could actually STALL!
1566 DBG(DBG_VERBOSE, "protocol STALL, "
1567 "%02x err %d\n", UDCCS0, i);
1569 /* the watchdog timer helps deal with cases
1570 * where udc seems to clear FST wrongly, and
1571 * then NAKs instead of STALLing.
1573 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1574 start_watchdog(dev);
1575 dev->ep0state = EP0_STALL;
1577 /* deferred i/o == no response yet */
1578 } else if (dev->req_pending) {
1579 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1580 || dev->req_std || u.r.wLength))
1581 ep0start(dev, 0, "defer");
1583 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1586 /* expect at least one data or status stage irq */
1589 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1590 == (UDCCS0_OPR|UDCCS0_SA))) {
1593 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1594 * still observed on a pxa255 a0.
1596 DBG(DBG_VERBOSE, "e131\n");
1599 /* read SETUP data, but don't trust it too much */
1600 for (i = 0; i < 8; i++)
1601 u.raw [i] = (u8) UDDR0;
1602 if ((u.r.bRequestType & USB_RECIP_MASK)
1605 if (u.word [0] == 0 && u.word [1] == 0)
1609 /* some random early IRQ:
1612 * - OPR got set, without SA (likely status stage)
1614 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1617 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1618 if (udccs0 & UDCCS0_OPR) {
1619 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1620 DBG(DBG_VERBOSE, "ep0in premature status\n");
1624 } else /* irq was IPR clearing */ {
1626 /* this IN packet might finish the request */
1627 (void) write_ep0_fifo(ep, req);
1628 } /* else IN token before response was written */
1631 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1632 if (udccs0 & UDCCS0_OPR) {
1634 /* this OUT packet might finish the request */
1635 if (read_ep0_fifo(ep, req))
1637 /* else more OUT packets expected */
1638 } /* else OUT token before read was issued */
1639 } else /* irq was IPR clearing */ {
1640 DBG(DBG_VERBOSE, "ep0out premature status\n");
1649 /* ack control-IN status (maybe in-zlp was skipped)
1650 * also appears after some config change events.
1652 if (udccs0 & UDCCS0_OPR)
1653 UDCCS0 = UDCCS0_OPR;
1657 UDCCS0 = UDCCS0_FST;
1663 static void handle_ep(struct pxa2xx_ep *ep)
1665 struct pxa2xx_request *req;
1666 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1672 if (likely (!list_empty(&ep->queue)))
1673 req = list_entry(ep->queue.next,
1674 struct pxa2xx_request, queue);
1678 // TODO check FST handling
1680 udccs = *ep->reg_udccs;
1681 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1683 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1684 tmp |= UDCCS_BI_SST;
1687 *ep->reg_udccs = tmp;
1688 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1689 completed = write_fifo(ep, req);
1691 } else { /* irq from RPC (or for ISO, ROF) */
1692 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1693 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1695 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1698 *ep->reg_udccs = tmp;
1700 /* fifos can hold packets, ready for reading... */
1702 completed = read_fifo(ep, req);
1704 pio_irq_disable (ep->bEndpointAddress);
1707 } while (completed);
1711 * pxa2xx_udc_irq - interrupt handler
1713 * avoid delays in ep0 processing. the control handshaking isn't always
1714 * under software control (pxa250c0 and the pxa255 are better), and delays
1715 * could cause usb protocol errors.
1718 pxa2xx_udc_irq(int irq, void *_dev)
1720 struct pxa2xx_udc *dev = _dev;
1729 /* SUSpend Interrupt Request */
1730 if (unlikely(udccr & UDCCR_SUSIR)) {
1731 udc_ack_int_UDCCR(UDCCR_SUSIR);
1733 DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1734 ? "" : "+disconnect");
1736 if (!is_vbus_present())
1737 stop_activity(dev, dev->driver);
1738 else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1740 && dev->driver->suspend)
1741 dev->driver->suspend(&dev->gadget);
1745 /* RESume Interrupt Request */
1746 if (unlikely(udccr & UDCCR_RESIR)) {
1747 udc_ack_int_UDCCR(UDCCR_RESIR);
1749 DBG(DBG_VERBOSE, "USB resume\n");
1751 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1753 && dev->driver->resume
1754 && is_vbus_present())
1755 dev->driver->resume(&dev->gadget);
1758 /* ReSeT Interrupt Request - USB reset */
1759 if (unlikely(udccr & UDCCR_RSTIR)) {
1760 udc_ack_int_UDCCR(UDCCR_RSTIR);
1763 if ((UDCCR & UDCCR_UDA) == 0) {
1764 DBG(DBG_VERBOSE, "USB reset start\n");
1766 /* reset driver and endpoints,
1767 * in case that's not yet done
1769 stop_activity (dev, dev->driver);
1772 DBG(DBG_VERBOSE, "USB reset end\n");
1773 dev->gadget.speed = USB_SPEED_FULL;
1774 memset(&dev->stats, 0, sizeof dev->stats);
1775 /* driver and endpoints are still reset */
1779 u32 usir0 = USIR0 & ~UICR0;
1780 u32 usir1 = USIR1 & ~UICR1;
1783 if (unlikely (!usir0 && !usir1))
1786 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1788 /* control traffic */
1789 if (usir0 & USIR0_IR0) {
1790 dev->ep[0].pio_irqs++;
1795 /* endpoint data transfers */
1796 for (i = 0; i < 8; i++) {
1799 if (i && (usir0 & tmp)) {
1800 handle_ep(&dev->ep[i]);
1805 handle_ep(&dev->ep[i+8]);
1812 /* we could also ask for 1 msec SOF (SIR) interrupts */
1818 /*-------------------------------------------------------------------------*/
1820 static void nop_release (struct device *dev)
1822 DMSG("%s %s\n", __FUNCTION__, dev->bus_id);
1825 /* this uses load-time allocation and initialization (instead of
1826 * doing it at run-time) to save code, eliminate fault paths, and
1827 * be more obviously correct.
1829 static struct pxa2xx_udc memory = {
1831 .ops = &pxa2xx_udc_ops,
1832 .ep0 = &memory.ep[0].ep,
1833 .name = driver_name,
1836 .release = nop_release,
1840 /* control endpoint */
1844 .ops = &pxa2xx_ep_ops,
1845 .maxpacket = EP0_FIFO_SIZE,
1848 .reg_udccs = &UDCCS0,
1852 /* first group of endpoints */
1855 .name = "ep1in-bulk",
1856 .ops = &pxa2xx_ep_ops,
1857 .maxpacket = BULK_FIFO_SIZE,
1860 .fifo_size = BULK_FIFO_SIZE,
1861 .bEndpointAddress = USB_DIR_IN | 1,
1862 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1863 .reg_udccs = &UDCCS1,
1868 .name = "ep2out-bulk",
1869 .ops = &pxa2xx_ep_ops,
1870 .maxpacket = BULK_FIFO_SIZE,
1873 .fifo_size = BULK_FIFO_SIZE,
1874 .bEndpointAddress = 2,
1875 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1876 .reg_udccs = &UDCCS2,
1880 #ifndef CONFIG_USB_PXA2XX_SMALL
1883 .name = "ep3in-iso",
1884 .ops = &pxa2xx_ep_ops,
1885 .maxpacket = ISO_FIFO_SIZE,
1888 .fifo_size = ISO_FIFO_SIZE,
1889 .bEndpointAddress = USB_DIR_IN | 3,
1890 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1891 .reg_udccs = &UDCCS3,
1896 .name = "ep4out-iso",
1897 .ops = &pxa2xx_ep_ops,
1898 .maxpacket = ISO_FIFO_SIZE,
1901 .fifo_size = ISO_FIFO_SIZE,
1902 .bEndpointAddress = 4,
1903 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1904 .reg_udccs = &UDCCS4,
1910 .name = "ep5in-int",
1911 .ops = &pxa2xx_ep_ops,
1912 .maxpacket = INT_FIFO_SIZE,
1915 .fifo_size = INT_FIFO_SIZE,
1916 .bEndpointAddress = USB_DIR_IN | 5,
1917 .bmAttributes = USB_ENDPOINT_XFER_INT,
1918 .reg_udccs = &UDCCS5,
1922 /* second group of endpoints */
1925 .name = "ep6in-bulk",
1926 .ops = &pxa2xx_ep_ops,
1927 .maxpacket = BULK_FIFO_SIZE,
1930 .fifo_size = BULK_FIFO_SIZE,
1931 .bEndpointAddress = USB_DIR_IN | 6,
1932 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1933 .reg_udccs = &UDCCS6,
1938 .name = "ep7out-bulk",
1939 .ops = &pxa2xx_ep_ops,
1940 .maxpacket = BULK_FIFO_SIZE,
1943 .fifo_size = BULK_FIFO_SIZE,
1944 .bEndpointAddress = 7,
1945 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1946 .reg_udccs = &UDCCS7,
1952 .name = "ep8in-iso",
1953 .ops = &pxa2xx_ep_ops,
1954 .maxpacket = ISO_FIFO_SIZE,
1957 .fifo_size = ISO_FIFO_SIZE,
1958 .bEndpointAddress = USB_DIR_IN | 8,
1959 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1960 .reg_udccs = &UDCCS8,
1965 .name = "ep9out-iso",
1966 .ops = &pxa2xx_ep_ops,
1967 .maxpacket = ISO_FIFO_SIZE,
1970 .fifo_size = ISO_FIFO_SIZE,
1971 .bEndpointAddress = 9,
1972 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1973 .reg_udccs = &UDCCS9,
1979 .name = "ep10in-int",
1980 .ops = &pxa2xx_ep_ops,
1981 .maxpacket = INT_FIFO_SIZE,
1984 .fifo_size = INT_FIFO_SIZE,
1985 .bEndpointAddress = USB_DIR_IN | 10,
1986 .bmAttributes = USB_ENDPOINT_XFER_INT,
1987 .reg_udccs = &UDCCS10,
1988 .reg_uddr = &UDDR10,
1991 /* third group of endpoints */
1994 .name = "ep11in-bulk",
1995 .ops = &pxa2xx_ep_ops,
1996 .maxpacket = BULK_FIFO_SIZE,
1999 .fifo_size = BULK_FIFO_SIZE,
2000 .bEndpointAddress = USB_DIR_IN | 11,
2001 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2002 .reg_udccs = &UDCCS11,
2003 .reg_uddr = &UDDR11,
2007 .name = "ep12out-bulk",
2008 .ops = &pxa2xx_ep_ops,
2009 .maxpacket = BULK_FIFO_SIZE,
2012 .fifo_size = BULK_FIFO_SIZE,
2013 .bEndpointAddress = 12,
2014 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2015 .reg_udccs = &UDCCS12,
2016 .reg_ubcr = &UBCR12,
2017 .reg_uddr = &UDDR12,
2021 .name = "ep13in-iso",
2022 .ops = &pxa2xx_ep_ops,
2023 .maxpacket = ISO_FIFO_SIZE,
2026 .fifo_size = ISO_FIFO_SIZE,
2027 .bEndpointAddress = USB_DIR_IN | 13,
2028 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2029 .reg_udccs = &UDCCS13,
2030 .reg_uddr = &UDDR13,
2034 .name = "ep14out-iso",
2035 .ops = &pxa2xx_ep_ops,
2036 .maxpacket = ISO_FIFO_SIZE,
2039 .fifo_size = ISO_FIFO_SIZE,
2040 .bEndpointAddress = 14,
2041 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2042 .reg_udccs = &UDCCS14,
2043 .reg_ubcr = &UBCR14,
2044 .reg_uddr = &UDDR14,
2048 .name = "ep15in-int",
2049 .ops = &pxa2xx_ep_ops,
2050 .maxpacket = INT_FIFO_SIZE,
2053 .fifo_size = INT_FIFO_SIZE,
2054 .bEndpointAddress = USB_DIR_IN | 15,
2055 .bmAttributes = USB_ENDPOINT_XFER_INT,
2056 .reg_udccs = &UDCCS15,
2057 .reg_uddr = &UDDR15,
2059 #endif /* !CONFIG_USB_PXA2XX_SMALL */
2062 #define CP15R0_VENDOR_MASK 0xffffe000
2064 #if defined(CONFIG_ARCH_PXA)
2065 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2067 #elif defined(CONFIG_ARCH_IXP4XX)
2068 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2072 #define CP15R0_PROD_MASK 0x000003f0
2073 #define PXA25x 0x00000100 /* and PXA26x */
2074 #define PXA210 0x00000120
2076 #define CP15R0_REV_MASK 0x0000000f
2078 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2080 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2081 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2082 #define PXA250_B2 0x00000104
2083 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2084 #define PXA250_B0 0x00000102
2085 #define PXA250_A1 0x00000101
2086 #define PXA250_A0 0x00000100
2088 #define PXA210_C0 0x00000125
2089 #define PXA210_B2 0x00000124
2090 #define PXA210_B1 0x00000123
2091 #define PXA210_B0 0x00000122
2092 #define IXP425_A0 0x000001c1
2093 #define IXP425_B0 0x000001f1
2094 #define IXP465_AD 0x00000200
2097 * probe - binds to the platform device
2099 static int __init pxa2xx_udc_probe(struct platform_device *pdev)
2101 struct pxa2xx_udc *dev = &memory;
2102 int retval, vbus_irq, irq;
2105 /* insist on Intel/ARM/XScale */
2106 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2107 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2108 pr_err("%s: not XScale!\n", driver_name);
2112 /* trigger chiprev-specific logic */
2113 switch (chiprev & CP15R0_PRODREV_MASK) {
2114 #if defined(CONFIG_ARCH_PXA)
2120 /* A0/A1 "not released"; ep 13, 15 unusable */
2122 case PXA250_B2: case PXA210_B2:
2123 case PXA250_B1: case PXA210_B1:
2124 case PXA250_B0: case PXA210_B0:
2125 /* OUT-DMA is broken ... */
2127 case PXA250_C0: case PXA210_C0:
2129 #elif defined(CONFIG_ARCH_IXP4XX)
2137 pr_err("%s: unrecognized processor: %08x\n",
2138 driver_name, chiprev);
2139 /* iop3xx, ixp4xx, ... */
2143 irq = platform_get_irq(pdev, 0);
2147 #ifdef CONFIG_ARCH_PXA
2148 dev->clk = clk_get(&pdev->dev, "UDCCLK");
2149 if (IS_ERR(dev->clk)) {
2150 retval = PTR_ERR(dev->clk);
2155 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2156 dev->has_cfr ? "" : " (!cfr)",
2160 /* other non-static parts of init */
2161 dev->dev = &pdev->dev;
2162 dev->mach = pdev->dev.platform_data;
2164 if (dev->mach->gpio_vbus) {
2165 if ((retval = gpio_request(dev->mach->gpio_vbus,
2166 "pxa2xx_udc GPIO VBUS"))) {
2168 "can't get vbus gpio %d, err: %d\n",
2169 dev->mach->gpio_vbus, retval);
2172 gpio_direction_input(dev->mach->gpio_vbus);
2173 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2177 if (dev->mach->gpio_pullup) {
2178 if ((retval = gpio_request(dev->mach->gpio_pullup,
2179 "pca2xx_udc GPIO PULLUP"))) {
2181 "can't get pullup gpio %d, err: %d\n",
2182 dev->mach->gpio_pullup, retval);
2183 goto err_gpio_pullup;
2185 gpio_direction_output(dev->mach->gpio_pullup, 0);
2188 init_timer(&dev->timer);
2189 dev->timer.function = udc_watchdog;
2190 dev->timer.data = (unsigned long) dev;
2192 device_initialize(&dev->gadget.dev);
2193 dev->gadget.dev.parent = &pdev->dev;
2194 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2196 the_controller = dev;
2197 platform_set_drvdata(pdev, dev);
2202 dev->vbus = is_vbus_present();
2204 /* irq setup after old hardware state is cleaned up */
2205 retval = request_irq(irq, pxa2xx_udc_irq,
2206 IRQF_DISABLED, driver_name, dev);
2208 pr_err("%s: can't get irq %d, err %d\n",
2209 driver_name, irq, retval);
2214 #ifdef CONFIG_ARCH_LUBBOCK
2215 if (machine_is_lubbock()) {
2216 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2218 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2221 pr_err("%s: can't get irq %i, err %d\n",
2222 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2226 retval = request_irq(LUBBOCK_USB_IRQ,
2228 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2231 pr_err("%s: can't get irq %i, err %d\n",
2232 driver_name, LUBBOCK_USB_IRQ, retval);
2233 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2239 retval = request_irq(vbus_irq, udc_vbus_irq,
2240 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2241 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2244 pr_err("%s: can't get irq %i, err %d\n",
2245 driver_name, vbus_irq, retval);
2249 create_proc_files();
2254 #ifdef CONFIG_ARCH_LUBBOCK
2255 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2260 if (dev->mach->gpio_pullup)
2261 gpio_free(dev->mach->gpio_pullup);
2263 if (dev->mach->gpio_vbus)
2264 gpio_free(dev->mach->gpio_vbus);
2266 #ifdef CONFIG_ARCH_PXA
2273 static void pxa2xx_udc_shutdown(struct platform_device *_dev)
2278 static int __exit pxa2xx_udc_remove(struct platform_device *pdev)
2280 struct pxa2xx_udc *dev = platform_get_drvdata(pdev);
2286 remove_proc_files();
2289 free_irq(platform_get_irq(pdev, 0), dev);
2292 #ifdef CONFIG_ARCH_LUBBOCK
2293 if (machine_is_lubbock()) {
2294 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2295 free_irq(LUBBOCK_USB_IRQ, dev);
2298 if (dev->mach->gpio_vbus) {
2299 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2300 gpio_free(dev->mach->gpio_vbus);
2302 if (dev->mach->gpio_pullup)
2303 gpio_free(dev->mach->gpio_pullup);
2305 #ifdef CONFIG_ARCH_PXA
2309 platform_set_drvdata(pdev, NULL);
2310 the_controller = NULL;
2314 /*-------------------------------------------------------------------------*/
2318 /* USB suspend (controlled by the host) and system suspend (controlled
2319 * by the PXA) don't necessarily work well together. If USB is active,
2320 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2321 * mode, or any deeper PM saving state.
2323 * For now, we punt and forcibly disconnect from the USB host when PXA
2324 * enters any suspend state. While we're disconnected, we always disable
2325 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2326 * Boards without software pullup control shouldn't use those states.
2327 * VBUS IRQs should probably be ignored so that the PXA device just acts
2328 * "dead" to USB hosts until system resume.
2330 static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state)
2332 struct pxa2xx_udc *udc = platform_get_drvdata(dev);
2334 if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
2335 WARN("USB host won't detect disconnect!\n");
2341 static int pxa2xx_udc_resume(struct platform_device *dev)
2343 struct pxa2xx_udc *udc = platform_get_drvdata(dev);
2351 #define pxa2xx_udc_suspend NULL
2352 #define pxa2xx_udc_resume NULL
2355 /*-------------------------------------------------------------------------*/
2357 static struct platform_driver udc_driver = {
2358 .shutdown = pxa2xx_udc_shutdown,
2359 .remove = __exit_p(pxa2xx_udc_remove),
2360 .suspend = pxa2xx_udc_suspend,
2361 .resume = pxa2xx_udc_resume,
2363 .owner = THIS_MODULE,
2364 .name = "pxa2xx-udc",
2368 static int __init udc_init(void)
2370 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2371 return platform_driver_probe(&udc_driver, pxa2xx_udc_probe);
2373 module_init(udc_init);
2375 static void __exit udc_exit(void)
2377 platform_driver_unregister(&udc_driver);
2379 module_exit(udc_exit);
2381 MODULE_DESCRIPTION(DRIVER_DESC);
2382 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2383 MODULE_LICENSE("GPL");