SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/staging/vt6655/baseband.c

   1 /*
   2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  *
  20  * File: baseband.c
  21  *
  22  * Purpose: Implement functions to access baseband
  23  *
  24  * Author: Kyle Hsu
  25  *
  26  * Date: Aug.22, 2002
  27  *
  28  * Functions:
  29  *      BBuGetFrameTime        - Calculate data frame transmitting time
  30  *      BBvCaculateParameter   - Caculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
  31  *      BBbReadEmbeded         - Embeded read baseband register via MAC
  32  *      BBbWriteEmbeded        - Embeded write baseband register via MAC
  33  *      BBbIsRegBitsOn         - Test if baseband register bits on
  34  *      BBbIsRegBitsOff        - Test if baseband register bits off
  35  *      BBbVT3253Init          - VIA VT3253 baseband chip init code
  36  *      BBvReadAllRegs         - Read All Baseband Registers
  37  *      BBvLoopbackOn          - Turn on BaseBand Loopback mode
  38  *      BBvLoopbackOff         - Turn off BaseBand Loopback mode
  39  *
  40  * Revision History:
  41  *      06-10-2003 Bryan YC Fan:  Re-write codes to support VT3253 spec.
  42  *      08-07-2003 Bryan YC Fan:  Add MAXIM2827/2825 and RFMD2959 support.
  43  *      08-26-2003 Kyle Hsu    :  Modify BBuGetFrameTime() and BBvCaculateParameter().
  44  *                                cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init().
  45  *                                Add the comments.
  46  *      09-01-2003 Bryan YC Fan:  RF & BB tables updated.
  47  *                                Modified BBvLoopbackOn & BBvLoopbackOff().
  48  *
  49  *
  50  */
  51
  52
  53 #if !defined(__TMACRO_H__)
  54 #include "tmacro.h"
  55 #endif
  56 #if !defined(__TBIT_H__)
  57 #include "tbit.h"
  58 #endif
  59 #if !defined(__TETHER_H__)
  60 #include "tether.h"
  61 #endif
  62 #if !defined(__MAC_H__)
  63 #include "mac.h"
  64 #endif
  65 #if !defined(__BASEBAND_H__)
  66 #include "baseband.h"
  67 #endif
  68 #if !defined(__SROM_H__)
  69 #include "srom.h"
  70 #endif
  71 #if !defined(__UMEM_H__)
  72 #include "umem.h"
  73 #endif
  74 #if !defined(__RF_H__)
  75 #include "rf.h"
  76 #endif
  77
  78 /*---------------------  Static Definitions -------------------------*/
  79 //static int          msglevel                =MSG_LEVEL_DEBUG;
  80 static int          msglevel                =MSG_LEVEL_INFO;
  81
  82 //#define       PLICE_DEBUG
  83
  84 /*---------------------  Static Classes  ----------------------------*/
  85
  86 /*---------------------  Static Variables  --------------------------*/
  87
  88 /*---------------------  Static Functions  --------------------------*/
  89
  90 /*---------------------  Export Variables  --------------------------*/
  91
  92 /*---------------------  Static Definitions -------------------------*/
  93
  94 /*---------------------  Static Classes  ----------------------------*/
  95
  96 /*---------------------  Static Variables  --------------------------*/
  97
  98
  99
 100 #define CB_VT3253_INIT_FOR_RFMD 446
 101 BYTE byVT3253InitTab_RFMD[CB_VT3253_INIT_FOR_RFMD][2] = {
 102     {0x00, 0x30},
 103     {0x01, 0x00},
 104     {0x02, 0x00},
 105     {0x03, 0x00},
 106     {0x04, 0x00},
 107     {0x05, 0x00},
 108     {0x06, 0x00},
 109     {0x07, 0x00},
 110     {0x08, 0x70},
 111     {0x09, 0x45},
 112     {0x0a, 0x2a},
 113     {0x0b, 0x76},
 114     {0x0c, 0x00},
 115     {0x0d, 0x01},
 116     {0x0e, 0x80},
 117     {0x0f, 0x00},
 118     {0x10, 0x00},
 119     {0x11, 0x00},
 120     {0x12, 0x00},
 121     {0x13, 0x00},
 122     {0x14, 0x00},
 123     {0x15, 0x00},
 124     {0x16, 0x00},
 125     {0x17, 0x00},
 126     {0x18, 0x00},
 127     {0x19, 0x00},
 128     {0x1a, 0x00},
 129     {0x1b, 0x9d},
 130     {0x1c, 0x05},
 131     {0x1d, 0x00},
 132     {0x1e, 0x00},
 133     {0x1f, 0x00},
 134     {0x20, 0x00},
 135     {0x21, 0x00},
 136     {0x22, 0x00},
 137     {0x23, 0x00},
 138     {0x24, 0x00},
 139     {0x25, 0x4a},
 140     {0x26, 0x00},
 141     {0x27, 0x00},
 142     {0x28, 0x00},
 143     {0x29, 0x00},
 144     {0x2a, 0x00},
 145     {0x2b, 0x00},
 146     {0x2c, 0x00},
 147     {0x2d, 0xa8},
 148     {0x2e, 0x1a},
 149     {0x2f, 0x0c},
 150     {0x30, 0x26},
 151     {0x31, 0x5b},
 152     {0x32, 0x00},
 153     {0x33, 0x00},
 154     {0x34, 0x00},
 155     {0x35, 0x00},
 156     {0x36, 0xaa},
 157     {0x37, 0xaa},
 158     {0x38, 0xff},
 159     {0x39, 0xff},
 160     {0x3a, 0x00},
 161     {0x3b, 0x00},
 162     {0x3c, 0x00},
 163     {0x3d, 0x0d},
 164     {0x3e, 0x51},
 165     {0x3f, 0x04},
 166     {0x40, 0x00},
 167     {0x41, 0x08},
 168     {0x42, 0x00},
 169     {0x43, 0x08},
 170     {0x44, 0x06},
 171     {0x45, 0x14},
 172     {0x46, 0x05},
 173     {0x47, 0x08},
 174     {0x48, 0x00},
 175     {0x49, 0x00},
 176     {0x4a, 0x00},
 177     {0x4b, 0x00},
 178     {0x4c, 0x09},
 179     {0x4d, 0x80},
 180     {0x4e, 0x00},
 181     {0x4f, 0xc5},
 182     {0x50, 0x14},
 183     {0x51, 0x19},
 184     {0x52, 0x00},
 185     {0x53, 0x00},
 186     {0x54, 0x00},
 187     {0x55, 0x00},
 188     {0x56, 0x00},
 189     {0x57, 0x00},
 190     {0x58, 0x00},
 191     {0x59, 0xb0},
 192     {0x5a, 0x00},
 193     {0x5b, 0x00},
 194     {0x5c, 0x00},
 195     {0x5d, 0x00},
 196     {0x5e, 0x00},
 197     {0x5f, 0x00},
 198     {0x60, 0x44},
 199     {0x61, 0x04},
 200     {0x62, 0x00},
 201     {0x63, 0x00},
 202     {0x64, 0x00},
 203     {0x65, 0x00},
 204     {0x66, 0x04},
 205     {0x67, 0xb7},
 206     {0x68, 0x00},
 207     {0x69, 0x00},
 208     {0x6a, 0x00},
 209     {0x6b, 0x00},
 210     {0x6c, 0x00},
 211     {0x6d, 0x03},
 212     {0x6e, 0x01},
 213     {0x6f, 0x00},
 214     {0x70, 0x00},
 215     {0x71, 0x00},
 216     {0x72, 0x00},
 217     {0x73, 0x00},
 218     {0x74, 0x00},
 219     {0x75, 0x00},
 220     {0x76, 0x00},
 221     {0x77, 0x00},
 222     {0x78, 0x00},
 223     {0x79, 0x00},
 224     {0x7a, 0x00},
 225     {0x7b, 0x00},
 226     {0x7c, 0x00},
 227     {0x7d, 0x00},
 228     {0x7e, 0x00},
 229     {0x7f, 0x00},
 230     {0x80, 0x0b},
 231     {0x81, 0x00},
 232     {0x82, 0x3c},
 233     {0x83, 0x00},
 234     {0x84, 0x00},
 235     {0x85, 0x00},
 236     {0x86, 0x00},
 237     {0x87, 0x00},
 238     {0x88, 0x08},
 239     {0x89, 0x00},
 240     {0x8a, 0x08},
 241     {0x8b, 0xa6},
 242     {0x8c, 0x84},
 243     {0x8d, 0x47},
 244     {0x8e, 0xbb},
 245     {0x8f, 0x02},
 246     {0x90, 0x21},
 247     {0x91, 0x0c},
 248     {0x92, 0x04},
 249     {0x93, 0x22},
 250     {0x94, 0x00},
 251     {0x95, 0x00},
 252     {0x96, 0x00},
 253     {0x97, 0xeb},
 254     {0x98, 0x00},
 255     {0x99, 0x00},
 256     {0x9a, 0x00},
 257     {0x9b, 0x00},
 258     {0x9c, 0x00},
 259     {0x9d, 0x00},
 260     {0x9e, 0x00},
 261     {0x9f, 0x00},
 262     {0xa0, 0x00},
 263     {0xa1, 0x00},
 264     {0xa2, 0x00},
 265     {0xa3, 0x00},
 266     {0xa4, 0x00},
 267     {0xa5, 0x00},
 268     {0xa6, 0x10},
 269     {0xa7, 0x04},
 270     {0xa8, 0x10},
 271     {0xa9, 0x00},
 272     {0xaa, 0x8f},
 273     {0xab, 0x00},
 274     {0xac, 0x00},
 275     {0xad, 0x00},
 276     {0xae, 0x00},
 277     {0xaf, 0x80},
 278     {0xb0, 0x38},
 279     {0xb1, 0x00},
 280     {0xb2, 0x00},
 281     {0xb3, 0x00},
 282     {0xb4, 0xee},
 283     {0xb5, 0xff},
 284     {0xb6, 0x10},
 285     {0xb7, 0x00},
 286     {0xb8, 0x00},
 287     {0xb9, 0x00},
 288     {0xba, 0x00},
 289     {0xbb, 0x03},
 290     {0xbc, 0x00},
 291     {0xbd, 0x00},
 292     {0xbe, 0x00},
 293     {0xbf, 0x00},
 294     {0xc0, 0x10},
 295     {0xc1, 0x10},
 296     {0xc2, 0x18},
 297     {0xc3, 0x20},
 298     {0xc4, 0x10},
 299     {0xc5, 0x00},
 300     {0xc6, 0x22},
 301     {0xc7, 0x14},
 302     {0xc8, 0x0f},
 303     {0xc9, 0x08},
 304     {0xca, 0xa4},
 305     {0xcb, 0xa7},
 306     {0xcc, 0x3c},
 307     {0xcd, 0x10},
 308     {0xce, 0x20},
 309     {0xcf, 0x00},
 310     {0xd0, 0x00},
 311     {0xd1, 0x10},
 312     {0xd2, 0x00},
 313     {0xd3, 0x00},
 314     {0xd4, 0x10},
 315     {0xd5, 0x33},
 316     {0xd6, 0x70},
 317     {0xd7, 0x01},
 318     {0xd8, 0x00},
 319     {0xd9, 0x00},
 320     {0xda, 0x00},
 321     {0xdb, 0x00},
 322     {0xdc, 0x00},
 323     {0xdd, 0x00},
 324     {0xde, 0x00},
 325     {0xdf, 0x00},
 326     {0xe0, 0x00},
 327     {0xe1, 0x00},
 328     {0xe2, 0xcc},
 329     {0xe3, 0x04},
 330     {0xe4, 0x08},
 331     {0xe5, 0x10},
 332     {0xe6, 0x00},
 333     {0xe7, 0x0e},
 334     {0xe8, 0x88},
 335     {0xe9, 0xd4},
 336     {0xea, 0x05},
 337     {0xeb, 0xf0},
 338     {0xec, 0x79},
 339     {0xed, 0x0f},
 340     {0xee, 0x04},
 341     {0xef, 0x04},
 342     {0xf0, 0x00},
 343     {0xf1, 0x00},
 344     {0xf2, 0x00},
 345     {0xf3, 0x00},
 346     {0xf4, 0x00},
 347     {0xf5, 0x00},
 348     {0xf6, 0x00},
 349     {0xf7, 0x00},
 350     {0xf8, 0x00},
 351     {0xf9, 0x00},
 352     {0xF0, 0x00},
 353     {0xF1, 0xF8},
 354     {0xF0, 0x80},
 355     {0xF0, 0x00},
 356     {0xF1, 0xF4},
 357     {0xF0, 0x81},
 358     {0xF0, 0x01},
 359     {0xF1, 0xF0},
 360     {0xF0, 0x82},
 361     {0xF0, 0x02},
 362     {0xF1, 0xEC},
 363     {0xF0, 0x83},
 364     {0xF0, 0x03},
 365     {0xF1, 0xE8},
 366     {0xF0, 0x84},
 367     {0xF0, 0x04},
 368     {0xF1, 0xE4},
 369     {0xF0, 0x85},
 370     {0xF0, 0x05},
 371     {0xF1, 0xE0},
 372     {0xF0, 0x86},
 373     {0xF0, 0x06},
 374     {0xF1, 0xDC},
 375     {0xF0, 0x87},
 376     {0xF0, 0x07},
 377     {0xF1, 0xD8},
 378     {0xF0, 0x88},
 379     {0xF0, 0x08},
 380     {0xF1, 0xD4},
 381     {0xF0, 0x89},
 382     {0xF0, 0x09},
 383     {0xF1, 0xD0},
 384     {0xF0, 0x8A},
 385     {0xF0, 0x0A},
 386     {0xF1, 0xCC},
 387     {0xF0, 0x8B},
 388     {0xF0, 0x0B},
 389     {0xF1, 0xC8},
 390     {0xF0, 0x8C},
 391     {0xF0, 0x0C},
 392     {0xF1, 0xC4},
 393     {0xF0, 0x8D},
 394     {0xF0, 0x0D},
 395     {0xF1, 0xC0},
 396     {0xF0, 0x8E},
 397     {0xF0, 0x0E},
 398     {0xF1, 0xBC},
 399     {0xF0, 0x8F},
 400     {0xF0, 0x0F},
 401     {0xF1, 0xB8},
 402     {0xF0, 0x90},
 403     {0xF0, 0x10},
 404     {0xF1, 0xB4},
 405     {0xF0, 0x91},
 406     {0xF0, 0x11},
 407     {0xF1, 0xB0},
 408     {0xF0, 0x92},
 409     {0xF0, 0x12},
 410     {0xF1, 0xAC},
 411     {0xF0, 0x93},
 412     {0xF0, 0x13},
 413     {0xF1, 0xA8},
 414     {0xF0, 0x94},
 415     {0xF0, 0x14},
 416     {0xF1, 0xA4},
 417     {0xF0, 0x95},
 418     {0xF0, 0x15},
 419     {0xF1, 0xA0},
 420     {0xF0, 0x96},
 421     {0xF0, 0x16},
 422     {0xF1, 0x9C},
 423     {0xF0, 0x97},
 424     {0xF0, 0x17},
 425     {0xF1, 0x98},
 426     {0xF0, 0x98},
 427     {0xF0, 0x18},
 428     {0xF1, 0x94},
 429     {0xF0, 0x99},
 430     {0xF0, 0x19},
 431     {0xF1, 0x90},
 432     {0xF0, 0x9A},
 433     {0xF0, 0x1A},
 434     {0xF1, 0x8C},
 435     {0xF0, 0x9B},
 436     {0xF0, 0x1B},
 437     {0xF1, 0x88},
 438     {0xF0, 0x9C},
 439     {0xF0, 0x1C},
 440     {0xF1, 0x84},
 441     {0xF0, 0x9D},
 442     {0xF0, 0x1D},
 443     {0xF1, 0x80},
 444     {0xF0, 0x9E},
 445     {0xF0, 0x1E},
 446     {0xF1, 0x7C},
 447     {0xF0, 0x9F},
 448     {0xF0, 0x1F},
 449     {0xF1, 0x78},
 450     {0xF0, 0xA0},
 451     {0xF0, 0x20},
 452     {0xF1, 0x74},
 453     {0xF0, 0xA1},
 454     {0xF0, 0x21},
 455     {0xF1, 0x70},
 456     {0xF0, 0xA2},
 457     {0xF0, 0x22},
 458     {0xF1, 0x6C},
 459     {0xF0, 0xA3},
 460     {0xF0, 0x23},
 461     {0xF1, 0x68},
 462     {0xF0, 0xA4},
 463     {0xF0, 0x24},
 464     {0xF1, 0x64},
 465     {0xF0, 0xA5},
 466     {0xF0, 0x25},
 467     {0xF1, 0x60},
 468     {0xF0, 0xA6},
 469     {0xF0, 0x26},
 470     {0xF1, 0x5C},
 471     {0xF0, 0xA7},
 472     {0xF0, 0x27},
 473     {0xF1, 0x58},
 474     {0xF0, 0xA8},
 475     {0xF0, 0x28},
 476     {0xF1, 0x54},
 477     {0xF0, 0xA9},
 478     {0xF0, 0x29},
 479     {0xF1, 0x50},
 480     {0xF0, 0xAA},
 481     {0xF0, 0x2A},
 482     {0xF1, 0x4C},
 483     {0xF0, 0xAB},
 484     {0xF0, 0x2B},
 485     {0xF1, 0x48},
 486     {0xF0, 0xAC},
 487     {0xF0, 0x2C},
 488     {0xF1, 0x44},
 489     {0xF0, 0xAD},
 490     {0xF0, 0x2D},
 491     {0xF1, 0x40},
 492     {0xF0, 0xAE},
 493     {0xF0, 0x2E},
 494     {0xF1, 0x3C},
 495     {0xF0, 0xAF},
 496     {0xF0, 0x2F},
 497     {0xF1, 0x38},
 498     {0xF0, 0xB0},
 499     {0xF0, 0x30},
 500     {0xF1, 0x34},
 501     {0xF0, 0xB1},
 502     {0xF0, 0x31},
 503     {0xF1, 0x30},
 504     {0xF0, 0xB2},
 505     {0xF0, 0x32},
 506     {0xF1, 0x2C},
 507     {0xF0, 0xB3},
 508     {0xF0, 0x33},
 509     {0xF1, 0x28},
 510     {0xF0, 0xB4},
 511     {0xF0, 0x34},
 512     {0xF1, 0x24},
 513     {0xF0, 0xB5},
 514     {0xF0, 0x35},
 515     {0xF1, 0x20},
 516     {0xF0, 0xB6},
 517     {0xF0, 0x36},
 518     {0xF1, 0x1C},
 519     {0xF0, 0xB7},
 520     {0xF0, 0x37},
 521     {0xF1, 0x18},
 522     {0xF0, 0xB8},
 523     {0xF0, 0x38},
 524     {0xF1, 0x14},
 525     {0xF0, 0xB9},
 526     {0xF0, 0x39},
 527     {0xF1, 0x10},
 528     {0xF0, 0xBA},
 529     {0xF0, 0x3A},
 530     {0xF1, 0x0C},
 531     {0xF0, 0xBB},
 532     {0xF0, 0x3B},
 533     {0xF1, 0x08},
 534     {0xF0, 0x00},
 535     {0xF0, 0x3C},
 536     {0xF1, 0x04},
 537     {0xF0, 0xBD},
 538     {0xF0, 0x3D},
 539     {0xF1, 0x00},
 540     {0xF0, 0xBE},
 541     {0xF0, 0x3E},
 542     {0xF1, 0x00},
 543     {0xF0, 0xBF},
 544     {0xF0, 0x3F},
 545     {0xF1, 0x00},
 546     {0xF0, 0xC0},
 547     {0xF0, 0x00},
 548 };
 549
 550 #define CB_VT3253B0_INIT_FOR_RFMD 256
 551 BYTE byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = {
 552     {0x00, 0x31},
 553     {0x01, 0x00},
 554     {0x02, 0x00},
 555     {0x03, 0x00},
 556     {0x04, 0x00},
 557     {0x05, 0x81},
 558     {0x06, 0x00},
 559     {0x07, 0x00},
 560     {0x08, 0x38},
 561     {0x09, 0x45},
 562     {0x0a, 0x2a},
 563     {0x0b, 0x76},
 564     {0x0c, 0x00},
 565     {0x0d, 0x00},
 566     {0x0e, 0x80},
 567     {0x0f, 0x00},
 568     {0x10, 0x00},
 569     {0x11, 0x00},
 570     {0x12, 0x00},
 571     {0x13, 0x00},
 572     {0x14, 0x00},
 573     {0x15, 0x00},
 574     {0x16, 0x00},
 575     {0x17, 0x00},
 576     {0x18, 0x00},
 577     {0x19, 0x00},
 578     {0x1a, 0x00},
 579     {0x1b, 0x8e},
 580     {0x1c, 0x06},
 581     {0x1d, 0x00},
 582     {0x1e, 0x00},
 583     {0x1f, 0x00},
 584     {0x20, 0x00},
 585     {0x21, 0x00},
 586     {0x22, 0x00},
 587     {0x23, 0x00},
 588     {0x24, 0x00},
 589     {0x25, 0x4a},
 590     {0x26, 0x00},
 591     {0x27, 0x00},
 592     {0x28, 0x00},
 593     {0x29, 0x00},
 594     {0x2a, 0x00},
 595     {0x2b, 0x00},
 596     {0x2c, 0x00},
 597     {0x2d, 0x34},
 598     {0x2e, 0x18},
 599     {0x2f, 0x0c},
 600     {0x30, 0x26},
 601     {0x31, 0x5b},
 602     {0x32, 0x00},
 603     {0x33, 0x00},
 604     {0x34, 0x00},
 605     {0x35, 0x00},
 606     {0x36, 0xaa},
 607     {0x37, 0xaa},
 608     {0x38, 0xff},
 609     {0x39, 0xff},
 610     {0x3a, 0xf8},
 611     {0x3b, 0x00},
 612     {0x3c, 0x00},
 613     {0x3d, 0x09},
 614     {0x3e, 0x0d},
 615     {0x3f, 0x04},
 616     {0x40, 0x00},
 617     {0x41, 0x08},
 618     {0x42, 0x00},
 619     {0x43, 0x08},
 620     {0x44, 0x08},
 621     {0x45, 0x14},
 622     {0x46, 0x05},
 623     {0x47, 0x08},
 624     {0x48, 0x00},
 625     {0x49, 0x00},
 626     {0x4a, 0x00},
 627     {0x4b, 0x00},
 628     {0x4c, 0x09},
 629     {0x4d, 0x80},
 630     {0x4e, 0x00},
 631     {0x4f, 0xc5},
 632     {0x50, 0x14},
 633     {0x51, 0x19},
 634     {0x52, 0x00},
 635     {0x53, 0x00},
 636     {0x54, 0x00},
 637     {0x55, 0x00},
 638     {0x56, 0x00},
 639     {0x57, 0x00},
 640     {0x58, 0x00},
 641     {0x59, 0xb0},
 642     {0x5a, 0x00},
 643     {0x5b, 0x00},
 644     {0x5c, 0x00},
 645     {0x5d, 0x00},
 646     {0x5e, 0x00},
 647     {0x5f, 0x00},
 648     {0x60, 0x39},
 649     {0x61, 0x83},
 650     {0x62, 0x00},
 651     {0x63, 0x00},
 652     {0x64, 0x00},
 653     {0x65, 0x00},
 654     {0x66, 0xc0},
 655     {0x67, 0x49},
 656     {0x68, 0x00},
 657     {0x69, 0x00},
 658     {0x6a, 0x00},
 659     {0x6b, 0x00},
 660     {0x6c, 0x00},
 661     {0x6d, 0x03},
 662     {0x6e, 0x01},
 663     {0x6f, 0x00},
 664     {0x70, 0x00},
 665     {0x71, 0x00},
 666     {0x72, 0x00},
 667     {0x73, 0x00},
 668     {0x74, 0x00},
 669     {0x75, 0x00},
 670     {0x76, 0x00},
 671     {0x77, 0x00},
 672     {0x78, 0x00},
 673     {0x79, 0x00},
 674     {0x7a, 0x00},
 675     {0x7b, 0x00},
 676     {0x7c, 0x00},
 677     {0x7d, 0x00},
 678     {0x7e, 0x00},
 679     {0x7f, 0x00},
 680     {0x80, 0x89},
 681     {0x81, 0x00},
 682     {0x82, 0x0e},
 683     {0x83, 0x00},
 684     {0x84, 0x00},
 685     {0x85, 0x00},
 686     {0x86, 0x00},
 687     {0x87, 0x00},
 688     {0x88, 0x08},
 689     {0x89, 0x00},
 690     {0x8a, 0x0e},
 691     {0x8b, 0xa7},
 692     {0x8c, 0x88},
 693     {0x8d, 0x47},
 694     {0x8e, 0xaa},
 695     {0x8f, 0x02},
 696     {0x90, 0x23},
 697     {0x91, 0x0c},
 698     {0x92, 0x06},
 699     {0x93, 0x08},
 700     {0x94, 0x00},
 701     {0x95, 0x00},
 702     {0x96, 0x00},
 703     {0x97, 0xeb},
 704     {0x98, 0x00},
 705     {0x99, 0x00},
 706     {0x9a, 0x00},
 707     {0x9b, 0x00},
 708     {0x9c, 0x00},
 709     {0x9d, 0x00},
 710     {0x9e, 0x00},
 711     {0x9f, 0x00},
 712     {0xa0, 0x00},
 713     {0xa1, 0x00},
 714     {0xa2, 0x00},
 715     {0xa3, 0xcd},
 716     {0xa4, 0x07},
 717     {0xa5, 0x33},
 718     {0xa6, 0x18},
 719     {0xa7, 0x00},
 720     {0xa8, 0x18},
 721     {0xa9, 0x00},
 722     {0xaa, 0x28},
 723     {0xab, 0x00},
 724     {0xac, 0x00},
 725     {0xad, 0x00},
 726     {0xae, 0x00},
 727     {0xaf, 0x18},
 728     {0xb0, 0x38},
 729     {0xb1, 0x30},
 730     {0xb2, 0x00},
 731     {0xb3, 0x00},
 732     {0xb4, 0x00},
 733     {0xb5, 0x00},
 734     {0xb6, 0x84},
 735     {0xb7, 0xfd},
 736     {0xb8, 0x00},
 737     {0xb9, 0x00},
 738     {0xba, 0x00},
 739     {0xbb, 0x03},
 740     {0xbc, 0x00},
 741     {0xbd, 0x00},
 742     {0xbe, 0x00},
 743     {0xbf, 0x00},
 744     {0xc0, 0x10},
 745     {0xc1, 0x20},
 746     {0xc2, 0x18},
 747     {0xc3, 0x20},
 748     {0xc4, 0x10},
 749     {0xc5, 0x2c},
 750     {0xc6, 0x1e},
 751     {0xc7, 0x10},
 752     {0xc8, 0x12},
 753     {0xc9, 0x01},
 754     {0xca, 0x6f},
 755     {0xcb, 0xa7},
 756     {0xcc, 0x3c},
 757     {0xcd, 0x10},
 758     {0xce, 0x00},
 759     {0xcf, 0x22},
 760     {0xd0, 0x00},
 761     {0xd1, 0x10},
 762     {0xd2, 0x00},
 763     {0xd3, 0x00},
 764     {0xd4, 0x10},
 765     {0xd5, 0x33},
 766     {0xd6, 0x80},
 767     {0xd7, 0x21},
 768     {0xd8, 0x00},
 769     {0xd9, 0x00},
 770     {0xda, 0x00},
 771     {0xdb, 0x00},
 772     {0xdc, 0x00},
 773     {0xdd, 0x00},
 774     {0xde, 0x00},
 775     {0xdf, 0x00},
 776     {0xe0, 0x00},
 777     {0xe1, 0xB3},
 778     {0xe2, 0x00},
 779     {0xe3, 0x00},
 780     {0xe4, 0x00},
 781     {0xe5, 0x10},
 782     {0xe6, 0x00},
 783     {0xe7, 0x18},
 784     {0xe8, 0x08},
 785     {0xe9, 0xd4},
 786     {0xea, 0x00},
 787     {0xeb, 0xff},
 788     {0xec, 0x79},
 789     {0xed, 0x10},
 790     {0xee, 0x30},
 791     {0xef, 0x02},
 792     {0xf0, 0x00},
 793     {0xf1, 0x09},
 794     {0xf2, 0x00},
 795     {0xf3, 0x00},
 796     {0xf4, 0x00},
 797     {0xf5, 0x00},
 798     {0xf6, 0x00},
 799     {0xf7, 0x00},
 800     {0xf8, 0x00},
 801     {0xf9, 0x00},
 802     {0xfa, 0x00},
 803     {0xfb, 0x00},
 804     {0xfc, 0x00},
 805     {0xfd, 0x00},
 806     {0xfe, 0x00},
 807     {0xff, 0x00},
 808 };
 809
 810 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
 811 // For RFMD2959
 812 BYTE byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
 813     {0xF0, 0x00},
 814     {0xF1, 0x3E},
 815     {0xF0, 0x80},
 816     {0xF0, 0x00},
 817     {0xF1, 0x3E},
 818     {0xF0, 0x81},
 819     {0xF0, 0x01},
 820     {0xF1, 0x3E},
 821     {0xF0, 0x82},
 822     {0xF0, 0x02},
 823     {0xF1, 0x3E},
 824     {0xF0, 0x83},
 825     {0xF0, 0x03},
 826     {0xF1, 0x3B},
 827     {0xF0, 0x84},
 828     {0xF0, 0x04},
 829     {0xF1, 0x39},
 830     {0xF0, 0x85},
 831     {0xF0, 0x05},
 832     {0xF1, 0x38},
 833     {0xF0, 0x86},
 834     {0xF0, 0x06},
 835     {0xF1, 0x37},
 836     {0xF0, 0x87},
 837     {0xF0, 0x07},
 838     {0xF1, 0x36},
 839     {0xF0, 0x88},
 840     {0xF0, 0x08},
 841     {0xF1, 0x35},
 842     {0xF0, 0x89},
 843     {0xF0, 0x09},
 844     {0xF1, 0x35},
 845     {0xF0, 0x8A},
 846     {0xF0, 0x0A},
 847     {0xF1, 0x34},
 848     {0xF0, 0x8B},
 849     {0xF0, 0x0B},
 850     {0xF1, 0x34},
 851     {0xF0, 0x8C},
 852     {0xF0, 0x0C},
 853     {0xF1, 0x33},
 854     {0xF0, 0x8D},
 855     {0xF0, 0x0D},
 856     {0xF1, 0x32},
 857     {0xF0, 0x8E},
 858     {0xF0, 0x0E},
 859     {0xF1, 0x31},
 860     {0xF0, 0x8F},
 861     {0xF0, 0x0F},
 862     {0xF1, 0x30},
 863     {0xF0, 0x90},
 864     {0xF0, 0x10},
 865     {0xF1, 0x2F},
 866     {0xF0, 0x91},
 867     {0xF0, 0x11},
 868     {0xF1, 0x2F},
 869     {0xF0, 0x92},
 870     {0xF0, 0x12},
 871     {0xF1, 0x2E},
 872     {0xF0, 0x93},
 873     {0xF0, 0x13},
 874     {0xF1, 0x2D},
 875     {0xF0, 0x94},
 876     {0xF0, 0x14},
 877     {0xF1, 0x2C},
 878     {0xF0, 0x95},
 879     {0xF0, 0x15},
 880     {0xF1, 0x2B},
 881     {0xF0, 0x96},
 882     {0xF0, 0x16},
 883     {0xF1, 0x2B},
 884     {0xF0, 0x97},
 885     {0xF0, 0x17},
 886     {0xF1, 0x2A},
 887     {0xF0, 0x98},
 888     {0xF0, 0x18},
 889     {0xF1, 0x29},
 890     {0xF0, 0x99},
 891     {0xF0, 0x19},
 892     {0xF1, 0x28},
 893     {0xF0, 0x9A},
 894     {0xF0, 0x1A},
 895     {0xF1, 0x27},
 896     {0xF0, 0x9B},
 897     {0xF0, 0x1B},
 898     {0xF1, 0x26},
 899     {0xF0, 0x9C},
 900     {0xF0, 0x1C},
 901     {0xF1, 0x25},
 902     {0xF0, 0x9D},
 903     {0xF0, 0x1D},
 904     {0xF1, 0x24},
 905     {0xF0, 0x9E},
 906     {0xF0, 0x1E},
 907     {0xF1, 0x24},
 908     {0xF0, 0x9F},
 909     {0xF0, 0x1F},
 910     {0xF1, 0x23},
 911     {0xF0, 0xA0},
 912     {0xF0, 0x20},
 913     {0xF1, 0x22},
 914     {0xF0, 0xA1},
 915     {0xF0, 0x21},
 916     {0xF1, 0x21},
 917     {0xF0, 0xA2},
 918     {0xF0, 0x22},
 919     {0xF1, 0x20},
 920     {0xF0, 0xA3},
 921     {0xF0, 0x23},
 922     {0xF1, 0x20},
 923     {0xF0, 0xA4},
 924     {0xF0, 0x24},
 925     {0xF1, 0x1F},
 926     {0xF0, 0xA5},
 927     {0xF0, 0x25},
 928     {0xF1, 0x1E},
 929     {0xF0, 0xA6},
 930     {0xF0, 0x26},
 931     {0xF1, 0x1D},
 932     {0xF0, 0xA7},
 933     {0xF0, 0x27},
 934     {0xF1, 0x1C},
 935     {0xF0, 0xA8},
 936     {0xF0, 0x28},
 937     {0xF1, 0x1B},
 938     {0xF0, 0xA9},
 939     {0xF0, 0x29},
 940     {0xF1, 0x1B},
 941     {0xF0, 0xAA},
 942     {0xF0, 0x2A},
 943     {0xF1, 0x1A},
 944     {0xF0, 0xAB},
 945     {0xF0, 0x2B},
 946     {0xF1, 0x1A},
 947     {0xF0, 0xAC},
 948     {0xF0, 0x2C},
 949     {0xF1, 0x19},
 950     {0xF0, 0xAD},
 951     {0xF0, 0x2D},
 952     {0xF1, 0x18},
 953     {0xF0, 0xAE},
 954     {0xF0, 0x2E},
 955     {0xF1, 0x17},
 956     {0xF0, 0xAF},
 957     {0xF0, 0x2F},
 958     {0xF1, 0x16},
 959     {0xF0, 0xB0},
 960     {0xF0, 0x30},
 961     {0xF1, 0x15},
 962     {0xF0, 0xB1},
 963     {0xF0, 0x31},
 964     {0xF1, 0x15},
 965     {0xF0, 0xB2},
 966     {0xF0, 0x32},
 967     {0xF1, 0x15},
 968     {0xF0, 0xB3},
 969     {0xF0, 0x33},
 970     {0xF1, 0x14},
 971     {0xF0, 0xB4},
 972     {0xF0, 0x34},
 973     {0xF1, 0x13},
 974     {0xF0, 0xB5},
 975     {0xF0, 0x35},
 976     {0xF1, 0x12},
 977     {0xF0, 0xB6},
 978     {0xF0, 0x36},
 979     {0xF1, 0x11},
 980     {0xF0, 0xB7},
 981     {0xF0, 0x37},
 982     {0xF1, 0x10},
 983     {0xF0, 0xB8},
 984     {0xF0, 0x38},
 985     {0xF1, 0x0F},
 986     {0xF0, 0xB9},
 987     {0xF0, 0x39},
 988     {0xF1, 0x0E},
 989     {0xF0, 0xBA},
 990     {0xF0, 0x3A},
 991     {0xF1, 0x0D},
 992     {0xF0, 0xBB},
 993     {0xF0, 0x3B},
 994     {0xF1, 0x0C},
 995     {0xF0, 0xBC},
 996     {0xF0, 0x3C},
 997     {0xF1, 0x0B},
 998     {0xF0, 0xBD},
 999     {0xF0, 0x3D},
1000     {0xF1, 0x0B},
1001     {0xF0, 0xBE},
1002     {0xF0, 0x3E},
1003     {0xF1, 0x0A},
1004     {0xF0, 0xBF},
1005     {0xF0, 0x3F},
1006     {0xF1, 0x09},
1007     {0xF0, 0x00},
1008 };
1009
1010 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
1011 // For AIROHA
1012 BYTE byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
1013     {0x00, 0x31},
1014     {0x01, 0x00},
1015     {0x02, 0x00},
1016     {0x03, 0x00},
1017     {0x04, 0x00},
1018     {0x05, 0x80},
1019     {0x06, 0x00},
1020     {0x07, 0x00},
1021     {0x08, 0x70},
1022     {0x09, 0x41},
1023     {0x0a, 0x2A},
1024     {0x0b, 0x76},
1025     {0x0c, 0x00},
1026     {0x0d, 0x00},
1027     {0x0e, 0x80},
1028     {0x0f, 0x00},
1029     {0x10, 0x00},
1030     {0x11, 0x00},
1031     {0x12, 0x00},
1032     {0x13, 0x00},
1033     {0x14, 0x00},
1034     {0x15, 0x00},
1035     {0x16, 0x00},
1036     {0x17, 0x00},
1037     {0x18, 0x00},
1038     {0x19, 0x00},
1039     {0x1a, 0x00},
1040     {0x1b, 0x8f},
1041     {0x1c, 0x09},
1042     {0x1d, 0x00},
1043     {0x1e, 0x00},
1044     {0x1f, 0x00},
1045     {0x20, 0x00},
1046     {0x21, 0x00},
1047     {0x22, 0x00},
1048     {0x23, 0x00},
1049     {0x24, 0x00},
1050     {0x25, 0x4a},
1051     {0x26, 0x00},
1052     {0x27, 0x00},
1053     {0x28, 0x00},
1054     {0x29, 0x00},
1055     {0x2a, 0x00},
1056     {0x2b, 0x00},
1057     {0x2c, 0x00},
1058     {0x2d, 0x4a},
1059     {0x2e, 0x00},
1060     {0x2f, 0x0a},
1061     {0x30, 0x26},
1062     {0x31, 0x5b},
1063     {0x32, 0x00},
1064     {0x33, 0x00},
1065     {0x34, 0x00},
1066     {0x35, 0x00},
1067     {0x36, 0xaa},
1068     {0x37, 0xaa},
1069     {0x38, 0xff},
1070     {0x39, 0xff},
1071     {0x3a, 0x79},
1072     {0x3b, 0x00},
1073     {0x3c, 0x00},
1074     {0x3d, 0x0b},
1075     {0x3e, 0x48},
1076     {0x3f, 0x04},
1077     {0x40, 0x00},
1078     {0x41, 0x08},
1079     {0x42, 0x00},
1080     {0x43, 0x08},
1081     {0x44, 0x08},
1082     {0x45, 0x14},
1083     {0x46, 0x05},
1084     {0x47, 0x09},
1085     {0x48, 0x00},
1086     {0x49, 0x00},
1087     {0x4a, 0x00},
1088     {0x4b, 0x00},
1089     {0x4c, 0x09},
1090     {0x4d, 0x73},
1091     {0x4e, 0x00},
1092     {0x4f, 0xc5},
1093     {0x50, 0x15},
1094     {0x51, 0x19},
1095     {0x52, 0x00},
1096     {0x53, 0x00},
1097     {0x54, 0x00},
1098     {0x55, 0x00},
1099     {0x56, 0x00},
1100     {0x57, 0x00},
1101     {0x58, 0x00},
1102     {0x59, 0xb0},
1103     {0x5a, 0x00},
1104     {0x5b, 0x00},
1105     {0x5c, 0x00},
1106     {0x5d, 0x00},
1107     {0x5e, 0x00},
1108     {0x5f, 0x00},
1109     {0x60, 0xe4},
1110     {0x61, 0x80},
1111     {0x62, 0x00},
1112     {0x63, 0x00},
1113     {0x64, 0x00},
1114     {0x65, 0x00},
1115     {0x66, 0x98},
1116     {0x67, 0x0a},
1117     {0x68, 0x00},
1118     {0x69, 0x00},
1119     {0x6a, 0x00},
1120     {0x6b, 0x00},
1121     //{0x6c, 0x80},
1122     {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1123     {0x6d, 0x03},
1124     {0x6e, 0x01},
1125     {0x6f, 0x00},
1126     {0x70, 0x00},
1127     {0x71, 0x00},
1128     {0x72, 0x00},
1129     {0x73, 0x00},
1130     {0x74, 0x00},
1131     {0x75, 0x00},
1132     {0x76, 0x00},
1133     {0x77, 0x00},
1134     {0x78, 0x00},
1135     {0x79, 0x00},
1136     {0x7a, 0x00},
1137     {0x7b, 0x00},
1138     {0x7c, 0x00},
1139     {0x7d, 0x00},
1140     {0x7e, 0x00},
1141     {0x7f, 0x00},
1142     {0x80, 0x8c},
1143     {0x81, 0x01},
1144     {0x82, 0x09},
1145     {0x83, 0x00},
1146     {0x84, 0x00},
1147     {0x85, 0x00},
1148     {0x86, 0x00},
1149     {0x87, 0x00},
1150     {0x88, 0x08},
1151     {0x89, 0x00},
1152     {0x8a, 0x0f},
1153     {0x8b, 0xb7},
1154     {0x8c, 0x88},
1155     {0x8d, 0x47},
1156     {0x8e, 0xaa},
1157     {0x8f, 0x02},
1158     {0x90, 0x22},
1159     {0x91, 0x00},
1160     {0x92, 0x00},
1161     {0x93, 0x00},
1162     {0x94, 0x00},
1163     {0x95, 0x00},
1164     {0x96, 0x00},
1165     {0x97, 0xeb},
1166     {0x98, 0x00},
1167     {0x99, 0x00},
1168     {0x9a, 0x00},
1169     {0x9b, 0x00},
1170     {0x9c, 0x00},
1171     {0x9d, 0x00},
1172     {0x9e, 0x00},
1173     {0x9f, 0x01},
1174     {0xa0, 0x00},
1175     {0xa1, 0x00},
1176     {0xa2, 0x00},
1177     {0xa3, 0x00},
1178     {0xa4, 0x00},
1179     {0xa5, 0x00},
1180     {0xa6, 0x10},
1181     {0xa7, 0x00},
1182     {0xa8, 0x18},
1183     {0xa9, 0x00},
1184     {0xaa, 0x00},
1185     {0xab, 0x00},
1186     {0xac, 0x00},
1187     {0xad, 0x00},
1188     {0xae, 0x00},
1189     {0xaf, 0x18},
1190     {0xb0, 0x38},
1191     {0xb1, 0x30},
1192     {0xb2, 0x00},
1193     {0xb3, 0x00},
1194     {0xb4, 0xff},
1195     {0xb5, 0x0f},
1196     {0xb6, 0xe4},
1197     {0xb7, 0xe2},
1198     {0xb8, 0x00},
1199     {0xb9, 0x00},
1200     {0xba, 0x00},
1201     {0xbb, 0x03},
1202     {0xbc, 0x01},
1203     {0xbd, 0x00},
1204     {0xbe, 0x00},
1205     {0xbf, 0x00},
1206     {0xc0, 0x18},
1207     {0xc1, 0x20},
1208     {0xc2, 0x07},
1209     {0xc3, 0x18},
1210     {0xc4, 0xff},
1211     {0xc5, 0x2c},
1212     {0xc6, 0x0c},
1213     {0xc7, 0x0a},
1214     {0xc8, 0x0e},
1215     {0xc9, 0x01},
1216     {0xca, 0x68},
1217     {0xcb, 0xa7},
1218     {0xcc, 0x3c},
1219     {0xcd, 0x10},
1220     {0xce, 0x00},
1221     {0xcf, 0x25},
1222     {0xd0, 0x40},
1223     {0xd1, 0x12},
1224     {0xd2, 0x00},
1225     {0xd3, 0x00},
1226     {0xd4, 0x10},
1227     {0xd5, 0x28},
1228     {0xd6, 0x80},
1229     {0xd7, 0x2A},
1230     {0xd8, 0x00},
1231     {0xd9, 0x00},
1232     {0xda, 0x00},
1233     {0xdb, 0x00},
1234     {0xdc, 0x00},
1235     {0xdd, 0x00},
1236     {0xde, 0x00},
1237     {0xdf, 0x00},
1238     {0xe0, 0x00},
1239     {0xe1, 0xB3},
1240     {0xe2, 0x00},
1241     {0xe3, 0x00},
1242     {0xe4, 0x00},
1243     {0xe5, 0x10},
1244     {0xe6, 0x00},
1245     {0xe7, 0x1C},
1246     {0xe8, 0x00},
1247     {0xe9, 0xf4},
1248     {0xea, 0x00},
1249     {0xeb, 0xff},
1250     {0xec, 0x79},
1251     {0xed, 0x20},
1252     {0xee, 0x30},
1253     {0xef, 0x01},
1254     {0xf0, 0x00},
1255     {0xf1, 0x3e},
1256     {0xf2, 0x00},
1257     {0xf3, 0x00},
1258     {0xf4, 0x00},
1259     {0xf5, 0x00},
1260     {0xf6, 0x00},
1261     {0xf7, 0x00},
1262     {0xf8, 0x00},
1263     {0xf9, 0x00},
1264     {0xfa, 0x00},
1265     {0xfb, 0x00},
1266     {0xfc, 0x00},
1267     {0xfd, 0x00},
1268     {0xfe, 0x00},
1269     {0xff, 0x00},
1270 };
1271
1272
1273
1274 #define CB_VT3253B0_INIT_FOR_UW2451 256
1275 //For UW2451
1276 BYTE byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
1277     {0x00, 0x31},
1278     {0x01, 0x00},
1279     {0x02, 0x00},
1280     {0x03, 0x00},
1281     {0x04, 0x00},
1282     {0x05, 0x81},
1283     {0x06, 0x00},
1284     {0x07, 0x00},
1285     {0x08, 0x38},
1286     {0x09, 0x45},
1287     {0x0a, 0x28},
1288     {0x0b, 0x76},
1289     {0x0c, 0x00},
1290     {0x0d, 0x00},
1291     {0x0e, 0x80},
1292     {0x0f, 0x00},
1293     {0x10, 0x00},
1294     {0x11, 0x00},
1295     {0x12, 0x00},
1296     {0x13, 0x00},
1297     {0x14, 0x00},
1298     {0x15, 0x00},
1299     {0x16, 0x00},
1300     {0x17, 0x00},
1301     {0x18, 0x00},
1302     {0x19, 0x00},
1303     {0x1a, 0x00},
1304     {0x1b, 0x8f},
1305     {0x1c, 0x0f},
1306     {0x1d, 0x00},
1307     {0x1e, 0x00},
1308     {0x1f, 0x00},
1309     {0x20, 0x00},
1310     {0x21, 0x00},
1311     {0x22, 0x00},
1312     {0x23, 0x00},
1313     {0x24, 0x00},
1314     {0x25, 0x4a},
1315     {0x26, 0x00},
1316     {0x27, 0x00},
1317     {0x28, 0x00},
1318     {0x29, 0x00},
1319     {0x2a, 0x00},
1320     {0x2b, 0x00},
1321     {0x2c, 0x00},
1322     {0x2d, 0x18},
1323     {0x2e, 0x00},
1324     {0x2f, 0x0a},
1325     {0x30, 0x26},
1326     {0x31, 0x5b},
1327     {0x32, 0x00},
1328     {0x33, 0x00},
1329     {0x34, 0x00},
1330     {0x35, 0x00},
1331     {0x36, 0xaa},
1332     {0x37, 0xaa},
1333     {0x38, 0xff},
1334     {0x39, 0xff},
1335     {0x3a, 0x00},
1336     {0x3b, 0x00},
1337     {0x3c, 0x00},
1338     {0x3d, 0x03},
1339     {0x3e, 0x1d},
1340     {0x3f, 0x04},
1341     {0x40, 0x00},
1342     {0x41, 0x08},
1343     {0x42, 0x00},
1344     {0x43, 0x08},
1345     {0x44, 0x08},
1346     {0x45, 0x14},
1347     {0x46, 0x05},
1348     {0x47, 0x09},
1349     {0x48, 0x00},
1350     {0x49, 0x00},
1351     {0x4a, 0x00},
1352     {0x4b, 0x00},
1353     {0x4c, 0x09},
1354     {0x4d, 0x90},
1355     {0x4e, 0x00},
1356     {0x4f, 0xc5},
1357     {0x50, 0x15},
1358     {0x51, 0x19},
1359     {0x52, 0x00},
1360     {0x53, 0x00},
1361     {0x54, 0x00},
1362     {0x55, 0x00},
1363     {0x56, 0x00},
1364     {0x57, 0x00},
1365     {0x58, 0x00},
1366     {0x59, 0xb0},
1367     {0x5a, 0x00},
1368     {0x5b, 0x00},
1369     {0x5c, 0x00},
1370     {0x5d, 0x00},
1371     {0x5e, 0x00},
1372     {0x5f, 0x00},
1373     {0x60, 0xb3},
1374     {0x61, 0x81},
1375     {0x62, 0x00},
1376     {0x63, 0x00},
1377     {0x64, 0x00},
1378     {0x65, 0x00},
1379     {0x66, 0x57},
1380     {0x67, 0x6c},
1381     {0x68, 0x00},
1382     {0x69, 0x00},
1383     {0x6a, 0x00},
1384     {0x6b, 0x00},
1385     //{0x6c, 0x80},
1386     {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1387     {0x6d, 0x03},
1388     {0x6e, 0x01},
1389     {0x6f, 0x00},
1390     {0x70, 0x00},
1391     {0x71, 0x00},
1392     {0x72, 0x00},
1393     {0x73, 0x00},
1394     {0x74, 0x00},
1395     {0x75, 0x00},
1396     {0x76, 0x00},
1397     {0x77, 0x00},
1398     {0x78, 0x00},
1399     {0x79, 0x00},
1400     {0x7a, 0x00},
1401     {0x7b, 0x00},
1402     {0x7c, 0x00},
1403     {0x7d, 0x00},
1404     {0x7e, 0x00},
1405     {0x7f, 0x00},
1406     {0x80, 0x8c},
1407     {0x81, 0x00},
1408     {0x82, 0x0e},
1409     {0x83, 0x00},
1410     {0x84, 0x00},
1411     {0x85, 0x00},
1412     {0x86, 0x00},
1413     {0x87, 0x00},
1414     {0x88, 0x08},
1415     {0x89, 0x00},
1416     {0x8a, 0x0e},
1417     {0x8b, 0xa7},
1418     {0x8c, 0x88},
1419     {0x8d, 0x47},
1420     {0x8e, 0xaa},
1421     {0x8f, 0x02},
1422     {0x90, 0x00},
1423     {0x91, 0x00},
1424     {0x92, 0x00},
1425     {0x93, 0x00},
1426     {0x94, 0x00},
1427     {0x95, 0x00},
1428     {0x96, 0x00},
1429     {0x97, 0xe3},
1430     {0x98, 0x00},
1431     {0x99, 0x00},
1432     {0x9a, 0x00},
1433     {0x9b, 0x00},
1434     {0x9c, 0x00},
1435     {0x9d, 0x00},
1436     {0x9e, 0x00},
1437     {0x9f, 0x00},
1438     {0xa0, 0x00},
1439     {0xa1, 0x00},
1440     {0xa2, 0x00},
1441     {0xa3, 0x00},
1442     {0xa4, 0x00},
1443     {0xa5, 0x00},
1444     {0xa6, 0x10},
1445     {0xa7, 0x00},
1446     {0xa8, 0x18},
1447     {0xa9, 0x00},
1448     {0xaa, 0x00},
1449     {0xab, 0x00},
1450     {0xac, 0x00},
1451     {0xad, 0x00},
1452     {0xae, 0x00},
1453     {0xaf, 0x18},
1454     {0xb0, 0x18},
1455     {0xb1, 0x30},
1456     {0xb2, 0x00},
1457     {0xb3, 0x00},
1458     {0xb4, 0x00},
1459     {0xb5, 0x00},
1460     {0xb6, 0x00},
1461     {0xb7, 0x00},
1462     {0xb8, 0x00},
1463     {0xb9, 0x00},
1464     {0xba, 0x00},
1465     {0xbb, 0x03},
1466     {0xbc, 0x01},
1467     {0xbd, 0x00},
1468     {0xbe, 0x00},
1469     {0xbf, 0x00},
1470     {0xc0, 0x10},
1471     {0xc1, 0x20},
1472     {0xc2, 0x00},
1473     {0xc3, 0x20},
1474     {0xc4, 0x00},
1475     {0xc5, 0x2c},
1476     {0xc6, 0x1c},
1477     {0xc7, 0x10},
1478     {0xc8, 0x10},
1479     {0xc9, 0x01},
1480     {0xca, 0x68},
1481     {0xcb, 0xa7},
1482     {0xcc, 0x3c},
1483     {0xcd, 0x09},
1484     {0xce, 0x00},
1485     {0xcf, 0x20},
1486     {0xd0, 0x40},
1487     {0xd1, 0x10},
1488     {0xd2, 0x00},
1489     {0xd3, 0x00},
1490     {0xd4, 0x20},
1491     {0xd5, 0x28},
1492     {0xd6, 0xa0},
1493     {0xd7, 0x2a},
1494     {0xd8, 0x00},
1495     {0xd9, 0x00},
1496     {0xda, 0x00},
1497     {0xdb, 0x00},
1498     {0xdc, 0x00},
1499     {0xdd, 0x00},
1500     {0xde, 0x00},
1501     {0xdf, 0x00},
1502     {0xe0, 0x00},
1503     {0xe1, 0xd3},
1504     {0xe2, 0xc0},
1505     {0xe3, 0x00},
1506     {0xe4, 0x00},
1507     {0xe5, 0x10},
1508     {0xe6, 0x00},
1509     {0xe7, 0x12},
1510     {0xe8, 0x12},
1511     {0xe9, 0x34},
1512     {0xea, 0x00},
1513     {0xeb, 0xff},
1514     {0xec, 0x79},
1515     {0xed, 0x20},
1516     {0xee, 0x30},
1517     {0xef, 0x01},
1518     {0xf0, 0x00},
1519     {0xf1, 0x3e},
1520     {0xf2, 0x00},
1521     {0xf3, 0x00},
1522     {0xf4, 0x00},
1523     {0xf5, 0x00},
1524     {0xf6, 0x00},
1525     {0xf7, 0x00},
1526     {0xf8, 0x00},
1527     {0xf9, 0x00},
1528     {0xfa, 0x00},
1529     {0xfb, 0x00},
1530     {0xfc, 0x00},
1531     {0xfd, 0x00},
1532     {0xfe, 0x00},
1533     {0xff, 0x00},
1534 };
1535
1536 #define CB_VT3253B0_AGC 193
1537 // For AIROHA
1538 BYTE byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
1539     {0xF0, 0x00},
1540     {0xF1, 0x00},
1541     {0xF0, 0x80},
1542     {0xF0, 0x01},
1543     {0xF1, 0x00},
1544     {0xF0, 0x81},
1545     {0xF0, 0x02},
1546     {0xF1, 0x02},
1547     {0xF0, 0x82},
1548     {0xF0, 0x03},
1549     {0xF1, 0x04},
1550     {0xF0, 0x83},
1551     {0xF0, 0x03},
1552     {0xF1, 0x04},
1553     {0xF0, 0x84},
1554     {0xF0, 0x04},
1555     {0xF1, 0x06},
1556     {0xF0, 0x85},
1557     {0xF0, 0x05},
1558     {0xF1, 0x06},
1559     {0xF0, 0x86},
1560     {0xF0, 0x06},
1561     {0xF1, 0x06},
1562     {0xF0, 0x87},
1563     {0xF0, 0x07},
1564     {0xF1, 0x08},
1565     {0xF0, 0x88},
1566     {0xF0, 0x08},
1567     {0xF1, 0x08},
1568     {0xF0, 0x89},
1569     {0xF0, 0x09},
1570     {0xF1, 0x0A},
1571     {0xF0, 0x8A},
1572     {0xF0, 0x0A},
1573     {0xF1, 0x0A},
1574     {0xF0, 0x8B},
1575     {0xF0, 0x0B},
1576     {0xF1, 0x0C},
1577     {0xF0, 0x8C},
1578     {0xF0, 0x0C},
1579     {0xF1, 0x0C},
1580     {0xF0, 0x8D},
1581     {0xF0, 0x0D},
1582     {0xF1, 0x0E},
1583     {0xF0, 0x8E},
1584     {0xF0, 0x0E},
1585     {0xF1, 0x0E},
1586     {0xF0, 0x8F},
1587     {0xF0, 0x0F},
1588     {0xF1, 0x10},
1589     {0xF0, 0x90},
1590     {0xF0, 0x10},
1591     {0xF1, 0x10},
1592     {0xF0, 0x91},
1593     {0xF0, 0x11},
1594     {0xF1, 0x12},
1595     {0xF0, 0x92},
1596     {0xF0, 0x12},
1597     {0xF1, 0x12},
1598     {0xF0, 0x93},
1599     {0xF0, 0x13},
1600     {0xF1, 0x14},
1601     {0xF0, 0x94},
1602     {0xF0, 0x14},
1603     {0xF1, 0x14},
1604     {0xF0, 0x95},
1605     {0xF0, 0x15},
1606     {0xF1, 0x16},
1607     {0xF0, 0x96},
1608     {0xF0, 0x16},
1609     {0xF1, 0x16},
1610     {0xF0, 0x97},
1611     {0xF0, 0x17},
1612     {0xF1, 0x18},
1613     {0xF0, 0x98},
1614     {0xF0, 0x18},
1615     {0xF1, 0x18},
1616     {0xF0, 0x99},
1617     {0xF0, 0x19},
1618     {0xF1, 0x1A},
1619     {0xF0, 0x9A},
1620     {0xF0, 0x1A},
1621     {0xF1, 0x1A},
1622     {0xF0, 0x9B},
1623     {0xF0, 0x1B},
1624     {0xF1, 0x1C},
1625     {0xF0, 0x9C},
1626     {0xF0, 0x1C},
1627     {0xF1, 0x1C},
1628     {0xF0, 0x9D},
1629     {0xF0, 0x1D},
1630     {0xF1, 0x1E},
1631     {0xF0, 0x9E},
1632     {0xF0, 0x1E},
1633     {0xF1, 0x1E},
1634     {0xF0, 0x9F},
1635     {0xF0, 0x1F},
1636     {0xF1, 0x20},
1637     {0xF0, 0xA0},
1638     {0xF0, 0x20},
1639     {0xF1, 0x20},
1640     {0xF0, 0xA1},
1641     {0xF0, 0x21},
1642     {0xF1, 0x22},
1643     {0xF0, 0xA2},
1644     {0xF0, 0x22},
1645     {0xF1, 0x22},
1646     {0xF0, 0xA3},
1647     {0xF0, 0x23},
1648     {0xF1, 0x24},
1649     {0xF0, 0xA4},
1650     {0xF0, 0x24},
1651     {0xF1, 0x24},
1652     {0xF0, 0xA5},
1653     {0xF0, 0x25},
1654     {0xF1, 0x26},
1655     {0xF0, 0xA6},
1656     {0xF0, 0x26},
1657     {0xF1, 0x26},
1658     {0xF0, 0xA7},
1659     {0xF0, 0x27},
1660     {0xF1, 0x28},
1661     {0xF0, 0xA8},
1662     {0xF0, 0x28},
1663     {0xF1, 0x28},
1664     {0xF0, 0xA9},
1665     {0xF0, 0x29},
1666     {0xF1, 0x2A},
1667     {0xF0, 0xAA},
1668     {0xF0, 0x2A},
1669     {0xF1, 0x2A},
1670     {0xF0, 0xAB},
1671     {0xF0, 0x2B},
1672     {0xF1, 0x2C},
1673     {0xF0, 0xAC},
1674     {0xF0, 0x2C},
1675     {0xF1, 0x2C},
1676     {0xF0, 0xAD},
1677     {0xF0, 0x2D},
1678     {0xF1, 0x2E},
1679     {0xF0, 0xAE},
1680     {0xF0, 0x2E},
1681     {0xF1, 0x2E},
1682     {0xF0, 0xAF},
1683     {0xF0, 0x2F},
1684     {0xF1, 0x30},
1685     {0xF0, 0xB0},
1686     {0xF0, 0x30},
1687     {0xF1, 0x30},
1688     {0xF0, 0xB1},
1689     {0xF0, 0x31},
1690     {0xF1, 0x32},
1691     {0xF0, 0xB2},
1692     {0xF0, 0x32},
1693     {0xF1, 0x32},
1694     {0xF0, 0xB3},
1695     {0xF0, 0x33},
1696     {0xF1, 0x34},
1697     {0xF0, 0xB4},
1698     {0xF0, 0x34},
1699     {0xF1, 0x34},
1700     {0xF0, 0xB5},
1701     {0xF0, 0x35},
1702     {0xF1, 0x36},
1703     {0xF0, 0xB6},
1704     {0xF0, 0x36},
1705     {0xF1, 0x36},
1706     {0xF0, 0xB7},
1707     {0xF0, 0x37},
1708     {0xF1, 0x38},
1709     {0xF0, 0xB8},
1710     {0xF0, 0x38},
1711     {0xF1, 0x38},
1712     {0xF0, 0xB9},
1713     {0xF0, 0x39},
1714     {0xF1, 0x3A},
1715     {0xF0, 0xBA},
1716     {0xF0, 0x3A},
1717     {0xF1, 0x3A},
1718     {0xF0, 0xBB},
1719     {0xF0, 0x3B},
1720     {0xF1, 0x3C},
1721     {0xF0, 0xBC},
1722     {0xF0, 0x3C},
1723     {0xF1, 0x3C},
1724     {0xF0, 0xBD},
1725     {0xF0, 0x3D},
1726     {0xF1, 0x3E},
1727     {0xF0, 0xBE},
1728     {0xF0, 0x3E},
1729     {0xF1, 0x3E},
1730     {0xF0, 0xBF},
1731     {0xF0, 0x00},
1732 };
1733
1734 const WORD awcFrameTime[MAX_RATE] =
1735 {10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216};
1736
1737
1738 /*---------------------  Static Functions  --------------------------*/
1739
1740 static
1741 ULONG
1742 s_ulGetRatio(PSDevice pDevice);
1743
1744 static
1745 VOID
1746 s_vChangeAntenna(
1747     IN PSDevice pDevice
1748     );
1749
1750 static
1751 VOID
1752 s_vChangeAntenna (
1753     IN PSDevice pDevice
1754     )
1755 {
1756
1757 #ifdef  PLICE_DEBUG
1758         //printk("Enter s_vChangeAntenna:original RxMode is %d,TxMode is %d\n",pDevice->byRxAntennaMode,pDevice->byTxAntennaMode);
1759 #endif
1760     if ( pDevice->dwRxAntennaSel == 0) {
1761         pDevice->dwRxAntennaSel=1;
1762         if (pDevice->bTxRxAntInv == TRUE)
1763             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1764         else
1765             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1766     } else {
1767         pDevice->dwRxAntennaSel=0;
1768         if (pDevice->bTxRxAntInv == TRUE)
1769             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1770         else
1771             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1772     }
1773     if ( pDevice->dwTxAntennaSel == 0) {
1774         pDevice->dwTxAntennaSel=1;
1775         BBvSetTxAntennaMode(pDevice->PortOffset, ANT_B);
1776     } else {
1777         pDevice->dwTxAntennaSel=0;
1778         BBvSetTxAntennaMode(pDevice->PortOffset, ANT_A);
1779     }
1780 }
1781
1782
1783 /*---------------------  Export Variables  --------------------------*/
1784 /*
1785  * Description: Calculate data frame transmitting time
1786  *
1787  * Parameters:
1788  *  In:
1789  *      byPreambleType  - Preamble Type
1790  *      byPktType        - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1791  *      cbFrameLength   - Baseband Type
1792  *      wRate           - Tx Rate
1793  *  Out:
1794  *
1795  * Return Value: FrameTime
1796  *
1797  */
1798 UINT
1799 BBuGetFrameTime (
1800     IN BYTE byPreambleType,
1801     IN BYTE byPktType,
1802     IN UINT cbFrameLength,
1803     IN WORD wRate
1804     )
1805 {
1806     UINT uFrameTime;
1807     UINT uPreamble;
1808     UINT uTmp;
1809     UINT uRateIdx = (UINT)wRate;
1810     UINT uRate = 0;
1811
1812
1813     if (uRateIdx > RATE_54M) {
1814             ASSERT(0);
1815         return 0;
1816     }
1817
1818     uRate = (UINT)awcFrameTime[uRateIdx];
1819
1820     if (uRateIdx <= 3) {          //CCK mode
1821
1822         if (byPreambleType == 1) {//Short
1823             uPreamble = 96;
1824         } else {
1825             uPreamble = 192;
1826         }
1827         uFrameTime = (cbFrameLength * 80) / uRate;  //?????
1828         uTmp = (uFrameTime * uRate) / 80;
1829         if (cbFrameLength != uTmp) {
1830             uFrameTime ++;
1831         }
1832
1833         return (uPreamble + uFrameTime);
1834     }
1835     else {
1836         uFrameTime = (cbFrameLength * 8 + 22) / uRate;   //????????
1837         uTmp = ((uFrameTime * uRate) - 22) / 8;
1838         if(cbFrameLength != uTmp) {
1839             uFrameTime ++;
1840         }
1841         uFrameTime = uFrameTime * 4;    //???????
1842         if(byPktType != PK_TYPE_11A) {
1843             uFrameTime += 6;     //??????
1844         }
1845         return (20 + uFrameTime); //??????
1846     }
1847 }
1848
1849 /*
1850  * Description: Caculate Length, Service, and Signal fields of Phy for Tx
1851  *
1852  * Parameters:
1853  *  In:
1854  *      pDevice         - Device Structure
1855  *      cbFrameLength   - Tx Frame Length
1856  *      wRate           - Tx Rate
1857  *  Out:
1858  *      pwPhyLen        - pointer to Phy Length field
1859  *      pbyPhySrv       - pointer to Phy Service field
1860  *      pbyPhySgn       - pointer to Phy Signal field
1861  *
1862  * Return Value: none
1863  *
1864  */
1865 VOID
1866 BBvCaculateParameter (
1867     IN  PSDevice pDevice,
1868     IN  UINT cbFrameLength,
1869     IN  WORD wRate,
1870     IN  BYTE byPacketType,
1871     OUT PWORD pwPhyLen,
1872     OUT PBYTE pbyPhySrv,
1873     OUT PBYTE pbyPhySgn
1874     )
1875 {
1876     UINT cbBitCount;
1877     UINT cbUsCount = 0;
1878     UINT cbTmp;
1879     BOOL bExtBit;
1880     BYTE byPreambleType = pDevice->byPreambleType;
1881     BOOL bCCK = pDevice->bCCK;
1882
1883     cbBitCount = cbFrameLength * 8;
1884     bExtBit = FALSE;
1885
1886     switch (wRate) {
1887     case RATE_1M :
1888         cbUsCount = cbBitCount;
1889         *pbyPhySgn = 0x00;
1890         break;
1891
1892     case RATE_2M :
1893         cbUsCount = cbBitCount / 2;
1894         if (byPreambleType == 1)
1895             *pbyPhySgn = 0x09;
1896         else // long preamble
1897             *pbyPhySgn = 0x01;
1898         break;
1899
1900     case RATE_5M :
1901         if (bCCK == FALSE)
1902             cbBitCount ++;
1903         cbUsCount = (cbBitCount * 10) / 55;
1904         cbTmp = (cbUsCount * 55) / 10;
1905         if (cbTmp != cbBitCount)
1906             cbUsCount ++;
1907         if (byPreambleType == 1)
1908             *pbyPhySgn = 0x0a;
1909         else // long preamble
1910             *pbyPhySgn = 0x02;
1911         break;
1912
1913     case RATE_11M :
1914
1915         if (bCCK == FALSE)
1916             cbBitCount ++;
1917         cbUsCount = cbBitCount / 11;
1918         cbTmp = cbUsCount * 11;
1919         if (cbTmp != cbBitCount) {
1920             cbUsCount ++;
1921             if ((cbBitCount - cbTmp) <= 3)
1922                 bExtBit = TRUE;
1923         }
1924         if (byPreambleType == 1)
1925             *pbyPhySgn = 0x0b;
1926         else // long preamble
1927             *pbyPhySgn = 0x03;
1928         break;
1929
1930     case RATE_6M :
1931         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1932             *pbyPhySgn = 0x9B; //1001 1011
1933         }
1934         else {//11g, 2.4GHZ
1935             *pbyPhySgn = 0x8B; //1000 1011
1936         }
1937         break;
1938
1939     case RATE_9M :
1940         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1941             *pbyPhySgn = 0x9F; //1001 1111
1942         }
1943         else {//11g, 2.4GHZ
1944             *pbyPhySgn = 0x8F; //1000 1111
1945         }
1946         break;
1947
1948     case RATE_12M :
1949         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1950             *pbyPhySgn = 0x9A; //1001 1010
1951         }
1952         else {//11g, 2.4GHZ
1953             *pbyPhySgn = 0x8A; //1000 1010
1954         }
1955         break;
1956
1957     case RATE_18M :
1958         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1959             *pbyPhySgn = 0x9E; //1001 1110
1960         }
1961         else {//11g, 2.4GHZ
1962             *pbyPhySgn = 0x8E; //1000 1110
1963         }
1964         break;
1965
1966     case RATE_24M :
1967         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1968             *pbyPhySgn = 0x99; //1001 1001
1969         }
1970         else {//11g, 2.4GHZ
1971             *pbyPhySgn = 0x89; //1000 1001
1972         }
1973         break;
1974
1975     case RATE_36M :
1976         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1977             *pbyPhySgn = 0x9D; //1001 1101
1978         }
1979         else {//11g, 2.4GHZ
1980             *pbyPhySgn = 0x8D; //1000 1101
1981         }
1982         break;
1983
1984     case RATE_48M :
1985         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1986             *pbyPhySgn = 0x98; //1001 1000
1987         }
1988         else {//11g, 2.4GHZ
1989             *pbyPhySgn = 0x88; //1000 1000
1990         }
1991         break;
1992
1993     case RATE_54M :
1994         if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1995             *pbyPhySgn = 0x9C; //1001 1100
1996         }
1997         else {//11g, 2.4GHZ
1998             *pbyPhySgn = 0x8C; //1000 1100
1999         }
2000         break;
2001
2002     default :
2003         if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
2004             *pbyPhySgn = 0x9C; //1001 1100
2005         }
2006         else {//11g, 2.4GHZ
2007             *pbyPhySgn = 0x8C; //1000 1100
2008         }
2009         break;
2010     }
2011
2012     if (byPacketType == PK_TYPE_11B) {
2013         *pbyPhySrv = 0x00;
2014         if (bExtBit)
2015             *pbyPhySrv = *pbyPhySrv | 0x80;
2016         *pwPhyLen = (WORD)cbUsCount;
2017     }
2018     else {
2019         *pbyPhySrv = 0x00;
2020         *pwPhyLen = (WORD)cbFrameLength;
2021     }
2022 }
2023
2024 /*
2025  * Description: Read a byte from BASEBAND, by embeded programming
2026  *
2027  * Parameters:
2028  *  In:
2029  *      dwIoBase    - I/O base address
2030  *      byBBAddr    - address of register in Baseband
2031  *  Out:
2032  *      pbyData     - data read
2033  *
2034  * Return Value: TRUE if succeeded; FALSE if failed.
2035  *
2036  */
2037 BOOL BBbReadEmbeded (DWORD_PTR dwIoBase, BYTE byBBAddr, PBYTE pbyData)
2038 {
2039     WORD    ww;
2040     BYTE    byValue;
2041
2042     // BB reg offset
2043     VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2044
2045     // turn on REGR
2046     MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
2047     // W_MAX_TIMEOUT is the timeout period
2048     for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2049         VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2050         if (BITbIsBitOn(byValue, BBREGCTL_DONE))
2051             break;
2052     }
2053
2054     // get BB data
2055     VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData);
2056
2057     if (ww == W_MAX_TIMEOUT) {
2058         DBG_PORT80(0x30);
2059         DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x30)\n");
2060         return FALSE;
2061     }
2062     return TRUE;
2063 }
2064
2065
2066 /*
2067  * Description: Write a Byte to BASEBAND, by embeded programming
2068  *
2069  * Parameters:
2070  *  In:
2071  *      dwIoBase    - I/O base address
2072  *      byBBAddr    - address of register in Baseband
2073  *      byData      - data to write
2074  *  Out:
2075  *      none
2076  *
2077  * Return Value: TRUE if succeeded; FALSE if failed.
2078  *
2079  */
2080 BOOL BBbWriteEmbeded (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byData)
2081 {
2082     WORD    ww;
2083     BYTE    byValue;
2084
2085     // BB reg offset
2086     VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2087     // set BB data
2088     VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData);
2089
2090     // turn on BBREGCTL_REGW
2091     MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
2092     // W_MAX_TIMEOUT is the timeout period
2093     for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2094         VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2095         if (BITbIsBitOn(byValue, BBREGCTL_DONE))
2096             break;
2097     }
2098
2099     if (ww == W_MAX_TIMEOUT) {
2100         DBG_PORT80(0x31);
2101         DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x31)\n");
2102         return FALSE;
2103     }
2104     return TRUE;
2105 }
2106
2107
2108 /*
2109  * Description: Test if all bits are set for the Baseband register
2110  *
2111  * Parameters:
2112  *  In:
2113  *      dwIoBase    - I/O base address
2114  *      byBBAddr    - address of register in Baseband
2115  *      byTestBits  - TestBits
2116  *  Out:
2117  *      none
2118  *
2119  * Return Value: TRUE if all TestBits are set; FALSE otherwise.
2120  *
2121  */
2122 BOOL BBbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits)
2123 {
2124     BYTE byOrgData;
2125
2126     BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
2127     return BITbIsAllBitsOn(byOrgData, byTestBits);
2128 }
2129
2130
2131 /*
2132  * Description: Test if all bits are clear for the Baseband register
2133  *
2134  * Parameters:
2135  *  In:
2136  *      dwIoBase    - I/O base address
2137  *      byBBAddr    - address of register in Baseband
2138  *      byTestBits  - TestBits
2139  *  Out:
2140  *      none
2141  *
2142  * Return Value: TRUE if all TestBits are clear; FALSE otherwise.
2143  *
2144  */
2145 BOOL BBbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits)
2146 {
2147     BYTE byOrgData;
2148
2149     BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
2150     return BITbIsAllBitsOff(byOrgData, byTestBits);
2151 }
2152
2153 /*
2154  * Description: VIA VT3253 Baseband chip init function
2155  *
2156  * Parameters:
2157  *  In:
2158  *      dwIoBase    - I/O base address
2159  *      byRevId     - Revision ID
2160  *      byRFType    - RF type
2161  *  Out:
2162  *      none
2163  *
2164  * Return Value: TRUE if succeeded; FALSE if failed.
2165  *
2166  */
2167
2168 BOOL BBbVT3253Init (PSDevice pDevice)
2169 {
2170     BOOL       bResult = TRUE;
2171     int        ii;
2172     DWORD_PTR  dwIoBase = pDevice->PortOffset;
2173     BYTE       byRFType = pDevice->byRFType;
2174     BYTE       byLocalID = pDevice->byLocalID;
2175
2176     if (byRFType == RF_RFMD2959) {
2177         if (byLocalID <= REV_ID_VT3253_A1) {
2178             for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++) {
2179                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253InitTab_RFMD[ii][0],byVT3253InitTab_RFMD[ii][1]);
2180             }
2181         } else {
2182             for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++) {
2183                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_RFMD[ii][0],byVT3253B0_RFMD[ii][1]);
2184             }
2185             for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) {
2186                     bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC4_RFMD2959[ii][0],byVT3253B0_AGC4_RFMD2959[ii][1]);
2187             }
2188             VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2189             MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2190         }
2191         pDevice->abyBBVGA[0] = 0x18;
2192         pDevice->abyBBVGA[1] = 0x0A;
2193         pDevice->abyBBVGA[2] = 0x0;
2194         pDevice->abyBBVGA[3] = 0x0;
2195         pDevice->ldBmThreshold[0] = -70;
2196         pDevice->ldBmThreshold[1] = -50;
2197         pDevice->ldBmThreshold[2] = 0;
2198         pDevice->ldBmThreshold[3] = 0;
2199     } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S) ) {
2200         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2201             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2202         }
2203         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2204             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2205         }
2206         pDevice->abyBBVGA[0] = 0x1C;
2207         pDevice->abyBBVGA[1] = 0x10;
2208         pDevice->abyBBVGA[2] = 0x0;
2209         pDevice->abyBBVGA[3] = 0x0;
2210         pDevice->ldBmThreshold[0] = -70;
2211         pDevice->ldBmThreshold[1] = -48;
2212         pDevice->ldBmThreshold[2] = 0;
2213         pDevice->ldBmThreshold[3] = 0;
2214     } else if (byRFType == RF_UW2451) {
2215         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2216                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2217         }
2218         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2219             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2220         }
2221         VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2222         MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2223
2224         pDevice->abyBBVGA[0] = 0x14;
2225         pDevice->abyBBVGA[1] = 0x0A;
2226         pDevice->abyBBVGA[2] = 0x0;
2227         pDevice->abyBBVGA[3] = 0x0;
2228         pDevice->ldBmThreshold[0] = -60;
2229         pDevice->ldBmThreshold[1] = -50;
2230         pDevice->ldBmThreshold[2] = 0;
2231         pDevice->ldBmThreshold[3] = 0;
2232     } else if (byRFType == RF_UW2452) {
2233         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2234             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2235         }
2236         // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2237         //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2238         // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2239         //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2240         // Select VC1/VC2, CR215 = 0x02->0x06
2241         bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2242
2243         //{{RobertYu:20050125, request by Jack
2244         bResult &= BBbWriteEmbeded(dwIoBase,0x90,0x20);
2245         bResult &= BBbWriteEmbeded(dwIoBase,0x97,0xeb);
2246         //}}
2247
2248         //{{RobertYu:20050221, request by Jack
2249         bResult &= BBbWriteEmbeded(dwIoBase,0xa6,0x00);
2250         bResult &= BBbWriteEmbeded(dwIoBase,0xa8,0x30);
2251         //}}
2252         bResult &= BBbWriteEmbeded(dwIoBase,0xb0,0x58);
2253
2254         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2255             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2256         }
2257         //VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23); // RobertYu: 20050104, 20050131 disable PA_Delay
2258         //MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0); // RobertYu: 20050104, 20050131 disable PA_Delay
2259
2260         pDevice->abyBBVGA[0] = 0x14;
2261         pDevice->abyBBVGA[1] = 0x0A;
2262         pDevice->abyBBVGA[2] = 0x0;
2263         pDevice->abyBBVGA[3] = 0x0;
2264         pDevice->ldBmThreshold[0] = -60;
2265         pDevice->ldBmThreshold[1] = -50;
2266         pDevice->ldBmThreshold[2] = 0;
2267         pDevice->ldBmThreshold[3] = 0;
2268     //}} RobertYu
2269
2270     } else if (byRFType == RF_VT3226) {
2271         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2272             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2273         }
2274         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2275             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2276         }
2277         pDevice->abyBBVGA[0] = 0x1C;
2278         pDevice->abyBBVGA[1] = 0x10;
2279         pDevice->abyBBVGA[2] = 0x0;
2280         pDevice->abyBBVGA[3] = 0x0;
2281         pDevice->ldBmThreshold[0] = -70;
2282         pDevice->ldBmThreshold[1] = -48;
2283         pDevice->ldBmThreshold[2] = 0;
2284         pDevice->ldBmThreshold[3] = 0;
2285         // Fix VT3226 DFC system timing issue
2286         MACvSetRFLE_LatchBase(dwIoBase);
2287          //{{ RobertYu: 20050104
2288     } else if (byRFType == RF_AIROHA7230) {
2289         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2290             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2291         }
2292
2293         //{{ RobertYu:20050223, request by JerryChung
2294         // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2295         //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2296         // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2297         //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2298         // Select VC1/VC2, CR215 = 0x02->0x06
2299         bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2300         //}}
2301
2302         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2303             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2304         }
2305         pDevice->abyBBVGA[0] = 0x1C;
2306         pDevice->abyBBVGA[1] = 0x10;
2307         pDevice->abyBBVGA[2] = 0x0;
2308         pDevice->abyBBVGA[3] = 0x0;
2309         pDevice->ldBmThreshold[0] = -70;
2310         pDevice->ldBmThreshold[1] = -48;
2311         pDevice->ldBmThreshold[2] = 0;
2312         pDevice->ldBmThreshold[3] = 0;
2313     //}} RobertYu
2314     } else {
2315         // No VGA Table now
2316         pDevice->bUpdateBBVGA = FALSE;
2317         pDevice->abyBBVGA[0] = 0x1C;
2318     }
2319
2320     if (byLocalID > REV_ID_VT3253_A1) {
2321         BBbWriteEmbeded(dwIoBase, 0x04, 0x7F);
2322         BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);
2323     }
2324
2325     return bResult;
2326 }
2327
2328
2329
2330 /*
2331  * Description: Read All Baseband Registers
2332  *
2333  * Parameters:
2334  *  In:
2335  *      dwIoBase    - I/O base address
2336  *      pbyBBRegs   - Point to struct that stores Baseband Registers
2337  *  Out:
2338  *      none
2339  *
2340  * Return Value: none
2341  *
2342  */
2343 VOID BBvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyBBRegs)
2344 {
2345     int  ii;
2346     BYTE byBase = 1;
2347     for (ii = 0; ii < BB_MAX_CONTEXT_SIZE; ii++) {
2348         BBbReadEmbeded(dwIoBase, (BYTE)(ii*byBase), pbyBBRegs);
2349         pbyBBRegs += byBase;
2350     }
2351 }
2352
2353 /*
2354  * Description: Turn on BaseBand Loopback mode
2355  *
2356  * Parameters:
2357  *  In:
2358  *      dwIoBase    - I/O base address
2359  *      bCCK        - If CCK is set
2360  *  Out:
2361  *      none
2362  *
2363  * Return Value: none
2364  *
2365  */
2366
2367
2368 void BBvLoopbackOn (PSDevice pDevice)
2369 {
2370     BYTE      byData;
2371     DWORD_PTR dwIoBase = pDevice->PortOffset;
2372
2373     //CR C9 = 0x00
2374     BBbReadEmbeded(dwIoBase, 0xC9, &pDevice->byBBCRc9);//CR201
2375     BBbWriteEmbeded(dwIoBase, 0xC9, 0);
2376     BBbReadEmbeded(dwIoBase, 0x4D, &pDevice->byBBCR4d);//CR77
2377     BBbWriteEmbeded(dwIoBase, 0x4D, 0x90);
2378
2379     //CR 88 = 0x02(CCK), 0x03(OFDM)
2380     BBbReadEmbeded(dwIoBase, 0x88, &pDevice->byBBCR88);//CR136
2381
2382     if (pDevice->uConnectionRate <= RATE_11M) { //CCK
2383         // Enable internal digital loopback: CR33 |= 0000 0001
2384         BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
2385         BBbWriteEmbeded(dwIoBase, 0x21, (BYTE)(byData | 0x01));//CR33
2386         // CR154 = 0x00
2387         BBbWriteEmbeded(dwIoBase, 0x9A, 0);   //CR154
2388
2389         BBbWriteEmbeded(dwIoBase, 0x88, 0x02);//CR239
2390     }
2391     else { //OFDM
2392         // Enable internal digital loopback:CR154 |= 0000 0001
2393         BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
2394         BBbWriteEmbeded(dwIoBase, 0x9A, (BYTE)(byData | 0x01));//CR154
2395         // CR33 = 0x00
2396         BBbWriteEmbeded(dwIoBase, 0x21, 0);   //CR33
2397
2398         BBbWriteEmbeded(dwIoBase, 0x88, 0x03);//CR239
2399     }
2400
2401     //CR14 = 0x00
2402     BBbWriteEmbeded(dwIoBase, 0x0E, 0);//CR14
2403
2404     // Disable TX_IQUN
2405     BBbReadEmbeded(pDevice->PortOffset, 0x09, &pDevice->byBBCR09);
2406     BBbWriteEmbeded(pDevice->PortOffset, 0x09, (BYTE)(pDevice->byBBCR09 & 0xDE));
2407 }
2408
2409 /*
2410  * Description: Turn off BaseBand Loopback mode
2411  *
2412  * Parameters:
2413  *  In:
2414  *      pDevice         - Device Structure
2415  *
2416  *  Out:
2417  *      none
2418  *
2419  * Return Value: none
2420  *
2421  */
2422 void BBvLoopbackOff (PSDevice pDevice)
2423 {
2424     BYTE      byData;
2425     DWORD_PTR dwIoBase = pDevice->PortOffset;
2426
2427     BBbWriteEmbeded(dwIoBase, 0xC9, pDevice->byBBCRc9);//CR201
2428     BBbWriteEmbeded(dwIoBase, 0x88, pDevice->byBBCR88);//CR136
2429     BBbWriteEmbeded(dwIoBase, 0x09, pDevice->byBBCR09);//CR136
2430     BBbWriteEmbeded(dwIoBase, 0x4D, pDevice->byBBCR4d);//CR77
2431
2432     if (pDevice->uConnectionRate <= RATE_11M) { // CCK
2433         // Set the CR33 Bit2 to disable internal Loopback.
2434         BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
2435         BBbWriteEmbeded(dwIoBase, 0x21, (BYTE)(byData & 0xFE));//CR33
2436     }
2437     else { // OFDM
2438         BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
2439         BBbWriteEmbeded(dwIoBase, 0x9A, (BYTE)(byData & 0xFE));//CR154
2440     }
2441     BBbReadEmbeded(dwIoBase, 0x0E, &byData);//CR14
2442     BBbWriteEmbeded(dwIoBase, 0x0E, (BYTE)(byData | 0x80));//CR14
2443
2444 }
2445
2446
2447
2448 /*
2449  * Description: Set ShortSlotTime mode
2450  *
2451  * Parameters:
2452  *  In:
2453  *      pDevice     - Device Structure
2454  *  Out:
2455  *      none
2456  *
2457  * Return Value: none
2458  *
2459  */
2460 VOID
2461 BBvSetShortSlotTime (PSDevice pDevice)
2462 {
2463     BYTE byBBRxConf=0;
2464     BYTE byBBVGA=0;
2465
2466     BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2467
2468     if (pDevice->bShortSlotTime) {
2469         byBBRxConf &= 0xDF;//1101 1111
2470     } else {
2471         byBBRxConf |= 0x20;//0010 0000
2472     }
2473
2474     // patch for 3253B0 Baseband with Cardbus module
2475     BBbReadEmbeded(pDevice->PortOffset, 0xE7, &byBBVGA);
2476     if (byBBVGA == pDevice->abyBBVGA[0]) {
2477         byBBRxConf |= 0x20;//0010 0000
2478     }
2479
2480     BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2481
2482 }
2483
2484 VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
2485 {
2486     BYTE byBBRxConf=0;
2487
2488     BBbWriteEmbeded(pDevice->PortOffset, 0xE7, byData);
2489
2490     BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2491     // patch for 3253B0 Baseband with Cardbus module
2492     if (byData == pDevice->abyBBVGA[0]) {
2493         byBBRxConf |= 0x20;//0010 0000
2494     } else if (pDevice->bShortSlotTime) {
2495         byBBRxConf &= 0xDF;//1101 1111
2496     } else {
2497         byBBRxConf |= 0x20;//0010 0000
2498     }
2499     pDevice->byBBVGACurrent = byData;
2500     BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2501 }
2502
2503
2504 /*
2505  * Description: Baseband SoftwareReset
2506  *
2507  * Parameters:
2508  *  In:
2509  *      dwIoBase    - I/O base address
2510  *  Out:
2511  *      none
2512  *
2513  * Return Value: none
2514  *
2515  */
2516 VOID
2517 BBvSoftwareReset (DWORD_PTR dwIoBase)
2518 {
2519     BBbWriteEmbeded(dwIoBase, 0x50, 0x40);
2520     BBbWriteEmbeded(dwIoBase, 0x50, 0);
2521     BBbWriteEmbeded(dwIoBase, 0x9C, 0x01);
2522     BBbWriteEmbeded(dwIoBase, 0x9C, 0);
2523 }
2524
2525 /*
2526  * Description: Baseband Power Save Mode ON
2527  *
2528  * Parameters:
2529  *  In:
2530  *      dwIoBase    - I/O base address
2531  *  Out:
2532  *      none
2533  *
2534  * Return Value: none
2535  *
2536  */
2537 VOID
2538 BBvPowerSaveModeON (DWORD_PTR dwIoBase)
2539 {
2540     BYTE byOrgData;
2541
2542     BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2543     byOrgData |= BIT0;
2544     BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2545 }
2546
2547 /*
2548  * Description: Baseband Power Save Mode OFF
2549  *
2550  * Parameters:
2551  *  In:
2552  *      dwIoBase    - I/O base address
2553  *  Out:
2554  *      none
2555  *
2556  * Return Value: none
2557  *
2558  */
2559 VOID
2560 BBvPowerSaveModeOFF (DWORD_PTR dwIoBase)
2561 {
2562     BYTE byOrgData;
2563
2564     BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2565     byOrgData &= ~(BIT0);
2566     BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2567 }
2568
2569 /*
2570  * Description: Set Tx Antenna mode
2571  *
2572  * Parameters:
2573  *  In:
2574  *      pDevice          - Device Structure
2575  *      byAntennaMode    - Antenna Mode
2576  *  Out:
2577  *      none
2578  *
2579  * Return Value: none
2580  *
2581  */
2582
2583 VOID
2584 BBvSetTxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2585 {
2586     BYTE byBBTxConf;
2587
2588 #ifdef  PLICE_DEBUG
2589         //printk("Enter BBvSetTxAntennaMode\n");
2590 #endif
2591     BBbReadEmbeded(dwIoBase, 0x09, &byBBTxConf);//CR09
2592     if (byAntennaMode == ANT_DIVERSITY) {
2593         // bit 1 is diversity
2594         byBBTxConf |= 0x02;
2595     } else if (byAntennaMode == ANT_A) {
2596         // bit 2 is ANTSEL
2597         byBBTxConf &= 0xF9; // 1111 1001
2598     } else if (byAntennaMode == ANT_B) {
2599 #ifdef  PLICE_DEBUG
2600         //printk("BBvSetTxAntennaMode:ANT_B\n");
2601 #endif
2602         byBBTxConf &= 0xFD; // 1111 1101
2603         byBBTxConf |= 0x04;
2604     }
2605     BBbWriteEmbeded(dwIoBase, 0x09, byBBTxConf);//CR09
2606 }
2607
2608
2609
2610
2611 /*
2612  * Description: Set Rx Antenna mode
2613  *
2614  * Parameters:
2615  *  In:
2616  *      pDevice          - Device Structure
2617  *      byAntennaMode    - Antenna Mode
2618  *  Out:
2619  *      none
2620  *
2621  * Return Value: none
2622  *
2623  */
2624
2625 VOID
2626 BBvSetRxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2627 {
2628     BYTE byBBRxConf;
2629
2630     BBbReadEmbeded(dwIoBase, 0x0A, &byBBRxConf);//CR10
2631     if (byAntennaMode == ANT_DIVERSITY) {
2632         byBBRxConf |= 0x01;
2633
2634     } else if (byAntennaMode == ANT_A) {
2635         byBBRxConf &= 0xFC; // 1111 1100
2636     } else if (byAntennaMode == ANT_B) {
2637         byBBRxConf &= 0xFE; // 1111 1110
2638         byBBRxConf |= 0x02;
2639     }
2640     BBbWriteEmbeded(dwIoBase, 0x0A, byBBRxConf);//CR10
2641 }
2642
2643
2644 /*
2645  * Description: BBvSetDeepSleep
2646  *
2647  * Parameters:
2648  *  In:
2649  *      pDevice          - Device Structure
2650  *  Out:
2651  *      none
2652  *
2653  * Return Value: none
2654  *
2655  */
2656 VOID
2657 BBvSetDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2658 {
2659     BBbWriteEmbeded(dwIoBase, 0x0C, 0x17);//CR12
2660     BBbWriteEmbeded(dwIoBase, 0x0D, 0xB9);//CR13
2661 }
2662
2663 VOID
2664 BBvExitDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2665 {
2666     BBbWriteEmbeded(dwIoBase, 0x0C, 0x00);//CR12
2667     BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);//CR13
2668 }
2669
2670
2671
2672 static
2673 ULONG
2674 s_ulGetRatio (PSDevice pDevice)
2675 {
2676 ULONG   ulRatio = 0;
2677 ULONG   ulMaxPacket;
2678 ULONG   ulPacketNum;
2679
2680     //This is a thousand-ratio
2681     ulMaxPacket = pDevice->uNumSQ3[RATE_54M];
2682     if ( pDevice->uNumSQ3[RATE_54M] != 0 ) {
2683         ulPacketNum = pDevice->uNumSQ3[RATE_54M];
2684         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2685         //ulRatio = (pDevice->uNumSQ3[RATE_54M] * 1000 / pDevice->uDiversityCnt);
2686         ulRatio += TOP_RATE_54M;
2687     }
2688     if ( pDevice->uNumSQ3[RATE_48M] > ulMaxPacket ) {
2689         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M];
2690         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2691         //ulRatio = (pDevice->uNumSQ3[RATE_48M] * 1000 / pDevice->uDiversityCnt);
2692         ulRatio += TOP_RATE_48M;
2693         ulMaxPacket = pDevice->uNumSQ3[RATE_48M];
2694     }
2695     if ( pDevice->uNumSQ3[RATE_36M] > ulMaxPacket ) {
2696         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2697                       pDevice->uNumSQ3[RATE_36M];
2698         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2699         //ulRatio = (pDevice->uNumSQ3[RATE_36M] * 1000 / pDevice->uDiversityCnt);
2700         ulRatio += TOP_RATE_36M;
2701         ulMaxPacket = pDevice->uNumSQ3[RATE_36M];
2702     }
2703     if ( pDevice->uNumSQ3[RATE_24M] > ulMaxPacket ) {
2704         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2705                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M];
2706         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2707         //ulRatio = (pDevice->uNumSQ3[RATE_24M] * 1000 / pDevice->uDiversityCnt);
2708         ulRatio += TOP_RATE_24M;
2709         ulMaxPacket = pDevice->uNumSQ3[RATE_24M];
2710     }
2711     if ( pDevice->uNumSQ3[RATE_18M] > ulMaxPacket ) {
2712         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2713                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2714                       pDevice->uNumSQ3[RATE_18M];
2715         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2716         //ulRatio = (pDevice->uNumSQ3[RATE_18M] * 1000 / pDevice->uDiversityCnt);
2717         ulRatio += TOP_RATE_18M;
2718         ulMaxPacket = pDevice->uNumSQ3[RATE_18M];
2719     }
2720     if ( pDevice->uNumSQ3[RATE_12M] > ulMaxPacket ) {
2721         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2722                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2723                       pDevice->uNumSQ3[RATE_18M] + pDevice->uNumSQ3[RATE_12M];
2724         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2725         //ulRatio = (pDevice->uNumSQ3[RATE_12M] * 1000 / pDevice->uDiversityCnt);
2726         ulRatio += TOP_RATE_12M;
2727         ulMaxPacket = pDevice->uNumSQ3[RATE_12M];
2728     }
2729     if ( pDevice->uNumSQ3[RATE_11M] > ulMaxPacket ) {
2730         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2731                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2732                       pDevice->uNumSQ3[RATE_6M] - pDevice->uNumSQ3[RATE_9M];
2733         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2734         //ulRatio = (pDevice->uNumSQ3[RATE_11M] * 1000 / pDevice->uDiversityCnt);
2735         ulRatio += TOP_RATE_11M;
2736         ulMaxPacket = pDevice->uNumSQ3[RATE_11M];
2737     }
2738     if ( pDevice->uNumSQ3[RATE_9M] > ulMaxPacket ) {
2739         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2740                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2741                       pDevice->uNumSQ3[RATE_6M];
2742         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2743         //ulRatio = (pDevice->uNumSQ3[RATE_9M] * 1000 / pDevice->uDiversityCnt);
2744         ulRatio += TOP_RATE_9M;
2745         ulMaxPacket = pDevice->uNumSQ3[RATE_9M];
2746     }
2747     if ( pDevice->uNumSQ3[RATE_6M] > ulMaxPacket ) {
2748         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2749                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M];
2750         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2751         //ulRatio = (pDevice->uNumSQ3[RATE_6M] * 1000 / pDevice->uDiversityCnt);
2752         ulRatio += TOP_RATE_6M;
2753         ulMaxPacket = pDevice->uNumSQ3[RATE_6M];
2754     }
2755     if ( pDevice->uNumSQ3[RATE_5M] > ulMaxPacket ) {
2756         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2757                       pDevice->uNumSQ3[RATE_2M];
2758         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2759         //ulRatio = (pDevice->uNumSQ3[RATE_5M] * 1000 / pDevice->uDiversityCnt);
2760         ulRatio += TOP_RATE_55M;
2761         ulMaxPacket = pDevice->uNumSQ3[RATE_5M];
2762     }
2763     if ( pDevice->uNumSQ3[RATE_2M] > ulMaxPacket ) {
2764         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M];
2765         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2766         //ulRatio = (pDevice->uNumSQ3[RATE_2M]  * 1000 / pDevice->uDiversityCnt);
2767         ulRatio += TOP_RATE_2M;
2768         ulMaxPacket = pDevice->uNumSQ3[RATE_2M];
2769     }
2770     if ( pDevice->uNumSQ3[RATE_1M] > ulMaxPacket ) {
2771         ulPacketNum = pDevice->uDiversityCnt;
2772         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2773         //ulRatio = (pDevice->uNumSQ3[RATE_1M]  * 1000 / pDevice->uDiversityCnt);
2774         ulRatio += TOP_RATE_1M;
2775     }
2776
2777     return ulRatio;
2778 }
2779
2780
2781 VOID
2782 BBvClearAntDivSQ3Value (PSDevice pDevice)
2783 {
2784     UINT    ii;
2785
2786     pDevice->uDiversityCnt = 0;
2787     for (ii = 0; ii < MAX_RATE; ii++) {
2788         pDevice->uNumSQ3[ii] = 0;
2789     }
2790 }
2791
2792
2793 /*
2794  * Description: Antenna Diversity
2795  *
2796  * Parameters:
2797  *  In:
2798  *      pDevice          - Device Structure
2799  *      byRSR            - RSR from received packet
2800  *      bySQ3            - SQ3 value from received packet
2801  *  Out:
2802  *      none
2803  *
2804  * Return Value: none
2805  *
2806  */
2807
2808 VOID
2809 BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
2810 {
2811
2812     if ((byRxRate >= MAX_RATE) || (pDevice->wAntDiversityMaxRate >= MAX_RATE)) {
2813         return;
2814     }
2815     pDevice->uDiversityCnt++;
2816    // DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pDevice->uDiversityCnt = %d\n", (int)pDevice->uDiversityCnt);
2817
2818     pDevice->uNumSQ3[byRxRate]++;
2819
2820     if (pDevice->byAntennaState == 0) {
2821
2822         if (pDevice->uDiversityCnt > pDevice->ulDiversityNValue) {
2823             DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ulDiversityNValue=[%d],54M-[%d]\n",
2824                           (int)pDevice->ulDiversityNValue, (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate]);
2825
2826             if (pDevice->uNumSQ3[pDevice->wAntDiversityMaxRate] < pDevice->uDiversityCnt/2) {
2827
2828                 pDevice->ulRatio_State0 = s_ulGetRatio(pDevice);
2829                 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State0, rate = [%08x]\n", (int)pDevice->ulRatio_State0);
2830
2831                 if ( pDevice->byTMax == 0 )
2832                     return;
2833                 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1.[%08x], uNumSQ3[%d]=%d, %d\n",
2834                               (int)pDevice->ulRatio_State0, (int)pDevice->wAntDiversityMaxRate,
2835                               (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2836 #ifdef  PLICE_DEBUG
2837                 //printk("BBvAntennaDiversity1:call s_vChangeAntenna\n");
2838 #endif
2839                 s_vChangeAntenna(pDevice);
2840                 pDevice->byAntennaState = 1;
2841                 del_timer(&pDevice->TimerSQ3Tmax3);
2842                 del_timer(&pDevice->TimerSQ3Tmax2);
2843                 pDevice->TimerSQ3Tmax1.expires =  RUN_AT(pDevice->byTMax * HZ);
2844                 add_timer(&pDevice->TimerSQ3Tmax1);
2845
2846             } else {
2847
2848                 pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2849                 add_timer(&pDevice->TimerSQ3Tmax3);
2850             }
2851             BBvClearAntDivSQ3Value(pDevice);
2852
2853         }
2854     } else { //byAntennaState == 1
2855
2856         if (pDevice->uDiversityCnt > pDevice->ulDiversityMValue) {
2857
2858             del_timer(&pDevice->TimerSQ3Tmax1);
2859
2860             pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2861             DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"RX:SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2862                           (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2863
2864             if (pDevice->ulRatio_State1 < pDevice->ulRatio_State0) {
2865                 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2866                               (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2867                               (int)pDevice->wAntDiversityMaxRate,
2868                               (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2869 #ifdef  PLICE_DEBUG
2870                 //printk("BBvAntennaDiversity2:call s_vChangeAntenna\n");
2871 #endif
2872                                 s_vChangeAntenna(pDevice);
2873                 pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2874                 pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2875                 add_timer(&pDevice->TimerSQ3Tmax3);
2876                 add_timer(&pDevice->TimerSQ3Tmax2);
2877             }
2878             pDevice->byAntennaState = 0;
2879             BBvClearAntDivSQ3Value(pDevice);
2880         }
2881     } //byAntennaState
2882 }
2883
2884 /*+
2885  *
2886  * Description:
2887  *  Timer for SQ3 antenna diversity
2888  *
2889  * Parameters:
2890  *  In:
2891  *  Out:
2892  *      none
2893  *
2894  * Return Value: none
2895  *
2896 -*/
2897
2898 VOID
2899 TimerSQ3CallBack (
2900     IN  HANDLE      hDeviceContext
2901     )
2902 {
2903     PSDevice        pDevice = (PSDevice)hDeviceContext;
2904
2905     DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerSQ3CallBack...");
2906     spin_lock_irq(&pDevice->lock);
2907
2908     DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.[%08x][%08x], %d\n",(int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1, (int)pDevice->uDiversityCnt);
2909 #ifdef  PLICE_DEBUG
2910                 //printk("TimerSQ3CallBack1:call s_vChangeAntenna\n");
2911 #endif
2912
2913     s_vChangeAntenna(pDevice);
2914     pDevice->byAntennaState = 0;
2915     BBvClearAntDivSQ3Value(pDevice);
2916
2917     pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2918     pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2919     add_timer(&pDevice->TimerSQ3Tmax3);
2920     add_timer(&pDevice->TimerSQ3Tmax2);
2921
2922
2923     spin_unlock_irq(&pDevice->lock);
2924     return;
2925 }
2926
2927
2928 /*+
2929  *
2930  * Description:
2931  *  Timer for SQ3 antenna diversity
2932  *
2933  * Parameters:
2934  *  In:
2935  *      pvSysSpec1
2936  *      hDeviceContext - Pointer to the adapter
2937  *      pvSysSpec2
2938  *      pvSysSpec3
2939  *  Out:
2940  *      none
2941  *
2942  * Return Value: none
2943  *
2944 -*/
2945
2946 VOID
2947 TimerState1CallBack (
2948     IN  HANDLE      hDeviceContext
2949     )
2950 {
2951     PSDevice        pDevice = (PSDevice)hDeviceContext;
2952
2953     DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerState1CallBack...");
2954
2955     spin_lock_irq(&pDevice->lock);
2956     if (pDevice->uDiversityCnt < pDevice->ulDiversityMValue/100) {
2957 #ifdef  PLICE_DEBUG
2958                 //printk("TimerSQ3CallBack2:call s_vChangeAntenna\n");
2959 #endif
2960
2961                 s_vChangeAntenna(pDevice);
2962         pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2963         pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2964         add_timer(&pDevice->TimerSQ3Tmax3);
2965         add_timer(&pDevice->TimerSQ3Tmax2);
2966     } else {
2967         pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2968         DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2969                       (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2970
2971         if ( pDevice->ulRatio_State1 < pDevice->ulRatio_State0 ) {
2972             DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2973                           (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2974                           (int)pDevice->wAntDiversityMaxRate,
2975                           (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2976 #ifdef  PLICE_DEBUG
2977                 //printk("TimerSQ3CallBack3:call s_vChangeAntenna\n");
2978 #endif
2979
2980                         s_vChangeAntenna(pDevice);
2981
2982             pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2983             pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2984             add_timer(&pDevice->TimerSQ3Tmax3);
2985             add_timer(&pDevice->TimerSQ3Tmax2);
2986         }
2987     }
2988     pDevice->byAntennaState = 0;
2989     BBvClearAntDivSQ3Value(pDevice);
2990     spin_unlock_irq(&pDevice->lock);
2991
2992     return;
2993 }
2994