SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25 */
  26
  27 #if 0
  28 double __floatsidf (int i) { return i; }
  29 unsigned int __fixunsdfsi (double d) { return d; }
  30 double __adddf3(double a, double b) { return a+b; }
  31 double __addsf3(float a, float b) { return a+b; }
  32 double __subdf3(double a, double b) { return a-b; }
  33 double __extendsfdf2(float a) {return a;}
  34 #endif
  35
  36
  37 #undef DEBUG_TX_DESC2
  38 #undef RX_DONT_PASS_UL
  39 #undef DEBUG_EPROM
  40 #undef DEBUG_RX_VERBOSE
  41 #undef DUMMY_RX
  42 #undef DEBUG_ZERO_RX
  43 #undef DEBUG_RX_SKB
  44 #undef DEBUG_TX_FRAG
  45 #undef DEBUG_RX_FRAG
  46 #undef DEBUG_TX_FILLDESC
  47 #undef DEBUG_TX
  48 #undef DEBUG_IRQ
  49 #undef DEBUG_RX
  50 #undef DEBUG_RXALLOC
  51 #undef DEBUG_REGISTERS
  52 #undef DEBUG_RING
  53 #undef DEBUG_IRQ_TASKLET
  54 #undef DEBUG_TX_ALLOC
  55 #undef DEBUG_TX_DESC
  56
  57 //#define DEBUG_TX
  58 //#define DEBUG_TX_DESC2
  59 //#define DEBUG_RX
  60 //#define DEBUG_RX_SKB
  61
  62 #include <linux/syscalls.h>
  63 //#include <linux/fcntl.h>
  64 //#include <asm/uaccess.h>
  65 #include "r8180_hw.h"
  66 #include "r8180.h"
  67 #include "r8180_sa2400.h"  /* PHILIPS Radio frontend */
  68 #include "r8180_max2820.h" /* MAXIM Radio frontend */
  69 #include "r8180_gct.h"     /* GCT Radio frontend */
  70 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  71 #include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
  72 #include "r8180_93cx6.h"   /* Card EEPROM */
  73 #include "r8180_wx.h"
  74 #include "r8180_dm.h"
  75
  76 #include "r8180_pm.h"
  77
  78 #include "ieee80211/dot11d.h"
  79
  80 #ifndef PCI_VENDOR_ID_BELKIN
  81         #define PCI_VENDOR_ID_BELKIN 0x1799
  82 #endif
  83 #ifndef PCI_VENDOR_ID_DLINK
  84         #define PCI_VENDOR_ID_DLINK 0x1186
  85 #endif
  86
  87 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
  88         {
  89                 .vendor = PCI_VENDOR_ID_REALTEK,
  90 //                .device = 0x8180,
  91                 .device = 0x8199,
  92                 .subvendor = PCI_ANY_ID,
  93                 .subdevice = PCI_ANY_ID,
  94                 .driver_data = 0,
  95         },
  96 #if 0
  97         {
  98                 .vendor = PCI_VENDOR_ID_BELKIN,
  99                 .device = 0x6001,
 100                 .subvendor = PCI_ANY_ID,
 101                 .subdevice = PCI_ANY_ID,
 102                 .driver_data = 1,
 103         },
 104         {       /* Belkin F5D6020 v3 */
 105                 .vendor = PCI_VENDOR_ID_BELKIN,
 106                 .device = 0x6020,
 107                 .subvendor = PCI_ANY_ID,
 108                 .subdevice = PCI_ANY_ID,
 109                 .driver_data = 2,
 110         },
 111         {       /* D-Link DWL-610 */
 112                 .vendor = PCI_VENDOR_ID_DLINK,
 113                 .device = 0x3300,
 114                 .subvendor = PCI_ANY_ID,
 115                 .subdevice = PCI_ANY_ID,
 116                 .driver_data = 3,
 117         },
 118         {
 119                 .vendor = PCI_VENDOR_ID_REALTEK,
 120                 .device = 0x8185,
 121                 .subvendor = PCI_ANY_ID,
 122                 .subdevice = PCI_ANY_ID,
 123                 .driver_data = 4,
 124         },
 125 #endif
 126         {
 127                 .vendor = 0,
 128                 .device = 0,
 129                 .subvendor = 0,
 130                 .subdevice = 0,
 131                 .driver_data = 0,
 132         }
 133 };
 134
 135
 136 static char* ifname = "wlan%d";
 137 static int hwseqnum = 0;
 138 //static char* ifname = "ath%d";
 139 static int hwwep = 0;
 140 static int channels = 0x3fff;
 141
 142 #define eqMacAddr(a,b)          ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
 143 #define cpMacAddr(des,src)            ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
 144 MODULE_LICENSE("GPL");
 145 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
 146 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
 147 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
 148
 149
 150
 151 /*
 152 MODULE_PARM(ifname, "s");
 153 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
 154
 155 MODULE_PARM(hwseqnum,"i");
 156 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 157
 158 MODULE_PARM(hwwep,"i");
 159 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
 160
 161 MODULE_PARM(channels,"i");
 162 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 163 */
 164
 165 module_param(ifname, charp, S_IRUGO|S_IWUSR );
 166 module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
 167 module_param(hwwep,int, S_IRUGO|S_IWUSR);
 168 module_param(channels,int, S_IRUGO|S_IWUSR);
 169
 170 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
 171 //MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
 172 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 173 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
 174 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 175
 176
 177 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
 178                                        const struct pci_device_id *id);
 179
 180 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
 181
 182 static void rtl8180_shutdown (struct pci_dev *pdev)
 183 {
 184         struct net_device *dev = pci_get_drvdata(pdev);
 185         if (dev->netdev_ops->ndo_stop)
 186                 dev->netdev_ops->ndo_stop(dev);
 187         pci_disable_device(pdev);
 188 }
 189
 190 static struct pci_driver rtl8180_pci_driver = {
 191         .name           = RTL8180_MODULE_NAME,            /* Driver name   */
 192         .id_table       = rtl8180_pci_id_tbl,             /* PCI_ID table  */
 193         .probe          = rtl8180_pci_probe,              /* probe fn      */
 194         .remove         = __devexit_p(rtl8180_pci_remove),/* remove fn     */
 195         .suspend        = rtl8180_suspend,                /* PM suspend fn */
 196         .resume         = rtl8180_resume,                 /* PM resume fn  */
 197         .shutdown       = rtl8180_shutdown,
 198 };
 199
 200
 201
 202
 203 u8 read_nic_byte(struct net_device *dev, int x)
 204 {
 205         return 0xff&readb((u8*)dev->mem_start +x);
 206 }
 207
 208 u32 read_nic_dword(struct net_device *dev, int x)
 209 {
 210         return readl((u8*)dev->mem_start +x);
 211 }
 212
 213 u16 read_nic_word(struct net_device *dev, int x)
 214 {
 215         return readw((u8*)dev->mem_start +x);
 216 }
 217
 218 void write_nic_byte(struct net_device *dev, int x,u8 y)
 219 {
 220         writeb(y,(u8*)dev->mem_start +x);
 221         udelay(20);
 222 }
 223
 224 void write_nic_dword(struct net_device *dev, int x,u32 y)
 225 {
 226         writel(y,(u8*)dev->mem_start +x);
 227         udelay(20);
 228 }
 229
 230 void write_nic_word(struct net_device *dev, int x,u16 y)
 231 {
 232         writew(y,(u8*)dev->mem_start +x);
 233         udelay(20);
 234 }
 235
 236
 237
 238
 239
 240
 241 inline void force_pci_posting(struct net_device *dev)
 242 {
 243         read_nic_byte(dev,EPROM_CMD);
 244         mb();
 245 }
 246
 247
 248 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 249 void set_nic_rxring(struct net_device *dev);
 250 void set_nic_txring(struct net_device *dev);
 251 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 252 void rtl8180_commit(struct net_device *dev);
 253 void rtl8180_start_tx_beacon(struct net_device *dev);
 254
 255 /****************************************************************************
 256    -----------------------------PROCFS STUFF-------------------------
 257 *****************************************************************************/
 258
 259 static struct proc_dir_entry *rtl8180_proc = NULL;
 260
 261 static int proc_get_registers(char *page, char **start,
 262                           off_t offset, int count,
 263                           int *eof, void *data)
 264 {
 265         struct net_device *dev = data;
 266 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 267
 268         int len = 0;
 269         int i,n;
 270
 271         int max=0xff;
 272
 273         /* This dump the current register page */
 274         for(n=0;n<=max;)
 275         {
 276                 //printk( "\nD: %2x> ", n);
 277                 len += snprintf(page + len, count - len,
 278                         "\nD:  %2x > ",n);
 279
 280                 for(i=0;i<16 && n<=max;i++,n++)
 281                 len += snprintf(page + len, count - len,
 282                         "%2x ",read_nic_byte(dev,n));
 283
 284                 //      printk("%2x ",read_nic_byte(dev,n));
 285         }
 286         len += snprintf(page + len, count - len,"\n");
 287
 288
 289
 290         *eof = 1;
 291         return len;
 292
 293 }
 294
 295 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 296
 297 static int proc_get_stats_hw(char *page, char **start,
 298                           off_t offset, int count,
 299                           int *eof, void *data)
 300 {
 301         //struct net_device *dev = data;
 302         //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 303
 304         int len = 0;
 305
 306         *eof = 1;
 307         return len;
 308 }
 309
 310
 311 static int proc_get_stats_rx(char *page, char **start,
 312                           off_t offset, int count,
 313                           int *eof, void *data)
 314 {
 315         struct net_device *dev = data;
 316         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 317
 318         int len = 0;
 319
 320         len += snprintf(page + len, count - len,
 321         /*      "RX descriptor not available: %lu\n"
 322                 "RX incomplete (missing last descriptor): %lu\n"
 323                 "RX not data: %lu\n"
 324                 //"RX descriptor pointer reset: %lu\n"
 325                 "RX descriptor pointer lost: %lu\n"
 326                 //"RX pointer workaround: %lu\n"
 327                 "RX error int: %lu\n"
 328                 "RX fifo overflow: %lu\n"
 329                 "RX int: %lu\n"
 330                 "RX packet: %lu\n"
 331                 "RX bytes: %lu\n"
 332                 "RX DMA fail: %lu\n",
 333                 priv->stats.rxrdu,
 334                 priv->stats.rxnolast,
 335                 priv->stats.rxnodata,
 336                 //priv->stats.rxreset,
 337                 priv->stats.rxnopointer,
 338                 //priv->stats.rxwrkaround,
 339                 priv->stats.rxerr,
 340                 priv->stats.rxoverflow,
 341                 priv->stats.rxint,
 342                 priv->ieee80211->stats.rx_packets,
 343                 priv->ieee80211->stats.rx_bytes,
 344                 priv->stats.rxdmafail  */
 345                 "RX OK: %lu\n"
 346                 "RX Retry: %lu\n"
 347                 "RX CRC Error(0-500): %lu\n"
 348                 "RX CRC Error(500-1000): %lu\n"
 349                 "RX CRC Error(>1000): %lu\n"
 350                 "RX ICV Error: %lu\n",
 351                 priv->stats.rxint,
 352                 priv->stats.rxerr,
 353                 priv->stats.rxcrcerrmin,
 354                 priv->stats.rxcrcerrmid,
 355                 priv->stats.rxcrcerrmax,
 356                 priv->stats.rxicverr
 357                 );
 358
 359         *eof = 1;
 360         return len;
 361 }
 362
 363 #if 0
 364 static int proc_get_stats_ieee(char *page, char **start,
 365                           off_t offset, int count,
 366                           int *eof, void *data)
 367 {
 368         struct net_device *dev = data;
 369         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 370
 371         int len = 0;
 372
 373         len += snprintf(page + len, count - len,
 374                 "TXed association requests: %u\n"
 375                 "TXed authentication requests: %u\n"
 376                 "RXed successful association response: %u\n"
 377                 "RXed failed association response: %u\n"
 378                 "RXed successful authentication response: %u\n"
 379                 "RXed failed authentication response: %u\n"
 380                 "Association requests without response: %u\n"
 381                 "Authentication requests without response: %u\n"
 382                 "TX probe response: %u\n"
 383                 "RX probe request: %u\n"
 384                 "TX probe request: %lu\n"
 385                 "RX authentication requests: %lu\n"
 386                 "RX association requests: %lu\n"
 387                 "Reassociations: %lu\n",
 388                 priv->ieee80211->ieee_stats.tx_ass,
 389                 priv->ieee80211->ieee_stats.tx_aut,
 390                 priv->ieee80211->ieee_stats.rx_ass_ok,
 391                 priv->ieee80211->ieee_stats.rx_ass_err,
 392                 priv->ieee80211->ieee_stats.rx_aut_ok,
 393                 priv->ieee80211->ieee_stats.rx_aut_err,
 394                 priv->ieee80211->ieee_stats.ass_noresp,
 395                 priv->ieee80211->ieee_stats.aut_noresp,
 396                 priv->ieee80211->ieee_stats.tx_probe,
 397                 priv->ieee80211->ieee_stats.rx_probe,
 398                 priv->ieee80211->ieee_stats.tx_probe_rq,
 399                 priv->ieee80211->ieee_stats.rx_auth_rq,
 400                 priv->ieee80211->ieee_stats.rx_assoc_rq,
 401                 priv->ieee80211->ieee_stats.reassoc);
 402
 403         *eof = 1;
 404         return len;
 405 }
 406 #endif
 407 #if 0
 408 static int proc_get_stats_ap(char *page, char **start,
 409                           off_t offset, int count,
 410                           int *eof, void *data)
 411 {
 412         struct net_device *dev = data;
 413         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 414         struct mac_htable_t *list;
 415         int i;
 416         int len = 0;
 417
 418         if(priv->ieee80211->iw_mode != IW_MODE_MASTER){
 419                 len += snprintf(page + len, count - len,
 420                 "Card is not acting as AP...\n"
 421                 );
 422         }else{
 423                 len += snprintf(page + len, count - len,
 424                 "List of associated STA:\n"
 425                 );
 426
 427                 for(i=0;i<MAC_HTABLE_ENTRY;i++)
 428                         for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){
 429                                 len += snprintf(page + len, count - len,
 430                                         MACSTR"\n",MAC2STR(list->adr));
 431                         }
 432
 433         }
 434         *eof = 1;
 435         return len;
 436 }
 437 #endif
 438
 439 static int proc_get_stats_tx(char *page, char **start,
 440                           off_t offset, int count,
 441                           int *eof, void *data)
 442 {
 443         struct net_device *dev = data;
 444         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 445
 446         int len = 0;
 447         unsigned long totalOK;
 448
 449         totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 450         len += snprintf(page + len, count - len,
 451         /*      "TX normal priority ok int: %lu\n"
 452                 "TX normal priority error int: %lu\n"
 453                 "TX high priority ok int: %lu\n"
 454                 "TX high priority failed error int: %lu\n"
 455                 "TX low priority ok int: %lu\n"
 456                 "TX low priority failed error int: %lu\n"
 457                 "TX bytes: %lu\n"
 458                 "TX packets: %lu\n"
 459                 "TX queue resume: %lu\n"
 460                 "TX queue stopped?: %d\n"
 461                 "TX fifo overflow: %lu\n"
 462                 //"SW TX stop: %lu\n"
 463                 //"SW TX wake: %lu\n"
 464                 "TX beacon: %lu\n"
 465                 "TX beacon aborted: %lu\n",
 466                 priv->stats.txnpokint,
 467                 priv->stats.txnperr,
 468                 priv->stats.txhpokint,
 469                 priv->stats.txhperr,
 470                 priv->stats.txlpokint,
 471                 priv->stats.txlperr,
 472                 priv->ieee80211->stats.tx_bytes,
 473                 priv->ieee80211->stats.tx_packets,
 474                 priv->stats.txresumed,
 475                 netif_queue_stopped(dev),
 476                 priv->stats.txoverflow,
 477                 //priv->ieee80211->ieee_stats.swtxstop,
 478                 //priv->ieee80211->ieee_stats.swtxawake,
 479                 priv->stats.txbeacon,
 480                 priv->stats.txbeaconerr  */
 481                 "TX OK: %lu\n"
 482                 "TX Error: %lu\n"
 483                 "TX Retry: %lu\n"
 484                 "TX beacon OK: %lu\n"
 485                 "TX beacon error: %lu\n",
 486                 totalOK,
 487                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 488                 priv->stats.txretry,
 489                 priv->stats.txbeacon,
 490                 priv->stats.txbeaconerr
 491         );
 492
 493         *eof = 1;
 494         return len;
 495 }
 496
 497 void rtl8180_proc_module_init(void)
 498 {
 499         DMESG("Initializing proc filesystem");
 500         rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
 501 }
 502
 503
 504 void rtl8180_proc_module_remove(void)
 505 {
 506         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 507 }
 508
 509
 510 void rtl8180_proc_remove_one(struct net_device *dev)
 511 {
 512         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 513         if (priv->dir_dev) {
 514                 remove_proc_entry("stats-hw", priv->dir_dev);
 515                 remove_proc_entry("stats-tx", priv->dir_dev);
 516                 remove_proc_entry("stats-rx", priv->dir_dev);
 517 //              remove_proc_entry("stats-ieee", priv->dir_dev);
 518 //              remove_proc_entry("stats-ap", priv->dir_dev);
 519                 remove_proc_entry("registers", priv->dir_dev);
 520                 remove_proc_entry(dev->name, rtl8180_proc);
 521                 priv->dir_dev = NULL;
 522         }
 523 }
 524
 525
 526 void rtl8180_proc_init_one(struct net_device *dev)
 527 {
 528         struct proc_dir_entry *e;
 529         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 530         priv->dir_dev = rtl8180_proc;
 531         if (!priv->dir_dev) {
 532                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 533                       dev->name);
 534                 return;
 535         }
 536
 537         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 538                                    priv->dir_dev, proc_get_stats_hw, dev);
 539
 540         if (!e) {
 541                 DMESGE("Unable to initialize "
 542                       "/proc/net/r8180/%s/stats-hw\n",
 543                       dev->name);
 544         }
 545
 546         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 547                                    priv->dir_dev, proc_get_stats_rx, dev);
 548
 549         if (!e) {
 550                 DMESGE("Unable to initialize "
 551                       "/proc/net/r8180/%s/stats-rx\n",
 552                       dev->name);
 553         }
 554
 555
 556         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 557                                    priv->dir_dev, proc_get_stats_tx, dev);
 558
 559         if (!e) {
 560                 DMESGE("Unable to initialize "
 561                       "/proc/net/r8180/%s/stats-tx\n",
 562                       dev->name);
 563         }
 564         #if 0
 565         e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
 566                                    priv->dir_dev, proc_get_stats_ieee, dev);
 567
 568         if (!e) {
 569                 DMESGE("Unable to initialize "
 570                       "/proc/net/rtl8180/%s/stats-ieee\n",
 571                       dev->name);
 572         }
 573         #endif
 574         #if 0
 575         e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
 576                                    priv->dir_dev, proc_get_stats_ap, dev);
 577
 578         if (!e) {
 579                 DMESGE("Unable to initialize "
 580                       "/proc/net/rtl8180/%s/stats-ap\n",
 581                       dev->name);
 582         }
 583         #endif
 584
 585         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 586                                    priv->dir_dev, proc_get_registers, dev);
 587
 588         if (!e) {
 589                 DMESGE("Unable to initialize "
 590                       "/proc/net/r8180/%s/registers\n",
 591                       dev->name);
 592         }
 593 }
 594 /****************************************************************************
 595    -----------------------------MISC STUFF-------------------------
 596 *****************************************************************************/
 597 /*
 598   FIXME: check if we can use some standard already-existent
 599   data type+functions in kernel
 600 */
 601
 602 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 603                 struct buffer **bufferhead)
 604 {
 605 #ifdef DEBUG_RING
 606         DMESG("adding buffer to TX/RX struct");
 607 #endif
 608
 609         struct buffer *tmp;
 610
 611         if(! *buffer){
 612
 613                 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
 614
 615                 if (*buffer == NULL) {
 616                         DMESGE("Failed to kmalloc head of TX/RX struct");
 617                         return -1;
 618                 }
 619                 (*buffer)->next=*buffer;
 620                 (*buffer)->buf=buf;
 621                 (*buffer)->dma=dma;
 622                 if(bufferhead !=NULL)
 623                         (*bufferhead) = (*buffer);
 624                 return 0;
 625         }
 626         tmp=*buffer;
 627
 628         while(tmp->next!=(*buffer)) tmp=tmp->next;
 629         if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
 630                 DMESGE("Failed to kmalloc TX/RX struct");
 631                 return -1;
 632         }
 633         tmp->next->buf=buf;
 634         tmp->next->dma=dma;
 635         tmp->next->next=*buffer;
 636
 637         return 0;
 638 }
 639
 640
 641 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
 642 consistent)
 643 {
 644
 645         struct buffer *tmp,*next;
 646         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 647         struct pci_dev *pdev=priv->pdev;
 648         //int i;
 649
 650         if(! *buffer) return;
 651
 652         /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
 653
 654         */
 655         tmp=*buffer;
 656         do{
 657                 next=tmp->next;
 658                 if(consistent){
 659                         pci_free_consistent(pdev,len,
 660                                     tmp->buf,tmp->dma);
 661                 }else{
 662                         pci_unmap_single(pdev, tmp->dma,
 663                         len,PCI_DMA_FROMDEVICE);
 664                         kfree(tmp->buf);
 665                 }
 666                 kfree(tmp);
 667                 tmp = next;
 668         }
 669         while(next != *buffer);
 670
 671         *buffer=NULL;
 672 }
 673
 674
 675 void print_buffer(u32 *buffer, int len)
 676 {
 677         int i;
 678         u8 *buf =(u8*)buffer;
 679
 680         printk("ASCII BUFFER DUMP (len: %x):\n",len);
 681
 682         for(i=0;i<len;i++)
 683                 printk("%c",buf[i]);
 684
 685         printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
 686
 687         for(i=0;i<len;i++)
 688                 printk("%02x",buf[i]);
 689
 690         printk("\n");
 691 }
 692
 693
 694 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 695 {
 696         struct r8180_priv *priv = ieee80211_priv(dev);
 697         u32* tail;
 698         u32* head;
 699         int ret;
 700
 701         switch (priority){
 702                 case MANAGE_PRIORITY:
 703                         head = priv->txmapringhead;
 704                         tail = priv->txmapringtail;
 705                         break;
 706                 case BK_PRIORITY:
 707                         head = priv->txbkpringhead;
 708                         tail = priv->txbkpringtail;
 709                         break;
 710                 case BE_PRIORITY:
 711                         head = priv->txbepringhead;
 712                         tail = priv->txbepringtail;
 713                         break;
 714                 case VI_PRIORITY:
 715                         head = priv->txvipringhead;
 716                         tail = priv->txvipringtail;
 717                         break;
 718                 case VO_PRIORITY:
 719                         head = priv->txvopringhead;
 720                         tail = priv->txvopringtail;
 721                         break;
 722                 case HI_PRIORITY:
 723                         head = priv->txhpringhead;
 724                         tail = priv->txhpringtail;
 725                         break;
 726                 default:
 727                         return -1;
 728         }
 729
 730         //DMESG("%x %x", head, tail);
 731
 732         /* FIXME FIXME FIXME FIXME */
 733
 734 #if 0
 735         if( head <= tail ) return priv->txringcount-1 - (tail - head)/8;
 736         return (head - tail)/8/4;
 737 #else
 738         if( head <= tail )
 739                 ret = priv->txringcount - (tail - head)/8;
 740         else
 741                 ret = (head - tail)/8;
 742
 743         if(ret > priv->txringcount ) DMESG("BUG");
 744         return ret;
 745 #endif
 746 }
 747
 748
 749 short check_nic_enought_desc(struct net_device *dev, int priority)
 750 {
 751         struct r8180_priv *priv = ieee80211_priv(dev);
 752         struct ieee80211_device *ieee = netdev_priv(dev);
 753
 754         int requiredbyte, required;
 755         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 756
 757         if(ieee->current_network.QoS_Enable) {
 758                 requiredbyte += 2;
 759         };
 760
 761         required = requiredbyte / (priv->txbuffsize-4);
 762         if (requiredbyte % priv->txbuffsize) required++;
 763         /* for now we keep two free descriptor as a safety boundary
 764          * between the tail and the head
 765          */
 766
 767         return (required+2 < get_curr_tx_free_desc(dev,priority));
 768 }
 769
 770
 771 /* This function is only for debuging purpose */
 772 void check_tx_ring(struct net_device *dev, int pri)
 773 {
 774         static int maxlog =3;
 775         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 776         u32* tmp;
 777         struct buffer *buf;
 778         int i;
 779         int nic;
 780         u32* tail;
 781         u32* head;
 782         u32* begin;
 783         u32 nicbegin;
 784         struct buffer* buffer;
 785
 786         maxlog --;
 787         if (maxlog <0 ) return;
 788
 789         switch(pri) {
 790         case MANAGE_PRIORITY:
 791                 tail = priv->txmapringtail;
 792                 begin = priv->txmapring;
 793                 head = priv->txmapringhead;
 794                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
 795                 buffer = priv->txmapbufs;
 796                 nicbegin = priv->txmapringdma;
 797                 break;
 798
 799
 800         case BK_PRIORITY:
 801                 tail = priv->txbkpringtail;
 802                 begin = priv->txbkpring;
 803                 head = priv->txbkpringhead;
 804                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
 805                 buffer = priv->txbkpbufs;
 806                 nicbegin = priv->txbkpringdma;
 807                 break;
 808
 809         case BE_PRIORITY:
 810                 tail = priv->txbepringtail;
 811                 begin = priv->txbepring;
 812                 head = priv->txbepringhead;
 813                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
 814                 buffer = priv->txbepbufs;
 815                 nicbegin = priv->txbepringdma;
 816                 break;
 817
 818         case VI_PRIORITY:
 819                 tail = priv->txvipringtail;
 820                 begin = priv->txvipring;
 821                 head = priv->txvipringhead;
 822                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
 823                 buffer = priv->txvipbufs;
 824                 nicbegin = priv->txvipringdma;
 825                 break;
 826
 827
 828         case VO_PRIORITY:
 829                 tail = priv->txvopringtail;
 830                 begin = priv->txvopring;
 831                 head = priv->txvopringhead;
 832                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
 833                 buffer = priv->txvopbufs;
 834                 nicbegin = priv->txvopringdma;
 835                 break;
 836
 837         case HI_PRIORITY:
 838                 tail = priv->txhpringtail;
 839                 begin = priv->txhpring;
 840                 head = priv->txhpringhead;
 841                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
 842                 buffer = priv->txhpbufs;
 843                 nicbegin = priv->txhpringdma;
 844                 break;
 845
 846         default:
 847                 return ;
 848                 break;
 849         }
 850
 851         if(!priv->txvopbufs)
 852                 DMESGE ("NIC TX ack, but TX queue corrupted!");
 853         else{
 854
 855                 for(i=0,buf=buffer, tmp=begin;
 856                         tmp<begin+(priv->txringcount)*8;
 857                         tmp+=8,buf=buf->next,i++)
 858
 859                         DMESG("BUF%d %s %x %s. Next : %x",i,
 860                               *tmp & (1<<31) ? "filled" : "empty",
 861                               *(buf->buf),
 862                               *tmp & (1<<15)? "ok": "err", *(tmp+4));
 863         }
 864
 865         return;
 866 }
 867
 868
 869
 870 /* this function is only for debugging purpose */
 871 void check_rxbuf(struct net_device *dev)
 872 {
 873         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 874         u32* tmp;
 875         struct buffer *buf;
 876         u8 rx_desc_size;
 877
 878         rx_desc_size = 8;
 879
 880         if(!priv->rxbuffer)
 881                 DMESGE ("NIC RX ack, but RX queue corrupted!");
 882
 883         else{
 884
 885                 for(buf=priv->rxbuffer, tmp=priv->rxring;
 886                     tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
 887                     tmp+=rx_desc_size, buf=buf->next)
 888
 889                         DMESG("BUF %s %x",
 890                               *tmp & (1<<31) ? "empty" : "filled",
 891                               *(buf->buf));
 892         }
 893
 894         return;
 895 }
 896
 897
 898 void dump_eprom(struct net_device *dev)
 899 {
 900         int i;
 901         for(i=0; i<63; i++)
 902                 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
 903 }
 904
 905
 906 void rtl8180_dump_reg(struct net_device *dev)
 907 {
 908         int i;
 909         int n;
 910         int max=0xff;
 911
 912         DMESG("Dumping NIC register map");
 913
 914         for(n=0;n<=max;)
 915         {
 916                 printk( "\nD: %2x> ", n);
 917                 for(i=0;i<16 && n<=max;i++,n++)
 918                         printk("%2x ",read_nic_byte(dev,n));
 919         }
 920         printk("\n");
 921 }
 922
 923
 924 void fix_tx_fifo(struct net_device *dev)
 925 {
 926         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 927         u32 *tmp;
 928         int i;
 929 #ifdef DEBUG_TX_ALLOC
 930         DMESG("FIXING TX FIFOs");
 931 #endif
 932         for (tmp=priv->txmapring, i=0;
 933              i < priv->txringcount;
 934              tmp+=8, i++){
 935                 *tmp = *tmp &~ (1<<31);
 936         }
 937
 938         for (tmp=priv->txbkpring, i=0;
 939              i < priv->txringcount;
 940              tmp+=8, i++) {
 941                 *tmp = *tmp &~ (1<<31);
 942         }
 943
 944         for (tmp=priv->txbepring, i=0;
 945              i < priv->txringcount;
 946              tmp+=8, i++){
 947                 *tmp = *tmp &~ (1<<31);
 948         }
 949         for (tmp=priv->txvipring, i=0;
 950              i < priv->txringcount;
 951              tmp+=8, i++) {
 952                 *tmp = *tmp &~ (1<<31);
 953         }
 954
 955         for (tmp=priv->txvopring, i=0;
 956              i < priv->txringcount;
 957              tmp+=8, i++){
 958                 *tmp = *tmp &~ (1<<31);
 959         }
 960
 961         for (tmp=priv->txhpring, i=0;
 962              i < priv->txringcount;
 963              tmp+=8,i++){
 964                 *tmp = *tmp &~ (1<<31);
 965         }
 966
 967         for (tmp=priv->txbeaconring, i=0;
 968              i < priv->txbeaconcount;
 969              tmp+=8, i++){
 970                 *tmp = *tmp &~ (1<<31);
 971         }
 972 #ifdef DEBUG_TX_ALLOC
 973         DMESG("TX FIFOs FIXED");
 974 #endif
 975         priv->txmapringtail = priv->txmapring;
 976         priv->txmapringhead = priv->txmapring;
 977         priv->txmapbufstail = priv->txmapbufs;
 978
 979         priv->txbkpringtail = priv->txbkpring;
 980         priv->txbkpringhead = priv->txbkpring;
 981         priv->txbkpbufstail = priv->txbkpbufs;
 982
 983         priv->txbepringtail = priv->txbepring;
 984         priv->txbepringhead = priv->txbepring;
 985         priv->txbepbufstail = priv->txbepbufs;
 986
 987         priv->txvipringtail = priv->txvipring;
 988         priv->txvipringhead = priv->txvipring;
 989         priv->txvipbufstail = priv->txvipbufs;
 990
 991         priv->txvopringtail = priv->txvopring;
 992         priv->txvopringhead = priv->txvopring;
 993         priv->txvopbufstail = priv->txvopbufs;
 994
 995         priv->txhpringtail = priv->txhpring;
 996         priv->txhpringhead = priv->txhpring;
 997         priv->txhpbufstail = priv->txhpbufs;
 998
 999         priv->txbeaconringtail = priv->txbeaconring;
1000         priv->txbeaconbufstail = priv->txbeaconbufs;
1001         set_nic_txring(dev);
1002
1003         ieee80211_reset_queue(priv->ieee80211);
1004         priv->ack_tx_to_ieee = 0;
1005 }
1006
1007
1008 void fix_rx_fifo(struct net_device *dev)
1009 {
1010         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1011         u32 *tmp;
1012         struct buffer *rxbuf;
1013         u8 rx_desc_size;
1014
1015         rx_desc_size = 8; // 4*8 = 32 bytes
1016
1017 #ifdef DEBUG_RXALLOC
1018         DMESG("FIXING RX FIFO");
1019         check_rxbuf(dev);
1020 #endif
1021
1022         for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
1023              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
1024              tmp+=rx_desc_size,rxbuf=rxbuf->next){
1025                 *(tmp+2) = rxbuf->dma;
1026                 *tmp=*tmp &~ 0xfff;
1027                 *tmp=*tmp | priv->rxbuffersize;
1028                 *tmp |= (1<<31);
1029         }
1030
1031 #ifdef DEBUG_RXALLOC
1032         DMESG("RX FIFO FIXED");
1033         check_rxbuf(dev);
1034 #endif
1035
1036         priv->rxringtail=priv->rxring;
1037         priv->rxbuffer=priv->rxbufferhead;
1038         priv->rx_skb_complete=1;
1039         set_nic_rxring(dev);
1040 }
1041
1042
1043 /****************************************************************************
1044       ------------------------------HW STUFF---------------------------
1045 *****************************************************************************/
1046
1047 unsigned char QUALITY_MAP[] = {
1048   0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
1049   0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
1050   0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
1051   0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
1052   0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
1053   0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
1054   0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
1055   0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
1056   0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
1057   0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
1058 };
1059
1060 unsigned char STRENGTH_MAP[] = {
1061   0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
1062   0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
1063   0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
1064   0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
1065   0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
1066   0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
1067   0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
1068   0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
1069   0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
1070   0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
1071 };
1072
1073 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
1074         //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
1075         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1076         u32 temp;
1077         u32 temp2;
1078         u32 temp3;
1079         u32 lsb;
1080         u32 q;
1081         u32 orig_qual;
1082         u8  _rssi;
1083
1084         q = *qual;
1085         orig_qual = *qual;
1086         _rssi = 0; // avoid gcc complains..
1087
1088         if (q <= 0x4e) {
1089                 temp = QUALITY_MAP[q];
1090         } else {
1091                 if( q & 0x80 ) {
1092                         temp = 0x32;
1093                 } else {
1094                         temp = 1;
1095                 }
1096         }
1097
1098         *qual = temp;
1099         temp2 = *rssi;
1100
1101         switch(priv->rf_chip){
1102         case RFCHIPID_RFMD:
1103                 lsb = temp2 & 1;
1104                 temp2 &= 0x7e;
1105                 if ( !lsb || !(temp2 <= 0x3c) ) {
1106                         temp2 = 0x64;
1107                 } else {
1108                         temp2 = 100 * temp2 / 0x3c;
1109                 }
1110                 *rssi = temp2 & 0xff;
1111                 _rssi = temp2 & 0xff;
1112                 break;
1113         case RFCHIPID_INTERSIL:
1114                 lsb = temp2;
1115                 temp2 &= 0xfffffffe;
1116                 temp2 *= 251;
1117                 temp3 = temp2;
1118                 temp2 <<= 6;
1119                 temp3 += temp2;
1120                 temp3 <<= 1;
1121                 temp2 = 0x4950df;
1122                 temp2 -= temp3;
1123                 lsb &= 1;
1124                 if ( temp2 <= 0x3e0000 ) {
1125                         if ( temp2 < 0xffef0000 )
1126                                 temp2 = 0xffef0000;
1127                 } else {
1128                         temp2 = 0x3e0000;
1129                 }
1130                 if ( !lsb ) {
1131                         temp2 -= 0xf0000;
1132                 } else {
1133                         temp2 += 0xf0000;
1134                 }
1135
1136                 temp3 = 0x4d0000;
1137                 temp3 -= temp2;
1138                 temp3 *= 100;
1139                 temp3 = temp3 / 0x6d;
1140                 temp3 >>= 0x10;
1141                 _rssi = temp3 & 0xff;
1142                 *rssi = temp3 & 0xff;
1143                 break;
1144         case RFCHIPID_GCT:
1145                 lsb = temp2 & 1;
1146                 temp2 &= 0x7e;
1147                 if ( ! lsb || !(temp2 <= 0x3c) ){
1148                         temp2 = 0x64;
1149                 } else {
1150                         temp2 = (100 * temp2) / 0x3c;
1151                 }
1152                 *rssi = temp2 & 0xff;
1153                 _rssi = temp2 & 0xff;
1154                 break;
1155         case RFCHIPID_PHILIPS:
1156                 if( orig_qual <= 0x4e ){
1157                         _rssi = STRENGTH_MAP[orig_qual];
1158                         *rssi = _rssi;
1159                 } else {
1160                         orig_qual -= 0x80;
1161                         if ( !orig_qual ){
1162                                 _rssi = 1;
1163                                 *rssi = 1;
1164                         } else {
1165                                 _rssi = 0x32;
1166                                 *rssi = 0x32;
1167                         }
1168                 }
1169                 break;
1170
1171         /* case 4 */
1172         case RFCHIPID_MAXIM:
1173                 lsb = temp2 & 1;
1174                 temp2 &= 0x7e;
1175                 temp2 >>= 1;
1176                 temp2 += 0x42;
1177                 if( lsb != 0 ){
1178                         temp2 += 0xa;
1179                 }
1180                 *rssi = temp2 & 0xff;
1181                 _rssi = temp2 & 0xff;
1182                 break;
1183         }
1184
1185         if ( _rssi < 0x64 ){
1186                 if ( _rssi == 0 ) {
1187                         *rssi = 1;
1188                 }
1189         } else {
1190                 *rssi = 0x64;
1191         }
1192
1193         return;
1194 }
1195
1196
1197 void rtl8180_irq_enable(struct net_device *dev)
1198 {
1199         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1200         priv->irq_enabled = 1;
1201 /*
1202         write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1203         INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1204         INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1205         INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1206 */
1207         write_nic_word(dev,INTA_MASK, priv->irq_mask);
1208 }
1209
1210
1211 void rtl8180_irq_disable(struct net_device *dev)
1212 {
1213         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1214
1215         write_nic_dword(dev,IMR,0);
1216         force_pci_posting(dev);
1217         priv->irq_enabled = 0;
1218 }
1219
1220
1221 void rtl8180_set_mode(struct net_device *dev,int mode)
1222 {
1223         u8 ecmd;
1224         ecmd=read_nic_byte(dev, EPROM_CMD);
1225         ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1226         ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1227         ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1228         ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1229         write_nic_byte(dev, EPROM_CMD, ecmd);
1230 }
1231
1232 void rtl8180_adapter_start(struct net_device *dev);
1233 void rtl8180_beacon_tx_enable(struct net_device *dev);
1234
1235 void rtl8180_update_msr(struct net_device *dev)
1236 {
1237         struct r8180_priv *priv = ieee80211_priv(dev);
1238         u8 msr;
1239         u32 rxconf;
1240
1241         msr  = read_nic_byte(dev, MSR);
1242         msr &= ~ MSR_LINK_MASK;
1243
1244         rxconf=read_nic_dword(dev,RX_CONF);
1245
1246         if(priv->ieee80211->state == IEEE80211_LINKED)
1247         {
1248                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1249                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1250                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1251                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1252                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1253                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1254                 else
1255                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1256                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1257
1258         }else {
1259                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1260                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1261         }
1262
1263         write_nic_byte(dev, MSR, msr);
1264         write_nic_dword(dev, RX_CONF, rxconf);
1265
1266 }
1267
1268
1269
1270 void rtl8180_set_chan(struct net_device *dev,short ch)
1271 {
1272         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1273
1274         if((ch > 14) || (ch < 1))
1275         {
1276                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
1277                 return;
1278         }
1279
1280         priv->chan=ch;
1281         //printk("in %s:channel is %d\n",__func__,ch);
1282         priv->rf_set_chan(dev,priv->chan);
1283
1284 }
1285
1286
1287 void rtl8180_rx_enable(struct net_device *dev)
1288 {
1289         u8 cmd;
1290         u32 rxconf;
1291         /* for now we accept data, management & ctl frame*/
1292         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1293
1294         rxconf=read_nic_dword(dev,RX_CONF);
1295         rxconf = rxconf &~ MAC_FILTER_MASK;
1296         rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1297         rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1298         rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1299         rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1300 //      rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1301         if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1302
1303         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1304            dev->flags & IFF_PROMISC){
1305                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1306         }else{
1307                 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1308                 if(priv->card_8185 == 0)
1309                         rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1310         }
1311
1312         /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1313                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1314                 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1315         }*/
1316
1317         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1318                 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1319                 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1320                 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1321         }
1322
1323         if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1324                 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1325
1326         //if(!priv->card_8185){
1327                 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1328                 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1329         //}
1330
1331         rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1332         rxconf = rxconf &~ MAX_RX_DMA_MASK;
1333         rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1334
1335         //if(!priv->card_8185)
1336                 rxconf = rxconf | RCR_ONLYERLPKT;
1337
1338         rxconf = rxconf &~ RCR_CS_MASK;
1339         if(!priv->card_8185)
1340                 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1341 //      rxconf &=~ 0xfff00000;
1342 //      rxconf |= 0x90100000;//9014f76f;
1343         write_nic_dword(dev, RX_CONF, rxconf);
1344
1345         fix_rx_fifo(dev);
1346
1347 #ifdef DEBUG_RX
1348         DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1349 #endif
1350         cmd=read_nic_byte(dev,CMD);
1351         write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1352
1353         /* In rtl8139 driver seems that DMA threshold has to be written
1354          *  after enabling RX, so we rewrite RX_CONFIG register
1355          */
1356         //mdelay(100);
1357 //      write_nic_dword(dev, RX_CONF, rxconf);
1358
1359 }
1360
1361
1362 void set_nic_txring(struct net_device *dev)
1363 {
1364         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1365 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1366
1367         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1368 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1369         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1370 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1371         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1372 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1373         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1374 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1375         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1376 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1377         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1378 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1379
1380         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1381 }
1382
1383
1384 void rtl8180_conttx_enable(struct net_device *dev)
1385 {
1386         u32 txconf;
1387         txconf = read_nic_dword(dev,TX_CONF);
1388         txconf = txconf &~ TX_LOOPBACK_MASK;
1389         txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1390         write_nic_dword(dev,TX_CONF,txconf);
1391 }
1392
1393
1394 void rtl8180_conttx_disable(struct net_device *dev)
1395 {
1396         u32 txconf;
1397         txconf = read_nic_dword(dev,TX_CONF);
1398         txconf = txconf &~ TX_LOOPBACK_MASK;
1399         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1400         write_nic_dword(dev,TX_CONF,txconf);
1401 }
1402
1403
1404 void rtl8180_tx_enable(struct net_device *dev)
1405 {
1406         u8 cmd;
1407         u8 tx_agc_ctl;
1408         u8 byte;
1409         u32 txconf;
1410         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1411         txconf= read_nic_dword(dev,TX_CONF);
1412
1413
1414         if(priv->card_8185){
1415
1416
1417                 byte = read_nic_byte(dev,CW_CONF);
1418                 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1419                 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1420                 write_nic_byte(dev, CW_CONF, byte);
1421
1422                 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1423                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1424                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1425                 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1426                 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1427                 /*
1428                 write_nic_word(dev, 0x5e, 0x01);
1429                 force_pci_posting(dev);
1430                 mdelay(1);
1431                 write_nic_word(dev, 0xfe, 0x10);
1432                 force_pci_posting(dev);
1433                 mdelay(1);
1434                 write_nic_word(dev, 0x5e, 0x00);
1435                 force_pci_posting(dev);
1436                 mdelay(1);
1437                 */
1438                 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1439         }
1440
1441         if(priv->card_8185){
1442
1443                 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1444
1445         }else{
1446
1447                 if(hwseqnum)
1448                         txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1449                 else
1450                         txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1451         }
1452
1453         txconf = txconf &~ TX_LOOPBACK_MASK;
1454         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1455         txconf = txconf &~ TCR_DPRETRY_MASK;
1456         txconf = txconf &~ TCR_RTSRETRY_MASK;
1457         txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1458         txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1459         txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1460
1461         if(priv->card_8185){
1462                 if(priv->hw_plcp_len)
1463                         txconf = txconf &~ TCR_PLCP_LEN;
1464                 else
1465                         txconf = txconf | TCR_PLCP_LEN;
1466         }else{
1467                 txconf = txconf &~ TCR_SAT;
1468         }
1469         txconf = txconf &~ TCR_MXDMA_MASK;
1470         txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1471         txconf = txconf | TCR_CWMIN;
1472         txconf = txconf | TCR_DISCW;
1473
1474 //      if(priv->ieee80211->hw_wep)
1475 //              txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1476 //      else
1477                 txconf=txconf | (1<<TX_NOICV_SHIFT);
1478
1479         write_nic_dword(dev,TX_CONF,txconf);
1480
1481
1482         fix_tx_fifo(dev);
1483
1484 #ifdef DEBUG_TX
1485         DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1486 #endif
1487
1488         cmd=read_nic_byte(dev,CMD);
1489         write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1490
1491 //      mdelay(100);
1492         write_nic_dword(dev,TX_CONF,txconf);
1493 //      #endif
1494 /*
1495         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1496         write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1497         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1498         */
1499 }
1500
1501
1502 void rtl8180_beacon_tx_enable(struct net_device *dev)
1503 {
1504         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1505
1506         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1507         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1508         write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1509         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1510 }
1511
1512
1513 void rtl8180_beacon_tx_disable(struct net_device *dev)
1514 {
1515         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1516
1517         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1518         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1519         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1520         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1521
1522 }
1523
1524
1525 void rtl8180_rtx_disable(struct net_device *dev)
1526 {
1527         u8 cmd;
1528         struct r8180_priv *priv = ieee80211_priv(dev);
1529
1530         cmd=read_nic_byte(dev,CMD);
1531         write_nic_byte(dev, CMD, cmd &~ \
1532                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1533         force_pci_posting(dev);
1534         mdelay(10);
1535         /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1536           udelay(10);
1537         */
1538
1539         if(!priv->rx_skb_complete)
1540                 dev_kfree_skb_any(priv->rx_skb);
1541 }
1542
1543 #if 0
1544 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1545 {
1546         int i;
1547         u32 *tmp;
1548         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1549
1550         priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1551                                           sizeof(u32)*8*count,
1552                                           &priv->txbeaconringdma);
1553         if (!priv->txbeaconring) return -1;
1554         for (tmp=priv->txbeaconring,i=0;i<count;i++){
1555                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1556                 /*
1557                 *(tmp+2) = (u32)dma_tmp;
1558                 *(tmp+3) = bufsize;
1559                 */
1560                 if(i+1<count)
1561                         *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1562                 else
1563                         *(tmp+4) = (u32)priv->txbeaconringdma;
1564
1565                 tmp=tmp+8;
1566         }
1567         return 0;
1568 }
1569 #endif
1570
1571 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1572                          int addr)
1573 {
1574         int i;
1575         u32 *desc;
1576         u32 *tmp;
1577         dma_addr_t dma_desc, dma_tmp;
1578         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1579         struct pci_dev *pdev = priv->pdev;
1580         void *buf;
1581
1582         if((bufsize & 0xfff) != bufsize) {
1583                 DMESGE ("TX buffer allocation too large");
1584                 return 0;
1585         }
1586         desc = (u32*)pci_alloc_consistent(pdev,
1587                                           sizeof(u32)*8*count+256, &dma_desc);
1588         if(desc==NULL) return -1;
1589         if(dma_desc & 0xff){
1590
1591                 /*
1592                  * descriptor's buffer must be 256 byte aligned
1593                  * we shouldn't be here, since we set DMA mask !
1594                  */
1595                 WARN(1, "DMA buffer is not aligned\n");
1596         }
1597         tmp=desc;
1598         for (i=0;i<count;i++)
1599         {
1600                 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1601                 if (buf == NULL) return -ENOMEM;
1602
1603                 switch(addr) {
1604 #if 0
1605                 case TX_NORMPRIORITY_RING_ADDR:
1606                         if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){
1607                                 DMESGE("Unable to allocate mem for buffer NP");
1608                                 return -ENOMEM;
1609                         }
1610                         break;
1611
1612                 case TX_LOWPRIORITY_RING_ADDR:
1613                         if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){
1614                                 DMESGE("Unable to allocate mem for buffer LP");
1615                                 return -ENOMEM;
1616                         }
1617                         break;
1618
1619                 case TX_HIGHPRIORITY_RING_ADDR:
1620                         if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1621                                 DMESGE("Unable to allocate mem for buffer HP");
1622                                 return -ENOMEM;
1623                         }
1624                         break;
1625 #else
1626                 case TX_MANAGEPRIORITY_RING_ADDR:
1627                         if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1628                                 DMESGE("Unable to allocate mem for buffer NP");
1629                                 return -ENOMEM;
1630                         }
1631                         break;
1632
1633                 case TX_BKPRIORITY_RING_ADDR:
1634                         if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1635                                 DMESGE("Unable to allocate mem for buffer LP");
1636                                 return -ENOMEM;
1637                         }
1638                         break;
1639                 case TX_BEPRIORITY_RING_ADDR:
1640                         if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1641                                 DMESGE("Unable to allocate mem for buffer NP");
1642                                 return -ENOMEM;
1643                         }
1644                         break;
1645
1646                 case TX_VIPRIORITY_RING_ADDR:
1647                         if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1648                                 DMESGE("Unable to allocate mem for buffer LP");
1649                                 return -ENOMEM;
1650                         }
1651                         break;
1652                 case TX_VOPRIORITY_RING_ADDR:
1653                         if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1654                                 DMESGE("Unable to allocate mem for buffer NP");
1655                                 return -ENOMEM;
1656                         }
1657                         break;
1658 #endif
1659                 case TX_HIGHPRIORITY_RING_ADDR:
1660                         if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1661                                 DMESGE("Unable to allocate mem for buffer HP");
1662                                 return -ENOMEM;
1663                         }
1664                         break;
1665                 case TX_BEACON_RING_ADDR:
1666                         if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1667                         DMESGE("Unable to allocate mem for buffer BP");
1668                                 return -ENOMEM;
1669                         }
1670                         break;
1671                 }
1672                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1673                 *(tmp+2) = (u32)dma_tmp;
1674                 *(tmp+3) = bufsize;
1675
1676                 if(i+1<count)
1677                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1678                 else
1679                         *(tmp+4) = (u32)dma_desc;
1680
1681                 tmp=tmp+8;
1682         }
1683
1684         switch(addr) {
1685         case TX_MANAGEPRIORITY_RING_ADDR:
1686                 priv->txmapringdma=dma_desc;
1687                 priv->txmapring=desc;
1688                 break;
1689
1690         case TX_BKPRIORITY_RING_ADDR:
1691                 priv->txbkpringdma=dma_desc;
1692                 priv->txbkpring=desc;
1693                 break;
1694
1695         case TX_BEPRIORITY_RING_ADDR:
1696                 priv->txbepringdma=dma_desc;
1697                 priv->txbepring=desc;
1698                 break;
1699
1700         case TX_VIPRIORITY_RING_ADDR:
1701                 priv->txvipringdma=dma_desc;
1702                 priv->txvipring=desc;
1703                 break;
1704
1705         case TX_VOPRIORITY_RING_ADDR:
1706                 priv->txvopringdma=dma_desc;
1707                 priv->txvopring=desc;
1708                 break;
1709
1710         case TX_HIGHPRIORITY_RING_ADDR:
1711                 priv->txhpringdma=dma_desc;
1712                 priv->txhpring=desc;
1713                 break;
1714
1715         case TX_BEACON_RING_ADDR:
1716                 priv->txbeaconringdma=dma_desc;
1717                 priv->txbeaconring=desc;
1718                 break;
1719
1720         }
1721
1722 #ifdef DEBUG_TX
1723         DMESG("Tx dma physical address: %x",dma_desc);
1724 #endif
1725
1726         return 0;
1727 }
1728
1729
1730 void free_tx_desc_rings(struct net_device *dev)
1731 {
1732
1733         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1734         struct pci_dev *pdev=priv->pdev;
1735         int count = priv->txringcount;
1736
1737         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1738                             priv->txmapring, priv->txmapringdma);
1739         buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1740
1741         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1742                             priv->txbkpring, priv->txbkpringdma);
1743         buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1744
1745         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1746                             priv->txbepring, priv->txbepringdma);
1747         buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1748
1749         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1750                             priv->txvipring, priv->txvipringdma);
1751         buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1752
1753         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1754                             priv->txvopring, priv->txvopringdma);
1755         buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1756
1757         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1758                             priv->txhpring, priv->txhpringdma);
1759         buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1760
1761         count = priv->txbeaconcount;
1762         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1763                             priv->txbeaconring, priv->txbeaconringdma);
1764         buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1765 }
1766
1767 #if 0
1768 void free_beacon_desc_ring(struct net_device *dev,int count)
1769 {
1770
1771         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1772         struct pci_dev *pdev=priv->pdev;
1773
1774         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1775                             priv->txbeaconring, priv->txbeaconringdma);
1776
1777         if (priv->beacon_buf)
1778                 pci_free_consistent(priv->pdev,
1779                         priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf);
1780
1781 }
1782 #endif
1783 void free_rx_desc_ring(struct net_device *dev)
1784 {
1785         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1786         struct pci_dev *pdev = priv->pdev;
1787
1788         int count = priv->rxringcount;
1789
1790         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1791                             priv->rxring, priv->rxringdma);
1792
1793         buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1794 }
1795
1796
1797 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1798 {
1799         int i;
1800         u32 *desc;
1801         u32 *tmp;
1802         dma_addr_t dma_desc,dma_tmp;
1803         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1804         struct pci_dev *pdev=priv->pdev;
1805         void *buf;
1806         u8 rx_desc_size;
1807
1808         rx_desc_size = 8; // 4*8 = 32 bytes
1809
1810         if((bufsize & 0xfff) != bufsize){
1811                 DMESGE ("RX buffer allocation too large");
1812                 return -1;
1813         }
1814
1815         desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1816                                           &dma_desc);
1817
1818         if(dma_desc & 0xff){
1819
1820                 /*
1821                  * descriptor's buffer must be 256 byte aligned
1822                  * should never happen since we specify the DMA mask
1823                  */
1824                 WARN(1, "DMA buffer is not aligned\n");
1825         }
1826
1827         priv->rxring=desc;
1828         priv->rxringdma=dma_desc;
1829         tmp=desc;
1830
1831         for (i=0;i<count;i++){
1832
1833                 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
1834                         DMESGE("Failed to kmalloc RX buffer");
1835                         return -1;
1836                 }
1837
1838                 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
1839                                          PCI_DMA_FROMDEVICE);
1840
1841 #ifdef DEBUG_ZERO_RX
1842                 int j;
1843                 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
1844 #endif
1845
1846                 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1847                 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
1848                            &(priv->rxbufferhead))){
1849                            DMESGE("Unable to allocate mem RX buf");
1850                            return -1;
1851                 }
1852                 *tmp = 0; //zero pads the header of the descriptor
1853                 *tmp = *tmp |( bufsize&0xfff);
1854                 *(tmp+2) = (u32)dma_tmp;
1855                 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
1856
1857 #ifdef DEBUG_RXALLOC
1858                 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
1859                       (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
1860 #endif
1861
1862                 tmp=tmp+rx_desc_size;
1863         }
1864
1865         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
1866
1867
1868 #ifdef DEBUG_RXALLOC
1869         DMESG("RX DMA physical address: %x",dma_desc);
1870 #endif
1871
1872         return 0;
1873 }
1874
1875
1876 void set_nic_rxring(struct net_device *dev)
1877 {
1878         u8 pgreg;
1879         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1880
1881         //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1882
1883         pgreg=read_nic_byte(dev, PGSELECT);
1884         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
1885
1886         //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1887
1888         write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
1889 }
1890
1891
1892 void rtl8180_reset(struct net_device *dev)
1893 {
1894         //u32 txconf = 0x80e00707; //FIXME: Make me understandable
1895         u8 cr;
1896
1897         //write_nic_dword(dev,TX_CONF,txconf);
1898
1899         rtl8180_irq_disable(dev);
1900
1901         cr=read_nic_byte(dev,CMD);
1902         cr = cr & 2;
1903         cr = cr | (1<<CMD_RST_SHIFT);
1904         write_nic_byte(dev,CMD,cr);
1905
1906         force_pci_posting(dev);
1907
1908         mdelay(200);
1909
1910         if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
1911                 DMESGW("Card reset timeout!");
1912         else
1913                 DMESG("Card successfully reset");
1914
1915 //#ifndef CONFIG_RTL8185B
1916         rtl8180_set_mode(dev,EPROM_CMD_LOAD);
1917         force_pci_posting(dev);
1918         mdelay(200);
1919 //#endif
1920 }
1921
1922 inline u16 ieeerate2rtlrate(int rate)
1923 {
1924         switch(rate){
1925         case 10:
1926         return 0;
1927         case 20:
1928         return 1;
1929         case 55:
1930         return 2;
1931         case 110:
1932         return 3;
1933         case 60:
1934         return 4;
1935         case 90:
1936         return 5;
1937         case 120:
1938         return 6;
1939         case 180:
1940         return 7;
1941         case 240:
1942         return 8;
1943         case 360:
1944         return 9;
1945         case 480:
1946         return 10;
1947         case 540:
1948         return 11;
1949         default:
1950         return 3;
1951
1952         }
1953 }
1954
1955 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
1956 inline u16 rtl8180_rate2rate(short rate)
1957 {
1958         if (rate >12) return 10;
1959         return rtl_rate[rate];
1960 }
1961 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1962 {
1963         if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1964                 return 1;
1965         else return 0;
1966 }
1967 u16 N_DBPSOfRate(u16 DataRate);
1968 u16 ComputeTxTime(
1969         u16             FrameLength,
1970         u16             DataRate,
1971         u8              bManagementFrame,
1972         u8              bShortPreamble
1973 )
1974 {
1975         u16     FrameTime;
1976         u16     N_DBPS;
1977         u16     Ceiling;
1978
1979         if( rtl8180_IsWirelessBMode(DataRate) )
1980         {
1981                 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1982                 {       // long preamble
1983                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1984                 }
1985                 else
1986                 {       // Short preamble
1987                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1988                 }
1989                 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1990                                 FrameTime ++;
1991         } else {        //802.11g DSSS-OFDM PLCP length field calculation.
1992                 N_DBPS = N_DBPSOfRate(DataRate);
1993                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1994                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1995                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1996         }
1997         return FrameTime;
1998 }
1999 u16 N_DBPSOfRate(u16 DataRate)
2000 {
2001          u16 N_DBPS = 24;
2002
2003          switch(DataRate)
2004          {
2005          case 60:
2006           N_DBPS = 24;
2007           break;
2008
2009          case 90:
2010           N_DBPS = 36;
2011           break;
2012
2013          case 120:
2014           N_DBPS = 48;
2015           break;
2016
2017          case 180:
2018           N_DBPS = 72;
2019           break;
2020
2021          case 240:
2022           N_DBPS = 96;
2023           break;
2024
2025          case 360:
2026           N_DBPS = 144;
2027           break;
2028
2029          case 480:
2030           N_DBPS = 192;
2031           break;
2032
2033          case 540:
2034           N_DBPS = 216;
2035           break;
2036
2037          default:
2038           break;
2039          }
2040
2041          return N_DBPS;
2042 }
2043
2044 //{by amy 080312
2045 //
2046 //      Description:
2047 //      For Netgear case, they want good-looking singal strength.
2048 //              2004.12.05, by rcnjko.
2049 //
2050 long
2051 NetgearSignalStrengthTranslate(
2052         long LastSS,
2053         long CurrSS
2054         )
2055 {
2056         long RetSS;
2057
2058         // Step 1. Scale mapping.
2059         if(CurrSS >= 71 && CurrSS <= 100)
2060         {
2061                 RetSS = 90 + ((CurrSS - 70) / 3);
2062         }
2063         else if(CurrSS >= 41 && CurrSS <= 70)
2064         {
2065                 RetSS = 78 + ((CurrSS - 40) / 3);
2066         }
2067         else if(CurrSS >= 31 && CurrSS <= 40)
2068         {
2069                 RetSS = 66 + (CurrSS - 30);
2070         }
2071         else if(CurrSS >= 21 && CurrSS <= 30)
2072         {
2073                 RetSS = 54 + (CurrSS - 20);
2074         }
2075         else if(CurrSS >= 5 && CurrSS <= 20)
2076         {
2077                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2078         }
2079         else if(CurrSS == 4)
2080         {
2081                 RetSS = 36;
2082         }
2083         else if(CurrSS == 3)
2084         {
2085                 RetSS = 27;
2086         }
2087         else if(CurrSS == 2)
2088         {
2089                 RetSS = 18;
2090         }
2091         else if(CurrSS == 1)
2092         {
2093                 RetSS = 9;
2094         }
2095         else
2096         {
2097                 RetSS = CurrSS;
2098         }
2099         //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2100
2101         // Step 2. Smoothing.
2102         if(LastSS > 0)
2103         {
2104                 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
2105         }
2106         //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2107
2108         return RetSS;
2109 }
2110 //
2111 //      Description:
2112 //              Translate 0-100 signal strength index into dBm.
2113 //
2114 long
2115 TranslateToDbm8185(
2116         u8 SignalStrengthIndex  // 0-100 index.
2117         )
2118 {
2119         long    SignalPower; // in dBm.
2120
2121         // Translate to dBm (x=0.5y-95).
2122         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
2123         SignalPower -= 95;
2124
2125         return SignalPower;
2126 }
2127 //
2128 //      Description:
2129 //              Perform signal smoothing for dynamic mechanism.
2130 //              This is different with PerformSignalSmoothing8185 in smoothing fomula.
2131 //              No dramatic adjustion is apply because dynamic mechanism need some degree
2132 //              of correctness. Ported from 8187B.
2133 //      2007-02-26, by Bruce.
2134 //
2135 void
2136 PerformUndecoratedSignalSmoothing8185(
2137         struct r8180_priv *priv,
2138         bool    bCckRate
2139         )
2140 {
2141
2142
2143         // Determin the current packet is CCK rate.
2144         priv->bCurCCKPkt = bCckRate;
2145
2146         if(priv->UndecoratedSmoothedSS >= 0)
2147         {
2148                 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
2149         }
2150         else
2151         {
2152                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
2153         }
2154
2155         priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
2156
2157 //      printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
2158 //      printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
2159
2160         //if(priv->CurCCKRSSI >= 0 && bCckRate)
2161         if(bCckRate)
2162         {
2163                 priv->CurCCKRSSI = priv->RSSI;
2164         }
2165         else
2166         {
2167                 priv->CurCCKRSSI = 0;
2168         }
2169
2170         // Boundary checking.
2171         // TODO: The overflow condition does happen, if we want to fix,
2172         // we shall recalculate thresholds first.
2173         if(priv->UndecoratedSmoothedSS > 100)
2174         {
2175 //              printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2176         }
2177         if(priv->UndecoratedSmoothedSS < 0)
2178         {
2179 //              printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2180         }
2181
2182 }
2183
2184 //by amy 080312}
2185
2186 /* This is rough RX isr handling routine*/
2187 void rtl8180_rx(struct net_device *dev)
2188 {
2189         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2190         struct sk_buff *tmp_skb;
2191
2192         //struct sk_buff *skb;
2193         short first,last;
2194         u32 len;
2195         int lastlen;
2196         unsigned char quality, signal;
2197         u8 rate;
2198         //u32 *prism_hdr;
2199         u32 *tmp,*tmp2;
2200         u8 rx_desc_size;
2201         u8 padding;
2202         //u32 count=0;
2203         char rxpower = 0;
2204         u32 RXAGC = 0;
2205         long RxAGC_dBm = 0;
2206         u8      LNA=0, BB=0;
2207         u8      LNA_gain[4]={02, 17, 29, 39};
2208         u8  Antenna = 0;
2209         struct ieee80211_hdr *hdr;//by amy
2210         u16 fc,type;
2211         u8 bHwError = 0,bCRC = 0,bICV = 0;
2212         //bHwError = 0;
2213         //bCRC = 0;
2214         //bICV = 0;
2215         bool    bCckRate = false;
2216         u8     RSSI = 0;
2217         long    SignalStrengthIndex = 0;//+by amy 080312
2218 //      u8 SignalStrength = 0;
2219         struct ieee80211_rx_stats stats = {
2220                 .signal = 0,
2221                 .noise = -98,
2222                 .rate = 0,
2223         //      .mac_time = jiffies,
2224                 .freq = IEEE80211_24GHZ_BAND,
2225         };
2226
2227         stats.nic_type = NIC_8185B;
2228         rx_desc_size = 8;
2229
2230         //printk("receive frame!%d\n",count++);
2231         //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2232         //else {
2233
2234         if ((*(priv->rxringtail)) & (1<<31)) {
2235
2236                 /* we have got an RX int, but the descriptor
2237                  * we are pointing is empty*/
2238
2239                 priv->stats.rxnodata++;
2240                 priv->ieee80211->stats.rx_errors++;
2241
2242         /*      if (! *(priv->rxring) & (1<<31)) {
2243
2244                         priv->stats.rxreset++;
2245                         priv->rxringtail=priv->rxring;
2246                         priv->rxbuffer=priv->rxbufferhead;
2247
2248                 }else{*/
2249
2250                 #if 0
2251                 /* Maybe it is possible that the NIC has skipped some descriptors or
2252                  * it has reset its internal pointer to the beginning of the ring
2253                  * we search for the first filled descriptor in the ring, or we break
2254                  * putting again the pointer in the old location if we do not found any.
2255                  * This is quite dangerous, what does happen if the nic writes
2256                  * two descriptor (say A and B) when we have just checked the descriptor
2257                  * A and we are going to check the descriptor B..This might happen if the
2258                  * interrupt was dummy, there was not really filled descriptors and
2259                  * the NIC didn't lose pointer
2260                  */
2261
2262                 //priv->stats.rxwrkaround++;
2263
2264                 tmp = priv->rxringtail;
2265                 while (*(priv->rxringtail) & (1<<31)){
2266
2267                         priv->rxringtail+=4;
2268
2269                         if(priv->rxringtail >=
2270                                 (priv->rxring)+(priv->rxringcount )*4)
2271                                 priv->rxringtail=priv->rxring;
2272
2273                         priv->rxbuffer=(priv->rxbuffer->next);
2274
2275                         if(priv->rxringtail == tmp ){
2276                                 //DMESG("EE: Could not find RX pointer");
2277                                 priv->stats.rxnopointer++;
2278                                 break;
2279                         }
2280                 }
2281                 #else
2282
2283                 tmp2 = NULL;
2284                 tmp = priv->rxringtail;
2285                 do{
2286                         if(tmp == priv->rxring)
2287                                 //tmp  = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2288                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2289                         else
2290                                 tmp -= rx_desc_size;
2291
2292                         if(! (*tmp & (1<<31)))
2293                                 tmp2 = tmp;
2294                 }while(tmp != priv->rxring);
2295
2296                 if(tmp2) priv->rxringtail = tmp2;
2297                 #endif
2298                 //}
2299         }
2300
2301         /* while there are filled descriptors */
2302         while(!(*(priv->rxringtail) & (1<<31))){
2303                 if(*(priv->rxringtail) & (1<<26))
2304                         DMESGW("RX buffer overflow");
2305                 if(*(priv->rxringtail) & (1<<12))
2306                         priv->stats.rxicverr++;
2307
2308                 if(*(priv->rxringtail) & (1<<27)){
2309                         priv->stats.rxdmafail++;
2310                         //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2311                         goto drop;
2312                 }
2313
2314                 pci_dma_sync_single_for_cpu(priv->pdev,
2315                                     priv->rxbuffer->dma,
2316                                     priv->rxbuffersize * \
2317                                     sizeof(u8),
2318                                     PCI_DMA_FROMDEVICE);
2319
2320                 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2321                 if(first) priv->rx_prevlen=0;
2322
2323                 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2324                 if(last){
2325                         lastlen=((*priv->rxringtail) &0xfff);
2326
2327                         /* if the last descriptor (that should
2328                          * tell us the total packet len) tell
2329                          * us something less than the descriptors
2330                          * len we had until now, then there is some
2331                          * problem..
2332                          * workaround to prevent kernel panic
2333                          */
2334                         if(lastlen < priv->rx_prevlen)
2335                                 len=0;
2336                         else
2337                                 len=lastlen-priv->rx_prevlen;
2338
2339                         if(*(priv->rxringtail) & (1<<13)) {
2340 //lastlen=((*priv->rxringtail) &0xfff);
2341                                 if ((*(priv->rxringtail) & 0xfff) <500)
2342                                         priv->stats.rxcrcerrmin++;
2343                                 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2344                                         priv->stats.rxcrcerrmax++;
2345                                 else
2346                                         priv->stats.rxcrcerrmid++;
2347
2348                         }
2349
2350                 }else{
2351                         len = priv->rxbuffersize;
2352                 }
2353
2354                 if(first && last) {
2355                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2356                 }else if(first) {
2357                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2358                         if(padding) {
2359                                 len -= 2;
2360                         }
2361                 }else {
2362                         padding = 0;
2363                 }
2364                padding = 0;
2365                 priv->rx_prevlen+=len;
2366
2367                 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2368                         /* HW is probably passing several buggy frames
2369                         * without FD or LD flag set.
2370                         * Throw this garbage away to prevent skb
2371                         * memory exausting
2372                         */
2373                         if(!priv->rx_skb_complete)
2374                                 dev_kfree_skb_any(priv->rx_skb);
2375                         priv->rx_skb_complete = 1;
2376                 }
2377
2378 #ifdef DEBUG_RX_FRAG
2379                 DMESG("Iteration.. len %x",len);
2380                 if(first) DMESG ("First descriptor");
2381                 if(last) DMESG("Last descriptor");
2382
2383 #endif
2384 #ifdef DEBUG_RX_VERBOSE
2385                 print_buffer( priv->rxbuffer->buf, len);
2386 #endif
2387
2388                 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2389                 signal=(signal&0xfe)>>1;        // Modify by hikaru 6.6
2390
2391                 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2392
2393                 stats.mac_time[0] = *(priv->rxringtail+1);
2394                 stats.mac_time[1] = *(priv->rxringtail+2);
2395                 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2396                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2397
2398                 rate=((*(priv->rxringtail)) &
2399                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2400
2401                 stats.rate = rtl8180_rate2rate(rate);
2402                 //DMESG("%d",rate);
2403                 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2404 //              printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2405 //by amy for antenna
2406                 if(!rtl8180_IsWirelessBMode(stats.rate))
2407                 { // OFDM rate.
2408
2409                         RxAGC_dBm = rxpower+1;  //bias
2410                 }
2411                 else
2412                 { // CCK rate.
2413                         RxAGC_dBm = signal;//bit 0 discard
2414
2415                         LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2416                         BB  = (u8) (RxAGC_dBm & 0x1F);  // bit 4 ~ bit 0
2417
2418                         RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2419
2420                         RxAGC_dBm +=4; //bias
2421                 }
2422
2423                 if(RxAGC_dBm & 0x80) //absolute value
2424                         RXAGC= ~(RxAGC_dBm)+1;
2425                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2426                 // Translate RXAGC into 1-100.
2427                 if(!rtl8180_IsWirelessBMode(stats.rate))
2428                 { // OFDM rate.
2429                         if(RXAGC>90)
2430                                 RXAGC=90;
2431                         else if(RXAGC<25)
2432                                 RXAGC=25;
2433                         RXAGC=(90-RXAGC)*100/65;
2434                 }
2435                 else
2436                 { // CCK rate.
2437                         if(RXAGC>95)
2438                                 RXAGC=95;
2439                         else if(RXAGC<30)
2440                                 RXAGC=30;
2441                         RXAGC=(95-RXAGC)*100/65;
2442                 }
2443                 priv->SignalStrength = (u8)RXAGC;
2444                 priv->RecvSignalPower = RxAGC_dBm ;  // It can use directly by SD3 CMLin
2445                 priv->RxPower = rxpower;
2446                 priv->RSSI = RSSI;
2447 //{by amy 080312
2448                 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2449                 if(quality >= 127)
2450                         quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2451                 else if(quality < 27)
2452                         quality = 100;
2453                 else
2454                         quality = 127 - quality;
2455                 priv->SignalQuality = quality;
2456                 if(!priv->card_8185)
2457                         printk("check your card type\n");
2458
2459                 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2460                 stats.signalstrength = RXAGC;
2461                 if(stats.signalstrength > 100)
2462                         stats.signalstrength = 100;
2463                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2464         //      printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2465                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2466                 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2467 //by amy 080312}
2468                 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2469                         | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2470                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2471                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2472             hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2473                     fc = le16_to_cpu(hdr->frame_ctl);
2474                 type = WLAN_FC_GET_TYPE(fc);
2475
2476                         if((IEEE80211_FTYPE_CTL != type) &&
2477                                 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2478                                  && (!bHwError) && (!bCRC)&& (!bICV))
2479                         {
2480 //by amy 080312
2481                                 // Perform signal smoothing for dynamic mechanism on demand.
2482                                 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2483                                 // No dramatic adjustion is apply because dynamic mechanism need some degree
2484                                 // of correctness. 2007.01.23, by shien chang.
2485                                 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2486                                 //
2487                                 // For good-looking singal strength.
2488                                 //
2489                                 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2490                                                                 priv->LastSignalStrengthInPercent,
2491                                                                 priv->SignalStrength);
2492
2493                                 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2494                                 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2495                 //
2496                 // We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
2497                 // so we record the correct power here.
2498                 //
2499                                 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2500                                 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2501
2502                 // Figure out which antenna that received the lasted packet.
2503                                 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2504 //by amy 080312
2505                             SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2506                         }
2507
2508 //by amy for antenna
2509
2510
2511
2512
2513
2514
2515 #ifndef DUMMY_RX
2516                 if(first){
2517                         if(!priv->rx_skb_complete){
2518                                 /* seems that HW sometimes fails to reiceve and
2519                                    doesn't provide the last descriptor */
2520 #ifdef DEBUG_RX_SKB
2521                                 DMESG("going to free incomplete skb");
2522 #endif
2523                                 dev_kfree_skb_any(priv->rx_skb);
2524                                 priv->stats.rxnolast++;
2525 #ifdef DEBUG_RX_SKB
2526                                 DMESG("free incomplete skb OK");
2527 #endif
2528                         }
2529                         /* support for prism header has been originally added by Christian */
2530                         if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2531
2532 #if 0
2533                                 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE);
2534                                 if(! priv->rx_skb) goto drop;
2535
2536                                 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE);
2537                                 prism_hdr[0]=htonl(0x80211001);        //version
2538                                 prism_hdr[1]=htonl(0x40);              //length
2539                                 prism_hdr[2]=htonl(stats.mac_time[1]);    //mactime (HIGH)
2540                                 prism_hdr[3]=htonl(stats.mac_time[0]);    //mactime (LOW)
2541                                 rdtsc(prism_hdr[5], prism_hdr[4]);         //hostime (LOW+HIGH)
2542                                 prism_hdr[4]=htonl(prism_hdr[4]);          //Byte-Order aendern
2543                                 prism_hdr[5]=htonl(prism_hdr[5]);          //Byte-Order aendern
2544                                 prism_hdr[6]=0x00;                     //phytype
2545                                 prism_hdr[7]=htonl(priv->chan);        //channel
2546                                 prism_hdr[8]=htonl(stats.rate);        //datarate
2547                                 prism_hdr[9]=0x00;                     //antenna
2548                                 prism_hdr[10]=0x00;                    //priority
2549                                 prism_hdr[11]=0x00;                    //ssi_type
2550                                 prism_hdr[12]=htonl(stats.signal);     //ssi_signal
2551                                 prism_hdr[13]=htonl(stats.noise);      //ssi_noise
2552                                 prism_hdr[14]=0x00;                    //preamble
2553                                 prism_hdr[15]=0x00;                    //encoding
2554
2555 #endif
2556                         }else{
2557                                 priv->rx_skb = dev_alloc_skb(len+2);
2558                                 if( !priv->rx_skb) goto drop;
2559 #ifdef DEBUG_RX_SKB
2560                                 DMESG("Alloc initial skb %x",len+2);
2561 #endif
2562                         }
2563
2564                         priv->rx_skb_complete=0;
2565                         priv->rx_skb->dev=dev;
2566                 }else{
2567                         /* if we are here we should  have already RXed
2568                         * the first frame.
2569                         * If we get here and the skb is not allocated then
2570                         * we have just throw out garbage (skb not allocated)
2571                         * and we are still rxing garbage....
2572                         */
2573                         if(!priv->rx_skb_complete){
2574
2575                                 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2576
2577                                 if(!tmp_skb) goto drop;
2578
2579                                 tmp_skb->dev=dev;
2580 #ifdef DEBUG_RX_SKB
2581                                 DMESG("Realloc skb %x",len+2);
2582 #endif
2583
2584 #ifdef DEBUG_RX_SKB
2585                                 DMESG("going copy prev frag %x",priv->rx_skb->len);
2586 #endif
2587                                 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2588                                         priv->rx_skb->data,
2589                                         priv->rx_skb->len);
2590 #ifdef DEBUG_RX_SKB
2591                                 DMESG("skb copy prev frag complete");
2592 #endif
2593
2594                                 dev_kfree_skb_any(priv->rx_skb);
2595 #ifdef DEBUG_RX_SKB
2596                                 DMESG("prev skb free ok");
2597 #endif
2598
2599                                 priv->rx_skb=tmp_skb;
2600                         }
2601                 }
2602 #ifdef DEBUG_RX_SKB
2603                 DMESG("going to copy current payload %x",len);
2604 #endif
2605                 if(!priv->rx_skb_complete) {
2606                         if(padding) {
2607                                 memcpy(skb_put(priv->rx_skb,len),
2608                                         (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2609                         } else {
2610                                 memcpy(skb_put(priv->rx_skb,len),
2611                                         priv->rxbuffer->buf,len);
2612                         }
2613                 }
2614 #ifdef DEBUG_RX_SKB
2615                 DMESG("current fragment skb copy complete");
2616 #endif
2617
2618                 if(last && !priv->rx_skb_complete){
2619
2620 #ifdef DEBUG_RX_SKB
2621                         DMESG("Got last fragment");
2622 #endif
2623
2624                         if(priv->rx_skb->len > 4)
2625                                 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2626 #ifdef DEBUG_RX_SKB
2627                         DMESG("yanked out crc, passing to the upper layer");
2628 #endif
2629
2630 #ifndef RX_DONT_PASS_UL
2631                         if(!ieee80211_rx(priv->ieee80211,
2632                                          priv->rx_skb, &stats)){
2633 #ifdef DEBUG_RX
2634                                 DMESGW("Packet not consumed");
2635 #endif
2636 #endif // RX_DONT_PASS_UL
2637
2638                                 dev_kfree_skb_any(priv->rx_skb);
2639 #ifndef RX_DONT_PASS_UL
2640                         }
2641 #endif
2642 #ifdef DEBUG_RX
2643                         else{
2644                                         DMESG("Rcv frag");
2645                         }
2646 #endif
2647                         priv->rx_skb_complete=1;
2648                 }
2649
2650 #endif //DUMMY_RX
2651
2652                 pci_dma_sync_single_for_device(priv->pdev,
2653                                     priv->rxbuffer->dma,
2654                                     priv->rxbuffersize * \
2655                                     sizeof(u8),
2656                                     PCI_DMA_FROMDEVICE);
2657
2658
2659 drop: // this is used when we have not enought mem
2660
2661                 /* restore the descriptor */
2662                 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2663                 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2664                 *(priv->rxringtail)=
2665                         *(priv->rxringtail) | priv->rxbuffersize;
2666
2667                 *(priv->rxringtail)=
2668                         *(priv->rxringtail) | (1<<31);
2669                         //^empty descriptor
2670
2671                         //wmb();
2672
2673 #ifdef DEBUG_RX
2674                 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2675 #endif
2676                 //unsigned long flags;
2677                 //spin_lock_irqsave(&priv->irq_lock,flags);
2678
2679                 priv->rxringtail+=rx_desc_size;
2680                 if(priv->rxringtail >=
2681                    (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2682                         priv->rxringtail=priv->rxring;
2683
2684                 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2685
2686
2687                 priv->rxbuffer=(priv->rxbuffer->next);
2688
2689         }
2690
2691
2692
2693 //      if(get_curr_tx_free_desc(dev,priority))
2694 //      ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2695
2696
2697
2698 }
2699
2700
2701 void rtl8180_dma_kick(struct net_device *dev, int priority)
2702 {
2703         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2704
2705         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2706 /*
2707
2708         switch(priority){
2709
2710                 case LOW_PRIORITY:
2711
2712                 write_nic_byte(dev,TX_DMA_POLLING,
2713                        (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2714                                 priv->dma_poll_mask);
2715                 break;
2716
2717                 case NORM_PRIORITY:
2718
2719                 write_nic_byte(dev,TX_DMA_POLLING,
2720                        (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2721                                 priv->dma_poll_mask);
2722                 break;
2723
2724                 case HI_PRIORITY:
2725
2726                 write_nic_byte(dev,TX_DMA_POLLING,
2727                        (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2728                                 priv->dma_poll_mask);
2729                 break;
2730
2731         }
2732 */
2733         write_nic_byte(dev, TX_DMA_POLLING,
2734                         (1 << (priority + 1)) | priv->dma_poll_mask);
2735         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2736
2737         force_pci_posting(dev);
2738 }
2739
2740 #if 0
2741 void rtl8180_tx_queues_stop(struct net_device *dev)
2742 {
2743         //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2744         u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2745         dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2746         dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2747         dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2748
2749         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2750         write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2751         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2752 }
2753 #endif
2754
2755 void rtl8180_data_hard_stop(struct net_device *dev)
2756 {
2757         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2758
2759         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2760         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2761         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2762         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2763 }
2764
2765
2766 void rtl8180_data_hard_resume(struct net_device *dev)
2767 {
2768         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2769
2770         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2771         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2772         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2773         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2774 }
2775
2776
2777 /* this function TX data frames when the ieee80211 stack requires this.
2778  * It checks also if we need to stop the ieee tx queue, eventually do it
2779  */
2780 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2781 rate)
2782 {
2783         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2784         int mode;
2785         struct ieee80211_hdr_3addr  *h = (struct ieee80211_hdr_3addr  *) skb->data;
2786         short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2787         unsigned long flags;
2788         int priority;
2789         //static int count = 0;
2790
2791         mode = priv->ieee80211->iw_mode;
2792
2793         rate = ieeerate2rtlrate(rate);
2794         /*
2795         * This function doesn't require lock because we make
2796         * sure it's called with the tx_lock already acquired.
2797         * this come from the kernel's hard_xmit callback (trought
2798         * the ieee stack, or from the try_wake_queue (again trought
2799         * the ieee stack.
2800         */
2801         priority = AC2Q(skb->priority);
2802         spin_lock_irqsave(&priv->tx_lock,flags);
2803
2804         if(priv->ieee80211->bHwRadioOff)
2805         {
2806                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2807
2808                 return;
2809         }
2810
2811         //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
2812         if (!check_nic_enought_desc(dev, priority)){
2813                 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
2814                 //      get_curr_tx_free_desc(dev, priority));
2815                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
2816                         get_curr_tx_free_desc(dev, priority));
2817         //printk(KERN_WARNING "==============================================================> \n");
2818                 ieee80211_stop_queue(priv->ieee80211);
2819         }
2820         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
2821         if (!check_nic_enought_desc(dev, priority))
2822                 ieee80211_stop_queue(priv->ieee80211);
2823
2824         //dev_kfree_skb_any(skb);
2825         spin_unlock_irqrestore(&priv->tx_lock,flags);
2826
2827 }
2828
2829 /* This is a rough attempt to TX a frame
2830  * This is called by the ieee 80211 stack to TX management frames.
2831  * If the ring is full packet are dropped (for data frame the queue
2832  * is stopped before this can happen). For this reason it is better
2833  * if the descriptors are larger than the largest management frame
2834  * we intend to TX: i'm unsure what the HW does if it will not found
2835  * the last fragment of a frame because it has been dropped...
2836  * Since queues for Management and Data frames are different we
2837  * might use a different lock than tx_lock (for example mgmt_tx_lock)
2838  */
2839 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
2840 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
2841 {
2842         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2843
2844         unsigned long flags;
2845
2846         int priority;
2847
2848         priority = MANAGE_PRIORITY;
2849
2850         spin_lock_irqsave(&priv->tx_lock,flags);
2851
2852         if(priv->ieee80211->bHwRadioOff)
2853         {
2854                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2855
2856                 dev_kfree_skb_any(skb);
2857                 return NETDEV_TX_OK;
2858         }
2859
2860         rtl8180_tx(dev, skb->data, skb->len, priority,
2861                 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
2862
2863         priv->ieee80211->stats.tx_bytes+=skb->len;
2864         priv->ieee80211->stats.tx_packets++;
2865         spin_unlock_irqrestore(&priv->tx_lock,flags);
2866
2867         dev_kfree_skb_any(skb);
2868         return NETDEV_TX_OK;
2869 }
2870
2871 // longpre 144+48 shortpre 72+24
2872 u16 rtl8180_len2duration(u32 len, short rate,short* ext)
2873 {
2874         u16 duration;
2875         u16 drift;
2876         *ext=0;
2877
2878         switch(rate){
2879         case 0://1mbps
2880                 *ext=0;
2881                 duration = ((len+4)<<4) /0x2;
2882                 drift = ((len+4)<<4) % 0x2;
2883                 if(drift ==0 ) break;
2884                 duration++;
2885                 break;
2886
2887         case 1://2mbps
2888                 *ext=0;
2889                 duration = ((len+4)<<4) /0x4;
2890                 drift = ((len+4)<<4) % 0x4;
2891                 if(drift ==0 ) break;
2892                 duration++;
2893                 break;
2894
2895         case 2: //5.5mbps
2896                 *ext=0;
2897                 duration = ((len+4)<<4) /0xb;
2898                 drift = ((len+4)<<4) % 0xb;
2899                 if(drift ==0 )
2900                         break;
2901                 duration++;
2902                 break;
2903
2904         default:
2905         case 3://11mbps
2906                 *ext=0;
2907                 duration = ((len+4)<<4) /0x16;
2908                 drift = ((len+4)<<4) % 0x16;
2909                 if(drift ==0 )
2910                         break;
2911                 duration++;
2912                 if(drift > 6)
2913                         break;
2914                 *ext=1;
2915                 break;
2916         }
2917
2918         return duration;
2919 }
2920
2921
2922 void rtl8180_prepare_beacon(struct net_device *dev)
2923 {
2924
2925         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2926
2927         struct sk_buff *skb;
2928
2929         u16 word  = read_nic_word(dev, BcnItv);
2930         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
2931         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
2932         write_nic_word(dev, BcnItv, word);
2933
2934
2935         skb = ieee80211_get_beacon(priv->ieee80211);
2936         if(skb){
2937                 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
2938                         0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
2939                 dev_kfree_skb_any(skb);
2940         }
2941         #if 0
2942         //DMESG("size %x",len);
2943         if(*tail & (1<<31)){
2944
2945                 //DMESG("No more beacon TX desc");
2946                 return ;
2947
2948         }
2949         //while(! (*tail & (1<<31))){
2950                 *tail= 0; // zeroes header
2951
2952                 *tail = *tail| (1<<29) ; //fist segment of the packet
2953                 *tail = (*tail) | (1<<28); // last segment
2954         //      *tail = *tail | (1<<18); // this is  a beacon frame
2955                 *(tail+3)=*(tail+3) &~ 0xfff;
2956                 *(tail+3)=*(tail+3) | len; // buffer lenght
2957                 *tail = *tail |len;
2958                 // zeroes the second 32-bits dword of the descriptor
2959                 *(tail+1)= 0;
2960                 *tail = *tail | (rate << 24);
2961
2962                         duration = rtl8180_len2duration(len,rate,&ext);
2963
2964                 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2965
2966                 *tail = *tail | (1<<31);
2967                 //^ descriptor ready to be txed
2968                 if((tail - begin)/8 == priv->txbeaconcount-1)
2969                         tail=begin;
2970                 else
2971                         tail=tail+8;
2972         //}
2973 #endif
2974 }
2975
2976 /* This function do the real dirty work: it enqueues a TX command
2977  * descriptor in the ring buffer, copyes the frame in a TX buffer
2978  * and kicks the NIC to ensure it does the DMA transfer.
2979  */
2980 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2981                  short morefrag, short descfrag, int rate)
2982 {
2983         struct r8180_priv *priv = ieee80211_priv(dev);
2984         u32 *tail,*temp_tail;
2985         u32 *begin;
2986         u32 *buf;
2987         int i;
2988         int remain;
2989         int buflen;
2990         int count;
2991         //u16   AckCtsTime;
2992         //u16   FrameTime;
2993         u16 duration;
2994         short ext;
2995         struct buffer* buflist;
2996         //unsigned long flags;
2997         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
2998         u8 dest[ETH_ALEN];
2999         u8                      bUseShortPreamble = 0;
3000         u8                      bCTSEnable = 0;
3001         u8                      bRTSEnable = 0;
3002         //u16                   RTSRate = 22;
3003         //u8                    RetryLimit = 0;
3004         u16                     Duration = 0;
3005         u16                     RtsDur = 0;
3006         u16                     ThisFrameTime = 0;
3007         u16                     TxDescDuration = 0;
3008         u8                      ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
3009
3010         switch(priority) {
3011         case MANAGE_PRIORITY:
3012                 tail=priv->txmapringtail;
3013                 begin=priv->txmapring;
3014                 buflist = priv->txmapbufstail;
3015                 count = priv->txringcount;
3016                 break;
3017
3018         case BK_PRIORITY:
3019                 tail=priv->txbkpringtail;
3020                 begin=priv->txbkpring;
3021                 buflist = priv->txbkpbufstail;
3022                 count = priv->txringcount;
3023                 break;
3024
3025         case BE_PRIORITY:
3026                 tail=priv->txbepringtail;
3027                 begin=priv->txbepring;
3028                 buflist = priv->txbepbufstail;
3029                 count = priv->txringcount;
3030                 break;
3031
3032         case VI_PRIORITY:
3033                 tail=priv->txvipringtail;
3034                 begin=priv->txvipring;
3035                 buflist = priv->txvipbufstail;
3036                 count = priv->txringcount;
3037                 break;
3038
3039         case VO_PRIORITY:
3040                 tail=priv->txvopringtail;
3041                 begin=priv->txvopring;
3042                 buflist = priv->txvopbufstail;
3043                 count = priv->txringcount;
3044                 break;
3045
3046         case HI_PRIORITY:
3047                 tail=priv->txhpringtail;
3048                 begin=priv->txhpring;
3049                 buflist = priv->txhpbufstail;
3050                 count = priv->txringcount;
3051                 break;
3052
3053         case BEACON_PRIORITY:
3054                 tail=priv->txbeaconringtail;
3055                 begin=priv->txbeaconring;
3056                 buflist = priv->txbeaconbufstail;
3057                 count = priv->txbeaconcount;
3058                 break;
3059
3060         default:
3061                 return -1;
3062                 break;
3063         }
3064
3065         //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
3066 #if 1
3067                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
3068                 if (is_multicast_ether_addr(dest) ||
3069                                 is_broadcast_ether_addr(dest))
3070                 {
3071                         Duration = 0;
3072                         RtsDur = 0;
3073                         bRTSEnable = 0;
3074                         bCTSEnable = 0;
3075
3076                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3077                         TxDescDuration = ThisFrameTime;
3078                 } else {// Unicast packet
3079                         //u8 AckRate;
3080                         u16 AckTime;
3081
3082                         //YJ,add,080828,for Keep alive
3083                         priv->NumTxUnicast++;
3084
3085                         // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
3086                         //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
3087                         // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
3088                         //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
3089                         //For simplicity, just use the 1M basic rate
3090                         //AckTime = ComputeTxTime(14, 540,0, 0);        // AckCTSLng = 14 use 1M bps send
3091                         AckTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
3092                         //AckTime = ComputeTxTime(14, 2,false, false);  // AckCTSLng = 14 use 1M bps send
3093
3094                         if ( ((len + sCrcLng) > priv->rts) && priv->rts )
3095                         { // RTS/CTS.
3096                                 u16 RtsTime, CtsTime;
3097                                 //u16 CtsRate;
3098                                 bRTSEnable = 1;
3099                                 bCTSEnable = 0;
3100
3101                                 // Rate and time required for RTS.
3102                                 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
3103                                 // Rate and time required for CTS.
3104                                 CtsTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
3105
3106                                 // Figure out time required to transmit this frame.
3107                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
3108                                                 rtl8180_rate2rate(rate),
3109                                                 0,
3110                                                 bUseShortPreamble);
3111
3112                                 // RTS-CTS-ThisFrame-ACK.
3113                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
3114
3115                                 TxDescDuration = RtsTime + RtsDur;
3116                         }
3117                         else {// Normal case.
3118                                 bCTSEnable = 0;
3119                                 bRTSEnable = 0;
3120                                 RtsDur = 0;
3121
3122                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3123                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
3124                         }
3125
3126                         if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
3127                                 // ThisFrame-ACK.
3128                                 Duration = aSifsTime + AckTime;
3129                         } else { // One or more fragments remained.
3130                                 u16 NextFragTime;
3131                                 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
3132                                                 rtl8180_rate2rate(rate),
3133                                                 0,
3134                                                 bUseShortPreamble );
3135
3136                                 //ThisFrag-ACk-NextFrag-ACK.
3137                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
3138                         }
3139
3140                 } // End of Unicast packet
3141
3142                 frag_hdr->duration_id = Duration;
3143 #endif
3144
3145         buflen=priv->txbuffsize;
3146         remain=len;
3147         temp_tail = tail;
3148 //printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
3149         while(remain!=0){
3150 #ifdef DEBUG_TX_FRAG
3151                 DMESG("TX iteration");
3152 #endif
3153 #ifdef DEBUG_TX
3154                 DMESG("TX: filling descriptor %x",(u32)tail);
3155 #endif
3156                 mb();
3157                 if(!buflist){
3158                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
3159                         //spin_unlock_irqrestore(&priv->tx_lock,flags);
3160                         return -1;
3161                 }
3162                 buf=buflist->buf;
3163
3164                 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
3165
3166                                 DMESGW("No more TX desc, returning %x of %x",
3167                                 remain,len);
3168                                 priv->stats.txrdu++;
3169 #ifdef DEBUG_TX_DESC
3170                                 check_tx_ring(dev,priority);
3171                         //      netif_stop_queue(dev);
3172                         //      netif_carrier_off(dev);
3173 #endif
3174                         //      spin_unlock_irqrestore(&priv->tx_lock,flags);
3175
3176                         return remain;
3177
3178                 }
3179
3180                 *tail= 0; // zeroes header
3181                 *(tail+1) = 0;
3182                 *(tail+3) = 0;
3183                 *(tail+5) = 0;
3184                 *(tail+6) = 0;
3185                 *(tail+7) = 0;
3186
3187                 if(priv->card_8185){
3188                         //FIXME: this should be triggered by HW encryption parameters.
3189                         *tail |= (1<<15); //no encrypt
3190 //                      *tail |= (1<<30); //raise int when completed
3191                 }
3192         //      *tail = *tail | (1<<16);
3193                 if(remain==len && !descfrag) {
3194                         ownbit_flag = false;    //added by david woo,2007.12.14
3195 #ifdef DEBUG_TX_FRAG
3196                         DMESG("First descriptor");
3197 #endif
3198                         *tail = *tail| (1<<29) ; //fist segment of the packet
3199                         *tail = *tail |(len);
3200                 } else {
3201                         ownbit_flag = true;
3202                 }
3203
3204                 for(i=0;i<buflen&& remain >0;i++,remain--){
3205                         ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
3206                         if(remain == 4 && i+4 >= buflen) break;
3207                         /* ensure the last desc has at least 4 bytes payload */
3208
3209                 }
3210                 txbuf = txbuf + i;
3211                 *(tail+3)=*(tail+3) &~ 0xfff;
3212                 *(tail+3)=*(tail+3) | i; // buffer lenght
3213                 // Use short preamble or not
3214                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
3215                         if (priv->plcp_preamble_mode==1 && rate!=0)     //  short mode now, not long!
3216                         //      *tail |= (1<<16);                               // enable short preamble mode.
3217
3218                 if(bCTSEnable) {
3219                         *tail |= (1<<18);
3220                 }
3221
3222                 if(bRTSEnable) //rts enable
3223                 {
3224                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
3225                         *tail |= (1<<23);//rts enable
3226                         *(tail+1) |=(RtsDur&0xffff);//RTS Duration
3227                 }
3228                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
3229 //              *(tail+3) |= (0xe6<<16);
3230                 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
3231
3232                 *tail = *tail | ((rate&0xf) << 24);
3233                 //DMESG("rate %d",rate);
3234
3235                 if(priv->card_8185){
3236
3237                         #if 0
3238                         *(tail+5)&= ~(1<<24); /* tx ant 0 */
3239
3240                         *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */
3241                         *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16);
3242
3243                         *(tail+5) &=
3244 ~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8));
3245                         *(tail+5) |= (7<<8); // Max retry limit
3246
3247                         *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));
3248                         *(tail+5) |= (8<<4); // Max contention window
3249                         *(tail+6) |= 4; // Min contention window
3250                         #endif
3251            //           *(tail+5) = 0;
3252                 }
3253
3254                 /* hw_plcp_len is not used for rtl8180 chip */
3255                 /* FIXME */
3256                 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
3257
3258                         duration = rtl8180_len2duration(len,
3259                                 rate,&ext);
3260
3261
3262 #ifdef DEBUG_TX
3263                         DMESG("PLCP duration %d",duration );
3264                         //DMESG("drift %d",drift);
3265                         DMESG("extension %s", (ext==1) ? "on":"off");
3266 #endif
3267                         *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3268                         if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
3269                 }
3270
3271                 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
3272                 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
3273
3274 #ifdef DEBUG_TX_FRAG
3275                 if(!remain)DMESG("Last descriptor");
3276                 if(morefrag)DMESG("More frag");
3277 #endif
3278                *(tail+5) = *(tail+5)|(2<<27);
3279                 *(tail+7) = *(tail+7)|(1<<4);
3280
3281                 wmb();
3282                 if(ownbit_flag)
3283                 {
3284                         *tail = *tail | (1<<31); // descriptor ready to be txed
3285                 }
3286
3287 #ifdef DEBUG_TX_DESC2
3288                 printk("tx desc is:\n");
3289                 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
3290                         tail[4], tail[5], tail[6], tail[7]);
3291 #endif
3292
3293                 if((tail - begin)/8 == count-1)
3294                         tail=begin;
3295
3296                 else
3297                         tail=tail+8;
3298
3299                 buflist=buflist->next;
3300
3301                 mb();
3302
3303                 switch(priority) {
3304                         case MANAGE_PRIORITY:
3305                                 priv->txmapringtail=tail;
3306                                 priv->txmapbufstail=buflist;
3307                                 break;
3308
3309                         case BK_PRIORITY:
3310                                 priv->txbkpringtail=tail;
3311                                 priv->txbkpbufstail=buflist;
3312                                 break;
3313
3314                         case BE_PRIORITY:
3315                                 priv->txbepringtail=tail;
3316                                 priv->txbepbufstail=buflist;
3317                                 break;
3318
3319                         case VI_PRIORITY:
3320                                 priv->txvipringtail=tail;
3321                                 priv->txvipbufstail=buflist;
3322                                 break;
3323
3324                         case VO_PRIORITY:
3325                                 priv->txvopringtail=tail;
3326                                 priv->txvopbufstail=buflist;
3327                                 break;
3328
3329                         case HI_PRIORITY:
3330                                 priv->txhpringtail=tail;
3331                                 priv->txhpbufstail = buflist;
3332                                 break;
3333
3334                         case BEACON_PRIORITY:
3335                                 /* the HW seems to be happy with the 1st
3336                                  * descriptor filled and the 2nd empty...
3337                                  * So always update descriptor 1 and never
3338                                  * touch 2nd
3339                                  */
3340                         //      priv->txbeaconringtail=tail;
3341                         //      priv->txbeaconbufstail=buflist;
3342
3343                                 break;
3344
3345                 }
3346
3347                 //rtl8180_dma_kick(dev,priority);
3348         }
3349         *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3350         rtl8180_dma_kick(dev,priority);
3351         //spin_unlock_irqrestore(&priv->tx_lock,flags);
3352
3353         return 0;
3354
3355 }
3356
3357
3358 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3359
3360
3361 void rtl8180_link_change(struct net_device *dev)
3362 {
3363         struct r8180_priv *priv = ieee80211_priv(dev);
3364         u16 beacon_interval;
3365
3366         struct ieee80211_network *net = &priv->ieee80211->current_network;
3367 //      rtl8180_adapter_start(dev);
3368         rtl8180_update_msr(dev);
3369
3370
3371         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3372
3373         write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3374         write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3375
3376
3377         beacon_interval  = read_nic_dword(dev,BEACON_INTERVAL);
3378         beacon_interval &= ~ BEACON_INTERVAL_MASK;
3379         beacon_interval |= net->beacon_interval;
3380         write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3381
3382         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3383
3384
3385         /*
3386         u16 atim = read_nic_dword(dev,ATIM);
3387         u16 = u16 &~ ATIM_MASK;
3388         u16 = u16 | beacon->atim;
3389         */
3390 #if 0
3391         if (net->capability & WLAN_CAPABILITY_PRIVACY) {
3392                 if (priv->hw_wep) {
3393                         DMESG("Enabling hardware WEP support");
3394                         rtl8180_set_hw_wep(dev);
3395                         priv->ieee80211->host_encrypt=0;
3396                         priv->ieee80211->host_decrypt=0;
3397                 }
3398 #ifndef CONFIG_IEEE80211_NOWEP
3399                 else {
3400                         priv->ieee80211->host_encrypt=1;
3401                         priv->ieee80211->host_decrypt=1;
3402                 }
3403 #endif
3404         }
3405 #ifndef CONFIG_IEEE80211_NOWEP
3406         else{
3407                 priv->ieee80211->host_encrypt=0;
3408                 priv->ieee80211->host_decrypt=0;
3409         }
3410 #endif
3411 #endif
3412
3413
3414         if(priv->card_8185)
3415                 rtl8180_set_chan(dev, priv->chan);
3416
3417
3418 }
3419
3420 void rtl8180_rq_tx_ack(struct net_device *dev){
3421
3422         struct r8180_priv *priv = ieee80211_priv(dev);
3423 //      printk("====================>%s\n",__func__);
3424         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3425         priv->ack_tx_to_ieee = 1;
3426 }
3427
3428 short rtl8180_is_tx_queue_empty(struct net_device *dev){
3429
3430         struct r8180_priv *priv = ieee80211_priv(dev);
3431         u32* d;
3432
3433         for (d = priv->txmapring;
3434                 d < priv->txmapring + priv->txringcount;d+=8)
3435                         if(*d & (1<<31)) return 0;
3436
3437         for (d = priv->txbkpring;
3438                 d < priv->txbkpring + priv->txringcount;d+=8)
3439                         if(*d & (1<<31)) return 0;
3440
3441         for (d = priv->txbepring;
3442                 d < priv->txbepring + priv->txringcount;d+=8)
3443                         if(*d & (1<<31)) return 0;
3444
3445         for (d = priv->txvipring;
3446                 d < priv->txvipring + priv->txringcount;d+=8)
3447                         if(*d & (1<<31)) return 0;
3448
3449         for (d = priv->txvopring;
3450                 d < priv->txvopring + priv->txringcount;d+=8)
3451                         if(*d & (1<<31)) return 0;
3452
3453         for (d = priv->txhpring;
3454                 d < priv->txhpring + priv->txringcount;d+=8)
3455                         if(*d & (1<<31)) return 0;
3456         return 1;
3457 }
3458 /* FIXME FIXME 5msecs is random */
3459 #define HW_WAKE_DELAY 5
3460
3461 void rtl8180_hw_wakeup(struct net_device *dev)
3462 {
3463         unsigned long flags;
3464
3465         struct r8180_priv *priv = ieee80211_priv(dev);
3466
3467         spin_lock_irqsave(&priv->ps_lock,flags);
3468         //DMESG("Waken up!");
3469         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3470
3471         if(priv->rf_wakeup)
3472                 priv->rf_wakeup(dev);
3473 //      mdelay(HW_WAKE_DELAY);
3474         spin_unlock_irqrestore(&priv->ps_lock,flags);
3475 }
3476
3477 void rtl8180_hw_sleep_down(struct net_device *dev)
3478 {
3479         unsigned long flags;
3480
3481         struct r8180_priv *priv = ieee80211_priv(dev);
3482
3483         spin_lock_irqsave(&priv->ps_lock,flags);
3484        //DMESG("Sleep!");
3485
3486         if(priv->rf_sleep)
3487                 priv->rf_sleep(dev);
3488         spin_unlock_irqrestore(&priv->ps_lock,flags);
3489 }
3490
3491
3492 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3493 {
3494
3495         struct r8180_priv *priv = ieee80211_priv(dev);
3496
3497         u32 rb = jiffies;
3498         unsigned long flags;
3499
3500         spin_lock_irqsave(&priv->ps_lock,flags);
3501
3502         /* Writing HW register with 0 equals to disable
3503          * the timer, that is not really what we want
3504          */
3505         tl -= MSECS(4+16+7);
3506
3507         //if(tl == 0) tl = 1;
3508
3509         /* FIXME HACK FIXME HACK */
3510 //      force_pci_posting(dev);
3511         //mdelay(1);
3512
3513 //      rb = read_nic_dword(dev, TSFTR);
3514
3515         /* If the interval in witch we are requested to sleep is too
3516          * short then give up and remain awake
3517          */
3518         if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3519                 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3520                 spin_unlock_irqrestore(&priv->ps_lock,flags);
3521                 printk("too short to sleep\n");
3522                 return;
3523         }
3524
3525 //      write_nic_dword(dev, TimerInt, tl);
3526 //      rb = read_nic_dword(dev, TSFTR);
3527         {
3528                 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3529         //      if (tl<rb)
3530
3531                 //lzm,add,080828
3532                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3533
3534                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3535         }
3536         /* if we suspect the TimerInt is gone beyond tl
3537          * while setting it, then give up
3538          */
3539 #if 1
3540         if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3541                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3542                 spin_unlock_irqrestore(&priv->ps_lock,flags);
3543                 return;
3544         }
3545 #endif
3546 //      if(priv->rf_sleep)
3547 //              priv->rf_sleep(dev);
3548
3549         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3550         spin_unlock_irqrestore(&priv->ps_lock,flags);
3551 }
3552
3553
3554 //void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3555 void rtl8180_wmm_param_update(struct work_struct * work)
3556 {
3557         struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3558         //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3559         struct net_device *dev = ieee->dev;
3560         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3561         u8 mode = ieee->current_network.mode;
3562         AC_CODING       eACI;
3563         AC_PARAM        AcParam;
3564         PAC_PARAM       pAcParam;
3565         u8 i;
3566
3567         if(!ieee->current_network.QoS_Enable){
3568                 //legacy ac_xx_param update
3569                 AcParam.longData = 0;
3570                 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3571                 AcParam.f.AciAifsn.f.ACM = 0;
3572                 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3573                 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3574                 AcParam.f.TXOPLimit = 0;
3575                 for(eACI = 0; eACI < AC_MAX; eACI++){
3576                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3577                         {
3578                                 u8              u1bAIFS;
3579                                 u32             u4bAcParam;
3580                                 pAcParam = (PAC_PARAM)(&AcParam);
3581                                 // Retrive paramters to udpate.
3582                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3583                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3584                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3585                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3586                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3587                                 switch(eACI){
3588                                         case AC1_BK:
3589                                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3590                                                 break;
3591
3592                                         case AC0_BE:
3593                                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3594                                                 break;
3595
3596                                         case AC2_VI:
3597                                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3598                                                 break;
3599
3600                                         case AC3_VO:
3601                                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3602                                                 break;
3603
3604                                         default:
3605                                                 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3606                                                 break;
3607                                 }
3608                         }
3609                 }
3610                 return;
3611         }
3612
3613         for(i = 0; i < AC_MAX; i++){
3614                 //AcParam.longData = 0;
3615                 pAcParam = (AC_PARAM * )ac_param;
3616                 {
3617                         AC_CODING       eACI;
3618                         u8              u1bAIFS;
3619                         u32             u4bAcParam;
3620
3621                         // Retrive paramters to udpate.
3622                         eACI = pAcParam->f.AciAifsn.f.ACI;
3623                         //Mode G/A: slotTimeTimer = 9; Mode B: 20
3624                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3625                         u4bAcParam = (  (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)  |
3626                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
3627                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
3628                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3629
3630                         switch(eACI){
3631                                 case AC1_BK:
3632                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3633                                         break;
3634
3635                                 case AC0_BE:
3636                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3637                                         break;
3638
3639                                 case AC2_VI:
3640                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3641                                         break;
3642
3643                                 case AC3_VO:
3644                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3645                                         break;
3646
3647                                 default:
3648                                         printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3649                                         break;
3650                         }
3651                 }
3652                 ac_param += (sizeof(AC_PARAM));
3653         }
3654 }
3655
3656 void rtl8180_tx_irq_wq(struct work_struct *work);
3657 void rtl8180_restart_wq(struct work_struct *work);
3658 //void rtl8180_rq_tx_ack(struct work_struct *work);
3659 void rtl8180_watch_dog_wq(struct work_struct *work);
3660 void rtl8180_hw_wakeup_wq(struct work_struct *work);
3661 void rtl8180_hw_sleep_wq(struct work_struct *work);
3662 void rtl8180_sw_antenna_wq(struct work_struct *work);
3663 void rtl8180_watch_dog(struct net_device *dev);
3664
3665 void watch_dog_adaptive(unsigned long data)
3666 {
3667     struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3668 //      DMESG("---->watch_dog_adaptive()\n");
3669         if(!priv->up)
3670         {
3671                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3672                 return;
3673         }
3674
3675   //      queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3676 //{by amy 080312
3677 #if 1
3678         // Tx High Power Mechanism.
3679 #ifdef HIGH_POWER
3680         if(CheckHighPower((struct net_device *)data))
3681         {
3682                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3683         }
3684 #endif
3685
3686         // Tx Power Tracking on 87SE.
3687 #ifdef TX_TRACK
3688         //if( priv->bTxPowerTrack )     //lzm mod 080826
3689         if( CheckTxPwrTracking((struct net_device *)data));
3690                 TxPwrTracking87SE((struct net_device *)data);
3691 #endif
3692
3693         // Perform DIG immediately.
3694 #ifdef SW_DIG
3695         if(CheckDig((struct net_device *)data) == true)
3696         {
3697                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3698         }
3699 #endif
3700 #endif
3701 //by amy 080312}
3702         rtl8180_watch_dog((struct net_device *)data);
3703
3704
3705         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3706
3707         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3708         add_timer(&priv->watch_dog_timer);
3709 //        DMESG("<----watch_dog_adaptive()\n");
3710 }
3711
3712
3713 static CHANNEL_LIST ChannelPlan[] = {
3714         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},                 //FCC
3715         {{1,2,3,4,5,6,7,8,9,10,11},11},                                                 //IC
3716         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //ETSI
3717         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},    //Spain. Change to ETSI.
3718         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //France. Change to ETSI.
3719         {{14,36,40,44,48,52,56,60,64},9},                                               //MKK
3720         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
3721         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //Israel.
3722         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},                       // For 11a , TELEC
3723         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
3724         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
3725 };
3726
3727 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
3728 {
3729         int i;
3730
3731         //lzm add 080826
3732         ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
3733         ieee->IbssStartChnl=0;
3734
3735         switch (channel_plan)
3736         {
3737                 case COUNTRY_CODE_FCC:
3738                 case COUNTRY_CODE_IC:
3739                 case COUNTRY_CODE_ETSI:
3740                 case COUNTRY_CODE_SPAIN:
3741                 case COUNTRY_CODE_FRANCE:
3742                 case COUNTRY_CODE_MKK:
3743                 case COUNTRY_CODE_MKK1:
3744                 case COUNTRY_CODE_ISRAEL:
3745                 case COUNTRY_CODE_TELEC:
3746                 {
3747                         Dot11d_Init(ieee);
3748                         ieee->bGlobalDomain = false;
3749                         if (ChannelPlan[channel_plan].Len != 0){
3750                                 // Clear old channel map
3751                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3752                                 // Set new channel map
3753                                 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
3754                                 {
3755                                         if(ChannelPlan[channel_plan].Channel[i] <= 14)
3756                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
3757                                 }
3758                         }
3759                         break;
3760                 }
3761                 case COUNTRY_CODE_GLOBAL_DOMAIN:
3762                 {
3763                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
3764                         Dot11d_Reset(ieee);
3765                         ieee->bGlobalDomain = true;
3766                         break;
3767                 }
3768                 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
3769                 {
3770                 ieee->MinPassiveChnlNum=12;
3771                 ieee->IbssStartChnl= 10;
3772                 break;
3773                 }
3774                 default:
3775                 {
3776                         Dot11d_Init(ieee);
3777                         ieee->bGlobalDomain = false;
3778                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3779                         for (i=1;i<=14;i++)
3780                         {
3781                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
3782                         }
3783                         break;
3784                 }
3785         }
3786 }
3787
3788 //Add for RF power on power off by lizhaoming 080512
3789 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
3790
3791 //YJ,add,080828
3792 static void rtl8180_statistics_init(struct Stats *pstats)
3793 {
3794         memset(pstats, 0, sizeof(struct Stats));
3795 }
3796 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
3797 {
3798         memset(plink_detect, 0, sizeof(link_detect_t));
3799         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
3800 }
3801 //YJ,add,080828,end
3802
3803 short rtl8180_init(struct net_device *dev)
3804 {
3805         struct r8180_priv *priv = ieee80211_priv(dev);
3806         u16 word;
3807         u16 version;
3808         u8 hw_version;
3809         //u8 config3;
3810         u32 usValue;
3811         u16 tmpu16;
3812         int i, j;
3813
3814 #if 0
3815         for(i=0;i<0xFF;i++) {
3816                 if(i%16 == 0)
3817                         printk("\n[%x]: ", i/16);
3818                 printk("\t%4.4x", eprom_read(dev,i));
3819         }
3820 #endif
3821         priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
3822         if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
3823                 printk("rtl8180_init:Error channel plan! Set to default.\n");
3824                 priv->channel_plan = 0;
3825         }
3826         //priv->channel_plan = 9;  //Global Domain
3827
3828         DMESG("Channel plan is %d\n",priv->channel_plan);
3829         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
3830
3831         //memcpy(priv->stats,0,sizeof(struct Stats));
3832
3833         //FIXME: these constants are placed in a bad pleace.
3834         priv->txbuffsize = 2048;//1024;
3835         priv->txringcount = 32;//32;
3836         priv->rxbuffersize = 2048;//1024;
3837         priv->rxringcount = 64;//32;
3838         priv->txbeaconcount = 2;
3839         priv->rx_skb_complete = 1;
3840         //priv->txnp_pending.ispending=0;
3841         /* ^^ the SKB does not containt a partial RXed
3842          * packet (is empty)
3843          */
3844
3845         priv->RegThreeWireMode = HW_THREE_WIRE_SI;
3846
3847 //Add for RF power on power off by lizhaoming 080512
3848         priv->RFChangeInProgress = false;
3849         priv->SetRFPowerStateInProgress = false;
3850         priv->RFProgType = 0;
3851         priv->bInHctTest = false;
3852
3853         priv->irq_enabled=0;
3854
3855 //YJ,modified,080828
3856 #if 0
3857         priv->stats.rxdmafail=0;
3858         priv->stats.txrdu=0;
3859         priv->stats.rxrdu=0;
3860         priv->stats.rxnolast=0;
3861         priv->stats.rxnodata=0;
3862         //priv->stats.rxreset=0;
3863         //priv->stats.rxwrkaround=0;
3864         priv->stats.rxnopointer=0;
3865         priv->stats.txnperr=0;
3866         priv->stats.txresumed=0;
3867         priv->stats.rxerr=0;
3868         priv->stats.rxoverflow=0;
3869         priv->stats.rxint=0;
3870         priv->stats.txnpokint=0;
3871         priv->stats.txhpokint=0;
3872         priv->stats.txhperr=0;
3873         priv->stats.ints=0;
3874         priv->stats.shints=0;
3875         priv->stats.txoverflow=0;
3876         priv->stats.txbeacon=0;
3877         priv->stats.txbeaconerr=0;
3878         priv->stats.txlperr=0;
3879         priv->stats.txlpokint=0;
3880         priv->stats.txretry=0;//tony 20060601
3881         priv->stats.rxcrcerrmin=0;
3882         priv->stats.rxcrcerrmid=0;
3883         priv->stats.rxcrcerrmax=0;
3884         priv->stats.rxicverr=0;
3885 #else
3886         rtl8180_statistics_init(&priv->stats);
3887         rtl8180_link_detect_init(&priv->link_detect);
3888 #endif
3889 //YJ,modified,080828,end
3890
3891
3892         priv->ack_tx_to_ieee = 0;
3893         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3894         priv->ieee80211->iw_mode = IW_MODE_INFRA;
3895         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
3896                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3897                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
3898         priv->ieee80211->active_scan = 1;
3899         priv->ieee80211->rate = 110; //11 mbps
3900         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
3901         priv->ieee80211->host_encrypt = 1;
3902         priv->ieee80211->host_decrypt = 1;
3903         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
3904         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
3905         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
3906         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
3907
3908         priv->hw_wep = hwwep;
3909         priv->prism_hdr=0;
3910         priv->dev=dev;
3911         priv->retry_rts = DEFAULT_RETRY_RTS;
3912         priv->retry_data = DEFAULT_RETRY_DATA;
3913         priv->RFChangeInProgress = false;
3914         priv->SetRFPowerStateInProgress = false;
3915         priv->RFProgType = 0;
3916         priv->bInHctTest = false;
3917         priv->bInactivePs = true;//false;
3918         priv->ieee80211->bInactivePs = priv->bInactivePs;
3919         priv->bSwRfProcessing = false;
3920         priv->eRFPowerState = eRfOff;
3921         priv->RfOffReason = 0;
3922         priv->LedStrategy = SW_LED_MODE0;
3923         //priv->NumRxOkInPeriod = 0;  //YJ,del,080828
3924         //priv->NumTxOkInPeriod = 0;  //YJ,del,080828
3925         priv->TxPollingTimes = 0;//lzm add 080826
3926         priv->bLeisurePs = true;
3927         priv->dot11PowerSaveMode = eActive;
3928 //by amy for antenna
3929         priv->AdMinCheckPeriod = 5;
3930         priv->AdMaxCheckPeriod = 10;
3931 // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
3932         priv->AdMaxRxSsThreshold = 30;//60->30
3933         priv->AdRxSsThreshold = 20;//50->20
3934         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
3935         priv->AdTickCount = 0;
3936         priv->AdRxSignalStrength = -1;
3937         priv->RegSwAntennaDiversityMechanism = 0;
3938         priv->RegDefaultAntenna = 0;
3939         priv->SignalStrength = 0;
3940         priv->AdRxOkCnt = 0;
3941         priv->CurrAntennaIndex = 0;
3942         priv->AdRxSsBeforeSwitched = 0;
3943         init_timer(&priv->SwAntennaDiversityTimer);
3944         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
3945         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
3946 //by amy for antenna
3947 //{by amy 080312
3948         priv->bDigMechanism = 1;
3949         priv->InitialGain = 6;
3950         priv->bXtalCalibration = false;
3951         priv->XtalCal_Xin = 0;
3952         priv->XtalCal_Xout = 0;
3953         priv->bTxPowerTrack = false;
3954         priv->ThermalMeter = 0;
3955         priv->FalseAlarmRegValue = 0;
3956         priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
3957         priv->DIG_NumberFallbackVote = 0;
3958         priv->DIG_NumberUpgradeVote = 0;
3959         priv->LastSignalStrengthInPercent = 0;
3960         priv->Stats_SignalStrength = 0;
3961         priv->LastRxPktAntenna = 0;
3962         priv->SignalQuality = 0; // in 0-100 index.
3963         priv->Stats_SignalQuality = 0;
3964         priv->RecvSignalPower = 0; // in dBm.
3965         priv->Stats_RecvSignalPower = 0;
3966         priv->AdMainAntennaRxOkCnt = 0;
3967         priv->AdAuxAntennaRxOkCnt = 0;
3968         priv->bHWAdSwitched = false;
3969         priv->bRegHighPowerMechanism = true;
3970         priv->RegHiPwrUpperTh = 77;
3971         priv->RegHiPwrLowerTh = 75;
3972         priv->RegRSSIHiPwrUpperTh = 70;
3973         priv->RegRSSIHiPwrLowerTh = 20;
3974         priv->bCurCCKPkt = false;
3975         priv->UndecoratedSmoothedSS = -1;
3976         priv->bToUpdateTxPwr = false;
3977         priv->CurCCKRSSI = 0;
3978         priv->RxPower = 0;
3979         priv->RSSI = 0;
3980         //YJ,add,080828
3981         priv->NumTxOkTotal = 0;
3982         priv->NumTxUnicast = 0;
3983         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
3984         priv->PowerProfile = POWER_PROFILE_AC;
3985         //YJ,add,080828,end
3986 //by amy for rate adaptive
3987     priv->CurrRetryCnt=0;
3988     priv->LastRetryCnt=0;
3989     priv->LastTxokCnt=0;
3990     priv->LastRxokCnt=0;
3991     priv->LastRetryRate=0;
3992     priv->bTryuping=0;
3993     priv->CurrTxRate=0;
3994     priv->CurrRetryRate=0;
3995     priv->TryupingCount=0;
3996     priv->TryupingCountNoData=0;
3997     priv->TryDownCountLowData=0;
3998     priv->LastTxOKBytes=0;
3999     priv->LastFailTxRate=0;
4000     priv->LastFailTxRateSS=0;
4001     priv->FailTxRateCount=0;
4002     priv->LastTxThroughput=0;
4003     priv->NumTxOkBytesTotal=0;
4004         priv->ForcedDataRate = 0;
4005         priv->RegBModeGainStage = 1;
4006
4007 //by amy for rate adaptive
4008 //by amy 080312}
4009         priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4010         spin_lock_init(&priv->irq_lock);
4011         spin_lock_init(&priv->irq_th_lock);
4012         spin_lock_init(&priv->tx_lock);
4013         spin_lock_init(&priv->ps_lock);
4014         spin_lock_init(&priv->rf_ps_lock);
4015         sema_init(&priv->wx_sem,1);
4016         sema_init(&priv->rf_state,1);
4017         INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
4018         INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
4019         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
4020         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
4021         //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
4022         //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
4023         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
4024         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
4025         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
4026         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
4027
4028         //add for RF power on power off by lizhaoming 080512
4029         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
4030         //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4031
4032         tasklet_init(&priv->irq_rx_tasklet,
4033                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
4034                      (unsigned long)priv);
4035 //by amy
4036     init_timer(&priv->watch_dog_timer);
4037         priv->watch_dog_timer.data = (unsigned long)dev;
4038         priv->watch_dog_timer.function = watch_dog_adaptive;
4039 //by amy
4040
4041 //{by amy 080312
4042 //by amy for rate adaptive
4043     init_timer(&priv->rateadapter_timer);
4044         priv->rateadapter_timer.data = (unsigned long)dev;
4045         priv->rateadapter_timer.function = timer_rate_adaptive;
4046                 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
4047                 priv->bEnhanceTxPwr=false;
4048 //by amy for rate adaptive
4049 //by amy 080312}
4050         //priv->ieee80211->func =
4051         //      kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
4052         //memset(priv->ieee80211->func, 0,
4053           //     sizeof(struct ieee80211_helper_functions));
4054
4055         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
4056         priv->ieee80211->set_chan = rtl8180_set_chan;
4057         priv->ieee80211->link_change = rtl8180_link_change;
4058         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
4059         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
4060         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
4061
4062         priv->ieee80211->init_wmmparam_flag = 0;
4063
4064         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
4065         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
4066         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4067
4068         priv->MWIEnable = 0;
4069
4070         priv->ShortRetryLimit = 7;
4071         priv->LongRetryLimit = 7;
4072         priv->EarlyRxThreshold = 7;
4073
4074         priv->CSMethod = (0x01 << 29);
4075
4076         priv->TransmitConfig    =
4077                                                                         1<<TCR_DurProcMode_OFFSET |             //for RTL8185B, duration setting by HW
4078                                                                         (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4079                                                                         (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |       // Short retry limit
4080                                                                         (priv->LongRetryLimit<<TCR_LRL_OFFSET) |        // Long retry limit
4081                                                                         (0 ? TCR_SAT : 0);      // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4082
4083         priv->ReceiveConfig     =
4084 //                                                              RCR_ENMARP |
4085                                                                 RCR_AMF | RCR_ADF |                             //accept management/data
4086                                                                 RCR_ACF |                                               //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4087                                                                 RCR_AB | RCR_AM | RCR_APM |             //accept BC/MC/UC
4088                                                                 //RCR_AICV | RCR_ACRC32 |               //accept ICV/CRC error packet
4089                                                                 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4090                                                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4091                                                                 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4092
4093         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
4094                                                                 IMR_THPDER | IMR_THPDOK |
4095                                                                 IMR_TVODER | IMR_TVODOK |
4096                                                                 IMR_TVIDER | IMR_TVIDOK |
4097                                                                 IMR_TBEDER | IMR_TBEDOK |
4098                                                                 IMR_TBKDER | IMR_TBKDOK |
4099                                                                 IMR_RDU |                                               // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
4100                                                                 IMR_RER | IMR_ROK |
4101                                                                 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
4102
4103         priv->InitialGain = 6;
4104
4105         hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
4106
4107         switch (hw_version){
4108                 case HW_VERID_R8185B_B:
4109                         priv->card_8185 = VERSION_8187S_C;
4110                         DMESG("MAC controller is a RTL8187SE b/g");
4111                         priv->phy_ver = 2;
4112                         break;
4113                 case HW_VERID_R8185_ABC:
4114                         DMESG("MAC controller is a RTL8185 b/g");
4115                         priv->card_8185 = 1;
4116                         /* you should not find a card with 8225 PHY ver < C*/
4117                         priv->phy_ver = 2;
4118                         break;
4119
4120                 case HW_VERID_R8185_D:
4121                         DMESG("MAC controller is a RTL8185 b/g (V. D)");
4122                         priv->card_8185 = 2;
4123                         /* you should not find a card with 8225 PHY ver < C*/
4124                         priv->phy_ver = 2;
4125                         break;
4126
4127                 case HW_VERID_R8180_ABCD:
4128                         DMESG("MAC controller is a RTL8180");
4129                         priv->card_8185 = 0;
4130                         break;
4131
4132                 case HW_VERID_R8180_F:
4133                         DMESG("MAC controller is a RTL8180 (v. F)");
4134                         priv->card_8185 = 0;
4135                         break;
4136
4137                 default:
4138                         DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
4139                         priv->card_8185 = 0;
4140                         break;
4141         }
4142
4143         if(priv->card_8185){
4144                 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
4145                 priv->ieee80211->short_slot = 1;
4146         }
4147         /* you should not found any 8185 Ver B Card */
4148         priv->card_8185_Bversion = 0;
4149
4150         // just for sync 85
4151         priv->card_type = PCI;
4152         DMESG("This is a PCI NIC");
4153         priv->enable_gpio0 = 0;
4154
4155 //by amy for antenna
4156         usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
4157         DMESG("usValue is 0x%x\n",usValue);
4158         //3Read AntennaDiversity
4159         // SW Antenna Diversity.
4160         if(     (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
4161         {
4162                 priv->EEPROMSwAntennaDiversity = false;
4163                 //printk("EEPROM Disable SW Antenna Diversity\n");
4164         }
4165         else
4166         {
4167                 priv->EEPROMSwAntennaDiversity = true;
4168                 //printk("EEPROM Enable SW Antenna Diversity\n");
4169         }
4170         // Default Antenna to use.
4171         if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
4172         {
4173                 priv->EEPROMDefaultAntenna1 = false;
4174                 //printk("EEPROM Default Antenna 0\n");
4175         }
4176         else
4177         {
4178                 priv->EEPROMDefaultAntenna1 = true;
4179                 //printk("EEPROM Default Antenna 1\n");
4180         }
4181
4182         //
4183         // Antenna diversity mechanism. Added by Roger, 2007.11.05.
4184         //
4185         if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
4186         {// 0: default from EEPROM.
4187                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
4188         }
4189         else
4190         {// 1:disable antenna diversity, 2: enable antenna diversity.
4191                 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
4192         }
4193         //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
4194
4195
4196         //
4197         // Default antenna settings. Added by Roger, 2007.11.05.
4198         //
4199         if( priv->RegDefaultAntenna == 0)
4200         {// 0: default from EEPROM.
4201                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
4202         }
4203         else
4204         {// 1: main, 2: aux.
4205                 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
4206         }
4207         //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
4208 //by amy for antenna
4209         /* rtl8185 can calc plcp len in HW.*/
4210         priv->hw_plcp_len = 1;
4211
4212         priv->plcp_preamble_mode = 2;
4213         /*the eeprom type is stored in RCR register bit #6 */
4214         if (RCR_9356SEL & read_nic_dword(dev, RCR)){
4215                 priv->epromtype=EPROM_93c56;
4216                 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
4217         }else{
4218                 priv->epromtype=EPROM_93c46;
4219                 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
4220         }
4221
4222         dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
4223         dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
4224         dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
4225         dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
4226         dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
4227         dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
4228         //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
4229
4230
4231         for(i=1,j=0; i<14; i+=2,j++){
4232
4233                 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
4234                 priv->chtxpwr[i]=word & 0xff;
4235                 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
4236 #ifdef DEBUG_EPROM
4237                 DMESG("tx word %x:%x",j,word);
4238                 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
4239                 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
4240 #endif
4241         }
4242         if(priv->card_8185){
4243                 for(i=1,j=0; i<14; i+=2,j++){
4244
4245                         word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
4246                         priv->chtxpwr_ofdm[i]=word & 0xff;
4247                         priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
4248 #ifdef DEBUG_EPROM
4249                         DMESG("ofdm tx word %x:%x",j,word);
4250                         DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
4251                         DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
4252 #endif
4253                 }
4254         }
4255 //{by amy 080312
4256         //3Read crystal calibtration and thermal meter indication on 87SE.
4257
4258         // By SD3 SY's request. Added by Roger, 2007.12.11.
4259
4260         tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
4261
4262         //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
4263
4264                 // Crystal calibration for Xin and Xout resp.
4265                 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
4266                 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
4267                 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
4268                         priv->bXtalCalibration = true;
4269
4270                 // Thermal meter reference indication.
4271                 priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
4272                 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
4273                         priv->bTxPowerTrack = true;
4274
4275 //by amy 080312}
4276         word = eprom_read(dev,EPROM_TXPW_BASE);
4277         priv->cck_txpwr_base = word & 0xf;
4278         priv->ofdm_txpwr_base = (word>>4) & 0xf;
4279
4280         version = eprom_read(dev,EPROM_VERSION);
4281         DMESG("EEPROM version %x",version);
4282         if( (!priv->card_8185) && version < 0x0101){
4283                 DMESG ("EEPROM version too old, assuming defaults");
4284                 DMESG ("If you see this message *plase* send your \
4285 DMESG output to andreamrl@tiscali.it THANKS");
4286                 priv->digphy=1;
4287                 priv->antb=0;
4288                 priv->diversity=1;
4289                 priv->cs_treshold=0xc;
4290                 priv->rcr_csense=1;
4291                 priv->rf_chip=RFCHIPID_PHILIPS;
4292         }else{
4293                 if(!priv->card_8185){
4294                         u8 rfparam = eprom_read(dev,RF_PARAM);
4295                         DMESG("RfParam: %x",rfparam);
4296
4297                         priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
4298                         priv->antb =  rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
4299
4300                         priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
4301                                         RF_PARAM_CARRIERSENSE_SHIFT;
4302
4303                         priv->diversity =
4304                                 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
4305                 }else{
4306                         priv->rcr_csense = 3;
4307                 }
4308
4309                 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
4310
4311                 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
4312         }
4313
4314         priv->rf_chip = RF_ZEBRA4;
4315         priv->rf_sleep = rtl8225z4_rf_sleep;
4316         priv->rf_wakeup = rtl8225z4_rf_wakeup;
4317         //DMESG("Card reports RF frontend Realtek 8225z2");
4318         //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4319         //DMESGW("use it with care and at your own risk and");
4320         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
4321
4322         priv->rf_close = rtl8225z2_rf_close;
4323         priv->rf_init = rtl8225z2_rf_init;
4324         priv->rf_set_chan = rtl8225z2_rf_set_chan;
4325         priv->rf_set_sens = NULL;
4326         //priv->rf_sleep = rtl8225_rf_sleep;
4327         //priv->rf_wakeup = rtl8225_rf_wakeup;
4328
4329
4330
4331         if(!priv->card_8185){
4332                 if(priv->antb)
4333                         DMESG ("Antenna B is default antenna");
4334                 else
4335                         DMESG ("Antenna A is default antenna");
4336
4337                 if(priv->diversity)
4338                         DMESG ("Antenna diversity is enabled");
4339                 else
4340                         DMESG("Antenna diversity is disabled");
4341
4342                 DMESG("Carrier sense %d",priv->rcr_csense);
4343         }
4344
4345         if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
4346                 return -ENOMEM;
4347
4348         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4349                                   TX_MANAGEPRIORITY_RING_ADDR))
4350                 return -ENOMEM;
4351
4352         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4353                                  TX_BKPRIORITY_RING_ADDR))
4354                 return -ENOMEM;
4355
4356         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4357                                  TX_BEPRIORITY_RING_ADDR))
4358                 return -ENOMEM;
4359
4360         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4361                                   TX_VIPRIORITY_RING_ADDR))
4362                 return -ENOMEM;
4363
4364         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4365                                   TX_VOPRIORITY_RING_ADDR))
4366                 return -ENOMEM;
4367
4368         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4369                                   TX_HIGHPRIORITY_RING_ADDR))
4370                 return -ENOMEM;
4371
4372         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
4373                                   TX_BEACON_RING_ADDR))
4374                 return -ENOMEM;
4375
4376
4377         //priv->beacon_buf=NULL;
4378
4379         if(!priv->card_8185){
4380
4381                 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
4382                         DMESG ("40-bit WEP is supported in hardware");
4383                 else
4384                         DMESG ("40-bit WEP is NOT supported in hardware");
4385
4386                 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
4387                         DMESG ("104-bit WEP is supported in hardware");
4388                 else
4389                         DMESG ("104-bit WEP is NOT supported in hardware");
4390         }
4391 #if !defined(SA_SHIRQ)
4392         if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4393 #else
4394         if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4395 #endif
4396                 DMESGE("Error allocating IRQ %d",dev->irq);
4397                 return -1;
4398         }else{
4399                 priv->irq=dev->irq;
4400                 DMESG("IRQ %d",dev->irq);
4401         }
4402
4403 #ifdef DEBUG_EPROM
4404         dump_eprom(dev);
4405 #endif
4406
4407         return 0;
4408
4409 }
4410
4411
4412 void rtl8180_no_hw_wep(struct net_device *dev)
4413 {
4414         struct r8180_priv *priv = ieee80211_priv(dev);
4415
4416         if(!priv->card_8185)
4417         {
4418                 u8 security;
4419
4420                 security  = read_nic_byte(dev, SECURITY);
4421                 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4422                 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4423
4424                 write_nic_byte(dev, SECURITY, security);
4425
4426         }else{
4427
4428                 //FIXME!!!
4429         }
4430         /*
4431           write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4432           (1<<TX_NOICV_SHIFT) );
4433         */
4434 //      priv->ieee80211->hw_wep=0;
4435 }
4436
4437
4438 void rtl8180_set_hw_wep(struct net_device *dev)
4439 {
4440         struct r8180_priv *priv = ieee80211_priv(dev);
4441         u8 pgreg;
4442         u8 security;
4443         u32 key0_word4;
4444
4445         pgreg=read_nic_byte(dev, PGSELECT);
4446         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4447
4448         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4449         key0_word4 &= ~ 0xff;
4450         key0_word4 |= priv->key0[3]& 0xff;
4451         write_nic_dword(dev,KEY0,(priv->key0[0]));
4452         write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4453         write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4454         write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4455
4456         /*
4457           TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4458         */
4459
4460         security  = read_nic_byte(dev,SECURITY);
4461         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4462         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4463         security &= ~ SECURITY_ENCRYP_MASK;
4464         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4465
4466         write_nic_byte(dev, SECURITY, security);
4467
4468         DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4469               read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4470               read_nic_dword(dev,KEY0));
4471
4472         //priv->ieee80211->hw_wep=1;
4473 }
4474
4475
4476 void rtl8185_rf_pins_enable(struct net_device *dev)
4477 {
4478 //      u16 tmp;
4479 //      tmp = read_nic_word(dev, RFPinsEnable);
4480         write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4481 //      write_nic_word(dev, RFPinsEnable,7 | tmp);
4482 }
4483
4484
4485 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4486 {
4487         u8 conf3;
4488
4489         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4490
4491         conf3 = read_nic_byte(dev, CONFIG3);
4492         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4493         write_nic_dword(dev, ANAPARAM2, a);
4494
4495         conf3 = read_nic_byte(dev, CONFIG3);
4496         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4497         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4498
4499 }
4500
4501
4502 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4503 {
4504         u8 conf3;
4505
4506         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4507
4508         conf3 = read_nic_byte(dev, CONFIG3);
4509         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4510         write_nic_dword(dev, ANAPARAM, a);
4511
4512         conf3 = read_nic_byte(dev, CONFIG3);
4513         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4514         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4515 }
4516
4517
4518 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
4519 {
4520         write_nic_byte(dev, TX_ANTENNA, ant);
4521         force_pci_posting(dev);
4522         mdelay(1);
4523 }
4524
4525
4526 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
4527 {
4528         //u8 phyr;
4529         u32 phyw;
4530         //int i;
4531
4532         adr |= 0x80;
4533
4534         phyw= ((data<<8) | adr);
4535 #if 0
4536
4537         write_nic_dword(dev, PHY_ADR, phyw);
4538
4539         //read_nic_dword(dev, PHY_ADR);
4540         for(i=0;i<10;i++){
4541                 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
4542                 phyr = read_nic_byte(dev, PHY_READ);
4543                 if(phyr == (data&0xff)) break;
4544
4545         }
4546 #else
4547         // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
4548         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
4549         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
4550         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
4551         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
4552 #endif
4553         /* this is ok to fail when we write AGC table. check for AGC table might be
4554          * done by masking with 0x7f instead of 0xff
4555          */
4556         //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
4557 }
4558
4559
4560 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
4561 {
4562         data = data & 0xff;
4563         rtl8185_write_phy(dev, adr, data);
4564 }
4565
4566
4567 void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
4568 {
4569         data = data & 0xff;
4570         rtl8185_write_phy(dev, adr, data | 0x10000);
4571 }
4572
4573
4574 /* 70*3 = 210 ms
4575  * I hope this is enougth
4576  */
4577 #define MAX_PHY 70
4578 void write_phy(struct net_device *dev, u8 adr, u8 data)
4579 {
4580         u32 phy;
4581         int i;
4582
4583         phy = 0xff0000;
4584         phy |= adr;
4585         phy |= 0x80; /* this should enable writing */
4586         phy |= (data<<8);
4587
4588         //PHY_ADR, PHY_R and PHY_W  are contig and treated as one dword
4589         write_nic_dword(dev,PHY_ADR, phy);
4590
4591         phy= 0xffff00;
4592         phy |= adr;
4593
4594         write_nic_dword(dev,PHY_ADR, phy);
4595         for(i=0;i<MAX_PHY;i++){
4596                 phy=read_nic_dword(dev,PHY_ADR);
4597                 phy= phy & 0xff0000;
4598                 phy= phy >> 16;
4599                 if(phy == data){ //SUCCESS!
4600                         force_pci_posting(dev);
4601                         mdelay(3); //random value
4602 #ifdef DEBUG_BB
4603                         DMESG("Phy wr %x,%x",adr,data);
4604 #endif
4605                         return;
4606                 }else{
4607                         force_pci_posting(dev);
4608                         mdelay(3); //random value
4609                 }
4610         }
4611         DMESGW ("Phy writing %x %x failed!", adr,data);
4612 }
4613
4614 void rtl8185_set_rate(struct net_device *dev)
4615 {
4616         int i;
4617         u16 word;
4618         int basic_rate,min_rr_rate,max_rr_rate;
4619
4620 //      struct r8180_priv *priv = ieee80211_priv(dev);
4621
4622         //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
4623 //              priv->ieee80211->state == IEEE80211_LINKED){
4624         basic_rate = ieeerate2rtlrate(240);
4625         min_rr_rate = ieeerate2rtlrate(60);
4626         max_rr_rate = ieeerate2rtlrate(240);
4627
4628 //
4629 //      }else{
4630 //              basic_rate = ieeerate2rtlrate(20);
4631 //              min_rr_rate = ieeerate2rtlrate(10);
4632 //              max_rr_rate = ieeerate2rtlrate(110);
4633 //      }
4634
4635         write_nic_byte(dev, RESP_RATE,
4636                         max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
4637
4638         word  = read_nic_word(dev, BRSR);
4639         word &= ~BRSR_MBR_8185;
4640
4641
4642         for(i=0;i<=basic_rate;i++)
4643                 word |= (1<<i);
4644
4645         write_nic_word(dev, BRSR, word);
4646         //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
4647 }
4648
4649
4650
4651 void rtl8180_adapter_start(struct net_device *dev)
4652 {
4653         struct r8180_priv *priv = ieee80211_priv(dev);
4654         u32 anaparam;
4655         u16 word;
4656         u8 config3;
4657 //      int i;
4658
4659         rtl8180_rtx_disable(dev);
4660         rtl8180_reset(dev);
4661
4662         /* seems that 0xffff or 0xafff will cause
4663          * HW interrupt line crash
4664          */
4665
4666         //priv->irq_mask = 0xafff;
4667 //      priv->irq_mask = 0x4fcf;
4668
4669         /* enable beacon timeout, beacon TX ok and err
4670          * LP tx ok and err, HP TX ok and err, NP TX ok and err,
4671          * RX ok and ERR, and GP timer */
4672         priv->irq_mask = 0x6fcf;
4673
4674         priv->dma_poll_mask = 0;
4675
4676         rtl8180_beacon_tx_disable(dev);
4677
4678         if(priv->card_type == CARDBUS ){
4679                 config3=read_nic_byte(dev, CONFIG3);
4680                 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
4681                 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
4682                         read_nic_word(dev, FEMR));
4683         }
4684         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4685         write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
4686         write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
4687         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4688
4689         rtl8180_update_msr(dev);
4690
4691         if(!priv->card_8185){
4692                 anaparam  = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
4693                 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
4694
4695                 rtl8180_set_anaparam(dev,anaparam);
4696         }
4697         /* These might be unnecessary since we do in rx_enable / tx_enable */
4698         fix_rx_fifo(dev);
4699         fix_tx_fifo(dev);
4700         /*set_nic_rxring(dev);
4701           set_nic_txring(dev);*/
4702
4703         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4704
4705         /*
4706            The following is very strange. seems to be that 1 means test mode,
4707            but we need to acknolwledges the nic when a packet is ready
4708            altought we set it to 0
4709         */
4710
4711         write_nic_byte(dev,
4712                        CONFIG2, read_nic_byte(dev,CONFIG2) &~\
4713                        (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
4714         //^the nic isn't in test mode
4715         if(priv->card_8185)
4716                         write_nic_byte(dev,
4717                        CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
4718
4719         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
4720
4721         write_nic_dword(dev,INT_TIMEOUT,0);
4722 #ifdef DEBUG_REGISTERS
4723         rtl8180_dump_reg(dev);
4724 #endif
4725
4726         if(!priv->card_8185)
4727         {
4728                 /*
4729                 experimental - this might be needed to calibrate AGC,
4730                 anyway it shouldn't hurt
4731                 */
4732                 write_nic_byte(dev, CONFIG5,
4733                         read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
4734                 read_nic_byte(dev, CONFIG5);
4735                 udelay(15);
4736                 write_nic_byte(dev, CONFIG5,
4737                         read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
4738         }else{
4739
4740                 write_nic_byte(dev, WPA_CONFIG, 0);
4741                 //write_nic_byte(dev, TESTR, 0xd);
4742         }
4743
4744         rtl8180_no_hw_wep(dev);
4745
4746         if(priv->card_8185){
4747                 rtl8185_set_rate(dev);
4748                 write_nic_byte(dev, RATE_FALLBACK, 0x81);
4749         //      write_nic_byte(dev, 0xdf, 0x15);
4750         }else{
4751                 word  = read_nic_word(dev, BRSR);
4752                 word &= ~BRSR_MBR;
4753                 word &= ~BRSR_BPLCP;
4754                 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
4755 //by amy
4756               word |= 0x0f;
4757 //by amy
4758                 write_nic_word(dev, BRSR, word);
4759         }
4760
4761
4762         if(priv->card_8185){
4763                 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
4764
4765                 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
4766                 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4767                 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
4768 |(1<<CONFIG3_CLKRUN_SHIFT));
4769                 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4770
4771         }
4772
4773         priv->rf_init(dev);
4774
4775         if(priv->rf_set_sens != NULL)
4776                 priv->rf_set_sens(dev,priv->sens);
4777         rtl8180_irq_enable(dev);
4778
4779         netif_start_queue(dev);
4780         /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
4781
4782         DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
4783
4784         DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
4785         if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
4786         if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
4787         if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
4788 }
4789
4790
4791
4792 /* this configures registers for beacon tx and enables it via
4793  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
4794  * be used to stop beacon transmission
4795  */
4796 void rtl8180_start_tx_beacon(struct net_device *dev)
4797 {
4798 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4799         u16 word;
4800 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
4801
4802         DMESG("Enabling beacon TX");
4803         //write_nic_byte(dev, 0x42,0xe6);// TCR
4804 //      set_nic_txring(dev);
4805 //      fix_tx_fifo(dev);
4806         rtl8180_prepare_beacon(dev);
4807         rtl8180_irq_disable(dev);
4808         rtl8180_beacon_tx_enable(dev);
4809 #if 0
4810         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
4811         //write_nic_byte(dev,0x9d,0x20); //DMA Poll
4812         //write_nic_word(dev,0x7a,0);
4813         //write_nic_word(dev,0x7a,0x8000);
4814
4815 #if 0
4816         word  = read_nic_word(dev, BcnItv);
4817         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
4818         word |= priv->ieee80211->current_network.beacon_interval;//0x64;
4819         write_nic_word(dev, BcnItv, word);
4820 #endif
4821 #endif
4822         word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
4823         write_nic_word(dev, AtimWnd,word);// word |=
4824 //priv->ieee80211->current_network.atim_window);
4825
4826         word  = read_nic_word(dev, BintrItv);
4827         word &= ~BintrItv_BintrItv;
4828         word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
4829                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
4830         // FIXME: check if correct ^^ worked with 0x3e8;
4831         */
4832         write_nic_word(dev, BintrItv, word);
4833
4834
4835         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4836
4837 //      rtl8180_beacon_tx_enable(dev);
4838         rtl8185b_irq_enable(dev);
4839         /* VV !!!!!!!!!! VV*/
4840         /*
4841         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
4842         write_nic_byte(dev,0x9d,0x00);
4843         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
4844 */
4845 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
4846
4847 }
4848
4849
4850
4851 /***************************************************************************
4852     -------------------------------NET STUFF---------------------------
4853 ***************************************************************************/
4854 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
4855 {
4856         struct r8180_priv *priv = ieee80211_priv(dev);
4857
4858         return &priv->ieee80211->stats;
4859 }
4860 //
4861 // Change current and default preamble mode.
4862 // 2005.01.06, by rcnjko.
4863 //
4864 bool
4865 MgntActSet_802_11_PowerSaveMode(
4866         struct r8180_priv *priv,
4867         RT_PS_MODE              rtPsMode
4868 )
4869 {
4870
4871         // Currently, we do not change power save mode on IBSS mode.
4872         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4873         {
4874                 return false;
4875         }
4876
4877         //
4878         // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
4879         // some AP will not response to our mgnt frames with PwrMgt bit set,
4880         // e.g. cannot associate the AP.
4881         // So I commented out it. 2005.02.16, by rcnjko.
4882         //
4883 //      // Change device's power save mode.
4884 //      Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
4885
4886         // Update power save mode configured.
4887 //      priv->dot11PowerSaveMode = rtPsMode;
4888         priv->ieee80211->ps = rtPsMode;
4889         // Determine ListenInterval.
4890 #if 0
4891         if(priv->dot11PowerSaveMode == eMaxPs)
4892         {
4893                 priv->ieee80211->ListenInterval = 10;
4894         }
4895         else
4896         {
4897                 priv->ieee80211->ListenInterval = 2;
4898         }
4899 #endif
4900         return true;
4901 }
4902
4903 //================================================================================
4904 // Leisure Power Save in linked state.
4905 //================================================================================
4906
4907 //
4908 //      Description:
4909 //              Enter the leisure power save mode.
4910 //
4911 void
4912 LeisurePSEnter(
4913         struct r8180_priv *priv
4914         )
4915 {
4916         if (priv->bLeisurePs)
4917         {
4918                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
4919                 {
4920                         //printk("----Enter PS\n");
4921                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
4922                 }
4923         }
4924 }
4925
4926
4927 //
4928 //      Description:
4929 //              Leave the leisure power save mode.
4930 //
4931 void
4932 LeisurePSLeave(
4933         struct r8180_priv *priv
4934         )
4935 {
4936         if (priv->bLeisurePs)
4937         {
4938                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
4939                 {
4940                         //printk("----Leave PS\n");
4941                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
4942                 }
4943         }
4944 }
4945
4946 void rtl8180_hw_wakeup_wq (struct work_struct *work)
4947 {
4948 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4949 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4950 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4951         struct delayed_work *dwork = to_delayed_work(work);
4952         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
4953         struct net_device *dev = ieee->dev;
4954
4955 //      printk("dev is %d\n",dev);
4956 //      printk("&*&(^*(&(&=========>%s()\n", __func__);
4957         rtl8180_hw_wakeup(dev);
4958
4959 }
4960
4961 void rtl8180_hw_sleep_wq (struct work_struct *work)
4962 {
4963 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4964 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4965 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4966         struct delayed_work *dwork = to_delayed_work(work);
4967         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
4968         struct net_device *dev = ieee->dev;
4969
4970         rtl8180_hw_sleep_down(dev);
4971 }
4972
4973 //YJ,add,080828,for KeepAlive
4974 static void MgntLinkKeepAlive(struct r8180_priv *priv )
4975 {
4976         if (priv->keepAliveLevel == 0)
4977                 return;
4978
4979         if(priv->ieee80211->state == IEEE80211_LINKED)
4980         {
4981                 //
4982                 // Keep-Alive.
4983                 //
4984                 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
4985
4986                 if ( (priv->keepAliveLevel== 2) ||
4987                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
4988                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
4989                         )
4990                 {
4991                         priv->link_detect.IdleCount++;
4992
4993                         //
4994                         // Send a Keep-Alive packet packet to AP if we had been idle for a while.
4995                         //
4996                         if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
4997                         {
4998                                 priv->link_detect.IdleCount = 0;
4999                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
5000                         }
5001                 }
5002                 else
5003                 {
5004                         priv->link_detect.IdleCount = 0;
5005                 }
5006                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
5007                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
5008         }
5009 }
5010 //YJ,add,080828,for KeepAlive,end
5011
5012 static u8 read_acadapter_file(char *filename);
5013 void rtl8180_watch_dog(struct net_device *dev)
5014 {
5015         struct r8180_priv *priv = ieee80211_priv(dev);
5016         bool bEnterPS = false;
5017         bool bBusyTraffic = false;
5018         u32 TotalRxNum = 0;
5019         u16 SlotIndex = 0;
5020         u16 i = 0;
5021 #ifdef ENABLE_IPS
5022         if(priv->ieee80211->actscanning == false){
5023                 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
5024                         IPSEnter(dev);
5025                 }
5026         }
5027 #endif
5028         //YJ,add,080828,for link state check
5029         if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
5030                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
5031                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
5032                 for( i=0; i<priv->link_detect.SlotNum; i++ )
5033                         TotalRxNum+= priv->link_detect.RxFrameNum[i];
5034                 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
5035                 if(TotalRxNum == 0){
5036                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
5037                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5038                 }
5039         }
5040
5041         //YJ,add,080828,for KeepAlive
5042         MgntLinkKeepAlive(priv);
5043
5044         //YJ,add,080828,for LPS
5045 #ifdef ENABLE_LPS
5046         if(priv->PowerProfile == POWER_PROFILE_BATTERY )
5047         {
5048                 //Turn on LeisurePS on battery power
5049                 //printk("!!!!!On battery power\n");
5050                 priv->bLeisurePs = true;
5051         }
5052         else if(priv->PowerProfile == POWER_PROFILE_AC )
5053         {
5054                 // Turn off LeisurePS on AC power
5055                 //printk("----On AC power\n");
5056                 LeisurePSLeave(priv);
5057                 priv->bLeisurePs= false;
5058         }
5059 #endif
5060
5061 #if 0
5062 #ifndef ENABLE_LPS
5063         if(priv->ieee80211->state == IEEE80211_LINKED){
5064                 if(     priv->NumRxOkInPeriod> 666 ||
5065                         priv->NumTxOkInPeriod > 666 ) {
5066                         bBusyTraffic = true;
5067                 }
5068                 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) {
5069                         bEnterPS= true;
5070                 }
5071                 if(bEnterPS) {
5072                         LeisurePSEnter(priv);
5073                 }
5074                 else {
5075                         LeisurePSLeave(priv);
5076                 }
5077         }
5078         else    {
5079                 LeisurePSLeave(priv);
5080         }
5081 #endif
5082         priv->NumRxOkInPeriod = 0;
5083         priv->NumTxOkInPeriod = 0;
5084         priv->ieee80211->NumRxData = 0;
5085 #else
5086 #ifdef ENABLE_LPS
5087         if(priv->ieee80211->state == IEEE80211_LINKED){
5088                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
5089                 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
5090                 if(     priv->link_detect.NumRxOkInPeriod> 666 ||
5091                         priv->link_detect.NumTxOkInPeriod> 666 ) {
5092                         bBusyTraffic = true;
5093                 }
5094                 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
5095                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
5096                         bEnterPS= false;
5097                 }
5098                 else {
5099                         bEnterPS= true;
5100                 }
5101
5102                 if(bEnterPS) {
5103                         LeisurePSEnter(priv);
5104                 }
5105                 else {
5106                         LeisurePSLeave(priv);
5107                 }
5108         }
5109         else{
5110                 LeisurePSLeave(priv);
5111         }
5112 #endif
5113         priv->link_detect.bBusyTraffic = bBusyTraffic;
5114         priv->link_detect.NumRxOkInPeriod = 0;
5115         priv->link_detect.NumTxOkInPeriod = 0;
5116         priv->ieee80211->NumRxDataInPeriod = 0;
5117         priv->ieee80211->NumRxBcnInPeriod = 0;
5118 #endif
5119 }
5120 int _rtl8180_up(struct net_device *dev)
5121 {
5122         struct r8180_priv *priv = ieee80211_priv(dev);
5123         //int i;
5124
5125         priv->up=1;
5126
5127         DMESG("Bringing up iface");
5128         rtl8185b_adapter_start(dev);
5129         rtl8185b_rx_enable(dev);
5130         rtl8185b_tx_enable(dev);
5131 #ifdef ENABLE_IPS
5132         if(priv->bInactivePs){
5133                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5134                         IPSLeave(dev);
5135         }
5136 #endif
5137 //by amy 080312
5138 #ifdef RATE_ADAPT
5139        timer_rate_adaptive((unsigned long)dev);
5140 #endif
5141 //by amy 080312
5142         watch_dog_adaptive((unsigned long)dev);
5143 #ifdef SW_ANTE
5144         if(priv->bSwAntennaDiverity)
5145                         SwAntennaDiversityTimerCallback(dev);
5146 #endif
5147 //      IPSEnter(dev);
5148         ieee80211_softmac_start_protocol(priv->ieee80211);
5149
5150 //Add for RF power on power off by lizhaoming 080512
5151 //      priv->eRFPowerState = eRfOn;
5152 //      printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
5153 //      queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
5154
5155         return 0;
5156 }
5157
5158
5159 int rtl8180_open(struct net_device *dev)
5160 {
5161         struct r8180_priv *priv = ieee80211_priv(dev);
5162         int ret;
5163
5164         down(&priv->wx_sem);
5165         ret = rtl8180_up(dev);
5166         up(&priv->wx_sem);
5167         return ret;
5168
5169 }
5170
5171
5172 int rtl8180_up(struct net_device *dev)
5173 {
5174         struct r8180_priv *priv = ieee80211_priv(dev);
5175
5176         if (priv->up == 1) return -1;
5177
5178         return _rtl8180_up(dev);
5179 }
5180
5181
5182 int rtl8180_close(struct net_device *dev)
5183 {
5184         struct r8180_priv *priv = ieee80211_priv(dev);
5185         int ret;
5186
5187         down(&priv->wx_sem);
5188         ret = rtl8180_down(dev);
5189         up(&priv->wx_sem);
5190
5191         return ret;
5192
5193 }
5194
5195 int rtl8180_down(struct net_device *dev)
5196 {
5197         struct r8180_priv *priv = ieee80211_priv(dev);
5198
5199         if (priv->up == 0) return -1;
5200
5201         priv->up=0;
5202
5203         ieee80211_softmac_stop_protocol(priv->ieee80211);
5204         /* FIXME */
5205         if (!netif_queue_stopped(dev))
5206                 netif_stop_queue(dev);
5207         rtl8180_rtx_disable(dev);
5208         rtl8180_irq_disable(dev);
5209         del_timer_sync(&priv->watch_dog_timer);
5210         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5211 //{by amy 080312
5212     del_timer_sync(&priv->rateadapter_timer);
5213     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5214 //by amy 080312}
5215         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5216         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5217         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5218         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5219         del_timer_sync(&priv->SwAntennaDiversityTimer);
5220         SetZebraRFPowerState8185(dev,eRfOff);
5221         //ieee80211_softmac_stop_protocol(priv->ieee80211);
5222         memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
5223         priv->ieee80211->state = IEEE80211_NOLINK;
5224         return 0;
5225 }
5226
5227 void rtl8180_restart_wq(struct work_struct *work)
5228 {
5229         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5230         struct net_device *dev = priv->dev;
5231
5232         down(&priv->wx_sem);
5233
5234         rtl8180_commit(dev);
5235
5236         up(&priv->wx_sem);
5237 }
5238
5239 void rtl8180_restart(struct net_device *dev)
5240 {
5241         struct r8180_priv *priv = ieee80211_priv(dev);
5242         //rtl8180_commit(dev);
5243         schedule_work(&priv->reset_wq);
5244         //DMESG("TXTIMEOUT");
5245 }
5246
5247
5248 void rtl8180_commit(struct net_device *dev)
5249 {
5250         struct r8180_priv *priv = ieee80211_priv(dev);
5251
5252         if (priv->up == 0) return ;
5253 //+by amy 080312
5254         del_timer_sync(&priv->watch_dog_timer);
5255         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5256 //{by amy 080312
5257 //by amy for rate adaptive
5258     del_timer_sync(&priv->rateadapter_timer);
5259     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5260 //by amy for rate adaptive
5261 //by amy 080312}
5262         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5263         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5264         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5265         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5266         del_timer_sync(&priv->SwAntennaDiversityTimer);
5267         ieee80211_softmac_stop_protocol(priv->ieee80211);
5268         rtl8180_irq_disable(dev);
5269         rtl8180_rtx_disable(dev);
5270         _rtl8180_up(dev);
5271 }
5272
5273
5274 static void r8180_set_multicast(struct net_device *dev)
5275 {
5276         struct r8180_priv *priv = ieee80211_priv(dev);
5277         short promisc;
5278
5279         //down(&priv->wx_sem);
5280
5281         promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5282
5283         if (promisc != priv->promisc)
5284                 rtl8180_restart(dev);
5285
5286         priv->promisc = promisc;
5287
5288         //up(&priv->wx_sem);
5289 }
5290
5291 #if 0
5292 /* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/
5293 int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
5294 {
5295         struct r8180_priv *priv = ieee80211_priv(dev);
5296         int ret;
5297         unsigned long flags;
5298
5299         spin_lock_irqsave(&priv->tx_lock,flags);
5300         ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211);
5301         spin_unlock_irqrestore(&priv->tx_lock,flags);
5302         return ret;
5303 }
5304 #endif
5305
5306 int r8180_set_mac_adr(struct net_device *dev, void *mac)
5307 {
5308         struct r8180_priv *priv = ieee80211_priv(dev);
5309         struct sockaddr *addr = mac;
5310
5311         down(&priv->wx_sem);
5312
5313         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5314
5315         if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
5316                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
5317
5318         if (priv->up) {
5319                 rtl8180_down(dev);
5320                 rtl8180_up(dev);
5321         }
5322
5323         up(&priv->wx_sem);
5324
5325         return 0;
5326 }
5327
5328 /* based on ipw2200 driver */
5329 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5330 {
5331         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5332
5333         struct iwreq *wrq = (struct iwreq *) rq;
5334         int ret=-1;
5335         switch (cmd) {
5336             case RTL_IOCTL_WPA_SUPPLICANT:
5337                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5338                 return ret;
5339
5340             default:
5341                 return -EOPNOTSUPP;
5342         }
5343
5344         return -EOPNOTSUPP;
5345 }
5346
5347
5348
5349 /****************************************************************************
5350      -----------------------------PCI STUFF---------------------------
5351 *****************************************************************************/
5352
5353 static const struct net_device_ops rtl8180_netdev_ops = {
5354         .ndo_open               = rtl8180_open,
5355         .ndo_stop               = rtl8180_close,
5356         .ndo_get_stats          = rtl8180_stats,
5357         .ndo_tx_timeout         = rtl8180_restart,
5358         .ndo_do_ioctl           = rtl8180_ioctl,
5359         .ndo_set_multicast_list = r8180_set_multicast,
5360         .ndo_set_mac_address    = r8180_set_mac_adr,
5361         .ndo_validate_addr      = eth_validate_addr,
5362         .ndo_change_mtu         = eth_change_mtu,
5363         .ndo_start_xmit         = ieee80211_xmit,
5364 };
5365
5366 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5367                                        const struct pci_device_id *id)
5368 {
5369         unsigned long ioaddr = 0;
5370         struct net_device *dev = NULL;
5371         struct r8180_priv *priv= NULL;
5372         //u8 *ptr;
5373         u8 unit = 0;
5374
5375         unsigned long pmem_start, pmem_len, pmem_flags;
5376
5377         DMESG("Configuring chip resources");
5378
5379         if( pci_enable_device (pdev) ){
5380                 DMESG("Failed to enable PCI device");
5381                 return -EIO;
5382         }
5383
5384         pci_set_master(pdev);
5385         //pci_set_wmi(pdev);
5386         pci_set_dma_mask(pdev, 0xffffff00ULL);
5387         pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
5388         dev = alloc_ieee80211(sizeof(struct r8180_priv));
5389         if (!dev)
5390                 return -ENOMEM;
5391         priv = ieee80211_priv(dev);
5392         priv->ieee80211 = netdev_priv(dev);
5393
5394         pci_set_drvdata(pdev, dev);
5395         SET_NETDEV_DEV(dev, &pdev->dev);
5396
5397         priv = ieee80211_priv(dev);
5398 //      memset(priv,0,sizeof(struct r8180_priv));
5399         priv->pdev=pdev;
5400
5401
5402
5403         pmem_start = pci_resource_start(pdev, 1);
5404         pmem_len = pci_resource_len(pdev, 1);
5405         pmem_flags = pci_resource_flags (pdev, 1);
5406
5407         if (!(pmem_flags & IORESOURCE_MEM)) {
5408                 DMESG("region #1 not a MMIO resource, aborting");
5409                 goto fail;
5410         }
5411
5412         //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5413         if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
5414                 DMESG("request_mem_region failed!");
5415                 goto fail;
5416         }
5417
5418
5419         ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5420         if( ioaddr == (unsigned long)NULL ){
5421                 DMESG("ioremap failed!");
5422                // release_mem_region( pmem_start, pmem_len );
5423                 goto fail1;
5424         }
5425
5426         dev->mem_start = ioaddr; // shared mem start
5427         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5428
5429
5430         //pci_read_config_byte(pdev, 0x05, ptr);
5431         //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
5432         pci_read_config_byte(pdev, 0x05, &unit);
5433         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5434
5435         dev->irq = pdev->irq;
5436         priv->irq = 0;
5437
5438         dev->netdev_ops = &rtl8180_netdev_ops;
5439         dev->wireless_handlers = &r8180_wx_handlers_def;
5440
5441         dev->type=ARPHRD_ETHER;
5442         dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
5443
5444         if (dev_alloc_name(dev, ifname) < 0){
5445                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
5446                 ifname = "wlan%d";
5447         //      ifname = "ath%d";
5448                 dev_alloc_name(dev, ifname);
5449         }
5450
5451
5452         if(rtl8180_init(dev)!=0){
5453                 DMESG("Initialization failed");
5454                 goto fail1;
5455         }
5456
5457         netif_carrier_off(dev);
5458
5459         register_netdev(dev);
5460
5461         rtl8180_proc_init_one(dev);
5462
5463         DMESG("Driver probe completed\n");
5464         return 0;
5465
5466 fail1:
5467
5468         if( dev->mem_start != (unsigned long)NULL ){
5469                 iounmap( (void *)dev->mem_start );
5470                 release_mem_region( pci_resource_start(pdev, 1),
5471                                     pci_resource_len(pdev, 1) );
5472         }
5473
5474
5475 fail:
5476         if(dev){
5477
5478                 if (priv->irq) {
5479                         free_irq(dev->irq, dev);
5480                         dev->irq=0;
5481                 }
5482                 free_ieee80211(dev);
5483         }
5484
5485         pci_disable_device(pdev);
5486
5487         DMESG("wlan driver load failed\n");
5488         pci_set_drvdata(pdev, NULL);
5489         return -ENODEV;
5490
5491 }
5492
5493
5494 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
5495 {
5496         struct r8180_priv *priv;
5497         struct net_device *dev = pci_get_drvdata(pdev);
5498         if(dev){
5499
5500                 unregister_netdev(dev);
5501
5502                 priv=ieee80211_priv(dev);
5503
5504                 rtl8180_proc_remove_one(dev);
5505                 rtl8180_down(dev);
5506                 priv->rf_close(dev);
5507                 rtl8180_reset(dev);
5508                 //rtl8180_rtx_disable(dev);
5509                 //rtl8180_irq_disable(dev);
5510                 mdelay(10);
5511                 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
5512                 //force_pci_posting(dev);
5513                 //mdelay(10);
5514
5515                 if(priv->irq){
5516
5517                         DMESG("Freeing irq %d",dev->irq);
5518                         free_irq(dev->irq, dev);
5519                         priv->irq=0;
5520
5521                 }
5522
5523                 free_rx_desc_ring(dev);
5524                 free_tx_desc_rings(dev);
5525         //      free_beacon_desc_ring(dev,priv->txbeaconcount);
5526
5527                 if( dev->mem_start != (unsigned long)NULL ){
5528                         iounmap( (void *)dev->mem_start );
5529                         release_mem_region( pci_resource_start(pdev, 1),
5530                                             pci_resource_len(pdev, 1) );
5531                 }
5532
5533                 free_ieee80211(dev);
5534         }
5535         pci_disable_device(pdev);
5536
5537         DMESG("wlan driver removed\n");
5538 }
5539
5540
5541 /* fun with the built-in ieee80211 stack... */
5542 extern int ieee80211_crypto_init(void);
5543 extern void ieee80211_crypto_deinit(void);
5544 extern int ieee80211_crypto_tkip_init(void);
5545 extern void ieee80211_crypto_tkip_exit(void);
5546 extern int ieee80211_crypto_ccmp_init(void);
5547 extern void ieee80211_crypto_ccmp_exit(void);
5548 extern int ieee80211_crypto_wep_init(void);
5549 extern void ieee80211_crypto_wep_exit(void);
5550
5551 static int __init rtl8180_pci_module_init(void)
5552 {
5553         int ret;
5554
5555         ret = ieee80211_crypto_init();
5556         if (ret) {
5557                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
5558                 return ret;
5559         }
5560         ret = ieee80211_crypto_tkip_init();
5561         if (ret) {
5562                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
5563                 return ret;
5564         }
5565         ret = ieee80211_crypto_ccmp_init();
5566         if (ret) {
5567                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
5568                 return ret;
5569         }
5570         ret = ieee80211_crypto_wep_init();
5571         if (ret) {
5572                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
5573                 return ret;
5574         }
5575
5576         printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
5577 / RTL8185 based WLAN cards\n");
5578         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
5579         DMESG("Initializing module");
5580         DMESG("Wireless extensions version %d", WIRELESS_EXT);
5581         rtl8180_proc_module_init();
5582
5583       if(0!=pci_register_driver(&rtl8180_pci_driver))
5584         //if(0!=pci_module_init(&rtl8180_pci_driver))
5585         {
5586                 DMESG("No device found");
5587                 /*pci_unregister_driver (&rtl8180_pci_driver);*/
5588                 return -ENODEV;
5589         }
5590         return 0;
5591 }
5592
5593
5594 static void __exit rtl8180_pci_module_exit(void)
5595 {
5596         pci_unregister_driver (&rtl8180_pci_driver);
5597         rtl8180_proc_module_remove();
5598         ieee80211_crypto_tkip_exit();
5599         ieee80211_crypto_ccmp_exit();
5600         ieee80211_crypto_wep_exit();
5601         ieee80211_crypto_deinit();
5602         DMESG("Exiting");
5603 }
5604
5605
5606 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
5607 {
5608         unsigned long flags;
5609         short enough_desc;
5610         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5611
5612         spin_lock_irqsave(&priv->tx_lock,flags);
5613         enough_desc = check_nic_enought_desc(dev,pri);
5614         spin_unlock_irqrestore(&priv->tx_lock,flags);
5615
5616         if(enough_desc)
5617                 ieee80211_wake_queue(priv->ieee80211);
5618 }
5619
5620 /*****************************************************************************
5621       -----------------------------IRQ STUFF---------------------------
5622 ******************************************************************************/
5623
5624 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
5625 {
5626         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5627
5628         u32 *tail; //tail virtual addr
5629         u32 *head; //head virtual addr
5630         u32 *begin;//start of ring virtual addr
5631         u32 *nicv; //nic pointer virtual addr
5632 //      u32 *txdv; //packet just TXed
5633         u32 nic; //nic pointer physical addr
5634         u32 nicbegin;// start of ring physical addr
5635 //      short txed;
5636         unsigned long flag;
5637         /* physical addr are ok on 32 bits since we set DMA mask*/
5638
5639         int offs;
5640         int j,i;
5641         int hd;
5642         if (error) priv->stats.txretry++; //tony 20060601
5643         spin_lock_irqsave(&priv->tx_lock,flag);
5644         switch(pri) {
5645         case MANAGE_PRIORITY:
5646                 tail = priv->txmapringtail;
5647                 begin = priv->txmapring;
5648                 head = priv->txmapringhead;
5649                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
5650                 nicbegin = priv->txmapringdma;
5651                 break;
5652
5653         case BK_PRIORITY:
5654                 tail = priv->txbkpringtail;
5655                 begin = priv->txbkpring;
5656                 head = priv->txbkpringhead;
5657                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
5658                 nicbegin = priv->txbkpringdma;
5659                 break;
5660
5661         case BE_PRIORITY:
5662                 tail = priv->txbepringtail;
5663                 begin = priv->txbepring;
5664                 head = priv->txbepringhead;
5665                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
5666                 nicbegin = priv->txbepringdma;
5667                 break;
5668
5669         case VI_PRIORITY:
5670                 tail = priv->txvipringtail;
5671                 begin = priv->txvipring;
5672                 head = priv->txvipringhead;
5673                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
5674                 nicbegin = priv->txvipringdma;
5675                 break;
5676
5677         case VO_PRIORITY:
5678                 tail = priv->txvopringtail;
5679                 begin = priv->txvopring;
5680                 head = priv->txvopringhead;
5681                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
5682                 nicbegin = priv->txvopringdma;
5683                 break;
5684
5685         case HI_PRIORITY:
5686                 tail = priv->txhpringtail;
5687                 begin = priv->txhpring;
5688                 head = priv->txhpringhead;
5689                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
5690                 nicbegin = priv->txhpringdma;
5691                 break;
5692
5693         default:
5694                 spin_unlock_irqrestore(&priv->tx_lock,flag);
5695                 return ;
5696         }
5697 /*      DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
5698         *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
5699         (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
5700 priv->txnpring)/8);
5701 */
5702         //nicv = (u32*) ((nic - nicbegin) + (int)begin);
5703         nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
5704         if((head <= tail && (nicv > tail || nicv < head)) ||
5705                 (head > tail && (nicv > tail && nicv < head))){
5706
5707                         DMESGW("nic has lost pointer");
5708 #ifdef DEBUG_TX_DESC
5709                         //check_tx_ring(dev,NORM_PRIORITY);
5710                         check_tx_ring(dev,pri);
5711 #endif
5712                         spin_unlock_irqrestore(&priv->tx_lock,flag);
5713                         rtl8180_restart(dev);
5714                         return;
5715                 }
5716
5717         /* we check all the descriptors between the head and the nic,
5718          * but not the currenly pointed by the nic (the next to be txed)
5719          * and the previous of the pointed (might be in process ??)
5720         */
5721         //if (head == nic) return;
5722         //DMESG("%x %x",head,nic);
5723         offs = (nic - nicbegin);
5724         //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
5725
5726         offs = offs / 8 /4;
5727
5728         hd = (head - begin) /8;
5729
5730         if(offs >= hd)
5731                 j = offs - hd;
5732         else
5733                 j = offs + (priv->txringcount -1 -hd);
5734         //      j= priv->txringcount -1- (hd - offs);
5735
5736         j-=2;
5737         if(j<0) j=0;
5738
5739
5740         for(i=0;i<j;i++)
5741         {
5742 //              printk("+++++++++++++check status desc\n");
5743                 if((*head) & (1<<31))
5744                         break;
5745                 if(((*head)&(0x10000000)) != 0){
5746 //                      printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
5747                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
5748 #if 1
5749                         if(!error)
5750                         {
5751                                 priv->NumTxOkTotal++;
5752 //                              printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
5753                         }
5754 #endif
5755                         //      printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
5756                 }
5757                 if(!error){
5758                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
5759                 }
5760 //              printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
5761                 *head = *head &~ (1<<31);
5762
5763                 if((head - begin)/8 == priv->txringcount-1)
5764                         head=begin;
5765
5766                 else
5767                         head+=8;
5768         }
5769 #if 0
5770         if(nicv == begin)
5771                 txdv = begin + (priv->txringcount -1)*8;
5772         else
5773                 txdv = nicv - 8;
5774
5775         txed = !(txdv[0] &(1<<31));
5776
5777         if(txed){
5778                 if(!(txdv[0] & (1<<15))) error = 1;
5779                 //if(!(txdv[0] & (1<<30))) error = 1;
5780                 if(error)DMESG("%x",txdv[0]);
5781         }
5782 #endif
5783         //DMESG("%x",txdv[0]);
5784         /* the head has been moved to the last certainly TXed
5785          * (or at least processed by the nic) packet.
5786          * The driver take forcefully owning of all these packets
5787          * If the packet previous of the nic pointer has been
5788          * processed this doesn't matter: it will be checked
5789          * here at the next round. Anyway if no more packet are
5790          * TXed no memory leak occour at all.
5791          */
5792
5793         switch(pri) {
5794         case MANAGE_PRIORITY:
5795                 priv->txmapringhead = head;
5796                         //printk("1==========================================> priority check!\n");
5797                 if(priv->ack_tx_to_ieee){
5798                                 // try to implement power-save mode 2008.1.22
5799                 //      printk("2==========================================> priority check!\n");
5800 #if 1
5801                         if(rtl8180_is_tx_queue_empty(dev)){
5802                         //      printk("tx queue empty, after send null sleep packet, try to sleep !\n");
5803                                 priv->ack_tx_to_ieee = 0;
5804                                 ieee80211_ps_tx_ack(priv->ieee80211,!error);
5805                         }
5806 #endif
5807                 }
5808                 break;
5809
5810         case BK_PRIORITY:
5811                 priv->txbkpringhead = head;
5812                 break;
5813
5814         case BE_PRIORITY:
5815                 priv->txbepringhead = head;
5816                 break;
5817
5818         case VI_PRIORITY:
5819                 priv->txvipringhead = head;
5820                 break;
5821
5822         case VO_PRIORITY:
5823                 priv->txvopringhead = head;
5824                 break;
5825
5826         case HI_PRIORITY:
5827                 priv->txhpringhead = head;
5828                 break;
5829         }
5830
5831         /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
5832                 (priv->txnpringtail - priv->txnpring) /8,
5833                 offs );
5834         */
5835
5836         spin_unlock_irqrestore(&priv->tx_lock,flag);
5837
5838 }
5839
5840 void rtl8180_tx_irq_wq(struct work_struct *work)
5841 {
5842         //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5843         struct delayed_work *dwork = to_delayed_work(work);
5844         struct ieee80211_device * ieee = (struct ieee80211_device*)
5845                                                container_of(dwork, struct ieee80211_device, watch_dog_wq);
5846         struct net_device *dev = ieee->dev;
5847
5848         rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
5849 }
5850 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
5851 {
5852         struct net_device *dev = (struct net_device *) netdev;
5853         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5854         unsigned long flags;
5855         u32 inta;
5856
5857         /* We should return IRQ_NONE, but for now let me keep this */
5858         if(priv->irq_enabled == 0) return IRQ_HANDLED;
5859
5860         spin_lock_irqsave(&priv->irq_th_lock,flags);
5861
5862         //ISR: 4bytes
5863         inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
5864         write_nic_dword(dev,ISR,inta); // reset int situation
5865
5866         priv->stats.shints++;
5867
5868         //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
5869
5870         if(!inta){
5871                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5872                 return IRQ_HANDLED;
5873         /*
5874            most probably we can safely return IRQ_NONE,
5875            but for now is better to avoid problems
5876         */
5877         }
5878
5879         if(inta == 0xffff){
5880                         /* HW disappared */
5881                         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5882                         return IRQ_HANDLED;
5883         }
5884
5885         priv->stats.ints++;
5886 #ifdef DEBUG_IRQ
5887         DMESG("NIC irq %x",inta);
5888 #endif
5889         //priv->irqpending = inta;
5890
5891
5892         if(!netif_running(dev)) {
5893                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5894                 return IRQ_HANDLED;
5895         }
5896
5897         if(inta & ISR_TimeOut){
5898                 write_nic_dword(dev, TimerInt, 0);
5899                 //DMESG("=================>waking up");
5900 //              rtl8180_hw_wakeup(dev);
5901         }
5902
5903         if(inta & ISR_TBDOK){
5904                 priv->stats.txbeacon++;
5905         }
5906
5907         if(inta & ISR_TBDER){
5908                 priv->stats.txbeaconerr++;
5909         }
5910
5911         if(inta  & IMR_TMGDOK ) {
5912 //              priv->NumTxOkTotal++;
5913                 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
5914 //                      schedule_work(&priv->tx_irq_wq);
5915
5916         }
5917
5918         if(inta & ISR_THPDER){
5919 #ifdef DEBUG_TX
5920                 DMESG ("TX high priority ERR");
5921 #endif
5922                 priv->stats.txhperr++;
5923                 rtl8180_tx_isr(dev,HI_PRIORITY,1);
5924                 priv->ieee80211->stats.tx_errors++;
5925         }
5926
5927         if(inta & ISR_THPDOK){ //High priority tx ok
5928 #ifdef DEBUG_TX
5929                 DMESG ("TX high priority OK");
5930 #endif
5931 //              priv->NumTxOkTotal++;
5932                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5933                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5934                 priv->stats.txhpokint++;
5935                 rtl8180_tx_isr(dev,HI_PRIORITY,0);
5936         }
5937
5938         if(inta & ISR_RER) {
5939                 priv->stats.rxerr++;
5940 #ifdef DEBUG_RX
5941                 DMESGW("RX error int");
5942 #endif
5943         }
5944         if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
5945                 priv->stats.txbkperr++;
5946                 priv->ieee80211->stats.tx_errors++;
5947 #ifdef DEBUG_TX
5948                 DMESGW("TX bkp error int");
5949 #endif
5950                 //tasklet_schedule(&priv->irq_tx_tasklet);
5951                 rtl8180_tx_isr(dev,BK_PRIORITY,1);
5952                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5953         }
5954
5955         if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
5956                 priv->stats.txbeperr++;
5957                 priv->ieee80211->stats.tx_errors++;
5958 #ifdef DEBUG_TX
5959                 DMESGW("TX bep error int");
5960 #endif
5961                 rtl8180_tx_isr(dev,BE_PRIORITY,1);
5962                 //tasklet_schedule(&priv->irq_tx_tasklet);
5963                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5964         }
5965         if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
5966                 priv->stats.txnperr++;
5967                 priv->ieee80211->stats.tx_errors++;
5968 #ifdef DEBUG_TX
5969                 DMESGW("TX np error int");
5970 #endif
5971                 //tasklet_schedule(&priv->irq_tx_tasklet);
5972                 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
5973                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
5974         }
5975
5976         if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
5977                 priv->stats.txlperr++;
5978                 priv->ieee80211->stats.tx_errors++;
5979 #ifdef DEBUG_TX
5980                 DMESGW("TX lp error int");
5981 #endif
5982                 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
5983                 //tasklet_schedule(&priv->irq_tx_tasklet);
5984                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
5985         }
5986
5987         if(inta & ISR_ROK){
5988 #ifdef DEBUG_RX
5989                 DMESG("Frame arrived !");
5990 #endif
5991                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
5992                 priv->stats.rxint++;
5993                 tasklet_schedule(&priv->irq_rx_tasklet);
5994         }
5995
5996         if(inta & ISR_RQoSOK ){
5997 #ifdef DEBUG_RX
5998                 DMESG("QoS Frame arrived !");
5999 #endif
6000                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
6001                 priv->stats.rxint++;
6002                 tasklet_schedule(&priv->irq_rx_tasklet);
6003         }
6004         if(inta & ISR_BcnInt) {
6005                 //DMESG("Preparing Beacons");
6006                 rtl8180_prepare_beacon(dev);
6007         }
6008
6009         if(inta & ISR_RDU){
6010 //#ifdef DEBUG_RX
6011                 DMESGW("No RX descriptor available");
6012                 priv->stats.rxrdu++;
6013 //#endif
6014                 tasklet_schedule(&priv->irq_rx_tasklet);
6015                 /*queue_work(priv->workqueue ,&priv->restart_work);*/
6016
6017         }
6018         if(inta & ISR_RXFOVW){
6019 #ifdef DEBUG_RX
6020                 DMESGW("RX fifo overflow");
6021 #endif
6022                 priv->stats.rxoverflow++;
6023                 tasklet_schedule(&priv->irq_rx_tasklet);
6024                 //queue_work(priv->workqueue ,&priv->restart_work);
6025         }
6026
6027         if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
6028
6029         if(inta & ISR_TNPDOK){ //Normal priority tx ok
6030 #ifdef DEBUG_TX
6031                 DMESG ("TX normal priority OK");
6032 #endif
6033 //              priv->NumTxOkTotal++;
6034                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6035                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6036                 //      priv->ieee80211->stats.tx_packets++;
6037                 priv->stats.txnpokint++;
6038                 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
6039         }
6040
6041         if(inta & ISR_TLPDOK){ //Low priority tx ok
6042 #ifdef DEBUG_TX
6043                 DMESG ("TX low priority OK");
6044 #endif
6045 //              priv->NumTxOkTotal++;
6046                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6047                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6048                 //      priv->ieee80211->stats.tx_packets++;
6049                 priv->stats.txlpokint++;
6050                 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
6051                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6052         }
6053
6054         if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
6055                 priv->stats.txbkpokint++;
6056 #ifdef DEBUG_TX
6057                 DMESGW("TX bk priority ok");
6058 #endif
6059 //              priv->NumTxOkTotal++;
6060                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6061                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6062                 rtl8180_tx_isr(dev,BK_PRIORITY,0);
6063                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6064         }
6065
6066         if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
6067                 priv->stats.txbeperr++;
6068 #ifdef DEBUG_TX
6069                 DMESGW("TX be priority ok");
6070 #endif
6071 //              priv->NumTxOkTotal++;
6072                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6073                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6074                 rtl8180_tx_isr(dev,BE_PRIORITY,0);
6075                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6076         }
6077         force_pci_posting(dev);
6078         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6079
6080         return IRQ_HANDLED;
6081 }
6082
6083
6084 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
6085 {
6086 //      unsigned long flags;
6087
6088 /*      spin_lock_irqsave(&priv->irq_lock, flags);
6089         priv->irq_mask &=~IMR_ROK;
6090         priv->irq_mask &=~IMR_RDU;
6091
6092         rtl8180_irq_enable(priv->dev);
6093         spin_unlock_irqrestore(&priv->irq_lock, flags);
6094 */
6095         rtl8180_rx(priv->dev);
6096
6097 /*      spin_lock_irqsave(&priv->irq_lock, flags);
6098         priv->irq_mask |= IMR_ROK;
6099         priv->irq_mask |= IMR_RDU;
6100         rtl8180_irq_enable(priv->dev);
6101         spin_unlock_irqrestore(&priv->irq_lock, flags);
6102 */
6103 }
6104
6105 /****************************************************************************
6106 lizhaoming--------------------------- RF power on/power off -----------------
6107 *****************************************************************************/
6108
6109 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
6110 {
6111         //struct delayed_work *dwork = to_delayed_work(work);
6112         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
6113         struct net_device *dev = ieee->dev;
6114         struct r8180_priv *priv = ieee80211_priv(dev);
6115
6116         //u16 tmp2byte;
6117         u8 btPSR;
6118         u8 btConfig0;
6119         RT_RF_POWER_STATE       eRfPowerStateToSet;
6120         bool    bActuallySet=false;
6121
6122         char *argv[3];
6123         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
6124         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
6125         static int readf_count = 0;
6126         //printk("============>%s in \n", __func__);
6127
6128 #ifdef ENABLE_LPS
6129         if(readf_count % 10 == 0)
6130                 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
6131
6132         readf_count = (readf_count+1)%0xffff;
6133 #endif
6134 #if 0
6135         if(priv->up == 0)//driver stopped
6136                 {
6137                         printk("\nDo nothing...");
6138                         goto out;
6139                 }
6140         else
6141 #endif
6142                 {
6143                         // We should turn off LED before polling FF51[4].
6144
6145                         //Turn off LED.
6146                         btPSR = read_nic_byte(dev, PSR);
6147                         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
6148
6149                         //It need to delay 4us suggested by Jong, 2008-01-16
6150                         udelay(4);
6151
6152                         //HW radio On/Off according to the value of FF51[4](config0)
6153                         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
6154
6155                         //Turn on LED.
6156                         write_nic_byte(dev, PSR, btPSR| BIT3);
6157
6158                         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
6159
6160                         if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
6161                         {
6162                                 priv->ieee80211->bHwRadioOff = false;
6163                                 bActuallySet = true;
6164                         }
6165                         else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
6166                         {
6167                                 priv->ieee80211->bHwRadioOff = true;
6168                                 bActuallySet = true;
6169                         }
6170
6171                         if(bActuallySet)
6172                         {
6173                                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
6174
6175                                 /* To update the UI status for Power status changed */
6176                                 if(priv->ieee80211->bHwRadioOff == true)
6177                                         argv[1] = "RFOFF";
6178                                 else{
6179                                         //if(!priv->RfOffReason)
6180                                                 argv[1] = "RFON";
6181                                         //else
6182                                         //      argv[1] = "RFOFF";
6183                                 }
6184                                 argv[0] = RadioPowerPath;
6185                                 argv[2] = NULL;
6186
6187                                 call_usermodehelper(RadioPowerPath,argv,envp,1);
6188                         }
6189
6190                 }
6191
6192 }
6193
6194 static u8 read_acadapter_file(char *filename)
6195 {
6196 #if 0
6197         int fd;
6198         char buf[1];
6199         char ret[50];
6200         int i = 0;
6201         int n = 0;
6202         mm_segment_t old_fs = get_fs();
6203         set_fs(KERNEL_DS);
6204
6205         fd = sys_open(filename, O_RDONLY, 0);
6206         if (fd >= 0) {
6207                 while (sys_read(fd, buf, 1) == 1)
6208                 {
6209                         i++;
6210                         if(i>10)
6211                         {
6212                                 if(buf[0]!=' ')
6213                                 {
6214                                         ret[n]=buf[0];
6215                                         n++;
6216                                 }
6217                         }
6218                 }
6219                 sys_close(fd);
6220         }
6221         ret[n]='\0';
6222 //      printk("%s \n", ret);
6223         set_fs(old_fs);
6224
6225         if(strncmp(ret, "off-line",8) == 0)
6226         {
6227                 return 1;
6228         }
6229 #endif
6230         return 0;
6231 }
6232
6233 /***************************************************************************
6234      ------------------- module init / exit stubs ----------------
6235 ****************************************************************************/
6236 module_init(rtl8180_pci_module_init);
6237 module_exit(rtl8180_pci_module_exit);
6238