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   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #include        "firmware.h"
  42 #include <linux/bitrev.h>
  43
  44 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  45 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  46                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  47                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  48                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  49                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  50                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  51                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  52                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  53
  54 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  55
  56 const unsigned short ccitt_16Table[] = {
  57         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  58         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  59         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  60         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  61         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  62         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  63         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  64         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  65         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  66         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  67         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  68         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  69         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  70         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  71         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  72         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  73         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  74         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  75         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  76         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  77         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  78         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  79         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  80         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  81         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  82         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  83         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  84         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  85         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  86         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  87         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  88         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  89 };
  90 #define ByteCRC16(v, crc) \
  91         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
  92
  93 //
  94 // BBP register initialization set
  95 //
  96 REG_PAIR   BBPRegTable[] = {
  97         {BBP_R65,               0x2C},          // fix rssi issue
  98         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  99         {BBP_R69,               0x12},
 100         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 101         {BBP_R73,               0x10},
 102         {BBP_R81,               0x37},
 103         {BBP_R82,               0x62},
 104         {BBP_R83,               0x6A},
 105         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 106         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 107         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 108         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 109         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 110         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 111 };
 112 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 113
 114 //
 115 // RF register initialization set
 116 //
 117
 118 //
 119 // ASIC register initialization sets
 120 //
 121
 122 RTMP_REG_PAIR   MACRegTable[] = {
 123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 124         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 125         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 127         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 128         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 129 #else
 130     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 131 #endif // HW_BEACON_OFFSET //
 132
 133         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 134         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 135         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 136         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 137         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 138         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 139         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 140         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 141         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 142         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 143         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 144         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 145         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 146         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 147         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 148         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 149         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 150         {GF40_PROT_CFG,                 0x03F44084},
 151         {MM20_PROT_CFG,                 0x01744004},
 152         {MM40_PROT_CFG,                 0x03F54084},
 153         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 154         {TX_RTS_CFG,                    0x00092b20},
 155         {EXP_ACK_TIME,                  0x002400ca},    // default value
 156         {TXOP_HLDR_ET,                  0x00000002},
 157
 158         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 159                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 160                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 161                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 162         {XIFS_TIME_CFG,                 0x33a41010},
 163         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 164 };
 165
 166 RTMP_REG_PAIR   STAMACRegTable[] =      {
 167         {WMM_AIFSN_CFG,         0x00002273},
 168         {WMM_CWMIN_CFG, 0x00002344},
 169         {WMM_CWMAX_CFG, 0x000034aa},
 170 };
 171
 172 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 173 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 174
 175
 176 // New 8k byte firmware size for RT3071/RT3072
 177 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 178 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 179 #define FIRMWARE_MAJOR_VERSION  0
 180
 181 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 182 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 183
 184 #define FIRMWARE_MINOR_VERSION  2
 185
 186
 187 /*
 188         ========================================================================
 189
 190         Routine Description:
 191                 Allocate RTMP_ADAPTER data block and do some initialization
 192
 193         Arguments:
 194                 Adapter         Pointer to our adapter
 195
 196         Return Value:
 197                 NDIS_STATUS_SUCCESS
 198                 NDIS_STATUS_FAILURE
 199
 200         IRQL = PASSIVE_LEVEL
 201
 202         Note:
 203
 204         ========================================================================
 205 */
 206 NDIS_STATUS     RTMPAllocAdapterBlock(
 207         IN  PVOID       handle,
 208         OUT     PRTMP_ADAPTER   *ppAdapter)
 209 {
 210         PRTMP_ADAPTER   pAd;
 211         NDIS_STATUS             Status;
 212         INT                     index;
 213         UCHAR                   *pBeaconBuf = NULL;
 214
 215         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 216
 217         *ppAdapter = NULL;
 218
 219         do
 220         {
 221                 // Allocate RTMP_ADAPTER memory block
 222                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 223                 if (pBeaconBuf == NULL)
 224                 {
 225                         Status = NDIS_STATUS_FAILURE;
 226                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 227                         break;
 228                 }
 229
 230                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 231                 if (Status != NDIS_STATUS_SUCCESS)
 232                 {
 233                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 234                         break;
 235                 }
 236                 pAd->BeaconBuf = pBeaconBuf;
 237                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 238
 239
 240                 // Init spin locks
 241                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 242                 NdisAllocateSpinLock(&pAd->RxRingLock);
 243
 244                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 245                 {
 246                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 247                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 248                         pAd->DeQueueRunning[index] = FALSE;
 249                 }
 250
 251                 NdisAllocateSpinLock(&pAd->irq_lock);
 252
 253         } while (FALSE);
 254
 255         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 256                 kfree(pBeaconBuf);
 257
 258         *ppAdapter = pAd;
 259
 260         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 261         return Status;
 262 }
 263
 264 /*
 265         ========================================================================
 266
 267         Routine Description:
 268                 Read initial Tx power per MCS and BW from EEPROM
 269
 270         Arguments:
 271                 Adapter                                         Pointer to our adapter
 272
 273         Return Value:
 274                 None
 275
 276         IRQL = PASSIVE_LEVEL
 277
 278         Note:
 279
 280         ========================================================================
 281 */
 282 VOID    RTMPReadTxPwrPerRate(
 283         IN      PRTMP_ADAPTER   pAd)
 284 {
 285         ULONG           data, Adata, Gdata;
 286         USHORT          i, value, value2;
 287         INT                     Apwrdelta, Gpwrdelta;
 288         UCHAR           t1,t2,t3,t4;
 289         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 290
 291         //
 292         // Get power delta for 20MHz and 40MHz.
 293         //
 294         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 295         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 296         Apwrdelta = 0;
 297         Gpwrdelta = 0;
 298
 299         if ((value2 & 0xff) != 0xff)
 300         {
 301                 if ((value2 & 0x80))
 302                         Gpwrdelta = (value2&0xf);
 303
 304                 if ((value2 & 0x40))
 305                         bGpwrdeltaMinus = FALSE;
 306                 else
 307                         bGpwrdeltaMinus = TRUE;
 308         }
 309         if ((value2 & 0xff00) != 0xff00)
 310         {
 311                 if ((value2 & 0x8000))
 312                         Apwrdelta = ((value2&0xf00)>>8);
 313
 314                 if ((value2 & 0x4000))
 315                         bApwrdeltaMinus = FALSE;
 316                 else
 317                         bApwrdeltaMinus = TRUE;
 318         }
 319         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 320
 321         //
 322         // Get Txpower per MCS for 20MHz in 2.4G.
 323         //
 324         for (i=0; i<5; i++)
 325         {
 326                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 327                 data = value;
 328                 if (bApwrdeltaMinus == FALSE)
 329                 {
 330                         t1 = (value&0xf)+(Apwrdelta);
 331                         if (t1 > 0xf)
 332                                 t1 = 0xf;
 333                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 334                         if (t2 > 0xf)
 335                                 t2 = 0xf;
 336                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 337                         if (t3 > 0xf)
 338                                 t3 = 0xf;
 339                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 340                         if (t4 > 0xf)
 341                                 t4 = 0xf;
 342                 }
 343                 else
 344                 {
 345                         if ((value&0xf) > Apwrdelta)
 346                                 t1 = (value&0xf)-(Apwrdelta);
 347                         else
 348                                 t1 = 0;
 349                         if (((value&0xf0)>>4) > Apwrdelta)
 350                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 351                         else
 352                                 t2 = 0;
 353                         if (((value&0xf00)>>8) > Apwrdelta)
 354                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 355                         else
 356                                 t3 = 0;
 357                         if (((value&0xf000)>>12) > Apwrdelta)
 358                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 359                         else
 360                                 t4 = 0;
 361                 }
 362                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 363                 if (bGpwrdeltaMinus == FALSE)
 364                 {
 365                         t1 = (value&0xf)+(Gpwrdelta);
 366                         if (t1 > 0xf)
 367                                 t1 = 0xf;
 368                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 369                         if (t2 > 0xf)
 370                                 t2 = 0xf;
 371                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 372                         if (t3 > 0xf)
 373                                 t3 = 0xf;
 374                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 375                         if (t4 > 0xf)
 376                                 t4 = 0xf;
 377                 }
 378                 else
 379                 {
 380                         if ((value&0xf) > Gpwrdelta)
 381                                 t1 = (value&0xf)-(Gpwrdelta);
 382                         else
 383                                 t1 = 0;
 384                         if (((value&0xf0)>>4) > Gpwrdelta)
 385                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 386                         else
 387                                 t2 = 0;
 388                         if (((value&0xf00)>>8) > Gpwrdelta)
 389                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 390                         else
 391                                 t3 = 0;
 392                         if (((value&0xf000)>>12) > Gpwrdelta)
 393                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 394                         else
 395                                 t4 = 0;
 396                 }
 397                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 398
 399                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 400                 if (bApwrdeltaMinus == FALSE)
 401                 {
 402                         t1 = (value&0xf)+(Apwrdelta);
 403                         if (t1 > 0xf)
 404                                 t1 = 0xf;
 405                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 406                         if (t2 > 0xf)
 407                                 t2 = 0xf;
 408                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 409                         if (t3 > 0xf)
 410                                 t3 = 0xf;
 411                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 412                         if (t4 > 0xf)
 413                                 t4 = 0xf;
 414                 }
 415                 else
 416                 {
 417                         if ((value&0xf) > Apwrdelta)
 418                                 t1 = (value&0xf)-(Apwrdelta);
 419                         else
 420                                 t1 = 0;
 421                         if (((value&0xf0)>>4) > Apwrdelta)
 422                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 423                         else
 424                                 t2 = 0;
 425                         if (((value&0xf00)>>8) > Apwrdelta)
 426                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 427                         else
 428                                 t3 = 0;
 429                         if (((value&0xf000)>>12) > Apwrdelta)
 430                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 431                         else
 432                                 t4 = 0;
 433                 }
 434                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 435                 if (bGpwrdeltaMinus == FALSE)
 436                 {
 437                         t1 = (value&0xf)+(Gpwrdelta);
 438                         if (t1 > 0xf)
 439                                 t1 = 0xf;
 440                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 441                         if (t2 > 0xf)
 442                                 t2 = 0xf;
 443                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 444                         if (t3 > 0xf)
 445                                 t3 = 0xf;
 446                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 447                         if (t4 > 0xf)
 448                                 t4 = 0xf;
 449                 }
 450                 else
 451                 {
 452                         if ((value&0xf) > Gpwrdelta)
 453                                 t1 = (value&0xf)-(Gpwrdelta);
 454                         else
 455                                 t1 = 0;
 456                         if (((value&0xf0)>>4) > Gpwrdelta)
 457                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 458                         else
 459                                 t2 = 0;
 460                         if (((value&0xf00)>>8) > Gpwrdelta)
 461                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 462                         else
 463                                 t3 = 0;
 464                         if (((value&0xf000)>>12) > Gpwrdelta)
 465                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 466                         else
 467                                 t4 = 0;
 468                 }
 469                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 470                 data |= (value<<16);
 471
 472                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 473                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 474
 475                 if (data != 0xffffffff)
 476                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 477                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 478         }
 479
 480         //
 481         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 482         //
 483         bValid = TRUE;
 484         for (i=0; i<6; i++)
 485         {
 486                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 487                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 488                 {
 489                         bValid = FALSE;
 490                         break;
 491                 }
 492         }
 493
 494         //
 495         // Get Txpower per MCS for 40MHz in 2.4G.
 496         //
 497         if (bValid)
 498         {
 499                 for (i=0; i<4; i++)
 500                 {
 501                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 502                         if (bGpwrdeltaMinus == FALSE)
 503                         {
 504                                 t1 = (value&0xf)+(Gpwrdelta);
 505                                 if (t1 > 0xf)
 506                                         t1 = 0xf;
 507                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 508                                 if (t2 > 0xf)
 509                                         t2 = 0xf;
 510                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 511                                 if (t3 > 0xf)
 512                                         t3 = 0xf;
 513                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 514                                 if (t4 > 0xf)
 515                                         t4 = 0xf;
 516                         }
 517                         else
 518                         {
 519                                 if ((value&0xf) > Gpwrdelta)
 520                                         t1 = (value&0xf)-(Gpwrdelta);
 521                                 else
 522                                         t1 = 0;
 523                                 if (((value&0xf0)>>4) > Gpwrdelta)
 524                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 525                                 else
 526                                         t2 = 0;
 527                                 if (((value&0xf00)>>8) > Gpwrdelta)
 528                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 529                                 else
 530                                         t3 = 0;
 531                                 if (((value&0xf000)>>12) > Gpwrdelta)
 532                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 533                                 else
 534                                         t4 = 0;
 535                         }
 536                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 537
 538                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 539                         if (bGpwrdeltaMinus == FALSE)
 540                         {
 541                                 t1 = (value&0xf)+(Gpwrdelta);
 542                                 if (t1 > 0xf)
 543                                         t1 = 0xf;
 544                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 545                                 if (t2 > 0xf)
 546                                         t2 = 0xf;
 547                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 548                                 if (t3 > 0xf)
 549                                         t3 = 0xf;
 550                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 551                                 if (t4 > 0xf)
 552                                         t4 = 0xf;
 553                         }
 554                         else
 555                         {
 556                                 if ((value&0xf) > Gpwrdelta)
 557                                         t1 = (value&0xf)-(Gpwrdelta);
 558                                 else
 559                                         t1 = 0;
 560                                 if (((value&0xf0)>>4) > Gpwrdelta)
 561                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 562                                 else
 563                                         t2 = 0;
 564                                 if (((value&0xf00)>>8) > Gpwrdelta)
 565                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 566                                 else
 567                                         t3 = 0;
 568                                 if (((value&0xf000)>>12) > Gpwrdelta)
 569                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 570                                 else
 571                                         t4 = 0;
 572                         }
 573                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 574
 575                         if (i == 0)
 576                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 577                         else
 578                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 579
 580                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 581                 }
 582         }
 583
 584         //
 585         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 586         //
 587         bValid = TRUE;
 588         for (i=0; i<8; i++)
 589         {
 590                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 591                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 592                 {
 593                         bValid = FALSE;
 594                         break;
 595                 }
 596         }
 597
 598         //
 599         // Get Txpower per MCS for 20MHz in 5G.
 600         //
 601         if (bValid)
 602         {
 603                 for (i=0; i<5; i++)
 604                 {
 605                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 606                         if (bApwrdeltaMinus == FALSE)
 607                         {
 608                                 t1 = (value&0xf)+(Apwrdelta);
 609                                 if (t1 > 0xf)
 610                                         t1 = 0xf;
 611                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 612                                 if (t2 > 0xf)
 613                                         t2 = 0xf;
 614                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 615                                 if (t3 > 0xf)
 616                                         t3 = 0xf;
 617                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 618                                 if (t4 > 0xf)
 619                                         t4 = 0xf;
 620                         }
 621                         else
 622                         {
 623                                 if ((value&0xf) > Apwrdelta)
 624                                         t1 = (value&0xf)-(Apwrdelta);
 625                                 else
 626                                         t1 = 0;
 627                                 if (((value&0xf0)>>4) > Apwrdelta)
 628                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 629                                 else
 630                                         t2 = 0;
 631                                 if (((value&0xf00)>>8) > Apwrdelta)
 632                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 633                                 else
 634                                         t3 = 0;
 635                                 if (((value&0xf000)>>12) > Apwrdelta)
 636                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 637                                 else
 638                                         t4 = 0;
 639                         }
 640                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 641
 642                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 643                         if (bApwrdeltaMinus == FALSE)
 644                         {
 645                                 t1 = (value&0xf)+(Apwrdelta);
 646                                 if (t1 > 0xf)
 647                                         t1 = 0xf;
 648                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 649                                 if (t2 > 0xf)
 650                                         t2 = 0xf;
 651                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 652                                 if (t3 > 0xf)
 653                                         t3 = 0xf;
 654                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 655                                 if (t4 > 0xf)
 656                                         t4 = 0xf;
 657                         }
 658                         else
 659                         {
 660                                 if ((value&0xf) > Apwrdelta)
 661                                         t1 = (value&0xf)-(Apwrdelta);
 662                                 else
 663                                         t1 = 0;
 664                                 if (((value&0xf0)>>4) > Apwrdelta)
 665                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 666                                 else
 667                                         t2 = 0;
 668                                 if (((value&0xf00)>>8) > Apwrdelta)
 669                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 670                                 else
 671                                         t3 = 0;
 672                                 if (((value&0xf000)>>12) > Apwrdelta)
 673                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 674                                 else
 675                                         t4 = 0;
 676                         }
 677                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 678
 679                         if (i == 0)
 680                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 681                         else
 682                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 683
 684                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 685                 }
 686         }
 687
 688         //
 689         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 690         //
 691         bValid = TRUE;
 692         for (i=0; i<6; i++)
 693         {
 694                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 695                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 696                 {
 697                         bValid = FALSE;
 698                         break;
 699                 }
 700         }
 701
 702         //
 703         // Get Txpower per MCS for 40MHz in 5G.
 704         //
 705         if (bValid)
 706         {
 707                 for (i=0; i<4; i++)
 708                 {
 709                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 710                         if (bApwrdeltaMinus == FALSE)
 711                         {
 712                                 t1 = (value&0xf)+(Apwrdelta);
 713                                 if (t1 > 0xf)
 714                                         t1 = 0xf;
 715                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 716                                 if (t2 > 0xf)
 717                                         t2 = 0xf;
 718                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 719                                 if (t3 > 0xf)
 720                                         t3 = 0xf;
 721                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 722                                 if (t4 > 0xf)
 723                                         t4 = 0xf;
 724                         }
 725                         else
 726                         {
 727                                 if ((value&0xf) > Apwrdelta)
 728                                         t1 = (value&0xf)-(Apwrdelta);
 729                                 else
 730                                         t1 = 0;
 731                                 if (((value&0xf0)>>4) > Apwrdelta)
 732                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 733                                 else
 734                                         t2 = 0;
 735                                 if (((value&0xf00)>>8) > Apwrdelta)
 736                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 737                                 else
 738                                         t3 = 0;
 739                                 if (((value&0xf000)>>12) > Apwrdelta)
 740                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 741                                 else
 742                                         t4 = 0;
 743                         }
 744                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 745
 746                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 747                         if (bApwrdeltaMinus == FALSE)
 748                         {
 749                                 t1 = (value&0xf)+(Apwrdelta);
 750                                 if (t1 > 0xf)
 751                                         t1 = 0xf;
 752                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 753                                 if (t2 > 0xf)
 754                                         t2 = 0xf;
 755                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 756                                 if (t3 > 0xf)
 757                                         t3 = 0xf;
 758                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 759                                 if (t4 > 0xf)
 760                                         t4 = 0xf;
 761                         }
 762                         else
 763                         {
 764                                 if ((value&0xf) > Apwrdelta)
 765                                         t1 = (value&0xf)-(Apwrdelta);
 766                                 else
 767                                         t1 = 0;
 768                                 if (((value&0xf0)>>4) > Apwrdelta)
 769                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 770                                 else
 771                                         t2 = 0;
 772                                 if (((value&0xf00)>>8) > Apwrdelta)
 773                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 774                                 else
 775                                         t3 = 0;
 776                                 if (((value&0xf000)>>12) > Apwrdelta)
 777                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 778                                 else
 779                                         t4 = 0;
 780                         }
 781                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 782
 783                         if (i == 0)
 784                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 785                         else
 786                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 787
 788                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 789                 }
 790         }
 791 }
 792
 793
 794 /*
 795         ========================================================================
 796
 797         Routine Description:
 798                 Read initial channel power parameters from EEPROM
 799
 800         Arguments:
 801                 Adapter                                         Pointer to our adapter
 802
 803         Return Value:
 804                 None
 805
 806         IRQL = PASSIVE_LEVEL
 807
 808         Note:
 809
 810         ========================================================================
 811 */
 812 VOID    RTMPReadChannelPwr(
 813         IN      PRTMP_ADAPTER   pAd)
 814 {
 815         UCHAR                           i, choffset;
 816         EEPROM_TX_PWR_STRUC         Power;
 817         EEPROM_TX_PWR_STRUC         Power2;
 818
 819         // Read Tx power value for all channels
 820         // Value from 1 - 0x7f. Default value is 24.
 821         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 822         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 823
 824         // 0. 11b/g, ch1 - ch 14
 825         for (i = 0; i < 7; i++)
 826         {
 827                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 828                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 829                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 830                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 831
 832                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 833                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 834                 else
 835                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 836
 837                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 838                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 839                 else
 840                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 841
 842                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 843                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 844                 else
 845                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 846
 847                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 848                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 849                 else
 850                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 851         }
 852
 853         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 854         // 1.1 Fill up channel
 855         choffset = 14;
 856         for (i = 0; i < 4; i++)
 857         {
 858                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 859                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 860                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 861
 862                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 863                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 864                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 865
 866                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 867                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 868                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 869         }
 870
 871         // 1.2 Fill up power
 872         for (i = 0; i < 6; i++)
 873         {
 874                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 875                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 876
 877                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 878                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 879
 880                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 881                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 882
 883                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 884                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 885
 886                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 887                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 888         }
 889
 890         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 891         // 2.1 Fill up channel
 892         choffset = 14 + 12;
 893         for (i = 0; i < 5; i++)
 894         {
 895                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 896                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 897                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 898
 899                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 900                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 901                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 902
 903                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 904                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 905                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 906         }
 907         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 908         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 909         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 910
 911         // 2.2 Fill up power
 912         for (i = 0; i < 8; i++)
 913         {
 914                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 915                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 916
 917                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 918                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 919
 920                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 921                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 922
 923                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 924                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 925
 926                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 927                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 928         }
 929
 930         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
 931         // 3.1 Fill up channel
 932         choffset = 14 + 12 + 16;
 933         for (i = 0; i < 2; i++)
 934         {
 935                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 936                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 937                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 938
 939                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 940                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 941                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 942
 943                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 944                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 945                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 946         }
 947         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
 948         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 949         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 950
 951         // 3.2 Fill up power
 952         for (i = 0; i < 4; i++)
 953         {
 954                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 955                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 956
 957                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 958                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 959
 960                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 961                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 962
 963                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 964                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 965
 966                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 967                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 968         }
 969
 970         // 4. Print and Debug
 971         choffset = 14 + 12 + 16 + 7;
 972
 973
 974 #if 0
 975         // Init the 802.11j channel number for TX channel power
 976         // 0. 20MHz
 977         for (i = 0; i < 3; i++)
 978         {
 979                 pAd->TxPower11J[i].Channel = 8 + i * 4;
 980                 pAd->TxPower11J[i].BW = BW_20;
 981         }
 982
 983         for (i = 0; i < 4; i++)
 984         {
 985                 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
 986                 pAd->TxPower11J[i + 3].BW = BW_20;
 987         }
 988
 989         for (i = 0; i < 4; i++)
 990         {
 991                 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
 992                 pAd->TxPower11J[i + 7].BW = BW_20;
 993         }
 994
 995         // 0. 10MHz
 996         for (i = 0; i < 2; i++)
 997         {
 998                 pAd->TxPower11J[i + 11].Channel = 7 + i;
 999                 pAd->TxPower11J[i + 11].BW = BW_10;
1000         }
1001         pAd->TxPower11J[13].Channel = 11;
1002         pAd->TxPower11J[13].BW = BW_10;
1003
1004         for (i = 0; i < 3; i++)
1005         {
1006                 pAd->TxPower11J[i + 14].Channel = 183 + i;
1007                 pAd->TxPower11J[i + 14].BW= BW_10;
1008         }
1009
1010         for (i = 0; i < 3; i++)
1011         {
1012                 pAd->TxPower11J[i + 17].Channel = 187 + i;
1013                 pAd->TxPower11J[i + 17].BW = BW_10;
1014         }
1015         for (i = 0; i < 10; i++)
1016         {
1017                 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1018                 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1019
1020                 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1021                         pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1022
1023                 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1024                         pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1025
1026                 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1027                         pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1028
1029                 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1030                         pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1031         }
1032 #endif
1033 }
1034
1035 /*
1036         ========================================================================
1037
1038         Routine Description:
1039                 Read the following from the registry
1040                 1. All the parameters
1041                 2. NetworkAddres
1042
1043         Arguments:
1044                 Adapter                                         Pointer to our adapter
1045                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1046
1047         Return Value:
1048                 NDIS_STATUS_SUCCESS
1049                 NDIS_STATUS_FAILURE
1050                 NDIS_STATUS_RESOURCES
1051
1052         IRQL = PASSIVE_LEVEL
1053
1054         Note:
1055
1056         ========================================================================
1057 */
1058 NDIS_STATUS     NICReadRegParameters(
1059         IN      PRTMP_ADAPTER           pAd,
1060         IN      NDIS_HANDLE                     WrapperConfigurationContext
1061         )
1062 {
1063         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1064         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1065         return Status;
1066 }
1067
1068
1069
1070
1071 /*
1072         ========================================================================
1073
1074         Routine Description:
1075                 Read initial parameters from EEPROM
1076
1077         Arguments:
1078                 Adapter                                         Pointer to our adapter
1079
1080         Return Value:
1081                 None
1082
1083         IRQL = PASSIVE_LEVEL
1084
1085         Note:
1086
1087         ========================================================================
1088 */
1089 VOID    NICReadEEPROMParameters(
1090         IN      PRTMP_ADAPTER   pAd,
1091         IN      PUCHAR                  mac_addr)
1092 {
1093         UINT32                  data = 0;
1094         USHORT                  i, value, value2;
1095         UCHAR                   TmpPhy;
1096         EEPROM_TX_PWR_STRUC         Power;
1097         EEPROM_VERSION_STRUC    Version;
1098         EEPROM_ANTENNA_STRUC    Antenna;
1099         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1100
1101         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1102
1103         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1104         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1105         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1106
1107         if((data & 0x30) == 0)
1108                 pAd->EEPROMAddressNum = 6;              // 93C46
1109         else if((data & 0x30) == 0x10)
1110                 pAd->EEPROMAddressNum = 8;     // 93C66
1111         else
1112                 pAd->EEPROMAddressNum = 8;     // 93C86
1113         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1114
1115         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1116         // MAC address registers according to E2PROM setting
1117         if (mac_addr == NULL ||
1118                 strlen(mac_addr) != 17 ||
1119                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1120                 mac_addr[11] != ':' || mac_addr[14] != ':')
1121         {
1122                 USHORT  Addr01,Addr23,Addr45 ;
1123
1124                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1125                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1126                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1127
1128                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1129                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1130                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1131                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1132                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1133                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1134
1135                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1136         }
1137         else
1138         {
1139                 INT             j;
1140                 PUCHAR  macptr;
1141
1142                 macptr = mac_addr;
1143
1144                 for (j=0; j<MAC_ADDR_LEN; j++)
1145                 {
1146                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1147                         macptr=macptr+3;
1148                 }
1149
1150                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1151         }
1152
1153
1154         {
1155                 //more conveninet to test mbssid, so ap's bssid &0xf1
1156                 if (pAd->PermanentAddress[0] == 0xff)
1157                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1158
1159                 //if (pAd->PermanentAddress[5] == 0xff)
1160                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1161
1162                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1163                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1164                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1165                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1166                 if (pAd->bLocalAdminMAC == FALSE)
1167                 {
1168                         MAC_DW0_STRUC csr2;
1169                         MAC_DW1_STRUC csr3;
1170                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1171                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1172                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1173                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1174                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1175                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1176                         csr3.word = 0;
1177                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1178                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1179                         csr3.field.U2MeMask = 0xff;
1180                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1181                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1182                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1183                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1184                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1185                 }
1186         }
1187
1188         // if not return early. cause fail at emulation.
1189         // Init the channel number for TX channel power
1190         RTMPReadChannelPwr(pAd);
1191
1192         // if E2PROM version mismatch with driver's expectation, then skip
1193         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1194         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1195         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1196         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1197
1198         if (Version.field.Version > VALID_EEPROM_VERSION)
1199         {
1200                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1201                 /*pAd->SystemErrorBitmap |= 0x00000001;
1202
1203                 // hard-code default value when no proper E2PROM installed
1204                 pAd->bAutoTxAgcA = FALSE;
1205                 pAd->bAutoTxAgcG = FALSE;
1206
1207                 // Default the channel power
1208                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1209                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1210
1211                 // Default the channel power
1212                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1213                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1214
1215                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1216                         pAd->EEPROMDefaultValue[i] = 0xffff;
1217                 return;  */
1218         }
1219
1220         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1221         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1222         pAd->EEPROMDefaultValue[0] = value;
1223
1224         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1225         pAd->EEPROMDefaultValue[1] = value;
1226
1227         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1228         pAd->EEPROMDefaultValue[2] = value;
1229
1230         for(i = 0; i < 8; i++)
1231         {
1232                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1233                 pAd->EEPROMDefaultValue[i+3] = value;
1234         }
1235
1236         // We have to parse NIC configuration 0 at here.
1237         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1238         // Therefore, we have to read TxAutoAgc control beforehand.
1239         // Read Tx AGC control bit
1240         Antenna.word = pAd->EEPROMDefaultValue[0];
1241         if (Antenna.word == 0xFFFF)
1242         {
1243                 Antenna.word = 0;
1244                 Antenna.field.RfIcType = RFIC_2820;
1245                 Antenna.field.TxPath = 1;
1246                 Antenna.field.RxPath = 2;
1247                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1248         }
1249
1250         // Choose the desired Tx&Rx stream.
1251         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1252                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1253
1254         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1255         {
1256                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1257
1258                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1259                         (pAd->CommonCfg.RxStream > 2))
1260                 {
1261                         // only 2 Rx streams for RT2860 series
1262                         pAd->CommonCfg.RxStream = 2;
1263                 }
1264         }
1265
1266         // 3*3
1267         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1268         // yet implement
1269         for(i=0; i<3; i++)
1270         {
1271         }
1272
1273         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1274
1275         {
1276                 NicConfig2.word = 0;
1277                 if ((NicConfig2.word & 0x00ff) == 0xff)
1278                 {
1279                         NicConfig2.word &= 0xff00;
1280                 }
1281
1282                 if ((NicConfig2.word >> 8) == 0xff)
1283                 {
1284                         NicConfig2.word &= 0x00ff;
1285                 }
1286         }
1287
1288         if (NicConfig2.field.DynamicTxAgcControl == 1)
1289                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1290         else
1291                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1292
1293         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1294
1295         // Save the antenna for future use
1296         pAd->Antenna.word = Antenna.word;
1297
1298         //
1299         // Reset PhyMode if we don't support 802.11a
1300         // Only RFIC_2850 & RFIC_2750 support 802.11a
1301         //
1302         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1303         {
1304                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1305                         (pAd->CommonCfg.PhyMode == PHY_11A))
1306                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1307                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1308                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1309                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1310                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1311                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1312         }
1313
1314         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1315         // 0. 11b/g
1316         {
1317                 /* these are tempature reference value (0x00 ~ 0xFE)
1318                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1319                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1320                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1321                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1322                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1323                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1324                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1325                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1326                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1327                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1328                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1329                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1330                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1331                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1332                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1333                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1334                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1335                 pAd->TxAgcStepG = Power.field.Byte1;
1336                 pAd->TxAgcCompensateG = 0;
1337                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1338                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1339
1340                 // Disable TxAgc if the based value is not right
1341                 if (pAd->TssiRefG == 0xff)
1342                         pAd->bAutoTxAgcG = FALSE;
1343
1344                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1345                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1346                         pAd->TssiRefG,
1347                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1348                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1349         }
1350         // 1. 11a
1351         {
1352                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1353                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1354                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1355                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1356                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1357                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1358                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1359                 pAd->TssiRefA   = Power.field.Byte0;
1360                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1361                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1362                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1363                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1364                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1365                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1366                 pAd->TxAgcStepA = Power.field.Byte1;
1367                 pAd->TxAgcCompensateA = 0;
1368                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1369                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1370
1371                 // Disable TxAgc if the based value is not right
1372                 if (pAd->TssiRefA == 0xff)
1373                         pAd->bAutoTxAgcA = FALSE;
1374
1375                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1376                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1377                         pAd->TssiRefA,
1378                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1379                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1380         }
1381         pAd->BbpRssiToDbmDelta = 0x0;
1382
1383         // Read frequency offset setting for RF
1384         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1385         if ((value & 0x00FF) != 0x00FF)
1386                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1387         else
1388                 pAd->RfFreqOffset = 0;
1389         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1390
1391         //CountryRegion byte offset (38h)
1392         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1393         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1394
1395         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1396         {
1397                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1398                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1399                 TmpPhy = pAd->CommonCfg.PhyMode;
1400                 pAd->CommonCfg.PhyMode = 0xff;
1401                 RTMPSetPhyMode(pAd, TmpPhy);
1402                 SetCommonHT(pAd);
1403         }
1404
1405         //
1406         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1407         // The valid value are (-10 ~ 10)
1408         //
1409         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1410         pAd->BGRssiOffset0 = value & 0x00ff;
1411         pAd->BGRssiOffset1 = (value >> 8);
1412         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1413         pAd->BGRssiOffset2 = value & 0x00ff;
1414         pAd->ALNAGain1 = (value >> 8);
1415         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1416         pAd->BLNAGain = value & 0x00ff;
1417         pAd->ALNAGain0 = (value >> 8);
1418
1419         // Validate 11b/g RSSI_0 offset.
1420         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1421                 pAd->BGRssiOffset0 = 0;
1422
1423         // Validate 11b/g RSSI_1 offset.
1424         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1425                 pAd->BGRssiOffset1 = 0;
1426
1427         // Validate 11b/g RSSI_2 offset.
1428         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1429                 pAd->BGRssiOffset2 = 0;
1430
1431         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1432         pAd->ARssiOffset0 = value & 0x00ff;
1433         pAd->ARssiOffset1 = (value >> 8);
1434         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1435         pAd->ARssiOffset2 = value & 0x00ff;
1436         pAd->ALNAGain2 = (value >> 8);
1437
1438         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1439                 pAd->ALNAGain1 = pAd->ALNAGain0;
1440         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1441                 pAd->ALNAGain2 = pAd->ALNAGain0;
1442
1443         // Validate 11a RSSI_0 offset.
1444         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1445                 pAd->ARssiOffset0 = 0;
1446
1447         // Validate 11a RSSI_1 offset.
1448         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1449                 pAd->ARssiOffset1 = 0;
1450
1451         //Validate 11a RSSI_2 offset.
1452         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1453                 pAd->ARssiOffset2 = 0;
1454
1455         //
1456         // Get LED Setting.
1457         //
1458         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1459         pAd->LedCntl.word = (value&0xff00) >> 8;
1460         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1461         pAd->Led1 = value;
1462         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1463         pAd->Led2 = value;
1464         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1465         pAd->Led3 = value;
1466
1467         RTMPReadTxPwrPerRate(pAd);
1468
1469         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1470 }
1471
1472 /*
1473         ========================================================================
1474
1475         Routine Description:
1476                 Set default value from EEPROM
1477
1478         Arguments:
1479                 Adapter                                         Pointer to our adapter
1480
1481         Return Value:
1482                 None
1483
1484         IRQL = PASSIVE_LEVEL
1485
1486         Note:
1487
1488         ========================================================================
1489 */
1490 VOID    NICInitAsicFromEEPROM(
1491         IN      PRTMP_ADAPTER   pAd)
1492 {
1493         UINT32                                  data = 0;
1494         UCHAR   BBPR1 = 0;
1495         USHORT                                  i;
1496         EEPROM_ANTENNA_STRUC    Antenna;
1497         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1498         UCHAR   BBPR3 = 0;
1499
1500         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1501         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1502         {
1503                 UCHAR BbpRegIdx, BbpValue;
1504
1505                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1506                 {
1507                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1508                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1509                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1510                 }
1511         }
1512
1513         Antenna.word = pAd->Antenna.word;
1514         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1515         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1516
1517         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1518
1519
1520         // Save the antenna for future use
1521         pAd->NicConfig2.word = NicConfig2.word;
1522
1523         //
1524         // Send LED Setting to MCU.
1525         //
1526         if (pAd->LedCntl.word == 0xFF)
1527         {
1528                 pAd->LedCntl.word = 0x01;
1529                 pAd->Led1 = 0x5555;
1530                 pAd->Led2 = 0x2221;
1531                 pAd->Led3 = 0xA9F8;
1532         }
1533
1534         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1535         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1536         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1537     pAd->LedIndicatorStregth = 0xFF;
1538     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1539
1540         {
1541                 // Read Hardware controlled Radio state enable bit
1542                 if (NicConfig2.field.HardwareRadioControl == 1)
1543                 {
1544                         pAd->StaCfg.bHardwareRadio = TRUE;
1545
1546                         // Read GPIO pin2 as Hardware controlled radio state
1547                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1548                         if ((data & 0x04) == 0)
1549                         {
1550                                 pAd->StaCfg.bHwRadio = FALSE;
1551                                 pAd->StaCfg.bRadio = FALSE;
1552                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1553                         }
1554                 }
1555                 else
1556                         pAd->StaCfg.bHardwareRadio = FALSE;
1557
1558                 if (pAd->StaCfg.bRadio == FALSE)
1559                 {
1560                         RTMPSetLED(pAd, LED_RADIO_OFF);
1561                 }
1562                 else
1563                 {
1564                         RTMPSetLED(pAd, LED_RADIO_ON);
1565                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1566                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1567                         // 2-1. wait command ok.
1568                         AsicCheckCommanOk(pAd, PowerWakeCID);
1569                 }
1570         }
1571
1572         // Turn off patching for cardbus controller
1573         if (NicConfig2.field.CardbusAcceleration == 1)
1574         {
1575         }
1576
1577         if (NicConfig2.field.DynamicTxAgcControl == 1)
1578                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1579         else
1580                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1581         //
1582         // Since BBP has been progamed, to make sure BBP setting will be
1583         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1584         //
1585         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1586
1587         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1588         BBPR3 &= (~0x18);
1589         if(pAd->Antenna.field.RxPath == 3)
1590         {
1591                 BBPR3 |= (0x10);
1592         }
1593         else if(pAd->Antenna.field.RxPath == 2)
1594         {
1595                 BBPR3 |= (0x8);
1596         }
1597         else if(pAd->Antenna.field.RxPath == 1)
1598         {
1599                 BBPR3 |= (0x0);
1600         }
1601         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1602
1603         {
1604                 // Handle the difference when 1T
1605                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1606                 if(pAd->Antenna.field.TxPath == 1)
1607                 {
1608                 BBPR1 &= (~0x18);
1609                 }
1610                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1611
1612                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1613         }
1614
1615         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1616         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1617 }
1618
1619 /*
1620         ========================================================================
1621
1622         Routine Description:
1623                 Initialize NIC hardware
1624
1625         Arguments:
1626                 Adapter                                         Pointer to our adapter
1627
1628         Return Value:
1629                 None
1630
1631         IRQL = PASSIVE_LEVEL
1632
1633         Note:
1634
1635         ========================================================================
1636 */
1637 NDIS_STATUS     NICInitializeAdapter(
1638         IN      PRTMP_ADAPTER   pAd,
1639         IN   BOOLEAN    bHardReset)
1640 {
1641         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1642         WPDMA_GLO_CFG_STRUC     GloCfg;
1643         UINT32                  Value;
1644         DELAY_INT_CFG_STRUC     IntCfg;
1645         ULONG   i =0, j=0;
1646         AC_TXOP_CSR0_STRUC      csr0;
1647
1648         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1649
1650         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1651 retry:
1652         i = 0;
1653         do
1654         {
1655                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1656                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1657                         break;
1658
1659                 RTMPusecDelay(1000);
1660                 i++;
1661         }while ( i<100);
1662         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1663         GloCfg.word &= 0xff0;
1664         GloCfg.field.EnTXWriteBackDDONE =1;
1665         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1666
1667         // Record HW Beacon offset
1668         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1669         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1670         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1671         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1672         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1673         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1674         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1675         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1676
1677         //
1678         // write all shared Ring's base address into ASIC
1679         //
1680
1681         // asic simulation sequence put this ahead before loading firmware.
1682         // pbf hardware reset
1683         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1684         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1685         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1686
1687         // Initialze ASIC for TX & Rx operation
1688         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1689         {
1690                 if (j++ == 0)
1691                 {
1692                         NICLoadFirmware(pAd);
1693                         goto retry;
1694                 }
1695                 return NDIS_STATUS_FAILURE;
1696         }
1697
1698
1699         // Write AC_BK base address register
1700         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1701         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1702         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1703
1704         // Write AC_BE base address register
1705         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1706         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1707         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1708
1709         // Write AC_VI base address register
1710         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1711         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1712         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1713
1714         // Write AC_VO base address register
1715         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1716         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1717         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1718
1719         // Write HCCA base address register
1720           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1721           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1722         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1723
1724         // Write MGMT_BASE_CSR register
1725         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1726         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1727         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1728
1729         // Write RX_BASE_CSR register
1730         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1731         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1732         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1733
1734         // Init RX Ring index pointer
1735         pAd->RxRing.RxSwReadIdx = 0;
1736         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1737         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1738
1739         // Init TX rings index pointer
1740         {
1741                 for (i=0; i<NUM_OF_TX_RING; i++)
1742                 {
1743                         pAd->TxRing[i].TxSwFreeIdx = 0;
1744                         pAd->TxRing[i].TxCpuIdx = 0;
1745                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1746                 }
1747         }
1748
1749         // init MGMT ring index pointer
1750         pAd->MgmtRing.TxSwFreeIdx = 0;
1751         pAd->MgmtRing.TxCpuIdx = 0;
1752         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1753
1754         //
1755         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1756         //
1757
1758         // Write TX_RING_CSR0 register
1759         Value = TX_RING_SIZE;
1760         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1761         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1762         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1763         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1764         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1765         Value = MGMT_RING_SIZE;
1766         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1767
1768         // Write RX_RING_CSR register
1769         Value = RX_RING_SIZE;
1770         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1771
1772
1773         // WMM parameter
1774         csr0.word = 0;
1775         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1776         if (pAd->CommonCfg.PhyMode == PHY_11B)
1777         {
1778                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1779                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1780         }
1781         else
1782         {
1783                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1784                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1785         }
1786         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1787
1788
1789         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1790         i = 0;
1791         do
1792         {
1793                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1794                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1795                         break;
1796
1797                 RTMPusecDelay(1000);
1798                 i++;
1799         }while ( i < 100);
1800
1801         GloCfg.word &= 0xff0;
1802         GloCfg.field.EnTXWriteBackDDONE =1;
1803         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1804
1805         IntCfg.word = 0;
1806         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1807
1808
1809         // reset action
1810         // Load firmware
1811         //  Status = NICLoadFirmware(pAd);
1812
1813         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1814         return Status;
1815 }
1816
1817 /*
1818         ========================================================================
1819
1820         Routine Description:
1821                 Initialize ASIC
1822
1823         Arguments:
1824                 Adapter                                         Pointer to our adapter
1825
1826         Return Value:
1827                 None
1828
1829         IRQL = PASSIVE_LEVEL
1830
1831         Note:
1832
1833         ========================================================================
1834 */
1835 NDIS_STATUS     NICInitializeAsic(
1836         IN      PRTMP_ADAPTER   pAd,
1837         IN  BOOLEAN             bHardReset)
1838 {
1839         ULONG                   Index = 0;
1840         UCHAR                   R0 = 0xff;
1841         UINT32                  MacCsr12 = 0, Counter = 0;
1842         USHORT                  KeyIdx;
1843         INT                             i,apidx;
1844
1845         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1846
1847         if (bHardReset == TRUE)
1848         {
1849                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1850         }
1851         else
1852                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1853
1854         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1855         // Initialize MAC register to default value
1856         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1857         {
1858                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1859         }
1860
1861
1862         {
1863                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1864                 {
1865                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1866                 }
1867         }
1868
1869         //
1870         // Before program BBP, we need to wait BBP/RF get wake up.
1871         //
1872         Index = 0;
1873         do
1874         {
1875                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1876
1877                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1878                         break;
1879
1880                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1881                 RTMPusecDelay(1000);
1882         } while (Index++ < 100);
1883
1884     // The commands to firmware should be after these commands, these commands will init firmware
1885         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1886         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1887         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1888         RTMPusecDelay(1000);
1889
1890         // Read BBP register, make sure BBP is up and running before write new data
1891         Index = 0;
1892         do
1893         {
1894                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1895                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1896         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1897         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1898
1899         if ((R0 == 0xff) || (R0 == 0x00))
1900                 return NDIS_STATUS_FAILURE;
1901
1902         // Initialize BBP register to default value
1903         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1904         {
1905                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1906         }
1907
1908         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1909         if ((pAd->MACVersion&0xffff) != 0x0101)
1910                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1911
1912
1913         if (pAd->MACVersion == 0x28600100)
1914         {
1915                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1916                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1917     }
1918
1919         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1920         {
1921                 // enlarge MAX_LEN_CFG
1922                 UINT32 csr;
1923                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1924                 csr &= 0xFFF;
1925                 csr |= 0x2000;
1926                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1927         }
1928
1929
1930         // Add radio off control
1931         {
1932                 if (pAd->StaCfg.bRadio == FALSE)
1933                 {
1934 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1935                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1936                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1937                 }
1938         }
1939
1940         // Clear raw counters
1941         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1942         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1943         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1944         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1945         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1946         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1947
1948         // ASIC will keep garbage value after boot
1949         // Clear all seared key table when initial
1950         // This routine can be ignored in radio-ON/OFF operation.
1951         if (bHardReset)
1952         {
1953                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1954                 {
1955                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1956                 }
1957
1958                 // Clear all pairwise key table when initial
1959                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1960                 {
1961                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1962                 }
1963         }
1964
1965
1966         // It isn't necessary to clear this space when not hard reset.
1967         if (bHardReset == TRUE)
1968         {
1969                 // clear all on-chip BEACON frame space
1970                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1971                 {
1972                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1973                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1974                 }
1975         }
1976
1977         {
1978                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1979                 if ((pAd->MACVersion&0xffff) != 0x0101)
1980                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1981         }
1982
1983         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1984         return NDIS_STATUS_SUCCESS;
1985 }
1986
1987
1988 VOID NICRestoreBBPValue(
1989         IN PRTMP_ADAPTER pAd)
1990 {
1991         UCHAR           index;
1992         UCHAR           Value = 0;
1993         ULONG           Data;
1994
1995         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
1996         // Initialize BBP register to default value (rtmp_init.c)
1997         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
1998         {
1999                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2000         }
2001         // copy from (rtmp_init.c)
2002         if (pAd->MACVersion == 0x28600100)
2003         {
2004                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2005                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2006         }
2007
2008         // copy from (connect.c LinkUp function)
2009         if (INFRA_ON(pAd))
2010         {
2011                 // Change to AP channel
2012                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2013                 {
2014                         // Must using 40MHz.
2015                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2016                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2017                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2018
2019                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2020                         Value &= (~0x18);
2021                         Value |= 0x10;
2022                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2023
2024                         //  RX : control channel at lower
2025                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2026                         Value &= (~0x20);
2027                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2028                         // Record BBPR3 setting, But don't keep R Antenna # information.
2029                         pAd->StaCfg.BBPR3 = Value;
2030
2031                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2032                         Data &= 0xfffffffe;
2033                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2034
2035                         if (pAd->MACVersion == 0x28600100)
2036                         {
2037                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2038                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2039                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2040                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2041                         }
2042
2043                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2044                 }
2045                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2046                 {
2047                         // Must using 40MHz.
2048                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2049                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2050                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2051
2052                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2053                         Value &= (~0x18);
2054                         Value |= 0x10;
2055                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2056
2057                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2058                         Data |= 0x1;
2059                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2060
2061                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2062                         Value |= (0x20);
2063                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2064                         // Record BBPR3 setting, But don't keep R Antenna # information.
2065                         pAd->StaCfg.BBPR3 = Value;
2066
2067                         if (pAd->MACVersion == 0x28600100)
2068                         {
2069                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2070                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2071                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2072                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2073                         }
2074
2075                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2076                 }
2077                 else
2078                 {
2079                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2080                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2081                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2082
2083                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2084                         Value &= (~0x18);
2085                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2086
2087                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2088                         Data &= 0xfffffffe;
2089                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2090
2091                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2092                         Value &= (~0x20);
2093                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2094                         // Record BBPR3 setting, But don't keep R Antenna # information.
2095                         pAd->StaCfg.BBPR3 = Value;
2096
2097                         if (pAd->MACVersion == 0x28600100)
2098                         {
2099                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2100                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2101                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2102                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2103                         }
2104
2105                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2106                 }
2107         }
2108
2109         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2110 }
2111
2112 /*
2113         ========================================================================
2114
2115         Routine Description:
2116                 Reset NIC Asics
2117
2118         Arguments:
2119                 Adapter                                         Pointer to our adapter
2120
2121         Return Value:
2122                 None
2123
2124         IRQL = PASSIVE_LEVEL
2125
2126         Note:
2127                 Reset NIC to initial state AS IS system boot up time.
2128
2129         ========================================================================
2130 */
2131 VOID    NICIssueReset(
2132         IN      PRTMP_ADAPTER   pAd)
2133 {
2134         UINT32  Value = 0;
2135         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2136
2137         // Disable Rx, register value supposed will remain after reset
2138         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2139         Value &= (0xfffffff3);
2140         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2141
2142         // Issue reset and clear from reset state
2143         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2144         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2145
2146         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2147 }
2148
2149 /*
2150         ========================================================================
2151
2152         Routine Description:
2153                 Check ASIC registers and find any reason the system might hang
2154
2155         Arguments:
2156                 Adapter                                         Pointer to our adapter
2157
2158         Return Value:
2159                 None
2160
2161         IRQL = DISPATCH_LEVEL
2162
2163         ========================================================================
2164 */
2165 BOOLEAN NICCheckForHang(
2166         IN      PRTMP_ADAPTER   pAd)
2167 {
2168         return (FALSE);
2169 }
2170
2171 VOID NICUpdateFifoStaCounters(
2172         IN PRTMP_ADAPTER pAd)
2173 {
2174         TX_STA_FIFO_STRUC       StaFifo;
2175         MAC_TABLE_ENTRY         *pEntry;
2176         UCHAR                           i = 0;
2177         UCHAR                   pid = 0, wcid = 0;
2178         CHAR                            reTry;
2179         UCHAR                           succMCS;
2180
2181                 do
2182                 {
2183                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2184
2185                         if (StaFifo.field.bValid == 0)
2186                                 break;
2187
2188                         wcid = (UCHAR)StaFifo.field.wcid;
2189
2190
2191                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2192                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2193                         {
2194                                 i++;
2195                                 continue;
2196                         }
2197
2198                         /* PID store Tx MCS Rate */
2199                         pid = (UCHAR)StaFifo.field.PidType;
2200
2201                         pEntry = &pAd->MacTab.Content[wcid];
2202
2203                         pEntry->DebugFIFOCount++;
2204
2205                         if (StaFifo.field.TxBF) // 3*3
2206                                 pEntry->TxBFCount++;
2207
2208 #ifdef UAPSD_AP_SUPPORT
2209                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2210 #endif // UAPSD_AP_SUPPORT //
2211
2212                         if (!StaFifo.field.TxSuccess)
2213                         {
2214                                 pEntry->FIFOCount++;
2215                                 pEntry->OneSecTxFailCount++;
2216
2217                                 if (pEntry->FIFOCount >= 1)
2218                                 {
2219                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2220 #if 0
2221                                         SendRefreshBAR(pAd, pEntry);
2222                                         pEntry->NoBADataCountDown = 64;
2223 #else
2224                                         pEntry->NoBADataCountDown = 64;
2225
2226                                         if(pEntry->PsMode == PWR_ACTIVE)
2227                                         {
2228                                                 int tid;
2229                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2230                                                 {
2231                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2232                                                 }
2233
2234                                                 // Update the continuous transmission counter except PS mode
2235                                                 pEntry->ContinueTxFailCnt++;
2236                                         }
2237                                         else
2238                                         {
2239                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2240                                                 //     this tx error happened due to sta just go to sleep.
2241                                                 pEntry->FIFOCount = 0;
2242                                                 pEntry->ContinueTxFailCnt = 0;
2243                                         }
2244 #endif
2245                                         //pEntry->FIFOCount = 0;
2246                                 }
2247                                 //pEntry->bSendBAR = TRUE;
2248                         }
2249                         else
2250                         {
2251                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2252                                 {
2253                                         pEntry->NoBADataCountDown--;
2254                                         if (pEntry->NoBADataCountDown==0)
2255                                         {
2256                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2257                                         }
2258                                 }
2259
2260                                 pEntry->FIFOCount = 0;
2261                                 pEntry->OneSecTxNoRetryOkCount++;
2262                                 // update NoDataIdleCount when sucessful send packet to STA.
2263                                 pEntry->NoDataIdleCount = 0;
2264                                 pEntry->ContinueTxFailCnt = 0;
2265                         }
2266
2267                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2268
2269                         reTry = pid - succMCS;
2270
2271                         if (StaFifo.field.TxSuccess)
2272                         {
2273                                 pEntry->TXMCSExpected[pid]++;
2274                                 if (pid == succMCS)
2275                                 {
2276                                         pEntry->TXMCSSuccessful[pid]++;
2277                                 }
2278                                 else
2279                                 {
2280                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2281                                 }
2282                         }
2283                         else
2284                         {
2285                                 pEntry->TXMCSFailed[pid]++;
2286                         }
2287
2288                         if (reTry > 0)
2289                         {
2290                                 if ((pid >= 12) && succMCS <=7)
2291                                 {
2292                                         reTry -= 4;
2293                                 }
2294                                 pEntry->OneSecTxRetryOkCount += reTry;
2295                         }
2296
2297                         i++;
2298                         // ASIC store 16 stack
2299                 } while ( i < (2*TX_RING_SIZE) );
2300
2301 }
2302
2303 /*
2304         ========================================================================
2305
2306         Routine Description:
2307                 Read statistical counters from hardware registers and record them
2308                 in software variables for later on query
2309
2310         Arguments:
2311                 pAd                                     Pointer to our adapter
2312
2313         Return Value:
2314                 None
2315
2316         IRQL = DISPATCH_LEVEL
2317
2318         ========================================================================
2319 */
2320 VOID NICUpdateRawCounters(
2321         IN PRTMP_ADAPTER pAd)
2322 {
2323         UINT32  OldValue;
2324         RX_STA_CNT0_STRUC        RxStaCnt0;
2325         RX_STA_CNT1_STRUC   RxStaCnt1;
2326         RX_STA_CNT2_STRUC   RxStaCnt2;
2327         TX_STA_CNT0_STRUC        TxStaCnt0;
2328         TX_STA_CNT1_STRUC        StaTx1;
2329         TX_STA_CNT2_STRUC        StaTx2;
2330         TX_AGG_CNT_STRUC        TxAggCnt;
2331         TX_AGG_CNT0_STRUC       TxAggCnt0;
2332         TX_AGG_CNT1_STRUC       TxAggCnt1;
2333         TX_AGG_CNT2_STRUC       TxAggCnt2;
2334         TX_AGG_CNT3_STRUC       TxAggCnt3;
2335         TX_AGG_CNT4_STRUC       TxAggCnt4;
2336         TX_AGG_CNT5_STRUC       TxAggCnt5;
2337         TX_AGG_CNT6_STRUC       TxAggCnt6;
2338         TX_AGG_CNT7_STRUC       TxAggCnt7;
2339
2340         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2341         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2342
2343         {
2344                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2345             // Update RX PLCP error counter
2346             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2347                 // Update False CCA counter
2348                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2349         }
2350
2351         // Update FCS counters
2352         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2353         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2354         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2355                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2356
2357         // Add FCS error count to private counters
2358         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2359         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2360         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2361         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2362                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2363
2364         // Update Duplicate Rcv check
2365         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2366         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2367         // Update RX Overflow counter
2368         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2369
2370         if (!pAd->bUpdateBcnCntDone)
2371         {
2372         // Update BEACON sent count
2373         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2374         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2375         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2376         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2377         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2378         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2379         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2380         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2381         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2382         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2383         }
2384
2385         {
2386                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2387                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2388                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2389                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2390                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2391                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2392                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2393                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2394                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2395                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2396                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2397                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2398                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2399
2400                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2401                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2402                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2403                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2404
2405                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2406                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2407                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2408                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2409
2410                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2411                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2412                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2413                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2414
2415                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2416                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2417
2418                 // Calculate the transmitted A-MPDU count
2419                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2420                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2421
2422                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2423                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2424
2425                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2426                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2427
2428                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2429                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2430
2431                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2432                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2433
2434                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2435                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2436
2437                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2438                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2439
2440                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2441                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2442         }
2443
2444 #ifdef DBG_DIAGNOSE
2445         {
2446                 RtmpDiagStruct  *pDiag;
2447                 COUNTER_RALINK  *pRalinkCounters;
2448                 UCHAR                   ArrayCurIdx, i;
2449
2450                 pDiag = &pAd->DiagStruct;
2451                 pRalinkCounters = &pAd->RalinkCounters;
2452                 ArrayCurIdx = pDiag->ArrayCurIdx;
2453
2454                 if (pDiag->inited == 0)
2455                 {
2456                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2457                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2458                         pDiag->inited = 1;
2459                 }
2460                 else
2461                 {
2462                         // Tx
2463                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2464                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2465                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2466                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2467                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2468                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2469                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2470                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2471                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2472                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2473                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2474                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2475                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2476                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2477                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2478                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2479                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2480                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2481                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2482
2483                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2484
2485                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2486                         ArrayCurIdx = pDiag->ArrayCurIdx;
2487                         for (i =0; i < 9; i++)
2488                         {
2489                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2490                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2491                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2492                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2493                         }
2494                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2495                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2496                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2497                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2498                         for (i = 9; i < 24; i++) // 3*3
2499                         {
2500                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2501                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2502                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2503 }
2504
2505                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2506                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2507                 }
2508
2509         }
2510 #endif // DBG_DIAGNOSE //
2511
2512
2513 }
2514
2515
2516 /*
2517         ========================================================================
2518
2519         Routine Description:
2520                 Reset NIC from error
2521
2522         Arguments:
2523                 Adapter                                         Pointer to our adapter
2524
2525         Return Value:
2526                 None
2527
2528         IRQL = PASSIVE_LEVEL
2529
2530         Note:
2531                 Reset NIC from error state
2532
2533         ========================================================================
2534 */
2535 VOID    NICResetFromError(
2536         IN      PRTMP_ADAPTER   pAd)
2537 {
2538         // Reset BBP (according to alex, reset ASIC will force reset BBP
2539         // Therefore, skip the reset BBP
2540         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2541
2542         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2543         // Remove ASIC from reset state
2544         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2545
2546         NICInitializeAdapter(pAd, FALSE);
2547         NICInitAsicFromEEPROM(pAd);
2548
2549         // Switch to current channel, since during reset process, the connection should remains on.
2550         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2551         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2552 }
2553
2554 /*
2555         ========================================================================
2556
2557         Routine Description:
2558                 erase 8051 firmware image in MAC ASIC
2559
2560         Arguments:
2561                 Adapter                                         Pointer to our adapter
2562
2563         IRQL = PASSIVE_LEVEL
2564
2565         ========================================================================
2566 */
2567 VOID NICEraseFirmware(
2568         IN PRTMP_ADAPTER pAd)
2569 {
2570         ULONG i;
2571
2572         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2573                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2574
2575 }/* End of NICEraseFirmware */
2576
2577 /*
2578         ========================================================================
2579
2580         Routine Description:
2581                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2582
2583         Arguments:
2584                 Adapter                                         Pointer to our adapter
2585
2586         Return Value:
2587                 NDIS_STATUS_SUCCESS         firmware image load ok
2588                 NDIS_STATUS_FAILURE         image not found
2589
2590         IRQL = PASSIVE_LEVEL
2591
2592         ========================================================================
2593 */
2594 NDIS_STATUS NICLoadFirmware(
2595         IN PRTMP_ADAPTER pAd)
2596 {
2597         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2598         PUCHAR                  pFirmwareImage;
2599         ULONG                   FileLength, Index;
2600         //ULONG                 firm;
2601         UINT32                  MacReg = 0;
2602
2603         pFirmwareImage = FirmwareImage;
2604         FileLength = sizeof(FirmwareImage);
2605         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2606
2607         /* check if MCU is ready */
2608         Index = 0;
2609         do
2610         {
2611                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2612
2613                 if (MacReg & 0x80)
2614                         break;
2615
2616                 RTMPusecDelay(1000);
2617         } while (Index++ < 1000);
2618
2619     if (Index >= 1000)
2620         {
2621                 Status = NDIS_STATUS_FAILURE;
2622                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2623         } /* End of if */
2624
2625     DBGPRINT(RT_DEBUG_TRACE,
2626                          ("<=== %s (status=%d)\n", __func__, Status));
2627     return Status;
2628 } /* End of NICLoadFirmware */
2629
2630
2631 /*
2632         ========================================================================
2633
2634         Routine Description:
2635                 Load Tx rate switching parameters
2636
2637         Arguments:
2638                 Adapter                                         Pointer to our adapter
2639
2640         Return Value:
2641                 NDIS_STATUS_SUCCESS         firmware image load ok
2642                 NDIS_STATUS_FAILURE         image not found
2643
2644         IRQL = PASSIVE_LEVEL
2645
2646         Rate Table Format:
2647                 1. (B0: Valid Item number) (B1:Initial item from zero)
2648                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2649
2650         ========================================================================
2651 */
2652 NDIS_STATUS NICLoadRateSwitchingParams(
2653         IN PRTMP_ADAPTER pAd)
2654 {
2655         return NDIS_STATUS_SUCCESS;
2656 }
2657
2658 /*
2659         ========================================================================
2660
2661         Routine Description:
2662                 if  pSrc1 all zero with length Length, return 0.
2663                 If not all zero, return 1
2664
2665         Arguments:
2666                 pSrc1
2667
2668         Return Value:
2669                 1:                      not all zero
2670                 0:                      all zero
2671
2672         IRQL = DISPATCH_LEVEL
2673
2674         Note:
2675
2676         ========================================================================
2677 */
2678 ULONG   RTMPNotAllZero(
2679         IN      PVOID   pSrc1,
2680         IN      ULONG   Length)
2681 {
2682         PUCHAR  pMem1;
2683         ULONG   Index = 0;
2684
2685         pMem1 = (PUCHAR) pSrc1;
2686
2687         for (Index = 0; Index < Length; Index++)
2688         {
2689                 if (pMem1[Index] != 0x0)
2690                 {
2691                         break;
2692                 }
2693         }
2694
2695         if (Index == Length)
2696         {
2697                 return (0);
2698         }
2699         else
2700         {
2701                 return (1);
2702         }
2703 }
2704
2705 /*
2706         ========================================================================
2707
2708         Routine Description:
2709                 Compare two memory block
2710
2711         Arguments:
2712                 pSrc1           Pointer to first memory address
2713                 pSrc2           Pointer to second memory address
2714
2715         Return Value:
2716                 0:                      memory is equal
2717                 1:                      pSrc1 memory is larger
2718                 2:                      pSrc2 memory is larger
2719
2720         IRQL = DISPATCH_LEVEL
2721
2722         Note:
2723
2724         ========================================================================
2725 */
2726 ULONG   RTMPCompareMemory(
2727         IN      PVOID   pSrc1,
2728         IN      PVOID   pSrc2,
2729         IN      ULONG   Length)
2730 {
2731         PUCHAR  pMem1;
2732         PUCHAR  pMem2;
2733         ULONG   Index = 0;
2734
2735         pMem1 = (PUCHAR) pSrc1;
2736         pMem2 = (PUCHAR) pSrc2;
2737
2738         for (Index = 0; Index < Length; Index++)
2739         {
2740                 if (pMem1[Index] > pMem2[Index])
2741                         return (1);
2742                 else if (pMem1[Index] < pMem2[Index])
2743                         return (2);
2744         }
2745
2746         // Equal
2747         return (0);
2748 }
2749
2750 /*
2751         ========================================================================
2752
2753         Routine Description:
2754                 Zero out memory block
2755
2756         Arguments:
2757                 pSrc1           Pointer to memory address
2758                 Length          Size
2759
2760         Return Value:
2761                 None
2762
2763         IRQL = PASSIVE_LEVEL
2764         IRQL = DISPATCH_LEVEL
2765
2766         Note:
2767
2768         ========================================================================
2769 */
2770 VOID    RTMPZeroMemory(
2771         IN      PVOID   pSrc,
2772         IN      ULONG   Length)
2773 {
2774         PUCHAR  pMem;
2775         ULONG   Index = 0;
2776
2777         pMem = (PUCHAR) pSrc;
2778
2779         for (Index = 0; Index < Length; Index++)
2780         {
2781                 pMem[Index] = 0x00;
2782         }
2783 }
2784
2785 VOID    RTMPFillMemory(
2786         IN      PVOID   pSrc,
2787         IN      ULONG   Length,
2788         IN      UCHAR   Fill)
2789 {
2790         PUCHAR  pMem;
2791         ULONG   Index = 0;
2792
2793         pMem = (PUCHAR) pSrc;
2794
2795         for (Index = 0; Index < Length; Index++)
2796         {
2797                 pMem[Index] = Fill;
2798         }
2799 }
2800
2801 /*
2802         ========================================================================
2803
2804         Routine Description:
2805                 Copy data from memory block 1 to memory block 2
2806
2807         Arguments:
2808                 pDest           Pointer to destination memory address
2809                 pSrc            Pointer to source memory address
2810                 Length          Copy size
2811
2812         Return Value:
2813                 None
2814
2815         IRQL = PASSIVE_LEVEL
2816         IRQL = DISPATCH_LEVEL
2817
2818         Note:
2819
2820         ========================================================================
2821 */
2822 VOID    RTMPMoveMemory(
2823         OUT     PVOID   pDest,
2824         IN      PVOID   pSrc,
2825         IN      ULONG   Length)
2826 {
2827         PUCHAR  pMem1;
2828         PUCHAR  pMem2;
2829         UINT    Index;
2830
2831         ASSERT((Length==0) || (pDest && pSrc));
2832
2833         pMem1 = (PUCHAR) pDest;
2834         pMem2 = (PUCHAR) pSrc;
2835
2836         for (Index = 0; Index < Length; Index++)
2837         {
2838                 pMem1[Index] = pMem2[Index];
2839         }
2840 }
2841
2842 /*
2843         ========================================================================
2844
2845         Routine Description:
2846                 Initialize port configuration structure
2847
2848         Arguments:
2849                 Adapter                                         Pointer to our adapter
2850
2851         Return Value:
2852                 None
2853
2854         IRQL = PASSIVE_LEVEL
2855
2856         Note:
2857
2858         ========================================================================
2859 */
2860 VOID    UserCfgInit(
2861         IN      PRTMP_ADAPTER pAd)
2862 {
2863     UINT key_index, bss_index;
2864
2865         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2866
2867         //
2868         //  part I. intialize common configuration
2869         //
2870
2871         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2872         {
2873                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2874                 {
2875                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2876                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2877                 }
2878         }
2879
2880         pAd->Antenna.word = 0;
2881         pAd->CommonCfg.BBPCurrentBW = BW_20;
2882
2883         pAd->LedCntl.word = 0;
2884         pAd->LedIndicatorStregth = 0;
2885         pAd->RLnkCtrlOffset = 0;
2886         pAd->HostLnkCtrlOffset = 0;
2887         pAd->CheckDmaBusyCount = 0;
2888
2889         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2890         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2891         pAd->RfIcType = RFIC_2820;
2892
2893         // Init timer for reset complete event
2894         pAd->CommonCfg.CentralChannel = 1;
2895         pAd->bForcePrintTX = FALSE;
2896         pAd->bForcePrintRX = FALSE;
2897         pAd->bStaFifoTest = FALSE;
2898         pAd->bProtectionTest = FALSE;
2899         pAd->bHCCATest = FALSE;
2900         pAd->bGenOneHCCA = FALSE;
2901         pAd->CommonCfg.Dsifs = 10;      // in units of usec
2902         pAd->CommonCfg.TxPower = 100; //mW
2903         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2904         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2905         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2906         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2907         pAd->CommonCfg.RtsThreshold = 2347;
2908         pAd->CommonCfg.FragmentThreshold = 2346;
2909         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2910         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2911         pAd->CommonCfg.PhyMode = 0xff;     // unknown
2912         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2913         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2914         pAd->CommonCfg.RadarDetect.CSCount = 0;
2915         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2916         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2917         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2918         pAd->CommonCfg.bAPSDCapable = FALSE;
2919         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2920         pAd->CommonCfg.TriggerTimerCount = 0;
2921         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2922         pAd->CommonCfg.bCountryFlag = FALSE;
2923         pAd->CommonCfg.TxStream = 0;
2924         pAd->CommonCfg.RxStream = 0;
2925
2926         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2927
2928         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2929         pAd->HTCEnable = FALSE;
2930         pAd->bBroadComHT = FALSE;
2931         pAd->CommonCfg.bRdg = FALSE;
2932
2933         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2934         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2935         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2936         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2937         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2938         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2939         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2940
2941         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2942         BATableInit(pAd, &pAd->BATable);
2943
2944         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2945         pAd->CommonCfg.bHTProtect = 1;
2946         pAd->CommonCfg.bMIMOPSEnable = TRUE;
2947         pAd->CommonCfg.bBADecline = FALSE;
2948         pAd->CommonCfg.bDisableReordering = FALSE;
2949
2950         pAd->CommonCfg.TxBASize = 7;
2951
2952         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2953
2954         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2955         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2956         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2957         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2958         pAd->CommonCfg.TxRate = RATE_6;
2959
2960         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2961         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2962         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2963
2964         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
2965
2966         //
2967         // part II. intialize STA specific configuration
2968         //
2969         {
2970                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2971                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2972                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2973                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2974
2975                 pAd->StaCfg.Psm = PWR_ACTIVE;
2976
2977                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2978                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2979                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2980                 pAd->StaCfg.bMixCipher = FALSE;
2981                 pAd->StaCfg.DefaultKeyId = 0;
2982
2983                 // 802.1x port control
2984                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2985                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2986                 pAd->StaCfg.LastMicErrorTime = 0;
2987                 pAd->StaCfg.MicErrCnt        = 0;
2988                 pAd->StaCfg.bBlockAssoc      = FALSE;
2989                 pAd->StaCfg.WpaState         = SS_NOTUSE;
2990
2991                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
2992
2993                 pAd->StaCfg.RssiTrigger = 0;
2994                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
2995                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2996                 pAd->StaCfg.AtimWin = 0;
2997                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
2998                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
2999                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3000                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3001                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3002
3003                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3004                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3005         }
3006
3007         // global variables mXXXX used in MAC protocol state machines
3008         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3009         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3010         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3011
3012         // PHY specification
3013         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3014         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3015
3016         {
3017                 // user desired power mode
3018                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3019                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3020                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3021
3022                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3023                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3024
3025                 // Patch for Ndtest
3026                 pAd->StaCfg.ScanCnt = 0;
3027
3028                 // CCX 2.0 control flag init
3029                 pAd->StaCfg.CCXEnable = FALSE;
3030                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3031                 pAd->StaCfg.CCXQosECWMin        = 4;
3032                 pAd->StaCfg.CCXQosECWMax        = 10;
3033
3034                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3035                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3036                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3037                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3038                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3039
3040                 // Nitro mode control
3041                 pAd->StaCfg.bAutoReconnect = TRUE;
3042
3043                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3044                 // This patch is for driver wake up from standby mode, system will do scan right away.
3045                 pAd->StaCfg.LastScanTime = 0;
3046                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3047                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3048                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3049                 pAd->StaCfg.IEEE8021X = FALSE;
3050                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3051                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3052                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3053         }
3054
3055         // Default for extra information is not valid
3056         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3057
3058         // Default Config change flag
3059         pAd->bConfigChanged = FALSE;
3060
3061         //
3062         // part III. AP configurations
3063         //
3064
3065
3066         //
3067         // part IV. others
3068         //
3069         // dynamic BBP R66:sensibity tuning to overcome background noise
3070         pAd->BbpTuning.bEnable                = TRUE;
3071         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3072         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3073         pAd->BbpTuning.R66Delta               = 4;
3074         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3075
3076         //
3077         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3078         // if not initial this value, the default value will be 0.
3079         //
3080         pAd->BbpTuning.R66CurrentValue = 0x38;
3081
3082         pAd->Bbp94 = BBPR94_DEFAULT;
3083         pAd->BbpForCCK = FALSE;
3084
3085         // initialize MAC table and allocate spin lock
3086         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3087         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3088         NdisAllocateSpinLock(&pAd->MacTabLock);
3089
3090         pAd->CommonCfg.bWiFiTest = FALSE;
3091         pAd->bPCIclkOff = FALSE;
3092
3093         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3094         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3095 }
3096
3097 // IRQL = PASSIVE_LEVEL
3098 UCHAR BtoH(char ch)
3099 {
3100         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3101         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3102         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3103         return(255);
3104 }
3105
3106 //
3107 //  FUNCTION: AtoH(char *, UCHAR *, int)
3108 //
3109 //  PURPOSE:  Converts ascii string to network order hex
3110 //
3111 //  PARAMETERS:
3112 //    src    - pointer to input ascii string
3113 //    dest   - pointer to output hex
3114 //    destlen - size of dest
3115 //
3116 //  COMMENTS:
3117 //
3118 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3119 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3120 //
3121 // IRQL = PASSIVE_LEVEL
3122
3123 void AtoH(char * src, UCHAR * dest, int destlen)
3124 {
3125         char * srcptr;
3126         PUCHAR destTemp;
3127
3128         srcptr = src;
3129         destTemp = (PUCHAR) dest;
3130
3131         while(destlen--)
3132         {
3133                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3134                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3135                 destTemp++;
3136         }
3137 }
3138
3139 VOID    RTMPPatchMacBbpBug(
3140         IN      PRTMP_ADAPTER   pAd)
3141 {
3142         ULONG   Index;
3143
3144         // Initialize BBP register to default value
3145         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3146         {
3147                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3148         }
3149
3150         // Initialize RF register to default value
3151         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3152         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3153
3154         // Re-init BBP register from EEPROM value
3155         NICInitAsicFromEEPROM(pAd);
3156 }
3157
3158 /*
3159         ========================================================================
3160
3161         Routine Description:
3162                 Init timer objects
3163
3164         Arguments:
3165                 pAd                     Pointer to our adapter
3166                 pTimer                          Timer structure
3167                 pTimerFunc                      Function to execute when timer expired
3168                 Repeat                          Ture for period timer
3169
3170         Return Value:
3171                 None
3172
3173         Note:
3174
3175         ========================================================================
3176 */
3177 VOID    RTMPInitTimer(
3178         IN      PRTMP_ADAPTER                   pAd,
3179         IN      PRALINK_TIMER_STRUCT    pTimer,
3180         IN      PVOID                                   pTimerFunc,
3181         IN      PVOID                                   pData,
3182         IN      BOOLEAN                                 Repeat)
3183 {
3184         //
3185         // Set Valid to TRUE for later used.
3186         // It will crash if we cancel a timer or set a timer
3187         // that we haven't initialize before.
3188         //
3189         pTimer->Valid      = TRUE;
3190
3191         pTimer->PeriodicType = Repeat;
3192         pTimer->State      = FALSE;
3193         pTimer->cookie = (ULONG) pData;
3194
3195
3196         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3197 }
3198
3199 /*
3200         ========================================================================
3201
3202         Routine Description:
3203                 Init timer objects
3204
3205         Arguments:
3206                 pTimer                          Timer structure
3207                 Value                           Timer value in milliseconds
3208
3209         Return Value:
3210                 None
3211
3212         Note:
3213                 To use this routine, must call RTMPInitTimer before.
3214
3215         ========================================================================
3216 */
3217 VOID    RTMPSetTimer(
3218         IN      PRALINK_TIMER_STRUCT    pTimer,
3219         IN      ULONG                                   Value)
3220 {
3221         if (pTimer->Valid)
3222         {
3223                 pTimer->TimerValue = Value;
3224                 pTimer->State      = FALSE;
3225                 if (pTimer->PeriodicType == TRUE)
3226                 {
3227                         pTimer->Repeat = TRUE;
3228                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3229                 }
3230                 else
3231                 {
3232                         pTimer->Repeat = FALSE;
3233                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3234                 }
3235         }
3236         else
3237         {
3238                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3239         }
3240 }
3241
3242
3243 /*
3244         ========================================================================
3245
3246         Routine Description:
3247                 Init timer objects
3248
3249         Arguments:
3250                 pTimer                          Timer structure
3251                 Value                           Timer value in milliseconds
3252
3253         Return Value:
3254                 None
3255
3256         Note:
3257                 To use this routine, must call RTMPInitTimer before.
3258
3259         ========================================================================
3260 */
3261 VOID    RTMPModTimer(
3262         IN      PRALINK_TIMER_STRUCT    pTimer,
3263         IN      ULONG                                   Value)
3264 {
3265         BOOLEAN Cancel;
3266
3267         if (pTimer->Valid)
3268         {
3269                 pTimer->TimerValue = Value;
3270                 pTimer->State      = FALSE;
3271                 if (pTimer->PeriodicType == TRUE)
3272                 {
3273                         RTMPCancelTimer(pTimer, &Cancel);
3274                         RTMPSetTimer(pTimer, Value);
3275                 }
3276                 else
3277                 {
3278                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3279                 }
3280         }
3281         else
3282         {
3283                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3284         }
3285 }
3286
3287 /*
3288         ========================================================================
3289
3290         Routine Description:
3291                 Cancel timer objects
3292
3293         Arguments:
3294                 Adapter                                         Pointer to our adapter
3295
3296         Return Value:
3297                 None
3298
3299         IRQL = PASSIVE_LEVEL
3300         IRQL = DISPATCH_LEVEL
3301
3302         Note:
3303                 1.) To use this routine, must call RTMPInitTimer before.
3304                 2.) Reset NIC to initial state AS IS system boot up time.
3305
3306         ========================================================================
3307 */
3308 VOID    RTMPCancelTimer(
3309         IN      PRALINK_TIMER_STRUCT    pTimer,
3310         OUT     BOOLEAN                                 *pCancelled)
3311 {
3312         if (pTimer->Valid)
3313         {
3314                 if (pTimer->State == FALSE)
3315                         pTimer->Repeat = FALSE;
3316                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3317
3318                 if (*pCancelled == TRUE)
3319                         pTimer->State = TRUE;
3320
3321         }
3322         else
3323         {
3324                 //
3325                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3326                 // And don't set the "Valid" to False. So that we can use this timer again.
3327                 //
3328                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3329         }
3330 }
3331
3332 /*
3333         ========================================================================
3334
3335         Routine Description:
3336                 Set LED Status
3337
3338         Arguments:
3339                 pAd                                             Pointer to our adapter
3340                 Status                                  LED Status
3341
3342         Return Value:
3343                 None
3344
3345         IRQL = PASSIVE_LEVEL
3346         IRQL = DISPATCH_LEVEL
3347
3348         Note:
3349
3350         ========================================================================
3351 */
3352 VOID RTMPSetLED(
3353         IN PRTMP_ADAPTER        pAd,
3354         IN UCHAR                        Status)
3355 {
3356         //ULONG                 data;
3357         UCHAR                   HighByte = 0;
3358         UCHAR                   LowByte;
3359
3360         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3361         switch (Status)
3362         {
3363                 case LED_LINK_DOWN:
3364                         HighByte = 0x20;
3365                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3366                         pAd->LedIndicatorStregth = 0;
3367                         break;
3368                 case LED_LINK_UP:
3369                         if (pAd->CommonCfg.Channel > 14)
3370                                 HighByte = 0xa0;
3371                         else
3372                                 HighByte = 0x60;
3373                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3374                         break;
3375                 case LED_RADIO_ON:
3376                         HighByte = 0x20;
3377                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3378                         break;
3379                 case LED_HALT:
3380                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3381                 case LED_RADIO_OFF:
3382                         HighByte = 0;
3383                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3384                         break;
3385         case LED_WPS:
3386                         HighByte = 0x10;
3387                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3388                         break;
3389                 case LED_ON_SITE_SURVEY:
3390                         HighByte = 0x08;
3391                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3392                         break;
3393                 case LED_POWER_UP:
3394                         HighByte = 0x04;
3395                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3396                         break;
3397                 default:
3398                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3399                         break;
3400         }
3401
3402     //
3403         // Keep LED status for LED SiteSurvey mode.
3404         // After SiteSurvey, we will set the LED mode to previous status.
3405         //
3406         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3407                 pAd->LedStatus = Status;
3408
3409         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3410 }
3411
3412 /*
3413         ========================================================================
3414
3415         Routine Description:
3416                 Set LED Signal Stregth
3417
3418         Arguments:
3419                 pAd                                             Pointer to our adapter
3420                 Dbm                                             Signal Stregth
3421
3422         Return Value:
3423                 None
3424
3425         IRQL = PASSIVE_LEVEL
3426
3427         Note:
3428                 Can be run on any IRQL level.
3429
3430                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3431                 <= -90  No Signal
3432                 <= -81  Very Low
3433                 <= -71  Low
3434                 <= -67  Good
3435                 <= -57  Very Good
3436                  > -57  Excellent
3437         ========================================================================
3438 */
3439 VOID RTMPSetSignalLED(
3440         IN PRTMP_ADAPTER        pAd,
3441         IN NDIS_802_11_RSSI Dbm)
3442 {
3443         UCHAR           nLed = 0;
3444
3445         //
3446         // if not Signal Stregth, then do nothing.
3447         //
3448         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3449         {
3450                 return;
3451         }
3452
3453         if (Dbm <= -90)
3454                 nLed = 0;
3455         else if (Dbm <= -81)
3456                 nLed = 1;
3457         else if (Dbm <= -71)
3458                 nLed = 3;
3459         else if (Dbm <= -67)
3460                 nLed = 7;
3461         else if (Dbm <= -57)
3462                 nLed = 15;
3463         else
3464                 nLed = 31;
3465
3466         //
3467         // Update Signal Stregth to firmware if changed.
3468         //
3469         if (pAd->LedIndicatorStregth != nLed)
3470         {
3471                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3472                 pAd->LedIndicatorStregth = nLed;
3473         }
3474 }
3475
3476 /*
3477         ========================================================================
3478
3479         Routine Description:
3480                 Enable RX
3481
3482         Arguments:
3483                 pAd                                             Pointer to our adapter
3484
3485         Return Value:
3486                 None
3487
3488         IRQL <= DISPATCH_LEVEL
3489
3490         Note:
3491                 Before Enable RX, make sure you have enabled Interrupt.
3492         ========================================================================
3493 */
3494 VOID RTMPEnableRxTx(
3495         IN PRTMP_ADAPTER        pAd)
3496 {
3497         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3498
3499         // Enable Rx DMA.
3500         RT28XXDMAEnable(pAd);
3501
3502         // enable RX of MAC block
3503         if (pAd->OpMode == OPMODE_AP)
3504         {
3505                 UINT32 rx_filter_flag = APNORMAL;
3506
3507
3508                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3509         }
3510         else
3511         {
3512                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3513         }
3514
3515         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3516         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3517 }
3518
3519