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   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #ifndef RT30xx
  42 #ifdef RT2860
  43 #include "firmware.h"
  44 #include <linux/bitrev.h>
  45 #endif
  46 #ifdef RT2870
  47 #include "../../rt2870/common/firmware.h"
  48 #endif
  49 #endif
  50 #ifdef RT30xx
  51 #include "../../rt3070/firmware.h"
  52 #endif
  53
  54 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  55 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  56                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  57                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  58                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  59                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  60                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  61                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  62                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  63
  64 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  65
  66 const unsigned short ccitt_16Table[] = {
  67         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  68         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  69         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  70         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  71         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  72         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  73         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  74         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  75         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  76         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  77         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  78         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  79         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  80         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  81         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  82         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  83         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  84         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  85         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  86         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  87         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  88         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  89         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  90         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  91         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  92         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  93         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  94         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  95         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  96         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  97         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  98         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  99 };
 100 #define ByteCRC16(v, crc) \
 101         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
 102
 103 #ifdef RT2870
 104 unsigned char BitReverse(unsigned char x)
 105 {
 106         int i;
 107         unsigned char Temp=0;
 108         for(i=0; ; i++)
 109         {
 110                 if(x & 0x80)    Temp |= 0x80;
 111                 if(i==7)                break;
 112                 x       <<= 1;
 113                 Temp >>= 1;
 114         }
 115         return Temp;
 116 }
 117 #endif
 118
 119 //
 120 // BBP register initialization set
 121 //
 122 REG_PAIR   BBPRegTable[] = {
 123         {BBP_R65,               0x2C},          // fix rssi issue
 124         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
 125         {BBP_R69,               0x12},
 126         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 127         {BBP_R73,               0x10},
 128         {BBP_R81,               0x37},
 129         {BBP_R82,               0x62},
 130         {BBP_R83,               0x6A},
 131         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 132         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 133         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 134         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 135         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 136         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 137 };
 138 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 139
 140 //
 141 // RF register initialization set
 142 //
 143 #ifdef RT2870
 144 REG_PAIR   RT30xx_RFRegTable[] = {
 145         {RF_R04,          0x40},
 146         {RF_R05,          0x03},
 147         {RF_R06,          0x02},
 148         {RF_R07,          0x70},
 149         {RF_R09,          0x0F},
 150 #ifndef RT30xx
 151         {RF_R10,          0x71},
 152 #endif
 153 #ifdef RT30xx
 154         {RF_R10,          0x41},
 155 #endif
 156         {RF_R11,          0x21},
 157         {RF_R12,          0x7B},
 158         {RF_R14,          0x90},
 159         {RF_R15,          0x58},
 160         {RF_R16,          0xB3},
 161         {RF_R17,          0x92},
 162         {RF_R18,          0x2C},
 163         {RF_R19,          0x02},
 164         {RF_R20,          0xBA},
 165         {RF_R21,          0xDB},
 166         {RF_R24,          0x16},
 167         {RF_R25,          0x01},
 168 #ifndef RT30xx
 169         {RF_R27,          0x03},
 170 #endif
 171         {RF_R29,          0x1F},
 172 };
 173 #define NUM_RF_REG_PARMS        (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
 174 #endif // RT2870 //
 175
 176 //
 177 // ASIC register initialization sets
 178 //
 179
 180 RTMP_REG_PAIR   MACRegTable[] = {
 181 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 182         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 183         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 184 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 185         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 186         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 187 #else
 188     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 189 #endif // HW_BEACON_OFFSET //
 190
 191         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 192         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 193         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 194         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 195         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 196         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 197         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 198         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 199         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 200         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 201         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 202         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 203         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 204         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 205         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 206         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 207 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
 208 #ifdef RT2870
 209         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 210         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 211         {WPDMA_GLO_CFG,                 0x00000030},
 212 #endif // RT2870 //
 213         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 214         {GF40_PROT_CFG,                 0x03F44084},
 215         {MM20_PROT_CFG,                 0x01744004},
 216 #ifdef RT2860
 217         {MM40_PROT_CFG,                 0x03F54084},
 218 #endif
 219         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 220         {TX_RTS_CFG,                    0x00092b20},
 221         {EXP_ACK_TIME,                  0x002400ca},    // default value
 222         {TXOP_HLDR_ET,                  0x00000002},
 223
 224         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 225                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 226                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 227                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 228         {XIFS_TIME_CFG,                 0x33a41010},
 229         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 230 };
 231
 232 RTMP_REG_PAIR   STAMACRegTable[] =      {
 233         {WMM_AIFSN_CFG,         0x00002273},
 234         {WMM_CWMIN_CFG, 0x00002344},
 235         {WMM_CWMAX_CFG, 0x000034aa},
 236 };
 237
 238 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 239 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 240
 241 #ifdef RT2870
 242 //
 243 // RT2870 Firmware Spec only used 1 oct for version expression
 244 //
 245 #define FIRMWARE_MINOR_VERSION  7
 246
 247 #endif // RT2870 //
 248
 249 // New 8k byte firmware size for RT3071/RT3072
 250 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 251 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 252 #define FIRMWARE_MAJOR_VERSION  0
 253
 254 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 255 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 256
 257 #ifdef RT2860
 258 #define FIRMWARE_MINOR_VERSION  2
 259 #endif
 260
 261
 262 /*
 263         ========================================================================
 264
 265         Routine Description:
 266                 Allocate RTMP_ADAPTER data block and do some initialization
 267
 268         Arguments:
 269                 Adapter         Pointer to our adapter
 270
 271         Return Value:
 272                 NDIS_STATUS_SUCCESS
 273                 NDIS_STATUS_FAILURE
 274
 275         IRQL = PASSIVE_LEVEL
 276
 277         Note:
 278
 279         ========================================================================
 280 */
 281 NDIS_STATUS     RTMPAllocAdapterBlock(
 282         IN  PVOID       handle,
 283         OUT     PRTMP_ADAPTER   *ppAdapter)
 284 {
 285         PRTMP_ADAPTER   pAd;
 286         NDIS_STATUS             Status;
 287         INT                     index;
 288         UCHAR                   *pBeaconBuf = NULL;
 289
 290         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 291
 292         *ppAdapter = NULL;
 293
 294         do
 295         {
 296                 // Allocate RTMP_ADAPTER memory block
 297                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 298                 if (pBeaconBuf == NULL)
 299                 {
 300                         Status = NDIS_STATUS_FAILURE;
 301                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 302                         break;
 303                 }
 304
 305                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 306                 if (Status != NDIS_STATUS_SUCCESS)
 307                 {
 308                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 309                         break;
 310                 }
 311                 pAd->BeaconBuf = pBeaconBuf;
 312                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 313
 314
 315                 // Init spin locks
 316                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 317 #ifdef RT2860
 318                 NdisAllocateSpinLock(&pAd->RxRingLock);
 319 #endif
 320
 321                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 322                 {
 323                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 324                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 325                         pAd->DeQueueRunning[index] = FALSE;
 326                 }
 327
 328                 NdisAllocateSpinLock(&pAd->irq_lock);
 329
 330         } while (FALSE);
 331
 332         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 333                 kfree(pBeaconBuf);
 334
 335         *ppAdapter = pAd;
 336
 337         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 338         return Status;
 339 }
 340
 341 /*
 342         ========================================================================
 343
 344         Routine Description:
 345                 Read initial Tx power per MCS and BW from EEPROM
 346
 347         Arguments:
 348                 Adapter                                         Pointer to our adapter
 349
 350         Return Value:
 351                 None
 352
 353         IRQL = PASSIVE_LEVEL
 354
 355         Note:
 356
 357         ========================================================================
 358 */
 359 VOID    RTMPReadTxPwrPerRate(
 360         IN      PRTMP_ADAPTER   pAd)
 361 {
 362         ULONG           data, Adata, Gdata;
 363         USHORT          i, value, value2;
 364         INT                     Apwrdelta, Gpwrdelta;
 365         UCHAR           t1,t2,t3,t4;
 366         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 367
 368         //
 369         // Get power delta for 20MHz and 40MHz.
 370         //
 371         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 372         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 373         Apwrdelta = 0;
 374         Gpwrdelta = 0;
 375
 376         if ((value2 & 0xff) != 0xff)
 377         {
 378                 if ((value2 & 0x80))
 379                         Gpwrdelta = (value2&0xf);
 380
 381                 if ((value2 & 0x40))
 382                         bGpwrdeltaMinus = FALSE;
 383                 else
 384                         bGpwrdeltaMinus = TRUE;
 385         }
 386         if ((value2 & 0xff00) != 0xff00)
 387         {
 388                 if ((value2 & 0x8000))
 389                         Apwrdelta = ((value2&0xf00)>>8);
 390
 391                 if ((value2 & 0x4000))
 392                         bApwrdeltaMinus = FALSE;
 393                 else
 394                         bApwrdeltaMinus = TRUE;
 395         }
 396         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 397
 398         //
 399         // Get Txpower per MCS for 20MHz in 2.4G.
 400         //
 401         for (i=0; i<5; i++)
 402         {
 403                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 404                 data = value;
 405                 if (bApwrdeltaMinus == FALSE)
 406                 {
 407                         t1 = (value&0xf)+(Apwrdelta);
 408                         if (t1 > 0xf)
 409                                 t1 = 0xf;
 410                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 411                         if (t2 > 0xf)
 412                                 t2 = 0xf;
 413                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 414                         if (t3 > 0xf)
 415                                 t3 = 0xf;
 416                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 417                         if (t4 > 0xf)
 418                                 t4 = 0xf;
 419                 }
 420                 else
 421                 {
 422                         if ((value&0xf) > Apwrdelta)
 423                                 t1 = (value&0xf)-(Apwrdelta);
 424                         else
 425                                 t1 = 0;
 426                         if (((value&0xf0)>>4) > Apwrdelta)
 427                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 428                         else
 429                                 t2 = 0;
 430                         if (((value&0xf00)>>8) > Apwrdelta)
 431                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 432                         else
 433                                 t3 = 0;
 434                         if (((value&0xf000)>>12) > Apwrdelta)
 435                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 436                         else
 437                                 t4 = 0;
 438                 }
 439                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 440                 if (bGpwrdeltaMinus == FALSE)
 441                 {
 442                         t1 = (value&0xf)+(Gpwrdelta);
 443                         if (t1 > 0xf)
 444                                 t1 = 0xf;
 445                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 446                         if (t2 > 0xf)
 447                                 t2 = 0xf;
 448                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 449                         if (t3 > 0xf)
 450                                 t3 = 0xf;
 451                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 452                         if (t4 > 0xf)
 453                                 t4 = 0xf;
 454                 }
 455                 else
 456                 {
 457                         if ((value&0xf) > Gpwrdelta)
 458                                 t1 = (value&0xf)-(Gpwrdelta);
 459                         else
 460                                 t1 = 0;
 461                         if (((value&0xf0)>>4) > Gpwrdelta)
 462                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 463                         else
 464                                 t2 = 0;
 465                         if (((value&0xf00)>>8) > Gpwrdelta)
 466                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 467                         else
 468                                 t3 = 0;
 469                         if (((value&0xf000)>>12) > Gpwrdelta)
 470                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 471                         else
 472                                 t4 = 0;
 473                 }
 474                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 475
 476                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 477                 if (bApwrdeltaMinus == FALSE)
 478                 {
 479                         t1 = (value&0xf)+(Apwrdelta);
 480                         if (t1 > 0xf)
 481                                 t1 = 0xf;
 482                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 483                         if (t2 > 0xf)
 484                                 t2 = 0xf;
 485                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 486                         if (t3 > 0xf)
 487                                 t3 = 0xf;
 488                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 489                         if (t4 > 0xf)
 490                                 t4 = 0xf;
 491                 }
 492                 else
 493                 {
 494                         if ((value&0xf) > Apwrdelta)
 495                                 t1 = (value&0xf)-(Apwrdelta);
 496                         else
 497                                 t1 = 0;
 498                         if (((value&0xf0)>>4) > Apwrdelta)
 499                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 500                         else
 501                                 t2 = 0;
 502                         if (((value&0xf00)>>8) > Apwrdelta)
 503                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 504                         else
 505                                 t3 = 0;
 506                         if (((value&0xf000)>>12) > Apwrdelta)
 507                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 508                         else
 509                                 t4 = 0;
 510                 }
 511                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 512                 if (bGpwrdeltaMinus == FALSE)
 513                 {
 514                         t1 = (value&0xf)+(Gpwrdelta);
 515                         if (t1 > 0xf)
 516                                 t1 = 0xf;
 517                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 518                         if (t2 > 0xf)
 519                                 t2 = 0xf;
 520                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 521                         if (t3 > 0xf)
 522                                 t3 = 0xf;
 523                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 524                         if (t4 > 0xf)
 525                                 t4 = 0xf;
 526                 }
 527                 else
 528                 {
 529                         if ((value&0xf) > Gpwrdelta)
 530                                 t1 = (value&0xf)-(Gpwrdelta);
 531                         else
 532                                 t1 = 0;
 533                         if (((value&0xf0)>>4) > Gpwrdelta)
 534                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 535                         else
 536                                 t2 = 0;
 537                         if (((value&0xf00)>>8) > Gpwrdelta)
 538                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 539                         else
 540                                 t3 = 0;
 541                         if (((value&0xf000)>>12) > Gpwrdelta)
 542                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 543                         else
 544                                 t4 = 0;
 545                 }
 546                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 547                 data |= (value<<16);
 548
 549                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 550                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 551
 552                 if (data != 0xffffffff)
 553                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 554                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 555         }
 556
 557         //
 558         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 559         //
 560         bValid = TRUE;
 561         for (i=0; i<6; i++)
 562         {
 563                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 564                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 565                 {
 566                         bValid = FALSE;
 567                         break;
 568                 }
 569         }
 570
 571         //
 572         // Get Txpower per MCS for 40MHz in 2.4G.
 573         //
 574         if (bValid)
 575         {
 576                 for (i=0; i<4; i++)
 577                 {
 578                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 579                         if (bGpwrdeltaMinus == FALSE)
 580                         {
 581                                 t1 = (value&0xf)+(Gpwrdelta);
 582                                 if (t1 > 0xf)
 583                                         t1 = 0xf;
 584                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 585                                 if (t2 > 0xf)
 586                                         t2 = 0xf;
 587                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 588                                 if (t3 > 0xf)
 589                                         t3 = 0xf;
 590                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 591                                 if (t4 > 0xf)
 592                                         t4 = 0xf;
 593                         }
 594                         else
 595                         {
 596                                 if ((value&0xf) > Gpwrdelta)
 597                                         t1 = (value&0xf)-(Gpwrdelta);
 598                                 else
 599                                         t1 = 0;
 600                                 if (((value&0xf0)>>4) > Gpwrdelta)
 601                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 602                                 else
 603                                         t2 = 0;
 604                                 if (((value&0xf00)>>8) > Gpwrdelta)
 605                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 606                                 else
 607                                         t3 = 0;
 608                                 if (((value&0xf000)>>12) > Gpwrdelta)
 609                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 610                                 else
 611                                         t4 = 0;
 612                         }
 613                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 614
 615                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 616                         if (bGpwrdeltaMinus == FALSE)
 617                         {
 618                                 t1 = (value&0xf)+(Gpwrdelta);
 619                                 if (t1 > 0xf)
 620                                         t1 = 0xf;
 621                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 622                                 if (t2 > 0xf)
 623                                         t2 = 0xf;
 624                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 625                                 if (t3 > 0xf)
 626                                         t3 = 0xf;
 627                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 628                                 if (t4 > 0xf)
 629                                         t4 = 0xf;
 630                         }
 631                         else
 632                         {
 633                                 if ((value&0xf) > Gpwrdelta)
 634                                         t1 = (value&0xf)-(Gpwrdelta);
 635                                 else
 636                                         t1 = 0;
 637                                 if (((value&0xf0)>>4) > Gpwrdelta)
 638                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 639                                 else
 640                                         t2 = 0;
 641                                 if (((value&0xf00)>>8) > Gpwrdelta)
 642                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 643                                 else
 644                                         t3 = 0;
 645                                 if (((value&0xf000)>>12) > Gpwrdelta)
 646                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 647                                 else
 648                                         t4 = 0;
 649                         }
 650                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 651
 652                         if (i == 0)
 653                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 654                         else
 655                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 656
 657                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 658                 }
 659         }
 660
 661         //
 662         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 663         //
 664         bValid = TRUE;
 665         for (i=0; i<8; i++)
 666         {
 667                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 668                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 669                 {
 670                         bValid = FALSE;
 671                         break;
 672                 }
 673         }
 674
 675         //
 676         // Get Txpower per MCS for 20MHz in 5G.
 677         //
 678         if (bValid)
 679         {
 680                 for (i=0; i<5; i++)
 681                 {
 682                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 683                         if (bApwrdeltaMinus == FALSE)
 684                         {
 685                                 t1 = (value&0xf)+(Apwrdelta);
 686                                 if (t1 > 0xf)
 687                                         t1 = 0xf;
 688                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 689                                 if (t2 > 0xf)
 690                                         t2 = 0xf;
 691                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 692                                 if (t3 > 0xf)
 693                                         t3 = 0xf;
 694                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 695                                 if (t4 > 0xf)
 696                                         t4 = 0xf;
 697                         }
 698                         else
 699                         {
 700                                 if ((value&0xf) > Apwrdelta)
 701                                         t1 = (value&0xf)-(Apwrdelta);
 702                                 else
 703                                         t1 = 0;
 704                                 if (((value&0xf0)>>4) > Apwrdelta)
 705                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 706                                 else
 707                                         t2 = 0;
 708                                 if (((value&0xf00)>>8) > Apwrdelta)
 709                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 710                                 else
 711                                         t3 = 0;
 712                                 if (((value&0xf000)>>12) > Apwrdelta)
 713                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 714                                 else
 715                                         t4 = 0;
 716                         }
 717                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 718
 719                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 720                         if (bApwrdeltaMinus == FALSE)
 721                         {
 722                                 t1 = (value&0xf)+(Apwrdelta);
 723                                 if (t1 > 0xf)
 724                                         t1 = 0xf;
 725                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 726                                 if (t2 > 0xf)
 727                                         t2 = 0xf;
 728                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 729                                 if (t3 > 0xf)
 730                                         t3 = 0xf;
 731                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 732                                 if (t4 > 0xf)
 733                                         t4 = 0xf;
 734                         }
 735                         else
 736                         {
 737                                 if ((value&0xf) > Apwrdelta)
 738                                         t1 = (value&0xf)-(Apwrdelta);
 739                                 else
 740                                         t1 = 0;
 741                                 if (((value&0xf0)>>4) > Apwrdelta)
 742                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 743                                 else
 744                                         t2 = 0;
 745                                 if (((value&0xf00)>>8) > Apwrdelta)
 746                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 747                                 else
 748                                         t3 = 0;
 749                                 if (((value&0xf000)>>12) > Apwrdelta)
 750                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 751                                 else
 752                                         t4 = 0;
 753                         }
 754                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 755
 756                         if (i == 0)
 757                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 758                         else
 759                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 760
 761                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 762                 }
 763         }
 764
 765         //
 766         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 767         //
 768         bValid = TRUE;
 769         for (i=0; i<6; i++)
 770         {
 771                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 772                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 773                 {
 774                         bValid = FALSE;
 775                         break;
 776                 }
 777         }
 778
 779         //
 780         // Get Txpower per MCS for 40MHz in 5G.
 781         //
 782         if (bValid)
 783         {
 784                 for (i=0; i<4; i++)
 785                 {
 786                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 787                         if (bApwrdeltaMinus == FALSE)
 788                         {
 789                                 t1 = (value&0xf)+(Apwrdelta);
 790                                 if (t1 > 0xf)
 791                                         t1 = 0xf;
 792                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 793                                 if (t2 > 0xf)
 794                                         t2 = 0xf;
 795                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 796                                 if (t3 > 0xf)
 797                                         t3 = 0xf;
 798                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 799                                 if (t4 > 0xf)
 800                                         t4 = 0xf;
 801                         }
 802                         else
 803                         {
 804                                 if ((value&0xf) > Apwrdelta)
 805                                         t1 = (value&0xf)-(Apwrdelta);
 806                                 else
 807                                         t1 = 0;
 808                                 if (((value&0xf0)>>4) > Apwrdelta)
 809                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 810                                 else
 811                                         t2 = 0;
 812                                 if (((value&0xf00)>>8) > Apwrdelta)
 813                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 814                                 else
 815                                         t3 = 0;
 816                                 if (((value&0xf000)>>12) > Apwrdelta)
 817                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 818                                 else
 819                                         t4 = 0;
 820                         }
 821                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 822
 823                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 824                         if (bApwrdeltaMinus == FALSE)
 825                         {
 826                                 t1 = (value&0xf)+(Apwrdelta);
 827                                 if (t1 > 0xf)
 828                                         t1 = 0xf;
 829                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 830                                 if (t2 > 0xf)
 831                                         t2 = 0xf;
 832                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 833                                 if (t3 > 0xf)
 834                                         t3 = 0xf;
 835                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 836                                 if (t4 > 0xf)
 837                                         t4 = 0xf;
 838                         }
 839                         else
 840                         {
 841                                 if ((value&0xf) > Apwrdelta)
 842                                         t1 = (value&0xf)-(Apwrdelta);
 843                                 else
 844                                         t1 = 0;
 845                                 if (((value&0xf0)>>4) > Apwrdelta)
 846                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 847                                 else
 848                                         t2 = 0;
 849                                 if (((value&0xf00)>>8) > Apwrdelta)
 850                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 851                                 else
 852                                         t3 = 0;
 853                                 if (((value&0xf000)>>12) > Apwrdelta)
 854                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 855                                 else
 856                                         t4 = 0;
 857                         }
 858                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 859
 860                         if (i == 0)
 861                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 862                         else
 863                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 864
 865                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 866                 }
 867         }
 868 }
 869
 870
 871 /*
 872         ========================================================================
 873
 874         Routine Description:
 875                 Read initial channel power parameters from EEPROM
 876
 877         Arguments:
 878                 Adapter                                         Pointer to our adapter
 879
 880         Return Value:
 881                 None
 882
 883         IRQL = PASSIVE_LEVEL
 884
 885         Note:
 886
 887         ========================================================================
 888 */
 889 VOID    RTMPReadChannelPwr(
 890         IN      PRTMP_ADAPTER   pAd)
 891 {
 892         UCHAR                           i, choffset;
 893         EEPROM_TX_PWR_STRUC         Power;
 894         EEPROM_TX_PWR_STRUC         Power2;
 895
 896         // Read Tx power value for all channels
 897         // Value from 1 - 0x7f. Default value is 24.
 898         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 899         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 900
 901         // 0. 11b/g, ch1 - ch 14
 902         for (i = 0; i < 7; i++)
 903         {
 904                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 905                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 906                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 907                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 908
 909                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 910                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 911                 else
 912                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 913
 914                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 915                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 916                 else
 917                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 918
 919                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 920                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 921                 else
 922                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 923
 924                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 925                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 926                 else
 927                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 928         }
 929
 930         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 931         // 1.1 Fill up channel
 932         choffset = 14;
 933         for (i = 0; i < 4; i++)
 934         {
 935                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 936                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 937                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 938
 939                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 940                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 941                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 942
 943                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 944                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 945                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 946         }
 947
 948         // 1.2 Fill up power
 949         for (i = 0; i < 6; i++)
 950         {
 951                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 952                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 953
 954                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 955                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 956
 957                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 958                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 959
 960                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 961                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 962
 963                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 964                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 965         }
 966
 967         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 968         // 2.1 Fill up channel
 969         choffset = 14 + 12;
 970         for (i = 0; i < 5; i++)
 971         {
 972                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 973                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 974                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 975
 976                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 977                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 978                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 979
 980                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 981                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 982                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 983         }
 984         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 985         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 986         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 987
 988         // 2.2 Fill up power
 989         for (i = 0; i < 8; i++)
 990         {
 991                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 992                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 993
 994                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 995                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 996
 997                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 998                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 999
1000                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1001                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1002
1003                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1004                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1005         }
1006
1007         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
1008         // 3.1 Fill up channel
1009         choffset = 14 + 12 + 16;
1010         for (i = 0; i < 2; i++)
1011         {
1012                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
1013                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
1014                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
1015
1016                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
1017                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
1018                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
1019
1020                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
1021                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
1022                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
1023         }
1024         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
1025         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
1026         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
1027
1028         // 3.2 Fill up power
1029         for (i = 0; i < 4; i++)
1030         {
1031                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1032                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1033
1034                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1035                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1036
1037                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1038                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1039
1040                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1041                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1042
1043                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1044                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1045         }
1046
1047         // 4. Print and Debug
1048         choffset = 14 + 12 + 16 + 7;
1049 }
1050
1051 /*
1052         ========================================================================
1053
1054         Routine Description:
1055                 Read the following from the registry
1056                 1. All the parameters
1057                 2. NetworkAddres
1058
1059         Arguments:
1060                 Adapter                                         Pointer to our adapter
1061                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1062
1063         Return Value:
1064                 NDIS_STATUS_SUCCESS
1065                 NDIS_STATUS_FAILURE
1066                 NDIS_STATUS_RESOURCES
1067
1068         IRQL = PASSIVE_LEVEL
1069
1070         Note:
1071
1072         ========================================================================
1073 */
1074 NDIS_STATUS     NICReadRegParameters(
1075         IN      PRTMP_ADAPTER           pAd,
1076         IN      NDIS_HANDLE                     WrapperConfigurationContext
1077         )
1078 {
1079         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1080         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1081         return Status;
1082 }
1083
1084
1085 #ifdef RT2870
1086 /*
1087         ========================================================================
1088
1089         Routine Description:
1090                 For RF filter calibration purpose
1091
1092         Arguments:
1093                 pAd                          Pointer to our adapter
1094
1095         Return Value:
1096                 None
1097
1098         IRQL = PASSIVE_LEVEL
1099
1100         ========================================================================
1101 */
1102 VOID RTMPFilterCalibration(
1103         IN PRTMP_ADAPTER pAd)
1104 {
1105         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1106         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1107         UCHAR   RF_R24_Value = 0;
1108
1109         // Give bbp filter initial value
1110 #ifndef RT30xx
1111         pAd->Mlme.CaliBW20RfR24 = 0x16;
1112         pAd->Mlme.CaliBW40RfR24 = 0x36;  //Bit[5] must be 1 for BW 40
1113 #else
1114         pAd->Mlme.CaliBW20RfR24 = 0x1F;
1115         pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1116 #endif
1117         do
1118         {
1119                 if (loop == 1)  //BandWidth = 40 MHz
1120                 {
1121                         // Write 0x27 to RF_R24 to program filter
1122                         RF_R24_Value = 0x27;
1123                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1124                         if (IS_RT3090(pAd))
1125                                 FilterTarget = 0x15;
1126                         else
1127                                 FilterTarget = 0x19;
1128
1129                         // when calibrate BW40, BBP mask must set to BW40.
1130                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1131                         BBPValue&= (~0x18);
1132                         BBPValue|= (0x10);
1133                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1134 #ifdef RT30xx
1135                         // set to BW40
1136                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1137                         value |= 0x20;
1138                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1139 #endif
1140                 }
1141                 else                    //BandWidth = 20 MHz
1142                 {
1143                         // Write 0x07 to RF_R24 to program filter
1144                         RF_R24_Value = 0x07;
1145                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1146                         if (IS_RT3090(pAd))
1147                                 FilterTarget = 0x13;
1148                         else
1149                                 FilterTarget = 0x16;
1150 #ifdef RT30xx
1151                         // set to BW20
1152                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1153                         value &= (~0x20);
1154                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1155 #endif
1156                 }
1157
1158                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1159                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1160                 value |= 0x01;
1161                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1162
1163                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1164                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1165
1166                 do
1167                 {
1168                         // Write 0x90 to BBP_R25 to transmit test tone
1169                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1170
1171                         RTMPusecDelay(1000);
1172                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1173                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1174                         R55x = value & 0xFF;
1175
1176                 } while ((ReTry++ < 100) && (R55x == 0));
1177
1178                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1179                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1180
1181                 while(TRUE)
1182                 {
1183                         // Write 0x90 to BBP_R25 to transmit test tone
1184                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1185
1186                         //We need to wait for calibration
1187                         RTMPusecDelay(1000);
1188                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1189                         value &= 0xFF;
1190                         if ((R55x - value) < FilterTarget)
1191                         {
1192                                 RF_R24_Value ++;
1193                         }
1194                         else if ((R55x - value) == FilterTarget)
1195                         {
1196                                 RF_R24_Value ++;
1197                                 count ++;
1198                         }
1199                         else
1200                         {
1201                                 break;
1202                         }
1203
1204                         // prevent infinite loop cause driver hang.
1205                         if (loopcnt++ > 100)
1206                         {
1207                                 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1208                                 break;
1209                         }
1210
1211                         // Write RF_R24 to program filter
1212                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1213                 }
1214
1215                 if (count > 0)
1216                 {
1217                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1218                 }
1219
1220                 // Store for future usage
1221                 if (loopcnt < 100)
1222                 {
1223                         if (loop++ == 0)
1224                         {
1225                                 //BandWidth = 20 MHz
1226                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1227                         }
1228                         else
1229                         {
1230                                 //BandWidth = 40 MHz
1231                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1232                                 break;
1233                         }
1234                 }
1235                 else
1236                         break;
1237
1238                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1239
1240                 // reset count
1241                 count = 0;
1242         } while(TRUE);
1243
1244         //
1245         // Set back to initial state
1246         //
1247         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1248
1249         RT30xxReadRFRegister(pAd, RF_R22, &value);
1250         value &= ~(0x01);
1251         RT30xxWriteRFRegister(pAd, RF_R22, value);
1252
1253         // set BBP back to BW20
1254         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1255         BBPValue&= (~0x18);
1256         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1257
1258         DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1259 }
1260
1261 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1262 {
1263         INT i;
1264         // Driver must read EEPROM to get RfIcType before initial RF registers
1265         // Initialize RF register to default value
1266 #ifndef RT30xx
1267         if (IS_RT3070(pAd) && ((pAd->RfIcType == RFIC_3020) ||(pAd->RfIcType == RFIC_2020)))
1268         {
1269                 // Init RF calibration
1270                 // Driver should toggle RF R30 bit7 before init RF registers
1271                 ULONG RfReg = 0;
1272                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1273                 RfReg |= 0x80;
1274                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1275                 RTMPusecDelay(1000);
1276                 RfReg &= 0x7F;
1277                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1278
1279                 // Initialize RF register to default value
1280                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1281                 {
1282                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1283                 }
1284
1285                 //For RF filter Calibration
1286                 RTMPFilterCalibration(pAd);
1287         }
1288 #endif
1289 #ifdef RT30xx
1290         if (IS_RT3070(pAd) || IS_RT3071(pAd))
1291         {
1292                 // Init RF calibration
1293                 // Driver should toggle RF R30 bit7 before init RF registers
1294                 UINT32 RfReg = 0;
1295                 UINT32 data;
1296
1297                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1298                 RfReg |= 0x80;
1299                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1300                 RTMPusecDelay(1000);
1301                 RfReg &= 0x7F;
1302                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1303
1304                 // Initialize RF register to default value
1305                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1306                 {
1307                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1308                 }
1309
1310                 // add by johnli
1311                 if (IS_RT3070(pAd))
1312                 {
1313                         //  Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1314                         RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1315                         data = ((data & 0xF0FFFFFF) | 0x0D000000);
1316                         RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1317                 }
1318                 else if (IS_RT3071(pAd))
1319                 {
1320                         // Driver should set RF R6 bit6 on before init RF registers
1321                         RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1322                         RfReg |= 0x40;
1323                         RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1324
1325                         // init R31
1326                         RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1327
1328                         // RT3071 version E has fixed this issue
1329                         if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1330                         {
1331                                 // patch tx EVM issue temporarily
1332                                 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1333                                 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1334                                 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1335                         }
1336                         else
1337                         {
1338                                 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1339                                 data = ((data & 0xE0FFFFFF) | 0x01000000);
1340                                 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1341                         }
1342
1343                         // patch LNA_PE_G1 failed issue
1344                         RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1345                         data &= ~(0x20);
1346                         RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1347                 }
1348
1349                 //For RF filter Calibration
1350                 RTMPFilterCalibration(pAd);
1351
1352                 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1353                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1354                         RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1355
1356                 // set led open drain enable
1357                 RTUSBReadMACRegister(pAd, OPT_14, &data);
1358                 data |= 0x01;
1359                 RTUSBWriteMACRegister(pAd, OPT_14, data);
1360
1361                 if (IS_RT3071(pAd))
1362                 {
1363                         // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1364                         RT30xxLoadRFNormalModeSetup(pAd);
1365                 }
1366         }
1367 #endif
1368 }
1369 #endif // RT2870 //
1370
1371
1372 /*
1373         ========================================================================
1374
1375         Routine Description:
1376                 Read initial parameters from EEPROM
1377
1378         Arguments:
1379                 Adapter                                         Pointer to our adapter
1380
1381         Return Value:
1382                 None
1383
1384         IRQL = PASSIVE_LEVEL
1385
1386         Note:
1387
1388         ========================================================================
1389 */
1390 VOID    NICReadEEPROMParameters(
1391         IN      PRTMP_ADAPTER   pAd,
1392         IN      PUCHAR                  mac_addr)
1393 {
1394         UINT32                  data = 0;
1395         USHORT                  i, value, value2;
1396         UCHAR                   TmpPhy;
1397         EEPROM_TX_PWR_STRUC         Power;
1398         EEPROM_VERSION_STRUC    Version;
1399         EEPROM_ANTENNA_STRUC    Antenna;
1400         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1401
1402         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1403
1404         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1405         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1406         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1407
1408         if((data & 0x30) == 0)
1409                 pAd->EEPROMAddressNum = 6;              // 93C46
1410         else if((data & 0x30) == 0x10)
1411                 pAd->EEPROMAddressNum = 8;     // 93C66
1412         else
1413                 pAd->EEPROMAddressNum = 8;     // 93C86
1414         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1415
1416         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1417         // MAC address registers according to E2PROM setting
1418         if (mac_addr == NULL ||
1419                 strlen(mac_addr) != 17 ||
1420                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1421                 mac_addr[11] != ':' || mac_addr[14] != ':')
1422         {
1423                 USHORT  Addr01,Addr23,Addr45 ;
1424
1425                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1426                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1427                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1428
1429                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1430                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1431                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1432                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1433                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1434                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1435
1436                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1437         }
1438         else
1439         {
1440                 INT             j;
1441                 PUCHAR  macptr;
1442
1443                 macptr = mac_addr;
1444
1445                 for (j=0; j<MAC_ADDR_LEN; j++)
1446                 {
1447                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1448                         macptr=macptr+3;
1449                 }
1450
1451                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1452         }
1453
1454
1455         {
1456                 //more conveninet to test mbssid, so ap's bssid &0xf1
1457                 if (pAd->PermanentAddress[0] == 0xff)
1458                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1459
1460                 //if (pAd->PermanentAddress[5] == 0xff)
1461                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1462
1463                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1464                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1465                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1466                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1467                 if (pAd->bLocalAdminMAC == FALSE)
1468                 {
1469                         MAC_DW0_STRUC csr2;
1470                         MAC_DW1_STRUC csr3;
1471                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1472                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1473                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1474                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1475                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1476                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1477                         csr3.word = 0;
1478                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1479                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1480                         csr3.field.U2MeMask = 0xff;
1481                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1482                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1483                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1484                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1485                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1486                 }
1487         }
1488
1489         // if not return early. cause fail at emulation.
1490         // Init the channel number for TX channel power
1491         RTMPReadChannelPwr(pAd);
1492
1493         // if E2PROM version mismatch with driver's expectation, then skip
1494         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1495         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1496         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1497         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1498
1499         if (Version.field.Version > VALID_EEPROM_VERSION)
1500         {
1501                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1502                 /*pAd->SystemErrorBitmap |= 0x00000001;
1503
1504                 // hard-code default value when no proper E2PROM installed
1505                 pAd->bAutoTxAgcA = FALSE;
1506                 pAd->bAutoTxAgcG = FALSE;
1507
1508                 // Default the channel power
1509                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1510                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1511
1512                 // Default the channel power
1513                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1514                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1515
1516                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1517                         pAd->EEPROMDefaultValue[i] = 0xffff;
1518                 return;  */
1519         }
1520
1521         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1522         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1523         pAd->EEPROMDefaultValue[0] = value;
1524
1525         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1526         pAd->EEPROMDefaultValue[1] = value;
1527
1528         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1529         pAd->EEPROMDefaultValue[2] = value;
1530
1531         for(i = 0; i < 8; i++)
1532         {
1533                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1534                 pAd->EEPROMDefaultValue[i+3] = value;
1535         }
1536
1537         // We have to parse NIC configuration 0 at here.
1538         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1539         // Therefore, we have to read TxAutoAgc control beforehand.
1540         // Read Tx AGC control bit
1541         Antenna.word = pAd->EEPROMDefaultValue[0];
1542         if (Antenna.word == 0xFFFF)
1543         {
1544                 if(IS_RT3090(pAd))
1545                 {
1546                         Antenna.word = 0;
1547                         Antenna.field.RfIcType = RFIC_3020;
1548                         Antenna.field.TxPath = 1;
1549                         Antenna.field.RxPath = 1;
1550                 }
1551                 else
1552                 {
1553                 Antenna.word = 0;
1554                 Antenna.field.RfIcType = RFIC_2820;
1555                 Antenna.field.TxPath = 1;
1556                 Antenna.field.RxPath = 2;
1557                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1558                 }
1559         }
1560
1561         // Choose the desired Tx&Rx stream.
1562         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1563                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1564
1565         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1566         {
1567                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1568
1569                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1570                         (pAd->CommonCfg.RxStream > 2))
1571                 {
1572                         // only 2 Rx streams for RT2860 series
1573                         pAd->CommonCfg.RxStream = 2;
1574                 }
1575         }
1576
1577         // 3*3
1578         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1579         // yet implement
1580         for(i=0; i<3; i++)
1581         {
1582         }
1583
1584         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1585
1586         {
1587 #ifndef RT30xx
1588                 NicConfig2.word = 0;
1589 #endif
1590                 if ((NicConfig2.word & 0x00ff) == 0xff)
1591                 {
1592                         NicConfig2.word &= 0xff00;
1593                 }
1594
1595                 if ((NicConfig2.word >> 8) == 0xff)
1596                 {
1597                         NicConfig2.word &= 0x00ff;
1598                 }
1599         }
1600
1601         if (NicConfig2.field.DynamicTxAgcControl == 1)
1602                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1603         else
1604                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1605
1606         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1607
1608         // Save the antenna for future use
1609         pAd->Antenna.word = Antenna.word;
1610
1611         //
1612         // Reset PhyMode if we don't support 802.11a
1613         // Only RFIC_2850 & RFIC_2750 support 802.11a
1614         //
1615         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1616         {
1617                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1618                         (pAd->CommonCfg.PhyMode == PHY_11A))
1619                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1620                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1621                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1622                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1623                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1624                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1625         }
1626
1627         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1628         // 0. 11b/g
1629         {
1630                 /* these are tempature reference value (0x00 ~ 0xFE)
1631                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1632                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1633                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1634                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1635                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1636                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1637                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1638                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1639                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1640                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1641                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1642                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1643                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1644                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1645                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1646                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1647                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1648                 pAd->TxAgcStepG = Power.field.Byte1;
1649                 pAd->TxAgcCompensateG = 0;
1650                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1651                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1652
1653                 // Disable TxAgc if the based value is not right
1654                 if (pAd->TssiRefG == 0xff)
1655                         pAd->bAutoTxAgcG = FALSE;
1656
1657                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1658                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1659                         pAd->TssiRefG,
1660                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1661                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1662         }
1663         // 1. 11a
1664         {
1665                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1666                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1667                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1668                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1669                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1670                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1671                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1672                 pAd->TssiRefA   = Power.field.Byte0;
1673                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1674                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1675                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1676                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1677                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1678                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1679                 pAd->TxAgcStepA = Power.field.Byte1;
1680                 pAd->TxAgcCompensateA = 0;
1681                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1682                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1683
1684                 // Disable TxAgc if the based value is not right
1685                 if (pAd->TssiRefA == 0xff)
1686                         pAd->bAutoTxAgcA = FALSE;
1687
1688                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1689                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1690                         pAd->TssiRefA,
1691                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1692                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1693         }
1694         pAd->BbpRssiToDbmDelta = 0x0;
1695
1696         // Read frequency offset setting for RF
1697         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1698         if ((value & 0x00FF) != 0x00FF)
1699                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1700         else
1701                 pAd->RfFreqOffset = 0;
1702         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1703
1704         //CountryRegion byte offset (38h)
1705         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1706         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1707
1708         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1709         {
1710                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1711                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1712                 TmpPhy = pAd->CommonCfg.PhyMode;
1713                 pAd->CommonCfg.PhyMode = 0xff;
1714                 RTMPSetPhyMode(pAd, TmpPhy);
1715                 SetCommonHT(pAd);
1716         }
1717
1718         //
1719         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1720         // The valid value are (-10 ~ 10)
1721         //
1722         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1723         pAd->BGRssiOffset0 = value & 0x00ff;
1724         pAd->BGRssiOffset1 = (value >> 8);
1725         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1726         pAd->BGRssiOffset2 = value & 0x00ff;
1727         pAd->ALNAGain1 = (value >> 8);
1728         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1729         pAd->BLNAGain = value & 0x00ff;
1730         pAd->ALNAGain0 = (value >> 8);
1731
1732         // Validate 11b/g RSSI_0 offset.
1733         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1734                 pAd->BGRssiOffset0 = 0;
1735
1736         // Validate 11b/g RSSI_1 offset.
1737         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1738                 pAd->BGRssiOffset1 = 0;
1739
1740         // Validate 11b/g RSSI_2 offset.
1741         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1742                 pAd->BGRssiOffset2 = 0;
1743
1744         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1745         pAd->ARssiOffset0 = value & 0x00ff;
1746         pAd->ARssiOffset1 = (value >> 8);
1747         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1748         pAd->ARssiOffset2 = value & 0x00ff;
1749         pAd->ALNAGain2 = (value >> 8);
1750
1751         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1752                 pAd->ALNAGain1 = pAd->ALNAGain0;
1753         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1754                 pAd->ALNAGain2 = pAd->ALNAGain0;
1755
1756         // Validate 11a RSSI_0 offset.
1757         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1758                 pAd->ARssiOffset0 = 0;
1759
1760         // Validate 11a RSSI_1 offset.
1761         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1762                 pAd->ARssiOffset1 = 0;
1763
1764         //Validate 11a RSSI_2 offset.
1765         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1766                 pAd->ARssiOffset2 = 0;
1767
1768         //
1769         // Get LED Setting.
1770         //
1771         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1772         pAd->LedCntl.word = (value&0xff00) >> 8;
1773         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1774         pAd->Led1 = value;
1775         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1776         pAd->Led2 = value;
1777         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1778         pAd->Led3 = value;
1779
1780         RTMPReadTxPwrPerRate(pAd);
1781
1782 #ifdef RT30xx
1783         if (IS_RT30xx(pAd))
1784         {
1785                 eFusePhysicalReadRegisters(pAd, EFUSE_TAG, 2, &value);
1786                 pAd->EFuseTag = (value & 0xff);
1787         }
1788 #endif // RT30xx //
1789
1790         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1791 }
1792
1793 /*
1794         ========================================================================
1795
1796         Routine Description:
1797                 Set default value from EEPROM
1798
1799         Arguments:
1800                 Adapter                                         Pointer to our adapter
1801
1802         Return Value:
1803                 None
1804
1805         IRQL = PASSIVE_LEVEL
1806
1807         Note:
1808
1809         ========================================================================
1810 */
1811 VOID    NICInitAsicFromEEPROM(
1812         IN      PRTMP_ADAPTER   pAd)
1813 {
1814         UINT32                                  data = 0;
1815         UCHAR   BBPR1 = 0;
1816         USHORT                                  i;
1817         EEPROM_ANTENNA_STRUC    Antenna;
1818         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1819         UCHAR   BBPR3 = 0;
1820
1821         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1822         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1823         {
1824                 UCHAR BbpRegIdx, BbpValue;
1825
1826                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1827                 {
1828                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1829                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1830                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1831                 }
1832         }
1833
1834 #ifndef RT30xx
1835         Antenna.word = pAd->Antenna.word;
1836 #endif
1837 #ifdef RT30xx
1838         Antenna.word = pAd->EEPROMDefaultValue[0];
1839         if (Antenna.word == 0xFFFF)
1840         {
1841                 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1842                 BUG_ON(Antenna.word == 0xFFFF);
1843         }
1844 #endif
1845         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1846         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1847
1848 #ifdef RT30xx
1849         DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1850
1851         // Save the antenna for future use
1852         pAd->Antenna.word = Antenna.word;
1853 #endif
1854         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1855
1856 #ifdef RT30xx
1857         {
1858                 if ((NicConfig2.word & 0x00ff) == 0xff)
1859                 {
1860                         NicConfig2.word &= 0xff00;
1861                 }
1862
1863                 if ((NicConfig2.word >> 8) == 0xff)
1864                 {
1865                         NicConfig2.word &= 0x00ff;
1866                 }
1867         }
1868 #endif
1869         // Save the antenna for future use
1870         pAd->NicConfig2.word = NicConfig2.word;
1871
1872 #ifdef RT30xx
1873         // set default antenna as main
1874         if (pAd->RfIcType == RFIC_3020)
1875                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1876 #endif
1877         //
1878         // Send LED Setting to MCU.
1879         //
1880         if (pAd->LedCntl.word == 0xFF)
1881         {
1882                 pAd->LedCntl.word = 0x01;
1883                 pAd->Led1 = 0x5555;
1884                 pAd->Led2 = 0x2221;
1885 #ifdef RT2860
1886                 pAd->Led3 = 0xA9F8;
1887 #endif
1888
1889 #ifdef RT2870
1890                 pAd->Led3 = 0x5627;
1891 #endif // RT2870 //
1892         }
1893
1894         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1895         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1896         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1897     pAd->LedIndicatorStregth = 0xFF;
1898     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1899
1900         {
1901                 // Read Hardware controlled Radio state enable bit
1902                 if (NicConfig2.field.HardwareRadioControl == 1)
1903                 {
1904                         pAd->StaCfg.bHardwareRadio = TRUE;
1905
1906                         // Read GPIO pin2 as Hardware controlled radio state
1907                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1908                         if ((data & 0x04) == 0)
1909                         {
1910                                 pAd->StaCfg.bHwRadio = FALSE;
1911                                 pAd->StaCfg.bRadio = FALSE;
1912                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1913                         }
1914                 }
1915                 else
1916                         pAd->StaCfg.bHardwareRadio = FALSE;
1917
1918                 if (pAd->StaCfg.bRadio == FALSE)
1919                 {
1920                         RTMPSetLED(pAd, LED_RADIO_OFF);
1921                 }
1922                 else
1923                 {
1924                         RTMPSetLED(pAd, LED_RADIO_ON);
1925 #ifdef RT2860
1926                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1927                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1928                         // 2-1. wait command ok.
1929                         AsicCheckCommanOk(pAd, PowerWakeCID);
1930 #endif
1931                 }
1932         }
1933
1934         // Turn off patching for cardbus controller
1935         if (NicConfig2.field.CardbusAcceleration == 1)
1936         {
1937         }
1938
1939         if (NicConfig2.field.DynamicTxAgcControl == 1)
1940                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1941         else
1942                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1943         //
1944         // Since BBP has been progamed, to make sure BBP setting will be
1945         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1946         //
1947         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1948
1949         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1950         BBPR3 &= (~0x18);
1951         if(pAd->Antenna.field.RxPath == 3)
1952         {
1953                 BBPR3 |= (0x10);
1954         }
1955         else if(pAd->Antenna.field.RxPath == 2)
1956         {
1957                 BBPR3 |= (0x8);
1958         }
1959         else if(pAd->Antenna.field.RxPath == 1)
1960         {
1961                 BBPR3 |= (0x0);
1962         }
1963         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1964
1965         {
1966                 // Handle the difference when 1T
1967                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1968                 if(pAd->Antenna.field.TxPath == 1)
1969                 {
1970                 BBPR1 &= (~0x18);
1971                 }
1972                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1973
1974                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1975         }
1976
1977         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1978         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1979 }
1980
1981 /*
1982         ========================================================================
1983
1984         Routine Description:
1985                 Initialize NIC hardware
1986
1987         Arguments:
1988                 Adapter                                         Pointer to our adapter
1989
1990         Return Value:
1991                 None
1992
1993         IRQL = PASSIVE_LEVEL
1994
1995         Note:
1996
1997         ========================================================================
1998 */
1999 NDIS_STATUS     NICInitializeAdapter(
2000         IN      PRTMP_ADAPTER   pAd,
2001         IN   BOOLEAN    bHardReset)
2002 {
2003         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
2004         WPDMA_GLO_CFG_STRUC     GloCfg;
2005 #ifdef RT2860
2006         UINT32                  Value;
2007         DELAY_INT_CFG_STRUC     IntCfg;
2008 #endif
2009         ULONG   i =0, j=0;
2010         AC_TXOP_CSR0_STRUC      csr0;
2011
2012         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
2013
2014         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2015 retry:
2016         i = 0;
2017         do
2018         {
2019                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2020                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
2021                         break;
2022
2023                 RTMPusecDelay(1000);
2024                 i++;
2025         }while ( i<100);
2026         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
2027         GloCfg.word &= 0xff0;
2028         GloCfg.field.EnTXWriteBackDDONE =1;
2029         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2030
2031         // Record HW Beacon offset
2032         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
2033         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
2034         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
2035         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
2036         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
2037         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
2038         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
2039         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
2040
2041         //
2042         // write all shared Ring's base address into ASIC
2043         //
2044
2045         // asic simulation sequence put this ahead before loading firmware.
2046         // pbf hardware reset
2047 #ifdef RT2860
2048         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
2049         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
2050         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
2051 #endif
2052
2053         // Initialze ASIC for TX & Rx operation
2054         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
2055         {
2056                 if (j++ == 0)
2057                 {
2058                         NICLoadFirmware(pAd);
2059                         goto retry;
2060                 }
2061                 return NDIS_STATUS_FAILURE;
2062         }
2063
2064
2065 #ifdef RT2860
2066         // Write AC_BK base address register
2067         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
2068         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
2069         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
2070
2071         // Write AC_BE base address register
2072         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
2073         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
2074         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
2075
2076         // Write AC_VI base address register
2077         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
2078         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
2079         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
2080
2081         // Write AC_VO base address register
2082         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
2083         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
2084         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
2085
2086         // Write HCCA base address register
2087           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
2088           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
2089         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
2090
2091         // Write MGMT_BASE_CSR register
2092         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
2093         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
2094         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
2095
2096         // Write RX_BASE_CSR register
2097         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
2098         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
2099         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
2100
2101         // Init RX Ring index pointer
2102         pAd->RxRing.RxSwReadIdx = 0;
2103         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
2104         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
2105
2106         // Init TX rings index pointer
2107         {
2108                 for (i=0; i<NUM_OF_TX_RING; i++)
2109                 {
2110                         pAd->TxRing[i].TxSwFreeIdx = 0;
2111                         pAd->TxRing[i].TxCpuIdx = 0;
2112                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
2113                 }
2114         }
2115
2116         // init MGMT ring index pointer
2117         pAd->MgmtRing.TxSwFreeIdx = 0;
2118         pAd->MgmtRing.TxCpuIdx = 0;
2119         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
2120
2121         //
2122         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
2123         //
2124
2125         // Write TX_RING_CSR0 register
2126         Value = TX_RING_SIZE;
2127         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
2128         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
2129         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
2130         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
2131         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
2132         Value = MGMT_RING_SIZE;
2133         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
2134
2135         // Write RX_RING_CSR register
2136         Value = RX_RING_SIZE;
2137         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
2138 #endif /* RT2860 */
2139
2140
2141         // WMM parameter
2142         csr0.word = 0;
2143         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2144         if (pAd->CommonCfg.PhyMode == PHY_11B)
2145         {
2146                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
2147                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
2148         }
2149         else
2150         {
2151                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
2152                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
2153         }
2154         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2155
2156
2157 #ifdef RT2860
2158         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2159         i = 0;
2160         do
2161         {
2162                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2163                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
2164                         break;
2165
2166                 RTMPusecDelay(1000);
2167                 i++;
2168         }while ( i < 100);
2169
2170         GloCfg.word &= 0xff0;
2171         GloCfg.field.EnTXWriteBackDDONE =1;
2172         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2173
2174         IntCfg.word = 0;
2175         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
2176 #endif
2177
2178
2179         // reset action
2180         // Load firmware
2181         //  Status = NICLoadFirmware(pAd);
2182
2183         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2184         return Status;
2185 }
2186
2187 /*
2188         ========================================================================
2189
2190         Routine Description:
2191                 Initialize ASIC
2192
2193         Arguments:
2194                 Adapter                                         Pointer to our adapter
2195
2196         Return Value:
2197                 None
2198
2199         IRQL = PASSIVE_LEVEL
2200
2201         Note:
2202
2203         ========================================================================
2204 */
2205 NDIS_STATUS     NICInitializeAsic(
2206         IN      PRTMP_ADAPTER   pAd,
2207         IN  BOOLEAN             bHardReset)
2208 {
2209         ULONG                   Index = 0;
2210         UCHAR                   R0 = 0xff;
2211         UINT32                  MacCsr12 = 0, Counter = 0;
2212 #ifdef RT2870
2213         UINT32                  MacCsr0 = 0;
2214         NTSTATUS                Status;
2215         UCHAR                   Value = 0xff;
2216 #endif // RT2870 //
2217 #ifdef RT30xx
2218         UINT32                  eFuseCtrl;
2219 #endif // RT30xx //
2220         USHORT                  KeyIdx;
2221         INT                             i,apidx;
2222
2223         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2224
2225 #ifdef RT2860
2226         if (bHardReset == TRUE)
2227         {
2228                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2229         }
2230         else
2231                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2232 #endif
2233 #ifdef RT2870
2234         //
2235         // Make sure MAC gets ready after NICLoadFirmware().
2236         //
2237         Index = 0;
2238
2239         //To avoid hang-on issue when interface up in kernel 2.4,
2240         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2241         do
2242         {
2243                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2244
2245                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2246                         break;
2247
2248                 RTMPusecDelay(10);
2249         } while (Index++ < 100);
2250
2251         pAd->MACVersion = MacCsr0;
2252         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2253         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2254         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2255         MacCsr12 &= (~0x2000);
2256         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2257
2258         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2259         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2260         Status = RTUSBVenderReset(pAd);
2261 #endif
2262
2263         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2264
2265         // Initialize MAC register to default value
2266 #ifdef RT2860
2267         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
2268         {
2269                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
2270         }
2271 #endif
2272 #ifdef RT2870
2273         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2274         {
2275 #ifdef RT3070
2276                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2277                 {
2278                         MACRegTable[Index].Value = 0x00000400;
2279                 }
2280 #endif // RT3070 //
2281                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2282         }
2283
2284 #ifndef RT30xx
2285         if(IS_RT3070(pAd))
2286         {
2287                 // According to Frank Hsu (from Gary Tsao)
2288                 RTMP_IO_WRITE32(pAd, (USHORT)TX_SW_CFG0, 0x00000400);
2289
2290                 // Initialize RT3070 serial MAC registers which is different from RT2870 serial
2291                 RTUSBWriteMACRegister(pAd, TX_SW_CFG1, 0);
2292                 RTUSBWriteMACRegister(pAd, TX_SW_CFG2, 0);
2293         }
2294 #endif
2295 #endif // RT2870 //
2296
2297
2298         {
2299                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2300                 {
2301 #ifdef RT2860
2302                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2303 #endif
2304 #ifdef RT2870
2305                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2306 #endif
2307                 }
2308         }
2309
2310         // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2311         if (IS_RT3090(pAd))
2312         {
2313                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2314
2315                 // RT3071 version E has fixed this issue
2316                 if ((pAd->MACVersion & 0xffff) < 0x0211)
2317                 {
2318                         if (pAd->NicConfig2.field.DACTestBit == 1)
2319                         {
2320                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2321                         }
2322                         else
2323                         {
2324                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2325                         }
2326                 }
2327                 else
2328                 {
2329                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2330                 }
2331         }
2332 #ifdef RT30xx
2333         else if (IS_RT3070(pAd))
2334         {
2335                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2336                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2337         }
2338 #endif // RT30xx //
2339
2340         //
2341         // Before program BBP, we need to wait BBP/RF get wake up.
2342         //
2343         Index = 0;
2344         do
2345         {
2346                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2347
2348                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
2349                         break;
2350
2351                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
2352                 RTMPusecDelay(1000);
2353         } while (Index++ < 100);
2354
2355     // The commands to firmware should be after these commands, these commands will init firmware
2356         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2357         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2358         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2359         RTMPusecDelay(1000);
2360
2361         // Read BBP register, make sure BBP is up and running before write new data
2362         Index = 0;
2363         do
2364         {
2365                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2366                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2367         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2368         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2369
2370         if ((R0 == 0xff) || (R0 == 0x00))
2371                 return NDIS_STATUS_FAILURE;
2372
2373         // Initialize BBP register to default value
2374         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2375         {
2376                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2377         }
2378
2379 #ifndef RT30xx
2380         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2381         if ((pAd->MACVersion&0xffff) != 0x0101)
2382                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2383
2384 #ifdef RT2870
2385         //write RT3070 BBP wchich different with 2870 after write RT2870 BBP
2386         if (IS_RT3070(pAd))
2387         {
2388                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
2389                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x99);
2390                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, 0x05);
2391         }
2392 #endif // RT2870 //
2393 #endif
2394 #ifdef RT30xx
2395         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2396         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2397         if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2398                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2399
2400 // add by johnli, RF power sequence setup
2401         if (IS_RT30xx(pAd))
2402         {       //update for RT3070/71/72/90/91/92.
2403                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2404                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2405                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2406         }
2407
2408         if (IS_RT3090(pAd))
2409         {
2410                 UCHAR           bbpreg=0;
2411
2412                 // enable DC filter
2413                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2414                 {
2415                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2416                 }
2417
2418                 // improve power consumption
2419                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2420                 if (pAd->Antenna.field.TxPath == 1)
2421                 {
2422                         // turn off tx DAC_1
2423                         bbpreg = (bbpreg | 0x20);
2424                 }
2425
2426                 if (pAd->Antenna.field.RxPath == 1)
2427                 {
2428                         // turn off tx ADC_1
2429                         bbpreg &= (~0x2);
2430                 }
2431                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2432
2433                 // improve power consumption in RT3071 Ver.E
2434                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2435                 {
2436                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2437                         bbpreg &= (~0x3);
2438                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2439                 }
2440         }
2441 #endif
2442         if (pAd->MACVersion == 0x28600100)
2443         {
2444                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2445                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2446     }
2447
2448         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2449         {
2450                 // enlarge MAX_LEN_CFG
2451                 UINT32 csr;
2452                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2453                 csr &= 0xFFF;
2454                 csr |= 0x2000;
2455                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2456         }
2457
2458 #ifdef RT2870
2459 {
2460         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2461
2462         //Initialize WCID table
2463         Value = 0xff;
2464         for(Index =0 ;Index < 254;Index++)
2465         {
2466                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2467         }
2468 }
2469 #endif // RT2870 //
2470
2471         // Add radio off control
2472         {
2473                 if (pAd->StaCfg.bRadio == FALSE)
2474                 {
2475 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2476                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2477                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2478                 }
2479         }
2480
2481         // Clear raw counters
2482         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2483         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2484         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2485         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2486         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2487         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2488
2489         // ASIC will keep garbage value after boot
2490         // Clear all seared key table when initial
2491         // This routine can be ignored in radio-ON/OFF operation.
2492         if (bHardReset)
2493         {
2494                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2495                 {
2496                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2497                 }
2498
2499                 // Clear all pairwise key table when initial
2500                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2501                 {
2502                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2503                 }
2504         }
2505
2506
2507         // It isn't necessary to clear this space when not hard reset.
2508         if (bHardReset == TRUE)
2509         {
2510                 // clear all on-chip BEACON frame space
2511                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2512                 {
2513                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2514                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2515                 }
2516         }
2517 #ifdef RT2870
2518         AsicDisableSync(pAd);
2519         // Clear raw counters
2520         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2521         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2522         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2523         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2524         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2525         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2526         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2527         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2528         Counter&=0xffffff00;
2529         Counter|=0x000001e;
2530         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2531 #endif // RT2870 //
2532 #ifdef RT30xx
2533         pAd->bUseEfuse=FALSE;
2534         RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2535         pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2536         if(pAd->bUseEfuse)
2537         {
2538                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2539         }
2540         else
2541         {
2542                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2543
2544         }
2545 #endif // RT30xx //
2546
2547         {
2548                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2549                 if ((pAd->MACVersion&0xffff) != 0x0101)
2550                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2551         }
2552
2553         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2554         return NDIS_STATUS_SUCCESS;
2555 }
2556
2557
2558 #ifdef RT2860
2559 VOID NICRestoreBBPValue(
2560         IN PRTMP_ADAPTER pAd)
2561 {
2562         UCHAR           index;
2563         UCHAR           Value = 0;
2564         ULONG           Data;
2565
2566         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2567         // Initialize BBP register to default value (rtmp_init.c)
2568         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2569         {
2570                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2571         }
2572         // copy from (rtmp_init.c)
2573         if (pAd->MACVersion == 0x28600100)
2574         {
2575                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2576                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2577         }
2578
2579         // copy from (connect.c LinkUp function)
2580         if (INFRA_ON(pAd))
2581         {
2582                 // Change to AP channel
2583                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2584                 {
2585                         // Must using 40MHz.
2586                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2587                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2588                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2589
2590                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2591                         Value &= (~0x18);
2592                         Value |= 0x10;
2593                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2594
2595                         //  RX : control channel at lower
2596                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2597                         Value &= (~0x20);
2598                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2599                         // Record BBPR3 setting, But don't keep R Antenna # information.
2600                         pAd->StaCfg.BBPR3 = Value;
2601
2602                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2603                         Data &= 0xfffffffe;
2604                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2605
2606                         if (pAd->MACVersion == 0x28600100)
2607                         {
2608                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2609                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2610                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2611                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2612                         }
2613
2614                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2615                 }
2616                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2617                 {
2618                         // Must using 40MHz.
2619                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2620                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2621                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2622
2623                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2624                         Value &= (~0x18);
2625                         Value |= 0x10;
2626                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2627
2628                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2629                         Data |= 0x1;
2630                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2631
2632                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2633                         Value |= (0x20);
2634                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2635                         // Record BBPR3 setting, But don't keep R Antenna # information.
2636                         pAd->StaCfg.BBPR3 = Value;
2637
2638                         if (pAd->MACVersion == 0x28600100)
2639                         {
2640                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2641                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2642                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2643                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2644                         }
2645
2646                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2647                 }
2648                 else
2649                 {
2650                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2651                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2652                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2653
2654                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2655                         Value &= (~0x18);
2656                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2657
2658                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2659                         Data &= 0xfffffffe;
2660                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2661
2662                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2663                         Value &= (~0x20);
2664                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2665                         // Record BBPR3 setting, But don't keep R Antenna # information.
2666                         pAd->StaCfg.BBPR3 = Value;
2667
2668                         if (pAd->MACVersion == 0x28600100)
2669                         {
2670                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2671                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2672                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2673                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2674                         }
2675
2676                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2677                 }
2678         }
2679
2680         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2681 }
2682 #endif /* RT2860 */
2683
2684 /*
2685         ========================================================================
2686
2687         Routine Description:
2688                 Reset NIC Asics
2689
2690         Arguments:
2691                 Adapter                                         Pointer to our adapter
2692
2693         Return Value:
2694                 None
2695
2696         IRQL = PASSIVE_LEVEL
2697
2698         Note:
2699                 Reset NIC to initial state AS IS system boot up time.
2700
2701         ========================================================================
2702 */
2703 VOID    NICIssueReset(
2704         IN      PRTMP_ADAPTER   pAd)
2705 {
2706         UINT32  Value = 0;
2707         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2708
2709         // Disable Rx, register value supposed will remain after reset
2710         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2711         Value &= (0xfffffff3);
2712         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2713
2714         // Issue reset and clear from reset state
2715         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2716         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2717
2718         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2719 }
2720
2721 /*
2722         ========================================================================
2723
2724         Routine Description:
2725                 Check ASIC registers and find any reason the system might hang
2726
2727         Arguments:
2728                 Adapter                                         Pointer to our adapter
2729
2730         Return Value:
2731                 None
2732
2733         IRQL = DISPATCH_LEVEL
2734
2735         ========================================================================
2736 */
2737 BOOLEAN NICCheckForHang(
2738         IN      PRTMP_ADAPTER   pAd)
2739 {
2740         return (FALSE);
2741 }
2742
2743 VOID NICUpdateFifoStaCounters(
2744         IN PRTMP_ADAPTER pAd)
2745 {
2746         TX_STA_FIFO_STRUC       StaFifo;
2747         MAC_TABLE_ENTRY         *pEntry;
2748         UCHAR                           i = 0;
2749         UCHAR                   pid = 0, wcid = 0;
2750         CHAR                            reTry;
2751         UCHAR                           succMCS;
2752
2753                 do
2754                 {
2755                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2756
2757                         if (StaFifo.field.bValid == 0)
2758                                 break;
2759
2760                         wcid = (UCHAR)StaFifo.field.wcid;
2761
2762
2763                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2764                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2765                         {
2766                                 i++;
2767                                 continue;
2768                         }
2769
2770                         /* PID store Tx MCS Rate */
2771                         pid = (UCHAR)StaFifo.field.PidType;
2772
2773                         pEntry = &pAd->MacTab.Content[wcid];
2774
2775                         pEntry->DebugFIFOCount++;
2776
2777                         if (StaFifo.field.TxBF) // 3*3
2778                                 pEntry->TxBFCount++;
2779
2780 #ifdef UAPSD_AP_SUPPORT
2781                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2782 #endif // UAPSD_AP_SUPPORT //
2783
2784                         if (!StaFifo.field.TxSuccess)
2785                         {
2786                                 pEntry->FIFOCount++;
2787                                 pEntry->OneSecTxFailCount++;
2788
2789                                 if (pEntry->FIFOCount >= 1)
2790                                 {
2791                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2792                                         pEntry->NoBADataCountDown = 64;
2793
2794                                         if(pEntry->PsMode == PWR_ACTIVE)
2795                                         {
2796                                                 int tid;
2797                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2798                                                 {
2799                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2800                                                 }
2801
2802                                                 // Update the continuous transmission counter except PS mode
2803                                                 pEntry->ContinueTxFailCnt++;
2804                                         }
2805                                         else
2806                                         {
2807                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2808                                                 //     this tx error happened due to sta just go to sleep.
2809                                                 pEntry->FIFOCount = 0;
2810                                                 pEntry->ContinueTxFailCnt = 0;
2811                                         }
2812                                 }
2813                         }
2814                         else
2815                         {
2816                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2817                                 {
2818                                         pEntry->NoBADataCountDown--;
2819                                         if (pEntry->NoBADataCountDown==0)
2820                                         {
2821                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2822                                         }
2823                                 }
2824
2825                                 pEntry->FIFOCount = 0;
2826                                 pEntry->OneSecTxNoRetryOkCount++;
2827                                 // update NoDataIdleCount when sucessful send packet to STA.
2828                                 pEntry->NoDataIdleCount = 0;
2829                                 pEntry->ContinueTxFailCnt = 0;
2830                         }
2831
2832                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2833
2834                         reTry = pid - succMCS;
2835
2836                         if (StaFifo.field.TxSuccess)
2837                         {
2838                                 pEntry->TXMCSExpected[pid]++;
2839                                 if (pid == succMCS)
2840                                 {
2841                                         pEntry->TXMCSSuccessful[pid]++;
2842                                 }
2843                                 else
2844                                 {
2845                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2846                                 }
2847                         }
2848                         else
2849                         {
2850                                 pEntry->TXMCSFailed[pid]++;
2851                         }
2852
2853                         if (reTry > 0)
2854                         {
2855                                 if ((pid >= 12) && succMCS <=7)
2856                                 {
2857                                         reTry -= 4;
2858                                 }
2859                                 pEntry->OneSecTxRetryOkCount += reTry;
2860                         }
2861
2862                         i++;
2863                         // ASIC store 16 stack
2864                 } while ( i < (2*TX_RING_SIZE) );
2865
2866 }
2867
2868 /*
2869         ========================================================================
2870
2871         Routine Description:
2872                 Read statistical counters from hardware registers and record them
2873                 in software variables for later on query
2874
2875         Arguments:
2876                 pAd                                     Pointer to our adapter
2877
2878         Return Value:
2879                 None
2880
2881         IRQL = DISPATCH_LEVEL
2882
2883         ========================================================================
2884 */
2885 VOID NICUpdateRawCounters(
2886         IN PRTMP_ADAPTER pAd)
2887 {
2888         UINT32  OldValue;
2889         RX_STA_CNT0_STRUC        RxStaCnt0;
2890         RX_STA_CNT1_STRUC   RxStaCnt1;
2891         RX_STA_CNT2_STRUC   RxStaCnt2;
2892         TX_STA_CNT0_STRUC        TxStaCnt0;
2893         TX_STA_CNT1_STRUC        StaTx1;
2894         TX_STA_CNT2_STRUC        StaTx2;
2895         TX_AGG_CNT_STRUC        TxAggCnt;
2896         TX_AGG_CNT0_STRUC       TxAggCnt0;
2897         TX_AGG_CNT1_STRUC       TxAggCnt1;
2898         TX_AGG_CNT2_STRUC       TxAggCnt2;
2899         TX_AGG_CNT3_STRUC       TxAggCnt3;
2900         TX_AGG_CNT4_STRUC       TxAggCnt4;
2901         TX_AGG_CNT5_STRUC       TxAggCnt5;
2902         TX_AGG_CNT6_STRUC       TxAggCnt6;
2903         TX_AGG_CNT7_STRUC       TxAggCnt7;
2904
2905         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2906         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2907
2908         {
2909                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2910             // Update RX PLCP error counter
2911             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2912                 // Update False CCA counter
2913                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2914         }
2915
2916         // Update FCS counters
2917         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2918         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2919         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2920                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2921
2922         // Add FCS error count to private counters
2923         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2924         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2925         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2926         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2927                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2928
2929         // Update Duplicate Rcv check
2930         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2931         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2932         // Update RX Overflow counter
2933         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2934
2935 #ifdef RT2870
2936         if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2937         {
2938                 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2939                 pAd->watchDogRxOverFlowCnt = 0;
2940         }
2941         else
2942         {
2943                 if (RxStaCnt2.field.RxFifoOverflowCount)
2944                         pAd->watchDogRxOverFlowCnt++;
2945                 else
2946                         pAd->watchDogRxOverFlowCnt = 0;
2947         }
2948 #endif // RT2870 //
2949
2950
2951         if (!pAd->bUpdateBcnCntDone)
2952         {
2953         // Update BEACON sent count
2954         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2955         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2956         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2957         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2958         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2959         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2960         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2961         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2962         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2963         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2964         }
2965
2966         {
2967                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2968                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2969                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2970                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2971                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2972                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2973                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2974                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2975                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2976                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2977                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2978                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2979                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2980
2981                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2982                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2983                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2984                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2985
2986                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2987                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2988                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2989                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2990
2991                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2992                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2993                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2994                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2995
2996                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2997                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2998
2999                 // Calculate the transmitted A-MPDU count
3000                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
3001                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
3002
3003                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
3004                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
3005
3006                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
3007                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
3008
3009                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
3010                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
3011
3012                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
3013                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
3014
3015                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
3016                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
3017
3018                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
3019                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
3020
3021                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
3022                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
3023         }
3024
3025 #ifdef DBG_DIAGNOSE
3026         {
3027                 RtmpDiagStruct  *pDiag;
3028                 COUNTER_RALINK  *pRalinkCounters;
3029                 UCHAR                   ArrayCurIdx, i;
3030
3031                 pDiag = &pAd->DiagStruct;
3032                 pRalinkCounters = &pAd->RalinkCounters;
3033                 ArrayCurIdx = pDiag->ArrayCurIdx;
3034
3035                 if (pDiag->inited == 0)
3036                 {
3037                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
3038                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
3039                         pDiag->inited = 1;
3040                 }
3041                 else
3042                 {
3043                         // Tx
3044                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
3045                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
3046                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
3047                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
3048                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
3049                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
3050                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
3051                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
3052                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
3053                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
3054                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
3055                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
3056                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
3057                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
3058                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
3059                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
3060                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
3061                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
3062                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
3063
3064                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
3065
3066                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
3067                         ArrayCurIdx = pDiag->ArrayCurIdx;
3068                         for (i =0; i < 9; i++)
3069                         {
3070                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
3071                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
3072                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
3073                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
3074                         }
3075                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
3076                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
3077                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
3078                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
3079                         for (i = 9; i < 24; i++) // 3*3
3080                         {
3081                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
3082                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
3083                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
3084 }
3085
3086                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
3087                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
3088                 }
3089
3090         }
3091 #endif // DBG_DIAGNOSE //
3092
3093
3094 }
3095
3096
3097 /*
3098         ========================================================================
3099
3100         Routine Description:
3101                 Reset NIC from error
3102
3103         Arguments:
3104                 Adapter                                         Pointer to our adapter
3105
3106         Return Value:
3107                 None
3108
3109         IRQL = PASSIVE_LEVEL
3110
3111         Note:
3112                 Reset NIC from error state
3113
3114         ========================================================================
3115 */
3116 VOID    NICResetFromError(
3117         IN      PRTMP_ADAPTER   pAd)
3118 {
3119         // Reset BBP (according to alex, reset ASIC will force reset BBP
3120         // Therefore, skip the reset BBP
3121         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
3122
3123         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
3124         // Remove ASIC from reset state
3125         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
3126
3127         NICInitializeAdapter(pAd, FALSE);
3128         NICInitAsicFromEEPROM(pAd);
3129
3130         // Switch to current channel, since during reset process, the connection should remains on.
3131         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
3132         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
3133 }
3134
3135 /*
3136         ========================================================================
3137
3138         Routine Description:
3139                 erase 8051 firmware image in MAC ASIC
3140
3141         Arguments:
3142                 Adapter                                         Pointer to our adapter
3143
3144         IRQL = PASSIVE_LEVEL
3145
3146         ========================================================================
3147 */
3148 VOID NICEraseFirmware(
3149         IN PRTMP_ADAPTER pAd)
3150 {
3151         ULONG i;
3152
3153         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
3154                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
3155
3156 }/* End of NICEraseFirmware */
3157
3158 /*
3159         ========================================================================
3160
3161         Routine Description:
3162                 Load 8051 firmware RT2561.BIN file into MAC ASIC
3163
3164         Arguments:
3165                 Adapter                                         Pointer to our adapter
3166
3167         Return Value:
3168                 NDIS_STATUS_SUCCESS         firmware image load ok
3169                 NDIS_STATUS_FAILURE         image not found
3170
3171         IRQL = PASSIVE_LEVEL
3172
3173         ========================================================================
3174 */
3175 NDIS_STATUS NICLoadFirmware(
3176         IN PRTMP_ADAPTER pAd)
3177 {
3178         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
3179         PUCHAR                  pFirmwareImage;
3180         ULONG                   FileLength, Index;
3181         //ULONG                 firm;
3182         UINT32                  MacReg = 0;
3183 #ifdef RT2870
3184         UINT32                  Version = (pAd->MACVersion >> 16);
3185 #endif // RT2870 //
3186
3187         pFirmwareImage = FirmwareImage;
3188         FileLength = sizeof(FirmwareImage);
3189 #ifdef RT2870
3190         // New 8k byte firmware size for RT3071/RT3072
3191         //printk("Usb Chip\n");
3192         if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
3193         //The firmware image consists of two parts. One is the origianl and the other is the new.
3194         //Use Second Part
3195         {
3196                 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
3197                 {       // Use Firmware V2.
3198                         //printk("KH:Use New Version,part2\n");
3199                         pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
3200                         FileLength = FIRMWAREIMAGEV2_LENGTH;
3201                 }
3202                 else
3203                 {
3204                         //printk("KH:Use New Version,part1\n");
3205                         pFirmwareImage = FirmwareImage;
3206                         FileLength = FIRMWAREIMAGEV1_LENGTH;
3207                 }
3208         }
3209         else
3210         {
3211                 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
3212                 Status = NDIS_STATUS_FAILURE;
3213         }
3214
3215 #endif // RT2870 //
3216
3217         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
3218
3219         /* check if MCU is ready */
3220         Index = 0;
3221         do
3222         {
3223                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
3224
3225                 if (MacReg & 0x80)
3226                         break;
3227
3228                 RTMPusecDelay(1000);
3229         } while (Index++ < 1000);
3230
3231     if (Index > 1000)
3232         {
3233                 Status = NDIS_STATUS_FAILURE;
3234                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
3235         } /* End of if */
3236
3237     DBGPRINT(RT_DEBUG_TRACE,
3238                          ("<=== %s (status=%d)\n", __func__, Status));
3239     return Status;
3240 } /* End of NICLoadFirmware */
3241
3242
3243 /*
3244         ========================================================================
3245
3246         Routine Description:
3247                 Load Tx rate switching parameters
3248
3249         Arguments:
3250                 Adapter                                         Pointer to our adapter
3251
3252         Return Value:
3253                 NDIS_STATUS_SUCCESS         firmware image load ok
3254                 NDIS_STATUS_FAILURE         image not found
3255
3256         IRQL = PASSIVE_LEVEL
3257
3258         Rate Table Format:
3259                 1. (B0: Valid Item number) (B1:Initial item from zero)
3260                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
3261
3262         ========================================================================
3263 */
3264 NDIS_STATUS NICLoadRateSwitchingParams(
3265         IN PRTMP_ADAPTER pAd)
3266 {
3267         return NDIS_STATUS_SUCCESS;
3268 }
3269
3270 /*
3271         ========================================================================
3272
3273         Routine Description:
3274                 if  pSrc1 all zero with length Length, return 0.
3275                 If not all zero, return 1
3276
3277         Arguments:
3278                 pSrc1
3279
3280         Return Value:
3281                 1:                      not all zero
3282                 0:                      all zero
3283
3284         IRQL = DISPATCH_LEVEL
3285
3286         Note:
3287
3288         ========================================================================
3289 */
3290 ULONG   RTMPNotAllZero(
3291         IN      PVOID   pSrc1,
3292         IN      ULONG   Length)
3293 {
3294         PUCHAR  pMem1;
3295         ULONG   Index = 0;
3296
3297         pMem1 = (PUCHAR) pSrc1;
3298
3299         for (Index = 0; Index < Length; Index++)
3300         {
3301                 if (pMem1[Index] != 0x0)
3302                 {
3303                         break;
3304                 }
3305         }
3306
3307         if (Index == Length)
3308         {
3309                 return (0);
3310         }
3311         else
3312         {
3313                 return (1);
3314         }
3315 }
3316
3317 /*
3318         ========================================================================
3319
3320         Routine Description:
3321                 Compare two memory block
3322
3323         Arguments:
3324                 pSrc1           Pointer to first memory address
3325                 pSrc2           Pointer to second memory address
3326
3327         Return Value:
3328                 0:                      memory is equal
3329                 1:                      pSrc1 memory is larger
3330                 2:                      pSrc2 memory is larger
3331
3332         IRQL = DISPATCH_LEVEL
3333
3334         Note:
3335
3336         ========================================================================
3337 */
3338 ULONG   RTMPCompareMemory(
3339         IN      PVOID   pSrc1,
3340         IN      PVOID   pSrc2,
3341         IN      ULONG   Length)
3342 {
3343         PUCHAR  pMem1;
3344         PUCHAR  pMem2;
3345         ULONG   Index = 0;
3346
3347         pMem1 = (PUCHAR) pSrc1;
3348         pMem2 = (PUCHAR) pSrc2;
3349
3350         for (Index = 0; Index < Length; Index++)
3351         {
3352                 if (pMem1[Index] > pMem2[Index])
3353                         return (1);
3354                 else if (pMem1[Index] < pMem2[Index])
3355                         return (2);
3356         }
3357
3358         // Equal
3359         return (0);
3360 }
3361
3362 /*
3363         ========================================================================
3364
3365         Routine Description:
3366                 Zero out memory block
3367
3368         Arguments:
3369                 pSrc1           Pointer to memory address
3370                 Length          Size
3371
3372         Return Value:
3373                 None
3374
3375         IRQL = PASSIVE_LEVEL
3376         IRQL = DISPATCH_LEVEL
3377
3378         Note:
3379
3380         ========================================================================
3381 */
3382 VOID    RTMPZeroMemory(
3383         IN      PVOID   pSrc,
3384         IN      ULONG   Length)
3385 {
3386         PUCHAR  pMem;
3387         ULONG   Index = 0;
3388
3389         pMem = (PUCHAR) pSrc;
3390
3391         for (Index = 0; Index < Length; Index++)
3392         {
3393                 pMem[Index] = 0x00;
3394         }
3395 }
3396
3397 VOID    RTMPFillMemory(
3398         IN      PVOID   pSrc,
3399         IN      ULONG   Length,
3400         IN      UCHAR   Fill)
3401 {
3402         PUCHAR  pMem;
3403         ULONG   Index = 0;
3404
3405         pMem = (PUCHAR) pSrc;
3406
3407         for (Index = 0; Index < Length; Index++)
3408         {
3409                 pMem[Index] = Fill;
3410         }
3411 }
3412
3413 /*
3414         ========================================================================
3415
3416         Routine Description:
3417                 Copy data from memory block 1 to memory block 2
3418
3419         Arguments:
3420                 pDest           Pointer to destination memory address
3421                 pSrc            Pointer to source memory address
3422                 Length          Copy size
3423
3424         Return Value:
3425                 None
3426
3427         IRQL = PASSIVE_LEVEL
3428         IRQL = DISPATCH_LEVEL
3429
3430         Note:
3431
3432         ========================================================================
3433 */
3434 VOID    RTMPMoveMemory(
3435         OUT     PVOID   pDest,
3436         IN      PVOID   pSrc,
3437         IN      ULONG   Length)
3438 {
3439         PUCHAR  pMem1;
3440         PUCHAR  pMem2;
3441         UINT    Index;
3442
3443         ASSERT((Length==0) || (pDest && pSrc));
3444
3445         pMem1 = (PUCHAR) pDest;
3446         pMem2 = (PUCHAR) pSrc;
3447
3448         for (Index = 0; Index < Length; Index++)
3449         {
3450                 pMem1[Index] = pMem2[Index];
3451         }
3452 }
3453
3454 /*
3455         ========================================================================
3456
3457         Routine Description:
3458                 Initialize port configuration structure
3459
3460         Arguments:
3461                 Adapter                                         Pointer to our adapter
3462
3463         Return Value:
3464                 None
3465
3466         IRQL = PASSIVE_LEVEL
3467
3468         Note:
3469
3470         ========================================================================
3471 */
3472 VOID    UserCfgInit(
3473         IN      PRTMP_ADAPTER pAd)
3474 {
3475     UINT key_index, bss_index;
3476
3477         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3478
3479         //
3480         //  part I. intialize common configuration
3481         //
3482 #ifdef RT2870
3483         pAd->BulkOutReq = 0;
3484
3485         pAd->BulkOutComplete = 0;
3486         pAd->BulkOutCompleteOther = 0;
3487         pAd->BulkOutCompleteCancel = 0;
3488         pAd->BulkInReq = 0;
3489         pAd->BulkInComplete = 0;
3490         pAd->BulkInCompleteFail = 0;
3491
3492         //pAd->QuickTimerP = 100;
3493         //pAd->TurnAggrBulkInCount = 0;
3494         pAd->bUsbTxBulkAggre = 0;
3495
3496         // init as unsed value to ensure driver will set to MCU once.
3497         pAd->LedIndicatorStregth = 0xFF;
3498
3499         pAd->CommonCfg.MaxPktOneTxBulk = 2;
3500         pAd->CommonCfg.TxBulkFactor = 1;
3501         pAd->CommonCfg.RxBulkFactor =1;
3502
3503         pAd->CommonCfg.TxPower = 100; //mW
3504
3505         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3506 #endif // RT2870 //
3507
3508         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3509         {
3510                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3511                 {
3512                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3513                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3514                 }
3515         }
3516
3517 #ifdef RT30xx
3518         pAd->EepromAccess = FALSE;
3519 #endif
3520         pAd->Antenna.word = 0;
3521         pAd->CommonCfg.BBPCurrentBW = BW_20;
3522
3523         pAd->LedCntl.word = 0;
3524 #ifdef RT2860
3525         pAd->LedIndicatorStregth = 0;
3526         pAd->RLnkCtrlOffset = 0;
3527         pAd->HostLnkCtrlOffset = 0;
3528         pAd->CheckDmaBusyCount = 0;
3529 #endif
3530
3531         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3532         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3533         pAd->RfIcType = RFIC_2820;
3534
3535         // Init timer for reset complete event
3536         pAd->CommonCfg.CentralChannel = 1;
3537         pAd->bForcePrintTX = FALSE;
3538         pAd->bForcePrintRX = FALSE;
3539         pAd->bStaFifoTest = FALSE;
3540         pAd->bProtectionTest = FALSE;
3541         pAd->bHCCATest = FALSE;
3542         pAd->bGenOneHCCA = FALSE;
3543         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3544         pAd->CommonCfg.TxPower = 100; //mW
3545         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3546         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3547         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3548         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3549         pAd->CommonCfg.RtsThreshold = 2347;
3550         pAd->CommonCfg.FragmentThreshold = 2346;
3551         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3552         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3553         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3554         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3555         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3556         pAd->CommonCfg.RadarDetect.CSCount = 0;
3557         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3558         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3559         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3560         pAd->CommonCfg.bAPSDCapable = FALSE;
3561         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3562         pAd->CommonCfg.TriggerTimerCount = 0;
3563         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3564         pAd->CommonCfg.bCountryFlag = FALSE;
3565         pAd->CommonCfg.TxStream = 0;
3566         pAd->CommonCfg.RxStream = 0;
3567
3568         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3569
3570         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3571         pAd->HTCEnable = FALSE;
3572         pAd->bBroadComHT = FALSE;
3573         pAd->CommonCfg.bRdg = FALSE;
3574
3575         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3576         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3577         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3578         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3579         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3580         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3581         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3582
3583         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3584         BATableInit(pAd, &pAd->BATable);
3585
3586         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3587         pAd->CommonCfg.bHTProtect = 1;
3588         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3589         pAd->CommonCfg.bBADecline = FALSE;
3590         pAd->CommonCfg.bDisableReordering = FALSE;
3591
3592         pAd->CommonCfg.TxBASize = 7;
3593
3594         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3595
3596         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3597         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3598         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3599         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3600         pAd->CommonCfg.TxRate = RATE_6;
3601
3602         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3603         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3604         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3605
3606         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3607
3608         //
3609         // part II. intialize STA specific configuration
3610         //
3611         {
3612                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3613                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3614                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3615                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3616
3617                 pAd->StaCfg.Psm = PWR_ACTIVE;
3618
3619                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3620                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3621                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3622                 pAd->StaCfg.bMixCipher = FALSE;
3623                 pAd->StaCfg.DefaultKeyId = 0;
3624
3625                 // 802.1x port control
3626                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3627                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3628                 pAd->StaCfg.LastMicErrorTime = 0;
3629                 pAd->StaCfg.MicErrCnt        = 0;
3630                 pAd->StaCfg.bBlockAssoc      = FALSE;
3631                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3632
3633                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3634
3635                 pAd->StaCfg.RssiTrigger = 0;
3636                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3637                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3638                 pAd->StaCfg.AtimWin = 0;
3639                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3640                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3641                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3642                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3643                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3644
3645                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3646                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3647         }
3648
3649         // global variables mXXXX used in MAC protocol state machines
3650         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3651         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3652         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3653
3654         // PHY specification
3655         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3656         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3657
3658         {
3659                 // user desired power mode
3660                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3661                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3662                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3663
3664                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3665                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3666
3667                 // Patch for Ndtest
3668                 pAd->StaCfg.ScanCnt = 0;
3669
3670                 // CCX 2.0 control flag init
3671                 pAd->StaCfg.CCXEnable = FALSE;
3672                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3673                 pAd->StaCfg.CCXQosECWMin        = 4;
3674                 pAd->StaCfg.CCXQosECWMax        = 10;
3675
3676                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3677                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3678                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3679                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3680                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3681
3682                 // Nitro mode control
3683                 pAd->StaCfg.bAutoReconnect = TRUE;
3684
3685                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3686                 // This patch is for driver wake up from standby mode, system will do scan right away.
3687                 pAd->StaCfg.LastScanTime = 0;
3688                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3689                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3690                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3691                 pAd->StaCfg.IEEE8021X = FALSE;
3692                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3693                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3694                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3695         }
3696
3697         // Default for extra information is not valid
3698         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3699
3700         // Default Config change flag
3701         pAd->bConfigChanged = FALSE;
3702
3703         //
3704         // part III. AP configurations
3705         //
3706
3707
3708         //
3709         // part IV. others
3710         //
3711         // dynamic BBP R66:sensibity tuning to overcome background noise
3712         pAd->BbpTuning.bEnable                = TRUE;
3713         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3714         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3715         pAd->BbpTuning.R66Delta               = 4;
3716         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3717
3718         //
3719         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3720         // if not initial this value, the default value will be 0.
3721         //
3722         pAd->BbpTuning.R66CurrentValue = 0x38;
3723
3724         pAd->Bbp94 = BBPR94_DEFAULT;
3725         pAd->BbpForCCK = FALSE;
3726
3727         // initialize MAC table and allocate spin lock
3728         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3729         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3730         NdisAllocateSpinLock(&pAd->MacTabLock);
3731
3732         pAd->CommonCfg.bWiFiTest = FALSE;
3733 #ifdef RT2860
3734         pAd->bPCIclkOff = FALSE;
3735
3736         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3737 #endif
3738         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3739 }
3740
3741 // IRQL = PASSIVE_LEVEL
3742 UCHAR BtoH(char ch)
3743 {
3744         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3745         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3746         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3747         return(255);
3748 }
3749
3750 //
3751 //  FUNCTION: AtoH(char *, UCHAR *, int)
3752 //
3753 //  PURPOSE:  Converts ascii string to network order hex
3754 //
3755 //  PARAMETERS:
3756 //    src    - pointer to input ascii string
3757 //    dest   - pointer to output hex
3758 //    destlen - size of dest
3759 //
3760 //  COMMENTS:
3761 //
3762 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3763 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3764 //
3765 // IRQL = PASSIVE_LEVEL
3766
3767 void AtoH(char * src, UCHAR * dest, int destlen)
3768 {
3769         char * srcptr;
3770         PUCHAR destTemp;
3771
3772         srcptr = src;
3773         destTemp = (PUCHAR) dest;
3774
3775         while(destlen--)
3776         {
3777                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3778                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3779                 destTemp++;
3780         }
3781 }
3782
3783 VOID    RTMPPatchMacBbpBug(
3784         IN      PRTMP_ADAPTER   pAd)
3785 {
3786         ULONG   Index;
3787
3788         // Initialize BBP register to default value
3789         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3790         {
3791                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3792         }
3793
3794         // Initialize RF register to default value
3795         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3796         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3797
3798         // Re-init BBP register from EEPROM value
3799         NICInitAsicFromEEPROM(pAd);
3800 }
3801
3802 /*
3803         ========================================================================
3804
3805         Routine Description:
3806                 Init timer objects
3807
3808         Arguments:
3809                 pAd                     Pointer to our adapter
3810                 pTimer                          Timer structure
3811                 pTimerFunc                      Function to execute when timer expired
3812                 Repeat                          Ture for period timer
3813
3814         Return Value:
3815                 None
3816
3817         Note:
3818
3819         ========================================================================
3820 */
3821 VOID    RTMPInitTimer(
3822         IN      PRTMP_ADAPTER                   pAd,
3823         IN      PRALINK_TIMER_STRUCT    pTimer,
3824         IN      PVOID                                   pTimerFunc,
3825         IN      PVOID                                   pData,
3826         IN      BOOLEAN                                 Repeat)
3827 {
3828         //
3829         // Set Valid to TRUE for later used.
3830         // It will crash if we cancel a timer or set a timer
3831         // that we haven't initialize before.
3832         //
3833         pTimer->Valid      = TRUE;
3834
3835         pTimer->PeriodicType = Repeat;
3836         pTimer->State      = FALSE;
3837         pTimer->cookie = (ULONG) pData;
3838
3839 #ifdef RT2870
3840         pTimer->pAd = pAd;
3841 #endif // RT2870 //
3842
3843         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3844 }
3845
3846 /*
3847         ========================================================================
3848
3849         Routine Description:
3850                 Init timer objects
3851
3852         Arguments:
3853                 pTimer                          Timer structure
3854                 Value                           Timer value in milliseconds
3855
3856         Return Value:
3857                 None
3858
3859         Note:
3860                 To use this routine, must call RTMPInitTimer before.
3861
3862         ========================================================================
3863 */
3864 VOID    RTMPSetTimer(
3865         IN      PRALINK_TIMER_STRUCT    pTimer,
3866         IN      ULONG                                   Value)
3867 {
3868         if (pTimer->Valid)
3869         {
3870                 pTimer->TimerValue = Value;
3871                 pTimer->State      = FALSE;
3872                 if (pTimer->PeriodicType == TRUE)
3873                 {
3874                         pTimer->Repeat = TRUE;
3875                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3876                 }
3877                 else
3878                 {
3879                         pTimer->Repeat = FALSE;
3880                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3881                 }
3882         }
3883         else
3884         {
3885                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3886         }
3887 }
3888
3889
3890 /*
3891         ========================================================================
3892
3893         Routine Description:
3894                 Init timer objects
3895
3896         Arguments:
3897                 pTimer                          Timer structure
3898                 Value                           Timer value in milliseconds
3899
3900         Return Value:
3901                 None
3902
3903         Note:
3904                 To use this routine, must call RTMPInitTimer before.
3905
3906         ========================================================================
3907 */
3908 VOID    RTMPModTimer(
3909         IN      PRALINK_TIMER_STRUCT    pTimer,
3910         IN      ULONG                                   Value)
3911 {
3912         BOOLEAN Cancel;
3913
3914         if (pTimer->Valid)
3915         {
3916                 pTimer->TimerValue = Value;
3917                 pTimer->State      = FALSE;
3918                 if (pTimer->PeriodicType == TRUE)
3919                 {
3920                         RTMPCancelTimer(pTimer, &Cancel);
3921                         RTMPSetTimer(pTimer, Value);
3922                 }
3923                 else
3924                 {
3925                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3926                 }
3927         }
3928         else
3929         {
3930                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3931         }
3932 }
3933
3934 /*
3935         ========================================================================
3936
3937         Routine Description:
3938                 Cancel timer objects
3939
3940         Arguments:
3941                 Adapter                                         Pointer to our adapter
3942
3943         Return Value:
3944                 None
3945
3946         IRQL = PASSIVE_LEVEL
3947         IRQL = DISPATCH_LEVEL
3948
3949         Note:
3950                 1.) To use this routine, must call RTMPInitTimer before.
3951                 2.) Reset NIC to initial state AS IS system boot up time.
3952
3953         ========================================================================
3954 */
3955 VOID    RTMPCancelTimer(
3956         IN      PRALINK_TIMER_STRUCT    pTimer,
3957         OUT     BOOLEAN                                 *pCancelled)
3958 {
3959         if (pTimer->Valid)
3960         {
3961                 if (pTimer->State == FALSE)
3962                         pTimer->Repeat = FALSE;
3963                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3964
3965                 if (*pCancelled == TRUE)
3966                         pTimer->State = TRUE;
3967
3968 #ifdef RT2870
3969                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3970                 //              it's still waiting for execution.
3971
3972                 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3973 #endif // RT2870 //
3974         }
3975         else
3976         {
3977                 //
3978                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3979                 // And don't set the "Valid" to False. So that we can use this timer again.
3980                 //
3981                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3982         }
3983 }
3984
3985 /*
3986         ========================================================================
3987
3988         Routine Description:
3989                 Set LED Status
3990
3991         Arguments:
3992                 pAd                                             Pointer to our adapter
3993                 Status                                  LED Status
3994
3995         Return Value:
3996                 None
3997
3998         IRQL = PASSIVE_LEVEL
3999         IRQL = DISPATCH_LEVEL
4000
4001         Note:
4002
4003         ========================================================================
4004 */
4005 VOID RTMPSetLED(
4006         IN PRTMP_ADAPTER        pAd,
4007         IN UCHAR                        Status)
4008 {
4009         //ULONG                 data;
4010         UCHAR                   HighByte = 0;
4011         UCHAR                   LowByte;
4012
4013         LowByte = pAd->LedCntl.field.LedMode&0x7f;
4014         switch (Status)
4015         {
4016                 case LED_LINK_DOWN:
4017                         HighByte = 0x20;
4018                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4019                         pAd->LedIndicatorStregth = 0;
4020                         break;
4021                 case LED_LINK_UP:
4022                         if (pAd->CommonCfg.Channel > 14)
4023                                 HighByte = 0xa0;
4024                         else
4025                                 HighByte = 0x60;
4026                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4027                         break;
4028                 case LED_RADIO_ON:
4029                         HighByte = 0x20;
4030                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4031                         break;
4032                 case LED_HALT:
4033                         LowByte = 0; // Driver sets MAC register and MAC controls LED
4034                 case LED_RADIO_OFF:
4035                         HighByte = 0;
4036                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4037                         break;
4038         case LED_WPS:
4039                         HighByte = 0x10;
4040                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4041                         break;
4042                 case LED_ON_SITE_SURVEY:
4043                         HighByte = 0x08;
4044                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4045                         break;
4046                 case LED_POWER_UP:
4047                         HighByte = 0x04;
4048                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
4049                         break;
4050                 default:
4051                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
4052                         break;
4053         }
4054
4055     //
4056         // Keep LED status for LED SiteSurvey mode.
4057         // After SiteSurvey, we will set the LED mode to previous status.
4058         //
4059         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
4060                 pAd->LedStatus = Status;
4061
4062         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
4063 }
4064
4065 /*
4066         ========================================================================
4067
4068         Routine Description:
4069                 Set LED Signal Stregth
4070
4071         Arguments:
4072                 pAd                                             Pointer to our adapter
4073                 Dbm                                             Signal Stregth
4074
4075         Return Value:
4076                 None
4077
4078         IRQL = PASSIVE_LEVEL
4079
4080         Note:
4081                 Can be run on any IRQL level.
4082
4083                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
4084                 <= -90  No Signal
4085                 <= -81  Very Low
4086                 <= -71  Low
4087                 <= -67  Good
4088                 <= -57  Very Good
4089                  > -57  Excellent
4090         ========================================================================
4091 */
4092 VOID RTMPSetSignalLED(
4093         IN PRTMP_ADAPTER        pAd,
4094         IN NDIS_802_11_RSSI Dbm)
4095 {
4096         UCHAR           nLed = 0;
4097
4098         //
4099         // if not Signal Stregth, then do nothing.
4100         //
4101         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
4102         {
4103                 return;
4104         }
4105
4106         if (Dbm <= -90)
4107                 nLed = 0;
4108         else if (Dbm <= -81)
4109                 nLed = 1;
4110         else if (Dbm <= -71)
4111                 nLed = 3;
4112         else if (Dbm <= -67)
4113                 nLed = 7;
4114         else if (Dbm <= -57)
4115                 nLed = 15;
4116         else
4117                 nLed = 31;
4118
4119         //
4120         // Update Signal Stregth to firmware if changed.
4121         //
4122         if (pAd->LedIndicatorStregth != nLed)
4123         {
4124                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
4125                 pAd->LedIndicatorStregth = nLed;
4126         }
4127 }
4128
4129 /*
4130         ========================================================================
4131
4132         Routine Description:
4133                 Enable RX
4134
4135         Arguments:
4136                 pAd                                             Pointer to our adapter
4137
4138         Return Value:
4139                 None
4140
4141         IRQL <= DISPATCH_LEVEL
4142
4143         Note:
4144                 Before Enable RX, make sure you have enabled Interrupt.
4145         ========================================================================
4146 */
4147 VOID RTMPEnableRxTx(
4148         IN PRTMP_ADAPTER        pAd)
4149 {
4150         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
4151
4152         // Enable Rx DMA.
4153         RT28XXDMAEnable(pAd);
4154
4155         // enable RX of MAC block
4156         if (pAd->OpMode == OPMODE_AP)
4157         {
4158                 UINT32 rx_filter_flag = APNORMAL;
4159
4160
4161                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
4162         }
4163         else
4164         {
4165                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
4166         }
4167
4168         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
4169         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
4170 }
4171
4172