2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
42 #include <linux/bitrev.h>
44 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
45 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
46 0x00000010, 0x00000020, 0x00000040, 0x00000080,
47 0x00000100, 0x00000200, 0x00000400, 0x00000800,
48 0x00001000, 0x00002000, 0x00004000, 0x00008000,
49 0x00010000, 0x00020000, 0x00040000, 0x00080000,
50 0x00100000, 0x00200000, 0x00400000, 0x00800000,
51 0x01000000, 0x02000000, 0x04000000, 0x08000000,
52 0x10000000, 0x20000000, 0x40000000, 0x80000000};
54 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
56 const unsigned short ccitt_16Table[] = {
57 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
58 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
59 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
60 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
61 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
62 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
63 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
64 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
65 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
66 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
67 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
68 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
69 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
70 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
71 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
72 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
73 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
74 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
75 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
76 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
77 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
78 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
79 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
80 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
81 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
82 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
83 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
84 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
85 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
86 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
87 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
88 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
90 #define ByteCRC16(v, crc) \
91 (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
94 // BBP register initialization set
96 REG_PAIR BBPRegTable[] = {
97 {BBP_R65, 0x2C}, // fix rssi issue
98 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
100 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
105 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
106 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
107 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
108 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
109 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
110 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
112 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
115 // RF register initialization set
119 // ASIC register initialization sets
122 RTMP_REG_PAIR MACRegTable[] = {
123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
124 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
125 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
127 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
128 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
130 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
131 #endif // HW_BEACON_OFFSET //
133 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
134 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
135 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
136 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
137 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
138 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
139 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
140 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
141 {TX_TIMEOUT_CFG, 0x000a2090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
142 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
143 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
144 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
145 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
146 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
147 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
148 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
149 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
150 {GF40_PROT_CFG, 0x03F44084},
151 {MM20_PROT_CFG, 0x01744004},
153 {MM40_PROT_CFG, 0x03F54084},
155 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
156 {TX_RTS_CFG, 0x00092b20},
157 {EXP_ACK_TIME, 0x002400ca}, // default value
158 {TXOP_HLDR_ET, 0x00000002},
160 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
161 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
162 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
163 will always lost. So we change the SIFS of CCK from 10us to 16us. */
164 {XIFS_TIME_CFG, 0x33a41010},
165 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
169 #ifdef CONFIG_STA_SUPPORT
170 RTMP_REG_PAIR STAMACRegTable[] = {
171 {WMM_AIFSN_CFG, 0x00002273},
172 {WMM_CWMIN_CFG, 0x00002344},
173 {WMM_CWMAX_CFG, 0x000034aa},
175 #endif // CONFIG_STA_SUPPORT //
177 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
178 #ifdef CONFIG_STA_SUPPORT
179 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
180 #endif // CONFIG_STA_SUPPORT //
183 // New 8k byte firmware size for RT3071/RT3072
184 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
185 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
186 #define FIRMWARE_MAJOR_VERSION 0
188 #define FIRMWAREIMAGEV1_LENGTH 0x1000
189 #define FIRMWAREIMAGEV2_LENGTH 0x1000
192 #define FIRMWARE_MINOR_VERSION 2
197 ========================================================================
200 Allocate RTMP_ADAPTER data block and do some initialization
203 Adapter Pointer to our adapter
213 ========================================================================
215 NDIS_STATUS RTMPAllocAdapterBlock(
217 OUT PRTMP_ADAPTER *ppAdapter)
222 UCHAR *pBeaconBuf = NULL;
224 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
230 // Allocate RTMP_ADAPTER memory block
231 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
232 if (pBeaconBuf == NULL)
234 Status = NDIS_STATUS_FAILURE;
235 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
239 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
240 if (Status != NDIS_STATUS_SUCCESS)
242 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
245 pAd->BeaconBuf = pBeaconBuf;
246 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
250 NdisAllocateSpinLock(&pAd->MgmtRingLock);
252 NdisAllocateSpinLock(&pAd->RxRingLock);
255 for (index =0 ; index < NUM_OF_TX_RING; index++)
257 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
258 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
259 pAd->DeQueueRunning[index] = FALSE;
262 NdisAllocateSpinLock(&pAd->irq_lock);
266 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
271 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
276 ========================================================================
279 Read initial Tx power per MCS and BW from EEPROM
282 Adapter Pointer to our adapter
291 ========================================================================
293 VOID RTMPReadTxPwrPerRate(
294 IN PRTMP_ADAPTER pAd)
296 ULONG data, Adata, Gdata;
297 USHORT i, value, value2;
298 INT Apwrdelta, Gpwrdelta;
300 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
303 // Get power delta for 20MHz and 40MHz.
305 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
306 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
310 if ((value2 & 0xff) != 0xff)
313 Gpwrdelta = (value2&0xf);
316 bGpwrdeltaMinus = FALSE;
318 bGpwrdeltaMinus = TRUE;
320 if ((value2 & 0xff00) != 0xff00)
322 if ((value2 & 0x8000))
323 Apwrdelta = ((value2&0xf00)>>8);
325 if ((value2 & 0x4000))
326 bApwrdeltaMinus = FALSE;
328 bApwrdeltaMinus = TRUE;
330 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
333 // Get Txpower per MCS for 20MHz in 2.4G.
337 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
339 if (bApwrdeltaMinus == FALSE)
341 t1 = (value&0xf)+(Apwrdelta);
344 t2 = ((value&0xf0)>>4)+(Apwrdelta);
347 t3 = ((value&0xf00)>>8)+(Apwrdelta);
350 t4 = ((value&0xf000)>>12)+(Apwrdelta);
356 if ((value&0xf) > Apwrdelta)
357 t1 = (value&0xf)-(Apwrdelta);
360 if (((value&0xf0)>>4) > Apwrdelta)
361 t2 = ((value&0xf0)>>4)-(Apwrdelta);
364 if (((value&0xf00)>>8) > Apwrdelta)
365 t3 = ((value&0xf00)>>8)-(Apwrdelta);
368 if (((value&0xf000)>>12) > Apwrdelta)
369 t4 = ((value&0xf000)>>12)-(Apwrdelta);
373 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
374 if (bGpwrdeltaMinus == FALSE)
376 t1 = (value&0xf)+(Gpwrdelta);
379 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
382 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
385 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
391 if ((value&0xf) > Gpwrdelta)
392 t1 = (value&0xf)-(Gpwrdelta);
395 if (((value&0xf0)>>4) > Gpwrdelta)
396 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
399 if (((value&0xf00)>>8) > Gpwrdelta)
400 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
403 if (((value&0xf000)>>12) > Gpwrdelta)
404 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
408 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
410 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
411 if (bApwrdeltaMinus == FALSE)
413 t1 = (value&0xf)+(Apwrdelta);
416 t2 = ((value&0xf0)>>4)+(Apwrdelta);
419 t3 = ((value&0xf00)>>8)+(Apwrdelta);
422 t4 = ((value&0xf000)>>12)+(Apwrdelta);
428 if ((value&0xf) > Apwrdelta)
429 t1 = (value&0xf)-(Apwrdelta);
432 if (((value&0xf0)>>4) > Apwrdelta)
433 t2 = ((value&0xf0)>>4)-(Apwrdelta);
436 if (((value&0xf00)>>8) > Apwrdelta)
437 t3 = ((value&0xf00)>>8)-(Apwrdelta);
440 if (((value&0xf000)>>12) > Apwrdelta)
441 t4 = ((value&0xf000)>>12)-(Apwrdelta);
445 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
446 if (bGpwrdeltaMinus == FALSE)
448 t1 = (value&0xf)+(Gpwrdelta);
451 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
454 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
457 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
463 if ((value&0xf) > Gpwrdelta)
464 t1 = (value&0xf)-(Gpwrdelta);
467 if (((value&0xf0)>>4) > Gpwrdelta)
468 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
471 if (((value&0xf00)>>8) > Gpwrdelta)
472 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
475 if (((value&0xf000)>>12) > Gpwrdelta)
476 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
480 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
483 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
484 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
486 if (data != 0xffffffff)
487 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
488 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
492 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
497 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
498 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
506 // Get Txpower per MCS for 40MHz in 2.4G.
512 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
513 if (bGpwrdeltaMinus == FALSE)
515 t1 = (value&0xf)+(Gpwrdelta);
518 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
521 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
524 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
530 if ((value&0xf) > Gpwrdelta)
531 t1 = (value&0xf)-(Gpwrdelta);
534 if (((value&0xf0)>>4) > Gpwrdelta)
535 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
538 if (((value&0xf00)>>8) > Gpwrdelta)
539 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
542 if (((value&0xf000)>>12) > Gpwrdelta)
543 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
547 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
549 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
550 if (bGpwrdeltaMinus == FALSE)
552 t1 = (value&0xf)+(Gpwrdelta);
555 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
558 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
561 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
567 if ((value&0xf) > Gpwrdelta)
568 t1 = (value&0xf)-(Gpwrdelta);
571 if (((value&0xf0)>>4) > Gpwrdelta)
572 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
575 if (((value&0xf00)>>8) > Gpwrdelta)
576 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
579 if (((value&0xf000)>>12) > Gpwrdelta)
580 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
584 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
587 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
589 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
591 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
596 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
601 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
602 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
610 // Get Txpower per MCS for 20MHz in 5G.
616 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
617 if (bApwrdeltaMinus == FALSE)
619 t1 = (value&0xf)+(Apwrdelta);
622 t2 = ((value&0xf0)>>4)+(Apwrdelta);
625 t3 = ((value&0xf00)>>8)+(Apwrdelta);
628 t4 = ((value&0xf000)>>12)+(Apwrdelta);
634 if ((value&0xf) > Apwrdelta)
635 t1 = (value&0xf)-(Apwrdelta);
638 if (((value&0xf0)>>4) > Apwrdelta)
639 t2 = ((value&0xf0)>>4)-(Apwrdelta);
642 if (((value&0xf00)>>8) > Apwrdelta)
643 t3 = ((value&0xf00)>>8)-(Apwrdelta);
646 if (((value&0xf000)>>12) > Apwrdelta)
647 t4 = ((value&0xf000)>>12)-(Apwrdelta);
651 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
653 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
654 if (bApwrdeltaMinus == FALSE)
656 t1 = (value&0xf)+(Apwrdelta);
659 t2 = ((value&0xf0)>>4)+(Apwrdelta);
662 t3 = ((value&0xf00)>>8)+(Apwrdelta);
665 t4 = ((value&0xf000)>>12)+(Apwrdelta);
671 if ((value&0xf) > Apwrdelta)
672 t1 = (value&0xf)-(Apwrdelta);
675 if (((value&0xf0)>>4) > Apwrdelta)
676 t2 = ((value&0xf0)>>4)-(Apwrdelta);
679 if (((value&0xf00)>>8) > Apwrdelta)
680 t3 = ((value&0xf00)>>8)-(Apwrdelta);
683 if (((value&0xf000)>>12) > Apwrdelta)
684 t4 = ((value&0xf000)>>12)-(Apwrdelta);
688 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
691 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
693 pAd->Tx20MPwrCfgABand[i] = Adata;
695 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
700 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
705 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
706 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
714 // Get Txpower per MCS for 40MHz in 5G.
720 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
721 if (bApwrdeltaMinus == FALSE)
723 t1 = (value&0xf)+(Apwrdelta);
726 t2 = ((value&0xf0)>>4)+(Apwrdelta);
729 t3 = ((value&0xf00)>>8)+(Apwrdelta);
732 t4 = ((value&0xf000)>>12)+(Apwrdelta);
738 if ((value&0xf) > Apwrdelta)
739 t1 = (value&0xf)-(Apwrdelta);
742 if (((value&0xf0)>>4) > Apwrdelta)
743 t2 = ((value&0xf0)>>4)-(Apwrdelta);
746 if (((value&0xf00)>>8) > Apwrdelta)
747 t3 = ((value&0xf00)>>8)-(Apwrdelta);
750 if (((value&0xf000)>>12) > Apwrdelta)
751 t4 = ((value&0xf000)>>12)-(Apwrdelta);
755 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
757 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
758 if (bApwrdeltaMinus == FALSE)
760 t1 = (value&0xf)+(Apwrdelta);
763 t2 = ((value&0xf0)>>4)+(Apwrdelta);
766 t3 = ((value&0xf00)>>8)+(Apwrdelta);
769 t4 = ((value&0xf000)>>12)+(Apwrdelta);
775 if ((value&0xf) > Apwrdelta)
776 t1 = (value&0xf)-(Apwrdelta);
779 if (((value&0xf0)>>4) > Apwrdelta)
780 t2 = ((value&0xf0)>>4)-(Apwrdelta);
783 if (((value&0xf00)>>8) > Apwrdelta)
784 t3 = ((value&0xf00)>>8)-(Apwrdelta);
787 if (((value&0xf000)>>12) > Apwrdelta)
788 t4 = ((value&0xf000)>>12)-(Apwrdelta);
792 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
795 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
797 pAd->Tx40MPwrCfgABand[i+1] = Adata;
799 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
806 ========================================================================
809 Read initial channel power parameters from EEPROM
812 Adapter Pointer to our adapter
821 ========================================================================
823 VOID RTMPReadChannelPwr(
824 IN PRTMP_ADAPTER pAd)
827 EEPROM_TX_PWR_STRUC Power;
828 EEPROM_TX_PWR_STRUC Power2;
830 // Read Tx power value for all channels
831 // Value from 1 - 0x7f. Default value is 24.
832 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
833 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
835 // 0. 11b/g, ch1 - ch 14
836 for (i = 0; i < 7; i++)
838 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
839 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
840 pAd->TxPower[i * 2].Channel = i * 2 + 1;
841 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
843 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
844 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
846 pAd->TxPower[i * 2].Power = Power.field.Byte0;
848 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
849 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
851 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
853 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
854 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
856 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
858 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
859 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
861 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
864 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
865 // 1.1 Fill up channel
867 for (i = 0; i < 4; i++)
869 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
870 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
871 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
873 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
874 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
875 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
877 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
878 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
879 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
883 for (i = 0; i < 6; i++)
885 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
886 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
888 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
889 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
891 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
892 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
894 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
895 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
897 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
898 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
901 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
902 // 2.1 Fill up channel
904 for (i = 0; i < 5; i++)
906 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
907 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
908 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
910 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
911 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
912 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
914 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
915 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
916 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
918 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
919 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
920 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
923 for (i = 0; i < 8; i++)
925 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
926 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
928 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
929 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
931 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
932 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
934 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
935 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
937 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
938 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
941 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
942 // 3.1 Fill up channel
943 choffset = 14 + 12 + 16;
944 for (i = 0; i < 2; i++)
946 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
947 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
948 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
950 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
951 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
952 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
954 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
955 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
956 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
958 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
959 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
960 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
963 for (i = 0; i < 4; i++)
965 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
966 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
968 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
969 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
971 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
972 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
974 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
975 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
977 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
978 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
981 // 4. Print and Debug
982 choffset = 14 + 12 + 16 + 7;
986 // Init the 802.11j channel number for TX channel power
988 for (i = 0; i < 3; i++)
990 pAd->TxPower11J[i].Channel = 8 + i * 4;
991 pAd->TxPower11J[i].BW = BW_20;
994 for (i = 0; i < 4; i++)
996 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
997 pAd->TxPower11J[i + 3].BW = BW_20;
1000 for (i = 0; i < 4; i++)
1002 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
1003 pAd->TxPower11J[i + 7].BW = BW_20;
1007 for (i = 0; i < 2; i++)
1009 pAd->TxPower11J[i + 11].Channel = 7 + i;
1010 pAd->TxPower11J[i + 11].BW = BW_10;
1012 pAd->TxPower11J[13].Channel = 11;
1013 pAd->TxPower11J[13].BW = BW_10;
1015 for (i = 0; i < 3; i++)
1017 pAd->TxPower11J[i + 14].Channel = 183 + i;
1018 pAd->TxPower11J[i + 14].BW= BW_10;
1021 for (i = 0; i < 3; i++)
1023 pAd->TxPower11J[i + 17].Channel = 187 + i;
1024 pAd->TxPower11J[i + 17].BW = BW_10;
1026 for (i = 0; i < 10; i++)
1028 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1029 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1031 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1032 pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1034 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1035 pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1037 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1038 pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1040 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1041 pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1047 ========================================================================
1049 Routine Description:
1050 Read the following from the registry
1051 1. All the parameters
1055 Adapter Pointer to our adapter
1056 WrapperConfigurationContext For use by NdisOpenConfiguration
1061 NDIS_STATUS_RESOURCES
1063 IRQL = PASSIVE_LEVEL
1067 ========================================================================
1069 NDIS_STATUS NICReadRegParameters(
1070 IN PRTMP_ADAPTER pAd,
1071 IN NDIS_HANDLE WrapperConfigurationContext
1074 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1075 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1083 ========================================================================
1085 Routine Description:
1086 Read initial parameters from EEPROM
1089 Adapter Pointer to our adapter
1094 IRQL = PASSIVE_LEVEL
1098 ========================================================================
1100 VOID NICReadEEPROMParameters(
1101 IN PRTMP_ADAPTER pAd,
1105 USHORT i, value, value2;
1107 EEPROM_TX_PWR_STRUC Power;
1108 EEPROM_VERSION_STRUC Version;
1109 EEPROM_ANTENNA_STRUC Antenna;
1110 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1112 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1114 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1115 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1116 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1118 if((data & 0x30) == 0)
1119 pAd->EEPROMAddressNum = 6; // 93C46
1120 else if((data & 0x30) == 0x10)
1121 pAd->EEPROMAddressNum = 8; // 93C66
1123 pAd->EEPROMAddressNum = 8; // 93C86
1124 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1126 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1127 // MAC address registers according to E2PROM setting
1128 if (mac_addr == NULL ||
1129 strlen(mac_addr) != 17 ||
1130 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1131 mac_addr[11] != ':' || mac_addr[14] != ':')
1133 USHORT Addr01,Addr23,Addr45 ;
1135 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1136 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1137 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1139 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1140 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1141 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1142 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1143 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1144 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1146 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1155 for (j=0; j<MAC_ADDR_LEN; j++)
1157 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1161 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1166 //more conveninet to test mbssid, so ap's bssid &0xf1
1167 if (pAd->PermanentAddress[0] == 0xff)
1168 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1170 //if (pAd->PermanentAddress[5] == 0xff)
1171 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1173 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1174 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1175 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1176 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1177 if (pAd->bLocalAdminMAC == FALSE)
1181 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1182 csr2.field.Byte0 = pAd->CurrentAddress[0];
1183 csr2.field.Byte1 = pAd->CurrentAddress[1];
1184 csr2.field.Byte2 = pAd->CurrentAddress[2];
1185 csr2.field.Byte3 = pAd->CurrentAddress[3];
1186 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1188 csr3.field.Byte4 = pAd->CurrentAddress[4];
1189 csr3.field.Byte5 = pAd->CurrentAddress[5];
1190 csr3.field.U2MeMask = 0xff;
1191 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1192 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1193 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1194 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1195 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1199 // if not return early. cause fail at emulation.
1200 // Init the channel number for TX channel power
1201 RTMPReadChannelPwr(pAd);
1203 // if E2PROM version mismatch with driver's expectation, then skip
1204 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1205 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1206 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1207 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1209 if (Version.field.Version > VALID_EEPROM_VERSION)
1211 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1212 /*pAd->SystemErrorBitmap |= 0x00000001;
1214 // hard-code default value when no proper E2PROM installed
1215 pAd->bAutoTxAgcA = FALSE;
1216 pAd->bAutoTxAgcG = FALSE;
1218 // Default the channel power
1219 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1220 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1222 // Default the channel power
1223 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1224 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1226 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1227 pAd->EEPROMDefaultValue[i] = 0xffff;
1231 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1232 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1233 pAd->EEPROMDefaultValue[0] = value;
1235 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1236 pAd->EEPROMDefaultValue[1] = value;
1238 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1239 pAd->EEPROMDefaultValue[2] = value;
1241 for(i = 0; i < 8; i++)
1243 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1244 pAd->EEPROMDefaultValue[i+3] = value;
1247 // We have to parse NIC configuration 0 at here.
1248 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1249 // Therefore, we have to read TxAutoAgc control beforehand.
1250 // Read Tx AGC control bit
1251 Antenna.word = pAd->EEPROMDefaultValue[0];
1252 if (Antenna.word == 0xFFFF)
1255 Antenna.field.RfIcType = RFIC_2820;
1256 Antenna.field.TxPath = 1;
1257 Antenna.field.RxPath = 2;
1258 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1261 // Choose the desired Tx&Rx stream.
1262 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1263 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1265 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1267 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1269 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1270 (pAd->CommonCfg.RxStream > 2))
1272 // only 2 Rx streams for RT2860 series
1273 pAd->CommonCfg.RxStream = 2;
1278 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1284 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1288 #ifdef CONFIG_STA_SUPPORT
1289 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1291 NicConfig2.word = 0;
1292 if ((NicConfig2.word & 0x00ff) == 0xff)
1294 NicConfig2.word &= 0xff00;
1297 if ((NicConfig2.word >> 8) == 0xff)
1299 NicConfig2.word &= 0x00ff;
1302 #endif // CONFIG_STA_SUPPORT //
1304 if (NicConfig2.field.DynamicTxAgcControl == 1)
1305 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1307 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1309 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1311 // Save the antenna for future use
1312 pAd->Antenna.word = Antenna.word;
1315 // Reset PhyMode if we don't support 802.11a
1316 // Only RFIC_2850 & RFIC_2750 support 802.11a
1318 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1320 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1321 (pAd->CommonCfg.PhyMode == PHY_11A))
1322 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1323 #ifdef DOT11_N_SUPPORT
1324 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1325 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1326 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1327 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1328 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1329 #endif // DOT11_N_SUPPORT //
1332 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1335 /* these are tempature reference value (0x00 ~ 0xFE)
1336 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1337 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1338 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1339 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1340 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1341 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1342 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1343 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1344 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1345 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1346 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1347 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1348 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1349 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1350 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1351 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1352 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1353 pAd->TxAgcStepG = Power.field.Byte1;
1354 pAd->TxAgcCompensateG = 0;
1355 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1356 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1358 // Disable TxAgc if the based value is not right
1359 if (pAd->TssiRefG == 0xff)
1360 pAd->bAutoTxAgcG = FALSE;
1362 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1363 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1365 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1366 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1370 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1371 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1372 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1373 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1374 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1375 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1376 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1377 pAd->TssiRefA = Power.field.Byte0;
1378 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1379 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1380 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1381 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1382 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1383 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1384 pAd->TxAgcStepA = Power.field.Byte1;
1385 pAd->TxAgcCompensateA = 0;
1386 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1387 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1389 // Disable TxAgc if the based value is not right
1390 if (pAd->TssiRefA == 0xff)
1391 pAd->bAutoTxAgcA = FALSE;
1393 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1394 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1396 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1397 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1399 pAd->BbpRssiToDbmDelta = 0x0;
1401 // Read frequency offset setting for RF
1402 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1403 if ((value & 0x00FF) != 0x00FF)
1404 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1406 pAd->RfFreqOffset = 0;
1407 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1409 //CountryRegion byte offset (38h)
1410 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1411 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1413 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1415 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1416 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1417 TmpPhy = pAd->CommonCfg.PhyMode;
1418 pAd->CommonCfg.PhyMode = 0xff;
1419 RTMPSetPhyMode(pAd, TmpPhy);
1420 #ifdef DOT11_N_SUPPORT
1422 #endif // DOT11_N_SUPPORT //
1426 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1427 // The valid value are (-10 ~ 10)
1429 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1430 pAd->BGRssiOffset0 = value & 0x00ff;
1431 pAd->BGRssiOffset1 = (value >> 8);
1432 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1433 pAd->BGRssiOffset2 = value & 0x00ff;
1434 pAd->ALNAGain1 = (value >> 8);
1435 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1436 pAd->BLNAGain = value & 0x00ff;
1437 pAd->ALNAGain0 = (value >> 8);
1439 // Validate 11b/g RSSI_0 offset.
1440 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1441 pAd->BGRssiOffset0 = 0;
1443 // Validate 11b/g RSSI_1 offset.
1444 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1445 pAd->BGRssiOffset1 = 0;
1447 // Validate 11b/g RSSI_2 offset.
1448 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1449 pAd->BGRssiOffset2 = 0;
1451 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1452 pAd->ARssiOffset0 = value & 0x00ff;
1453 pAd->ARssiOffset1 = (value >> 8);
1454 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1455 pAd->ARssiOffset2 = value & 0x00ff;
1456 pAd->ALNAGain2 = (value >> 8);
1458 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1459 pAd->ALNAGain1 = pAd->ALNAGain0;
1460 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1461 pAd->ALNAGain2 = pAd->ALNAGain0;
1463 // Validate 11a RSSI_0 offset.
1464 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1465 pAd->ARssiOffset0 = 0;
1467 // Validate 11a RSSI_1 offset.
1468 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1469 pAd->ARssiOffset1 = 0;
1471 //Validate 11a RSSI_2 offset.
1472 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1473 pAd->ARssiOffset2 = 0;
1478 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1479 pAd->LedCntl.word = (value&0xff00) >> 8;
1480 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1482 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1484 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1487 RTMPReadTxPwrPerRate(pAd);
1490 //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1491 RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1492 #endif // SINGLE_SKU //
1494 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1498 ========================================================================
1500 Routine Description:
1501 Set default value from EEPROM
1504 Adapter Pointer to our adapter
1509 IRQL = PASSIVE_LEVEL
1513 ========================================================================
1515 VOID NICInitAsicFromEEPROM(
1516 IN PRTMP_ADAPTER pAd)
1518 #ifdef CONFIG_STA_SUPPORT
1521 #endif // CONFIG_STA_SUPPORT //
1523 EEPROM_ANTENNA_STRUC Antenna;
1524 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1527 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1528 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1530 UCHAR BbpRegIdx, BbpValue;
1532 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1534 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1535 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1536 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1540 Antenna.word = pAd->Antenna.word;
1541 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1542 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1544 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1547 // Save the antenna for future use
1548 pAd->NicConfig2.word = NicConfig2.word;
1551 // Send LED Setting to MCU.
1553 if (pAd->LedCntl.word == 0xFF)
1555 pAd->LedCntl.word = 0x01;
1564 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1565 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1566 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1567 pAd->LedIndicatorStregth = 0xFF;
1568 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1570 #ifdef CONFIG_STA_SUPPORT
1571 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1573 // Read Hardware controlled Radio state enable bit
1574 if (NicConfig2.field.HardwareRadioControl == 1)
1576 pAd->StaCfg.bHardwareRadio = TRUE;
1578 // Read GPIO pin2 as Hardware controlled radio state
1579 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1580 if ((data & 0x04) == 0)
1582 pAd->StaCfg.bHwRadio = FALSE;
1583 pAd->StaCfg.bRadio = FALSE;
1584 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1588 pAd->StaCfg.bHardwareRadio = FALSE;
1590 if (pAd->StaCfg.bRadio == FALSE)
1592 RTMPSetLED(pAd, LED_RADIO_OFF);
1596 RTMPSetLED(pAd, LED_RADIO_ON);
1598 AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1599 AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1600 // 2-1. wait command ok.
1601 AsicCheckCommanOk(pAd, PowerWakeCID);
1605 #endif // CONFIG_STA_SUPPORT //
1607 // Turn off patching for cardbus controller
1608 if (NicConfig2.field.CardbusAcceleration == 1)
1612 if (NicConfig2.field.DynamicTxAgcControl == 1)
1613 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1615 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1617 // Since BBP has been progamed, to make sure BBP setting will be
1618 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1620 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1622 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1624 if(pAd->Antenna.field.RxPath == 3)
1628 else if(pAd->Antenna.field.RxPath == 2)
1632 else if(pAd->Antenna.field.RxPath == 1)
1636 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1638 #ifdef CONFIG_STA_SUPPORT
1639 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1641 // Handle the difference when 1T
1642 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1643 if(pAd->Antenna.field.TxPath == 1)
1647 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1649 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1651 #endif // CONFIG_STA_SUPPORT //
1652 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1653 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1657 ========================================================================
1659 Routine Description:
1660 Initialize NIC hardware
1663 Adapter Pointer to our adapter
1668 IRQL = PASSIVE_LEVEL
1672 ========================================================================
1674 NDIS_STATUS NICInitializeAdapter(
1675 IN PRTMP_ADAPTER pAd,
1676 IN BOOLEAN bHardReset)
1678 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1679 WPDMA_GLO_CFG_STRUC GloCfg;
1682 DELAY_INT_CFG_STRUC IntCfg;
1685 AC_TXOP_CSR0_STRUC csr0;
1687 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1689 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1694 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1695 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1698 RTMPusecDelay(1000);
1701 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1702 GloCfg.word &= 0xff0;
1703 GloCfg.field.EnTXWriteBackDDONE =1;
1704 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1706 // Record HW Beacon offset
1707 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1708 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1709 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1710 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1711 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1712 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1713 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1714 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1717 // write all shared Ring's base address into ASIC
1720 // asic simulation sequence put this ahead before loading firmware.
1721 // pbf hardware reset
1723 RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f); // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1724 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1725 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1728 // Initialze ASIC for TX & Rx operation
1729 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1733 NICLoadFirmware(pAd);
1736 return NDIS_STATUS_FAILURE;
1741 // Write AC_BK base address register
1742 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1743 RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1744 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1746 // Write AC_BE base address register
1747 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1748 RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1749 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1751 // Write AC_VI base address register
1752 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1753 RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1754 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1756 // Write AC_VO base address register
1757 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1758 RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1759 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1761 // Write HCCA base address register
1762 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1763 RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1764 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1766 // Write MGMT_BASE_CSR register
1767 Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1768 RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1769 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1771 // Write RX_BASE_CSR register
1772 Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1773 RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1774 DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1776 // Init RX Ring index pointer
1777 pAd->RxRing.RxSwReadIdx = 0;
1778 pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1779 RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1781 // Init TX rings index pointer
1783 for (i=0; i<NUM_OF_TX_RING; i++)
1785 pAd->TxRing[i].TxSwFreeIdx = 0;
1786 pAd->TxRing[i].TxCpuIdx = 0;
1787 RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) , pAd->TxRing[i].TxCpuIdx);
1791 // init MGMT ring index pointer
1792 pAd->MgmtRing.TxSwFreeIdx = 0;
1793 pAd->MgmtRing.TxCpuIdx = 0;
1794 RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX, pAd->MgmtRing.TxCpuIdx);
1797 // set each Ring's SIZE into ASIC. Descriptor Size is fixed by design.
1800 // Write TX_RING_CSR0 register
1801 Value = TX_RING_SIZE;
1802 RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1803 RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1804 RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1805 RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1806 RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1807 Value = MGMT_RING_SIZE;
1808 RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1810 // Write RX_RING_CSR register
1811 Value = RX_RING_SIZE;
1812 RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1818 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1819 if (pAd->CommonCfg.PhyMode == PHY_11B)
1821 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
1822 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
1826 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
1827 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
1829 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1833 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1837 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1838 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1841 RTMPusecDelay(1000);
1845 GloCfg.word &= 0xff0;
1846 GloCfg.field.EnTXWriteBackDDONE =1;
1847 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1850 RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1856 // Status = NICLoadFirmware(pAd);
1858 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1863 ========================================================================
1865 Routine Description:
1869 Adapter Pointer to our adapter
1874 IRQL = PASSIVE_LEVEL
1878 ========================================================================
1880 NDIS_STATUS NICInitializeAsic(
1881 IN PRTMP_ADAPTER pAd,
1882 IN BOOLEAN bHardReset)
1886 UINT32 MacCsr12 = 0, Counter = 0;
1890 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1893 if (bHardReset == TRUE)
1895 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1898 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1900 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1901 // Initialize MAC register to default value
1902 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1904 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1908 #ifdef CONFIG_STA_SUPPORT
1909 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1911 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1913 RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1916 #endif // CONFIG_STA_SUPPORT //
1921 // Before program BBP, we need to wait BBP/RF get wake up.
1926 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1928 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
1931 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
1932 RTMPusecDelay(1000);
1933 } while (Index++ < 100);
1935 // The commands to firmware should be after these commands, these commands will init firmware
1936 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1937 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1938 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1939 RTMPusecDelay(1000);
1941 // Read BBP register, make sure BBP is up and running before write new data
1945 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1946 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1947 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1948 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1950 if ((R0 == 0xff) || (R0 == 0x00))
1951 return NDIS_STATUS_FAILURE;
1953 // Initialize BBP register to default value
1954 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1956 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1959 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1960 if ((pAd->MACVersion&0xffff) != 0x0101)
1961 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1964 if (pAd->MACVersion == 0x28600100)
1966 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1967 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1970 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1972 // enlarge MAX_LEN_CFG
1974 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1977 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1981 // Add radio off control
1982 #ifdef CONFIG_STA_SUPPORT
1983 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1985 if (pAd->StaCfg.bRadio == FALSE)
1987 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1988 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1989 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1992 #endif // CONFIG_STA_SUPPORT //
1994 // Clear raw counters
1995 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1996 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1997 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1998 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1999 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2000 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2002 // ASIC will keep garbage value after boot
2003 // Clear all seared key table when initial
2004 // This routine can be ignored in radio-ON/OFF operation.
2007 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2009 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2012 // Clear all pairwise key table when initial
2013 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2015 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2020 // It isn't necessary to clear this space when not hard reset.
2021 if (bHardReset == TRUE)
2023 // clear all on-chip BEACON frame space
2024 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2026 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2027 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2031 #ifdef CONFIG_STA_SUPPORT
2032 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2034 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2035 if ((pAd->MACVersion&0xffff) != 0x0101)
2036 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2038 #endif // CONFIG_STA_SUPPORT //
2040 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2041 return NDIS_STATUS_SUCCESS;
2045 VOID NICRestoreBBPValue(
2046 IN PRTMP_ADAPTER pAd)
2052 DBGPRINT(RT_DEBUG_TRACE, ("---> NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!! \n"));
2053 // Initialize BBP register to default value (rtmp_init.c)
2054 for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2056 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2058 // copy from (rtmp_init.c)
2059 if (pAd->MACVersion == 0x28600100)
2061 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2062 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2065 // copy from (connect.c LinkUp function)
2068 // Change to AP channel
2069 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2071 // Must using 40MHz.
2072 pAd->CommonCfg.BBPCurrentBW = BW_40;
2073 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2074 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2076 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2079 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2081 // RX : control channel at lower
2082 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2084 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2085 // Record BBPR3 setting, But don't keep R Antenna # information.
2086 pAd->StaCfg.BBPR3 = Value;
2088 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2090 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2092 if (pAd->MACVersion == 0x28600100)
2094 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2095 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2096 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2097 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2100 DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2102 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2104 // Must using 40MHz.
2105 pAd->CommonCfg.BBPCurrentBW = BW_40;
2106 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2107 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2109 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2112 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2114 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2116 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2118 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2120 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2121 // Record BBPR3 setting, But don't keep R Antenna # information.
2122 pAd->StaCfg.BBPR3 = Value;
2124 if (pAd->MACVersion == 0x28600100)
2126 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2127 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2128 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2129 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2132 DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2136 pAd->CommonCfg.BBPCurrentBW = BW_20;
2137 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2138 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2140 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2142 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2144 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2146 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2148 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2150 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2151 // Record BBPR3 setting, But don't keep R Antenna # information.
2152 pAd->StaCfg.BBPR3 = Value;
2154 if (pAd->MACVersion == 0x28600100)
2156 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2157 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2158 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2159 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2162 DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2166 DBGPRINT(RT_DEBUG_TRACE, ("<--- NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!! \n"));
2170 ========================================================================
2172 Routine Description:
2176 Adapter Pointer to our adapter
2181 IRQL = PASSIVE_LEVEL
2184 Reset NIC to initial state AS IS system boot up time.
2186 ========================================================================
2189 IN PRTMP_ADAPTER pAd)
2192 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2194 // Disable Rx, register value supposed will remain after reset
2195 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2196 Value &= (0xfffffff3);
2197 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2199 // Issue reset and clear from reset state
2200 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2201 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2203 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2207 ========================================================================
2209 Routine Description:
2210 Check ASIC registers and find any reason the system might hang
2213 Adapter Pointer to our adapter
2218 IRQL = DISPATCH_LEVEL
2220 ========================================================================
2222 BOOLEAN NICCheckForHang(
2223 IN PRTMP_ADAPTER pAd)
2228 VOID NICUpdateFifoStaCounters(
2229 IN PRTMP_ADAPTER pAd)
2231 TX_STA_FIFO_STRUC StaFifo;
2232 MAC_TABLE_ENTRY *pEntry;
2234 UCHAR pid = 0, wcid = 0;
2239 /* Nothing to do in ATE mode */
2242 #endif // RALINK_ATE //
2246 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2248 if (StaFifo.field.bValid == 0)
2251 wcid = (UCHAR)StaFifo.field.wcid;
2254 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2255 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2261 /* PID store Tx MCS Rate */
2262 pid = (UCHAR)StaFifo.field.PidType;
2264 pEntry = &pAd->MacTab.Content[wcid];
2266 pEntry->DebugFIFOCount++;
2268 #ifdef DOT11_N_SUPPORT
2269 if (StaFifo.field.TxBF) // 3*3
2270 pEntry->TxBFCount++;
2271 #endif // DOT11_N_SUPPORT //
2273 #ifdef UAPSD_AP_SUPPORT
2274 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2275 #endif // UAPSD_AP_SUPPORT //
2277 if (!StaFifo.field.TxSuccess)
2279 pEntry->FIFOCount++;
2280 pEntry->OneSecTxFailCount++;
2282 if (pEntry->FIFOCount >= 1)
2284 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2286 SendRefreshBAR(pAd, pEntry);
2287 pEntry->NoBADataCountDown = 64;
2289 #ifdef DOT11_N_SUPPORT
2290 pEntry->NoBADataCountDown = 64;
2291 #endif // DOT11_N_SUPPORT //
2293 if(pEntry->PsMode == PWR_ACTIVE)
2295 #ifdef DOT11_N_SUPPORT
2297 for (tid=0; tid<NUM_OF_TID; tid++)
2299 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2301 #endif // DOT11_N_SUPPORT //
2303 // Update the continuous transmission counter except PS mode
2304 pEntry->ContinueTxFailCnt++;
2308 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2309 // this tx error happened due to sta just go to sleep.
2310 pEntry->FIFOCount = 0;
2311 pEntry->ContinueTxFailCnt = 0;
2314 //pEntry->FIFOCount = 0;
2316 //pEntry->bSendBAR = TRUE;
2320 #ifdef DOT11_N_SUPPORT
2321 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2323 pEntry->NoBADataCountDown--;
2324 if (pEntry->NoBADataCountDown==0)
2326 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2329 #endif // DOT11_N_SUPPORT //
2330 pEntry->FIFOCount = 0;
2331 pEntry->OneSecTxNoRetryOkCount++;
2332 // update NoDataIdleCount when sucessful send packet to STA.
2333 pEntry->NoDataIdleCount = 0;
2334 pEntry->ContinueTxFailCnt = 0;
2337 succMCS = StaFifo.field.SuccessRate & 0x7F;
2339 reTry = pid - succMCS;
2341 if (StaFifo.field.TxSuccess)
2343 pEntry->TXMCSExpected[pid]++;
2346 pEntry->TXMCSSuccessful[pid]++;
2350 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2355 pEntry->TXMCSFailed[pid]++;
2360 if ((pid >= 12) && succMCS <=7)
2364 pEntry->OneSecTxRetryOkCount += reTry;
2368 // ASIC store 16 stack
2369 } while ( i < (2*TX_RING_SIZE) );
2374 ========================================================================
2376 Routine Description:
2377 Read statistical counters from hardware registers and record them
2378 in software variables for later on query
2381 pAd Pointer to our adapter
2386 IRQL = DISPATCH_LEVEL
2388 ========================================================================
2390 VOID NICUpdateRawCounters(
2391 IN PRTMP_ADAPTER pAd)
2394 RX_STA_CNT0_STRUC RxStaCnt0;
2395 RX_STA_CNT1_STRUC RxStaCnt1;
2396 RX_STA_CNT2_STRUC RxStaCnt2;
2397 TX_STA_CNT0_STRUC TxStaCnt0;
2398 TX_STA_CNT1_STRUC StaTx1;
2399 TX_STA_CNT2_STRUC StaTx2;
2400 TX_AGG_CNT_STRUC TxAggCnt;
2401 TX_AGG_CNT0_STRUC TxAggCnt0;
2402 TX_AGG_CNT1_STRUC TxAggCnt1;
2403 TX_AGG_CNT2_STRUC TxAggCnt2;
2404 TX_AGG_CNT3_STRUC TxAggCnt3;
2405 TX_AGG_CNT4_STRUC TxAggCnt4;
2406 TX_AGG_CNT5_STRUC TxAggCnt5;
2407 TX_AGG_CNT6_STRUC TxAggCnt6;
2408 TX_AGG_CNT7_STRUC TxAggCnt7;
2410 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2411 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2414 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2415 // Update RX PLCP error counter
2416 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2417 // Update False CCA counter
2418 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2421 // Update FCS counters
2422 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2423 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2424 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2425 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2427 // Add FCS error count to private counters
2428 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2429 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2430 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2431 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2432 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2434 // Update Duplicate Rcv check
2435 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2436 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2437 // Update RX Overflow counter
2438 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2440 if (!pAd->bUpdateBcnCntDone)
2442 // Update BEACON sent count
2443 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2444 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2445 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2446 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2447 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2448 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2449 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2450 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2451 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2452 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2456 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2457 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2458 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2459 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2460 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2461 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2462 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2463 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2464 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2465 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2466 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2467 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2468 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2470 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2471 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2472 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2473 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2475 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2476 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2477 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2478 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2480 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2481 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2482 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2483 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2485 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2486 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2488 // Calculate the transmitted A-MPDU count
2489 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2490 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2492 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2493 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2495 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2496 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2498 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2499 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2501 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2502 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2504 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2505 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2507 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2508 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2510 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2511 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2516 RtmpDiagStruct *pDiag;
2517 COUNTER_RALINK *pRalinkCounters;
2518 UCHAR ArrayCurIdx, i;
2520 pDiag = &pAd->DiagStruct;
2521 pRalinkCounters = &pAd->RalinkCounters;
2522 ArrayCurIdx = pDiag->ArrayCurIdx;
2524 if (pDiag->inited == 0)
2526 NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2527 pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2533 pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2534 pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2535 pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2536 pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2537 pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2538 pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2539 pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2540 pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2541 pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2542 pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2543 pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2544 pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2545 pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2546 pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2547 pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2548 pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2549 pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2550 pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2551 pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2553 pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2555 INC_RING_INDEX(pDiag->ArrayCurIdx, DIAGNOSE_TIME);
2556 ArrayCurIdx = pDiag->ArrayCurIdx;
2557 for (i =0; i < 9; i++)
2559 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2560 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2561 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2562 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2564 pDiag->TxDataCnt[ArrayCurIdx] = 0;
2565 pDiag->TxFailCnt[ArrayCurIdx] = 0;
2566 pDiag->RxDataCnt[ArrayCurIdx] = 0;
2567 pDiag->RxCrcErrCnt[ArrayCurIdx] = 0;
2568 for (i = 9; i < 24; i++) // 3*3
2570 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2571 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2572 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2575 if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2576 INC_RING_INDEX(pDiag->ArrayStartIdx, DIAGNOSE_TIME);
2580 #endif // DBG_DIAGNOSE //
2587 ========================================================================
2589 Routine Description:
2590 Reset NIC from error
2593 Adapter Pointer to our adapter
2598 IRQL = PASSIVE_LEVEL
2601 Reset NIC from error state
2603 ========================================================================
2605 VOID NICResetFromError(
2606 IN PRTMP_ADAPTER pAd)
2608 // Reset BBP (according to alex, reset ASIC will force reset BBP
2609 // Therefore, skip the reset BBP
2610 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2612 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2613 // Remove ASIC from reset state
2614 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2616 NICInitializeAdapter(pAd, FALSE);
2617 NICInitAsicFromEEPROM(pAd);
2619 // Switch to current channel, since during reset process, the connection should remains on.
2620 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2621 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2625 ========================================================================
2627 Routine Description:
2628 erase 8051 firmware image in MAC ASIC
2631 Adapter Pointer to our adapter
2633 IRQL = PASSIVE_LEVEL
2635 ========================================================================
2637 VOID NICEraseFirmware(
2638 IN PRTMP_ADAPTER pAd)
2642 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2643 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2645 }/* End of NICEraseFirmware */
2648 ========================================================================
2650 Routine Description:
2651 Load 8051 firmware RT2561.BIN file into MAC ASIC
2654 Adapter Pointer to our adapter
2657 NDIS_STATUS_SUCCESS firmware image load ok
2658 NDIS_STATUS_FAILURE image not found
2660 IRQL = PASSIVE_LEVEL
2662 ========================================================================
2664 NDIS_STATUS NICLoadFirmware(
2665 IN PRTMP_ADAPTER pAd)
2668 #define NICLF_DEFAULT_USE() \
2669 flg_default_firm_use = TRUE; \
2670 printk("%s - Use default firmware!\n", __func__);
2672 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2675 INT retval, orgfsuid, orgfsgid, i;
2677 PUCHAR pFirmwareImage;
2678 UINT FileLength = 0;
2682 BOOLEAN flg_default_firm_use = FALSE;
2685 DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __func__));
2688 pFirmwareImage = NULL;
2689 src = RTMP_FIRMWARE_FILE_NAME;
2691 /* save uid and gid used for filesystem access.
2692 set user and group to 0 (root) */
2693 orgfsuid = current->fsuid;
2694 orgfsgid = current->fsgid;
2695 current->fsuid = current->fsgid = 0;
2699 pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
2700 FIRMWARE_MINOR_VERSION;
2703 /* allocate firmware buffer */
2704 pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);
2705 if (pFirmwareImage == NULL)
2707 /* allocate fail, use default firmware array in firmware.h */
2708 printk("%s - Allocate memory fail!\n", __func__);
2709 NICLF_DEFAULT_USE();
2713 /* allocate ok! zero the firmware buffer */
2714 memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
2718 /* if ok, read firmware file from *.bin file */
2719 if (flg_default_firm_use == FALSE)
2723 /* open the bin file */
2724 srcf = filp_open(src, O_RDONLY, 0);
2728 printk("%s - Error %ld opening %s\n",
2729 __func__, -PTR_ERR(srcf), src);
2730 NICLF_DEFAULT_USE();
2734 /* the object must have a read method */
2735 if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2737 printk("%s - %s does not have a write method\n", __func__, src);
2738 NICLF_DEFAULT_USE();
2742 /* read the firmware from the file *.bin */
2743 FileLength = srcf->f_op->read(srcf,
2745 MAX_FIRMWARE_IMAGE_SIZE,
2748 if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
2750 printk("%s: error file length (=%d) in RT2860AP.BIN\n",
2751 __func__, FileLength);
2752 NICLF_DEFAULT_USE();
2757 PUCHAR ptr = pFirmwareImage;
2758 USHORT crc = 0xffff;
2761 /* calculate firmware CRC */
2762 for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
2763 crc = ByteCRC16(bitrev8(*ptr), crc);
2766 if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
2767 (UCHAR)bitrev8((UCHAR)(crc>>8))) ||
2768 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
2769 (UCHAR)bitrev8((UCHAR)crc)))
2772 printk("%s: CRC = 0x%02x 0x%02x "
2773 "error, should be 0x%02x 0x%02x\n",
2775 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
2776 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
2777 (UCHAR)(crc>>8), (UCHAR)(crc));
2778 NICLF_DEFAULT_USE();
2783 /* firmware is ok */
2784 pAd->FirmwareVersion = \
2785 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
2786 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
2788 /* check if firmware version of the file is too old */
2789 if ((pAd->FirmwareVersion) < \
2790 ((FIRMWARE_MAJOR_VERSION << 8) +
2791 FIRMWARE_MINOR_VERSION))
2793 printk("%s: firmware version too old!\n", __func__);
2794 NICLF_DEFAULT_USE();
2799 DBGPRINT(RT_DEBUG_TRACE,
2800 ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
2801 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
2802 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
2803 } /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
2807 /* close firmware file */
2812 retval = filp_close(srcf, NULL);
2815 DBGPRINT(RT_DEBUG_ERROR,
2816 ("--> Error %d closing %s\n", -retval, src));
2822 /* write firmware to ASIC */
2823 if (flg_default_firm_use == TRUE)
2825 /* use default fimeware, free allocated buffer */
2826 if (pFirmwareImage != NULL)
2827 kfree(pFirmwareImage);
2830 /* use default *.bin array */
2831 pFirmwareImage = FirmwareImage;
2832 FileLength = sizeof(FirmwareImage);
2835 /* enable Host program ram write selection */
2836 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
2838 for(i=0; i<FileLength; i+=4)
2840 firm = pFirmwareImage[i] +
2841 (pFirmwareImage[i+3] << 24) +
2842 (pFirmwareImage[i+2] << 16) +
2843 (pFirmwareImage[i+1] << 8);
2845 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
2848 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
2849 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
2851 /* initialize BBP R/W access agent */
2852 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
2853 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2855 if (flg_default_firm_use == FALSE)
2857 /* use file firmware, free allocated buffer */
2858 if (pFirmwareImage != NULL)
2859 kfree(pFirmwareImage);
2864 current->fsuid = orgfsuid;
2865 current->fsgid = orgfsgid;
2868 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2869 PUCHAR pFirmwareImage;
2870 ULONG FileLength, Index;
2874 pFirmwareImage = FirmwareImage;
2875 FileLength = sizeof(FirmwareImage);
2876 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2879 /* check if MCU is ready */
2883 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2888 RTMPusecDelay(1000);
2889 } while (Index++ < 1000);
2893 Status = NDIS_STATUS_FAILURE;
2894 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2897 DBGPRINT(RT_DEBUG_TRACE,
2898 ("<=== %s (status=%d)\n", __func__, Status));
2900 } /* End of NICLoadFirmware */
2904 ========================================================================
2906 Routine Description:
2907 Load Tx rate switching parameters
2910 Adapter Pointer to our adapter
2913 NDIS_STATUS_SUCCESS firmware image load ok
2914 NDIS_STATUS_FAILURE image not found
2916 IRQL = PASSIVE_LEVEL
2919 1. (B0: Valid Item number) (B1:Initial item from zero)
2920 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2922 ========================================================================
2924 NDIS_STATUS NICLoadRateSwitchingParams(
2925 IN PRTMP_ADAPTER pAd)
2927 return NDIS_STATUS_SUCCESS;
2931 ========================================================================
2933 Routine Description:
2934 if pSrc1 all zero with length Length, return 0.
2935 If not all zero, return 1
2944 IRQL = DISPATCH_LEVEL
2948 ========================================================================
2950 ULONG RTMPNotAllZero(
2957 pMem1 = (PUCHAR) pSrc1;
2959 for (Index = 0; Index < Length; Index++)
2961 if (pMem1[Index] != 0x0)
2967 if (Index == Length)
2978 ========================================================================
2980 Routine Description:
2981 Compare two memory block
2984 pSrc1 Pointer to first memory address
2985 pSrc2 Pointer to second memory address
2989 1: pSrc1 memory is larger
2990 2: pSrc2 memory is larger
2992 IRQL = DISPATCH_LEVEL
2996 ========================================================================
2998 ULONG RTMPCompareMemory(
3007 pMem1 = (PUCHAR) pSrc1;
3008 pMem2 = (PUCHAR) pSrc2;
3010 for (Index = 0; Index < Length; Index++)
3012 if (pMem1[Index] > pMem2[Index])
3014 else if (pMem1[Index] < pMem2[Index])
3023 ========================================================================
3025 Routine Description:
3026 Zero out memory block
3029 pSrc1 Pointer to memory address
3035 IRQL = PASSIVE_LEVEL
3036 IRQL = DISPATCH_LEVEL
3040 ========================================================================
3042 VOID RTMPZeroMemory(
3049 pMem = (PUCHAR) pSrc;
3051 for (Index = 0; Index < Length; Index++)
3057 VOID RTMPFillMemory(
3065 pMem = (PUCHAR) pSrc;
3067 for (Index = 0; Index < Length; Index++)
3074 ========================================================================
3076 Routine Description:
3077 Copy data from memory block 1 to memory block 2
3080 pDest Pointer to destination memory address
3081 pSrc Pointer to source memory address
3087 IRQL = PASSIVE_LEVEL
3088 IRQL = DISPATCH_LEVEL
3092 ========================================================================
3094 VOID RTMPMoveMemory(
3103 ASSERT((Length==0) || (pDest && pSrc));
3105 pMem1 = (PUCHAR) pDest;
3106 pMem2 = (PUCHAR) pSrc;
3108 for (Index = 0; Index < Length; Index++)
3110 pMem1[Index] = pMem2[Index];
3115 ========================================================================
3117 Routine Description:
3118 Initialize port configuration structure
3121 Adapter Pointer to our adapter
3126 IRQL = PASSIVE_LEVEL
3130 ========================================================================
3133 IN PRTMP_ADAPTER pAd)
3135 UINT key_index, bss_index;
3137 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3140 // part I. intialize common configuration
3143 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3145 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3147 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3148 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3152 pAd->Antenna.word = 0;
3153 pAd->CommonCfg.BBPCurrentBW = BW_20;
3155 pAd->LedCntl.word = 0;
3157 pAd->LedIndicatorStregth = 0;
3158 pAd->RLnkCtrlOffset = 0;
3159 pAd->HostLnkCtrlOffset = 0;
3160 pAd->CheckDmaBusyCount = 0;
3163 pAd->bAutoTxAgcA = FALSE; // Default is OFF
3164 pAd->bAutoTxAgcG = FALSE; // Default is OFF
3165 pAd->RfIcType = RFIC_2820;
3167 // Init timer for reset complete event
3168 pAd->CommonCfg.CentralChannel = 1;
3169 pAd->bForcePrintTX = FALSE;
3170 pAd->bForcePrintRX = FALSE;
3171 pAd->bStaFifoTest = FALSE;
3172 pAd->bProtectionTest = FALSE;
3173 pAd->bHCCATest = FALSE;
3174 pAd->bGenOneHCCA = FALSE;
3175 pAd->CommonCfg.Dsifs = 10; // in units of usec
3176 pAd->CommonCfg.TxPower = 100; //mW
3177 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3178 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3179 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3180 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3181 pAd->CommonCfg.RtsThreshold = 2347;
3182 pAd->CommonCfg.FragmentThreshold = 2346;
3183 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
3184 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3185 pAd->CommonCfg.PhyMode = 0xff; // unknown
3186 pAd->CommonCfg.BandState = UNKNOWN_BAND;
3187 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3188 pAd->CommonCfg.RadarDetect.CSCount = 0;
3189 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3190 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3191 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3192 pAd->CommonCfg.bAPSDCapable = FALSE;
3193 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3194 pAd->CommonCfg.TriggerTimerCount = 0;
3195 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3196 pAd->CommonCfg.bCountryFlag = FALSE;
3197 pAd->CommonCfg.TxStream = 0;
3198 pAd->CommonCfg.RxStream = 0;
3200 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3202 #ifdef DOT11_N_SUPPORT
3203 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3204 pAd->HTCEnable = FALSE;
3205 pAd->bBroadComHT = FALSE;
3206 pAd->CommonCfg.bRdg = FALSE;
3208 #ifdef DOT11N_DRAFT3
3209 pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell; // Unit : TU. 5~1000
3210 pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell; // Unit : TU. 10~1000
3211 pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval; // Unit : Second
3212 pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel; // Unit : TU. 200~10000
3213 pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3214 pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3215 pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold; // Unit : percentage
3216 pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3217 #endif // DOT11N_DRAFT3 //
3219 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3220 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3221 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3222 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3223 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3224 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3225 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3227 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3228 BATableInit(pAd, &pAd->BATable);
3230 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3231 pAd->CommonCfg.bHTProtect = 1;
3232 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3233 pAd->CommonCfg.bBADecline = FALSE;
3234 pAd->CommonCfg.bDisableReordering = FALSE;
3236 pAd->CommonCfg.TxBASize = 7;
3238 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3239 #endif // DOT11_N_SUPPORT //
3241 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3242 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3243 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3244 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3245 pAd->CommonCfg.TxRate = RATE_6;
3247 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3248 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3249 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3251 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3254 // part II. intialize STA specific configuration
3256 #ifdef CONFIG_STA_SUPPORT
3257 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3259 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3260 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3261 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3262 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3264 pAd->StaCfg.Psm = PWR_ACTIVE;
3266 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3267 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3268 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3269 pAd->StaCfg.bMixCipher = FALSE;
3270 pAd->StaCfg.DefaultKeyId = 0;
3272 // 802.1x port control
3273 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3274 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3275 pAd->StaCfg.LastMicErrorTime = 0;
3276 pAd->StaCfg.MicErrCnt = 0;
3277 pAd->StaCfg.bBlockAssoc = FALSE;
3278 pAd->StaCfg.WpaState = SS_NOTUSE;
3280 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3282 pAd->StaCfg.RssiTrigger = 0;
3283 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3284 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3285 pAd->StaCfg.AtimWin = 0;
3286 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3287 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3288 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3289 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3290 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3292 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3293 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3296 #ifdef EXT_BUILD_CHANNEL_LIST
3297 pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3298 #endif // EXT_BUILD_CHANNEL_LIST //
3299 #endif // CONFIG_STA_SUPPORT //
3301 // global variables mXXXX used in MAC protocol state machines
3302 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3303 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3304 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3306 // PHY specification
3307 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3308 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3310 #ifdef CONFIG_STA_SUPPORT
3311 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3313 // user desired power mode
3314 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3315 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3316 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3319 // CCX v1.0 releated init value
3320 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3321 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3322 pAd->StaCfg.bCkipOn = FALSE;
3323 #endif // LEAP_SUPPORT //
3325 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3326 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3329 pAd->StaCfg.ScanCnt = 0;
3331 // CCX 2.0 control flag init
3332 pAd->StaCfg.CCXEnable = FALSE;
3333 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3334 pAd->StaCfg.CCXQosECWMin = 4;
3335 pAd->StaCfg.CCXQosECWMax = 10;
3337 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3338 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3339 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3340 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3341 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3343 // Nitro mode control
3344 pAd->StaCfg.bAutoReconnect = TRUE;
3346 // Save the init time as last scan time, the system should do scan after 2 seconds.
3347 // This patch is for driver wake up from standby mode, system will do scan right away.
3348 pAd->StaCfg.LastScanTime = 0;
3349 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3350 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3351 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3352 #ifdef WPA_SUPPLICANT_SUPPORT
3353 pAd->StaCfg.IEEE8021X = FALSE;
3354 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3355 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3356 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3357 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3358 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3359 #endif // WPA_SUPPLICANT_SUPPORT //
3362 #endif // CONFIG_STA_SUPPORT //
3364 // Default for extra information is not valid
3365 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3367 // Default Config change flag
3368 pAd->bConfigChanged = FALSE;
3371 // part III. AP configurations
3378 // dynamic BBP R66:sensibity tuning to overcome background noise
3379 pAd->BbpTuning.bEnable = TRUE;
3380 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3381 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3382 pAd->BbpTuning.R66Delta = 4;
3383 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3386 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3387 // if not initial this value, the default value will be 0.
3389 pAd->BbpTuning.R66CurrentValue = 0x38;
3391 pAd->Bbp94 = BBPR94_DEFAULT;
3392 pAd->BbpForCCK = FALSE;
3394 // initialize MAC table and allocate spin lock
3395 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3396 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3397 NdisAllocateSpinLock(&pAd->MacTabLock);
3400 NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
3401 pAd->ate.Mode = ATE_STOP;
3402 pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
3403 pAd->ate.TxLength = 1024;
3404 pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
3405 pAd->ate.TxWI.PHYMODE = MODE_CCK;
3406 pAd->ate.TxWI.MCS = 3;
3407 pAd->ate.TxWI.BW = BW_20;
3408 pAd->ate.Channel = 1;
3409 pAd->ate.QID = QID_AC_BE;
3410 pAd->ate.Addr1[0] = 0x00;
3411 pAd->ate.Addr1[1] = 0x11;
3412 pAd->ate.Addr1[2] = 0x22;
3413 pAd->ate.Addr1[3] = 0xAA;
3414 pAd->ate.Addr1[4] = 0xBB;
3415 pAd->ate.Addr1[5] = 0xCC;
3416 NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3417 NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3418 pAd->ate.bRxFer = 0;
3419 pAd->ate.bQATxStart = FALSE;
3420 pAd->ate.bQARxStart = FALSE;
3422 pAd->ate.bFWLoading = FALSE;
3424 #ifdef RALINK_28xx_QA
3425 //pAd->ate.Repeat = 0;
3426 pAd->ate.TxStatus = 0;
3427 pAd->ate.AtePid = THREAD_PID_INIT_VALUE;
3428 #endif // RALINK_28xx_QA //
3429 #endif // RALINK_ATE //
3432 pAd->CommonCfg.bWiFiTest = FALSE;
3434 pAd->bPCIclkOff = FALSE;
3437 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3438 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3441 // IRQL = PASSIVE_LEVEL
3444 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3445 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3446 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3451 // FUNCTION: AtoH(char *, UCHAR *, int)
3453 // PURPOSE: Converts ascii string to network order hex
3456 // src - pointer to input ascii string
3457 // dest - pointer to output hex
3458 // destlen - size of dest
3462 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3463 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3465 // IRQL = PASSIVE_LEVEL
3467 void AtoH(char * src, UCHAR * dest, int destlen)
3473 destTemp = (PUCHAR) dest;
3477 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3478 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3483 VOID RTMPPatchMacBbpBug(
3484 IN PRTMP_ADAPTER pAd)
3488 // Initialize BBP register to default value
3489 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3491 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3494 // Initialize RF register to default value
3495 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3496 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3498 // Re-init BBP register from EEPROM value
3499 NICInitAsicFromEEPROM(pAd);
3503 ========================================================================
3505 Routine Description:
3509 pAd Pointer to our adapter
3510 pTimer Timer structure
3511 pTimerFunc Function to execute when timer expired
3512 Repeat Ture for period timer
3519 ========================================================================
3522 IN PRTMP_ADAPTER pAd,
3523 IN PRALINK_TIMER_STRUCT pTimer,
3524 IN PVOID pTimerFunc,
3529 // Set Valid to TRUE for later used.
3530 // It will crash if we cancel a timer or set a timer
3531 // that we haven't initialize before.
3533 pTimer->Valid = TRUE;
3535 pTimer->PeriodicType = Repeat;
3536 pTimer->State = FALSE;
3537 pTimer->cookie = (ULONG) pData;
3540 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3544 ========================================================================
3546 Routine Description:
3550 pTimer Timer structure
3551 Value Timer value in milliseconds
3557 To use this routine, must call RTMPInitTimer before.
3559 ========================================================================
3562 IN PRALINK_TIMER_STRUCT pTimer,
3567 pTimer->TimerValue = Value;
3568 pTimer->State = FALSE;
3569 if (pTimer->PeriodicType == TRUE)
3571 pTimer->Repeat = TRUE;
3572 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3576 pTimer->Repeat = FALSE;
3577 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3582 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3588 ========================================================================
3590 Routine Description:
3594 pTimer Timer structure
3595 Value Timer value in milliseconds
3601 To use this routine, must call RTMPInitTimer before.
3603 ========================================================================
3606 IN PRALINK_TIMER_STRUCT pTimer,
3613 pTimer->TimerValue = Value;
3614 pTimer->State = FALSE;
3615 if (pTimer->PeriodicType == TRUE)
3617 RTMPCancelTimer(pTimer, &Cancel);
3618 RTMPSetTimer(pTimer, Value);
3622 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3627 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3632 ========================================================================
3634 Routine Description:
3635 Cancel timer objects
3638 Adapter Pointer to our adapter
3643 IRQL = PASSIVE_LEVEL
3644 IRQL = DISPATCH_LEVEL
3647 1.) To use this routine, must call RTMPInitTimer before.
3648 2.) Reset NIC to initial state AS IS system boot up time.
3650 ========================================================================
3652 VOID RTMPCancelTimer(
3653 IN PRALINK_TIMER_STRUCT pTimer,
3654 OUT BOOLEAN *pCancelled)
3658 if (pTimer->State == FALSE)
3659 pTimer->Repeat = FALSE;
3660 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3662 if (*pCancelled == TRUE)
3663 pTimer->State = TRUE;
3669 // NdisMCancelTimer just canced the timer and not mean release the timer.
3670 // And don't set the "Valid" to False. So that we can use this timer again.
3672 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3677 ========================================================================
3679 Routine Description:
3683 pAd Pointer to our adapter
3689 IRQL = PASSIVE_LEVEL
3690 IRQL = DISPATCH_LEVEL
3694 ========================================================================
3697 IN PRTMP_ADAPTER pAd,
3704 // In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
3705 // So LED mode is not supported when ATE is running.
3709 #endif // RALINK_ATE //
3711 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3716 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3717 pAd->LedIndicatorStregth = 0;
3720 if (pAd->CommonCfg.Channel > 14)
3724 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3728 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3731 LowByte = 0; // Driver sets MAC register and MAC controls LED
3734 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3738 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3740 case LED_ON_SITE_SURVEY:
3742 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3746 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3749 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3754 // Keep LED status for LED SiteSurvey mode.
3755 // After SiteSurvey, we will set the LED mode to previous status.
3757 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3758 pAd->LedStatus = Status;
3760 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3764 ========================================================================
3766 Routine Description:
3767 Set LED Signal Stregth
3770 pAd Pointer to our adapter
3776 IRQL = PASSIVE_LEVEL
3779 Can be run on any IRQL level.
3781 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3788 ========================================================================
3790 VOID RTMPSetSignalLED(
3791 IN PRTMP_ADAPTER pAd,
3792 IN NDIS_802_11_RSSI Dbm)
3797 // if not Signal Stregth, then do nothing.
3799 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3806 else if (Dbm <= -81)
3808 else if (Dbm <= -71)
3810 else if (Dbm <= -67)
3812 else if (Dbm <= -57)
3818 // Update Signal Stregth to firmware if changed.
3820 if (pAd->LedIndicatorStregth != nLed)
3822 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3823 pAd->LedIndicatorStregth = nLed;
3828 ========================================================================
3830 Routine Description:
3834 pAd Pointer to our adapter
3839 IRQL <= DISPATCH_LEVEL
3842 Before Enable RX, make sure you have enabled Interrupt.
3843 ========================================================================
3845 VOID RTMPEnableRxTx(
3846 IN PRTMP_ADAPTER pAd)
3848 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3851 RT28XXDMAEnable(pAd);
3853 // enable RX of MAC block
3854 if (pAd->OpMode == OPMODE_AP)
3856 UINT32 rx_filter_flag = APNORMAL;
3859 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
3863 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
3866 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3867 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));