2 * Driver for the Conexant CX25821 PCIe bridge
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4 * Copyright (C) 2009 Conexant Systems Inc.
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5 * Authors <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
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7 * This program is free software; you can redistribute it and/or modify
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8 * it under the terms of the GNU General Public License as published by
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9 * the Free Software Foundation; either version 2 of the License, or
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10 * (at your option) any later version.
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12 * This program is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 * GNU General Public License for more details.
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18 * You should have received a copy of the GNU General Public License
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19 * along with this program; if not, write to the Free Software
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20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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23 #ifndef __MEDUSA_REGISTERS__
\r
24 #define __MEDUSA_REGISTERS__
\r
26 // Serial Slave Registers
\r
27 #define HOST_REGISTER1 0x0000
\r
28 #define HOST_REGISTER2 0x0001
\r
30 // Chip Configuration Registers
\r
31 #define CHIP_CTRL 0x0100
\r
32 #define AFE_AB_CTRL 0x0104
\r
33 #define AFE_CD_CTRL 0x0108
\r
34 #define AFE_EF_CTRL 0x010C
\r
35 #define AFE_GH_CTRL 0x0110
\r
36 #define DENC_AB_CTRL 0x0114
\r
37 #define BYP_AB_CTRL 0x0118
\r
38 #define MON_A_CTRL 0x011C
\r
39 #define DISP_SEQ_A 0x0120
\r
40 #define DISP_SEQ_B 0x0124
\r
41 #define DISP_AB_CNT 0x0128
\r
42 #define DISP_CD_CNT 0x012C
\r
43 #define DISP_EF_CNT 0x0130
\r
44 #define DISP_GH_CNT 0x0134
\r
45 #define DISP_IJ_CNT 0x0138
\r
46 #define PIN_OE_CTRL 0x013C
\r
47 #define PIN_SPD_CTRL 0x0140
\r
48 #define PIN_SPD_CTRL2 0x0144
\r
49 #define IRQ_STAT_CTRL 0x0148
\r
50 #define POWER_CTRL_AB 0x014C
\r
51 #define POWER_CTRL_CD 0x0150
\r
52 #define POWER_CTRL_EF 0x0154
\r
53 #define POWER_CTRL_GH 0x0158
\r
54 #define TUNE_CTRL 0x015C
\r
55 #define BIAS_CTRL 0x0160
\r
56 #define AFE_AB_DIAG_CTRL 0x0164
\r
57 #define AFE_CD_DIAG_CTRL 0x0168
\r
58 #define AFE_EF_DIAG_CTRL 0x016C
\r
59 #define AFE_GH_DIAG_CTRL 0x0170
\r
60 #define PLL_AB_DIAG_CTRL 0x0174
\r
61 #define PLL_CD_DIAG_CTRL 0x0178
\r
62 #define PLL_EF_DIAG_CTRL 0x017C
\r
63 #define PLL_GH_DIAG_CTRL 0x0180
\r
64 #define TEST_CTRL 0x0184
\r
65 #define BIST_STAT 0x0188
\r
66 #define BIST_STAT2 0x018C
\r
67 #define BIST_VID_PLL_AB_STAT 0x0190
\r
68 #define BIST_VID_PLL_CD_STAT 0x0194
\r
69 #define BIST_VID_PLL_EF_STAT 0x0198
\r
70 #define BIST_VID_PLL_GH_STAT 0x019C
\r
71 #define DLL_DIAG_CTRL 0x01A0
\r
72 #define DEV_CH_ID_CTRL 0x01A4
\r
73 #define ABIST_CTRL_STATUS 0x01A8
\r
74 #define ABIST_FREQ 0x01AC
\r
75 #define ABIST_GOERT_SHIFT 0x01B0
\r
76 #define ABIST_COEF12 0x01B4
\r
77 #define ABIST_COEF34 0x01B8
\r
78 #define ABIST_COEF56 0x01BC
\r
79 #define ABIST_COEF7_SNR 0x01C0
\r
80 #define ABIST_ADC_CAL 0x01C4
\r
81 #define ABIST_BIN1_VGA0 0x01C8
\r
82 #define ABIST_BIN2_VGA1 0x01CC
\r
83 #define ABIST_BIN3_VGA2 0x01D0
\r
84 #define ABIST_BIN4_VGA3 0x01D4
\r
85 #define ABIST_BIN5_VGA4 0x01D8
\r
86 #define ABIST_BIN6_VGA5 0x01DC
\r
87 #define ABIST_BIN7_VGA6 0x0x1E0
\r
88 #define ABIST_CLAMP_A 0x0x1E4
\r
89 #define ABIST_CLAMP_B 0x0x1E8
\r
90 #define ABIST_CLAMP_C 0x01EC
\r
91 #define ABIST_CLAMP_D 0x01F0
\r
92 #define ABIST_CLAMP_E 0x01F4
\r
93 #define ABIST_CLAMP_F 0x01F8
\r
95 // Digital Video Encoder A Registers
\r
96 #define DENC_A_REG_1 0x0200
\r
97 #define DENC_A_REG_2 0x0204
\r
98 #define DENC_A_REG_3 0x0208
\r
99 #define DENC_A_REG_4 0x020C
\r
100 #define DENC_A_REG_5 0x0210
\r
101 #define DENC_A_REG_6 0x0214
\r
102 #define DENC_A_REG_7 0x0218
\r
103 #define DENC_A_REG_8 0x021C
\r
105 // Digital Video Encoder B Registers
\r
106 #define DENC_B_REG_1 0x0300
\r
107 #define DENC_B_REG_2 0x0304
\r
108 #define DENC_B_REG_3 0x0308
\r
109 #define DENC_B_REG_4 0x030C
\r
110 #define DENC_B_REG_5 0x0310
\r
111 #define DENC_B_REG_6 0x0314
\r
112 #define DENC_B_REG_7 0x0318
\r
113 #define DENC_B_REG_8 0x031C
\r
115 // Video Decoder A Registers
\r
116 #define MODE_CTRL 0x1000
\r
117 #define OUT_CTRL1 0x1004
\r
118 #define OUT_CTRL_NS 0x1008
\r
119 #define GEN_STAT 0x100C
\r
120 #define INT_STAT_MASK 0x1010
\r
121 #define LUMA_CTRL 0x1014
\r
122 #define CHROMA_CTRL 0x1018
\r
123 #define CRUSH_CTRL 0x101C
\r
124 #define HORIZ_TIM_CTRL 0x1020
\r
125 #define VERT_TIM_CTRL 0x1024
\r
126 #define MISC_TIM_CTRL 0x1028
\r
127 #define FIELD_COUNT 0x102C
\r
128 #define HSCALE_CTRL 0x1030
\r
129 #define VSCALE_CTRL 0x1034
\r
130 #define MAN_VGA_CTRL 0x1038
\r
131 #define MAN_AGC_CTRL 0x103C
\r
132 #define DFE_CTRL1 0x1040
\r
133 #define DFE_CTRL2 0x1044
\r
134 #define DFE_CTRL3 0x1048
\r
135 #define PLL_CTRL 0x104C
\r
136 #define PLL_CTRL_FAST 0x1050
\r
137 #define HTL_CTRL 0x1054
\r
138 #define SRC_CFG 0x1058
\r
139 #define SC_STEP_SIZE 0x105C
\r
140 #define SC_CONVERGE_CTRL 0x1060
\r
141 #define SC_LOOP_CTRL 0x1064
\r
142 #define COMB_2D_HFS_CFG 0x1068
\r
143 #define COMB_2D_HFD_CFG 0x106C
\r
144 #define COMB_2D_LF_CFG 0x1070
\r
145 #define COMB_2D_BLEND 0x1074
\r
146 #define COMB_MISC_CTRL 0x1078
\r
147 #define COMB_FLAT_THRESH_CTRL 0x107C
\r
148 #define COMB_TEST 0x1080
\r
149 #define BP_MISC_CTRL 0x1084
\r
150 #define VCR_DET_CTRL 0x1088
\r
151 #define NOISE_DET_CTRL 0x108C
\r
152 #define COMB_FLAT_NOISE_CTRL 0x1090
\r
153 #define VERSION 0x11F8
\r
154 #define SOFT_RST_CTRL 0x11FC
\r
156 // Video Decoder B Registers
\r
157 #define VDEC_B_MODE_CTRL 0x1200
\r
158 #define VDEC_B_OUT_CTRL1 0x1204
\r
159 #define VDEC_B_OUT_CTRL_NS 0x1208
\r
160 #define VDEC_B_GEN_STAT 0x120C
\r
161 #define VDEC_B_INT_STAT_MASK 0x1210
\r
162 #define VDEC_B_LUMA_CTRL 0x1214
\r
163 #define VDEC_B_CHROMA_CTRL 0x1218
\r
164 #define VDEC_B_CRUSH_CTRL 0x121C
\r
165 #define VDEC_B_HORIZ_TIM_CTRL 0x1220
\r
166 #define VDEC_B_VERT_TIM_CTRL 0x1224
\r
167 #define VDEC_B_MISC_TIM_CTRL 0x1228
\r
168 #define VDEC_B_FIELD_COUNT 0x122C
\r
169 #define VDEC_B_HSCALE_CTRL 0x1230
\r
170 #define VDEC_B_VSCALE_CTRL 0x1234
\r
171 #define VDEC_B_MAN_VGA_CTRL 0x1238
\r
172 #define VDEC_B_MAN_AGC_CTRL 0x123C
\r
173 #define VDEC_B_DFE_CTRL1 0x1240
\r
174 #define VDEC_B_DFE_CTRL2 0x1244
\r
175 #define VDEC_B_DFE_CTRL3 0x1248
\r
176 #define VDEC_B_PLL_CTRL 0x124C
\r
177 #define VDEC_B_PLL_CTRL_FAST 0x1250
\r
178 #define VDEC_B_HTL_CTRL 0x1254
\r
179 #define VDEC_B_SRC_CFG 0x1258
\r
180 #define VDEC_B_SC_STEP_SIZE 0x125C
\r
181 #define VDEC_B_SC_CONVERGE_CTRL 0x1260
\r
182 #define VDEC_B_SC_LOOP_CTRL 0x1264
\r
183 #define VDEC_B_COMB_2D_HFS_CFG 0x1268
\r
184 #define VDEC_B_COMB_2D_HFD_CFG 0x126C
\r
185 #define VDEC_B_COMB_2D_LF_CFG 0x1270
\r
186 #define VDEC_B_COMB_2D_BLEND 0x1274
\r
187 #define VDEC_B_COMB_MISC_CTRL 0x1278
\r
188 #define VDEC_B_COMB_FLAT_THRESH_CTRL 0x127C
\r
189 #define VDEC_B_COMB_TEST 0x1280
\r
190 #define VDEC_B_BP_MISC_CTRL 0x1284
\r
191 #define VDEC_B_VCR_DET_CTRL 0x1288
\r
192 #define VDEC_B_NOISE_DET_CTRL 0x128C
\r
193 #define VDEC_B_COMB_FLAT_NOISE_CTRL 0x1290
\r
194 #define VDEC_B_VERSION 0x13F8
\r
195 #define VDEC_B_SOFT_RST_CTRL 0x13FC
\r
197 // Video Decoder C Registers
\r
198 #define VDEC_C_MODE_CTRL 0x1400
\r
199 #define VDEC_C_OUT_CTRL1 0x1404
\r
200 #define VDEC_C_OUT_CTRL_NS 0x1408
\r
201 #define VDEC_C_GEN_STAT 0x140C
\r
202 #define VDEC_C_INT_STAT_MASK 0x1410
\r
203 #define VDEC_C_LUMA_CTRL 0x1414
\r
204 #define VDEC_C_CHROMA_CTRL 0x1418
\r
205 #define VDEC_C_CRUSH_CTRL 0x141C
\r
206 #define VDEC_C_HORIZ_TIM_CTRL 0x1420
\r
207 #define VDEC_C_VERT_TIM_CTRL 0x1424
\r
208 #define VDEC_C_MISC_TIM_CTRL 0x1428
\r
209 #define VDEC_C_FIELD_COUNT 0x142C
\r
210 #define VDEC_C_HSCALE_CTRL 0x1430
\r
211 #define VDEC_C_VSCALE_CTRL 0x1434
\r
212 #define VDEC_C_MAN_VGA_CTRL 0x1438
\r
213 #define VDEC_C_MAN_AGC_CTRL 0x143C
\r
214 #define VDEC_C_DFE_CTRL1 0x1440
\r
215 #define VDEC_C_DFE_CTRL2 0x1444
\r
216 #define VDEC_C_DFE_CTRL3 0x1448
\r
217 #define VDEC_C_PLL_CTRL 0x144C
\r
218 #define VDEC_C_PLL_CTRL_FAST 0x1450
\r
219 #define VDEC_C_HTL_CTRL 0x1454
\r
220 #define VDEC_C_SRC_CFG 0x1458
\r
221 #define VDEC_C_SC_STEP_SIZE 0x145C
\r
222 #define VDEC_C_SC_CONVERGE_CTRL 0x1460
\r
223 #define VDEC_C_SC_LOOP_CTRL 0x1464
\r
224 #define VDEC_C_COMB_2D_HFS_CFG 0x1468
\r
225 #define VDEC_C_COMB_2D_HFD_CFG 0x146C
\r
226 #define VDEC_C_COMB_2D_LF_CFG 0x1470
\r
227 #define VDEC_C_COMB_2D_BLEND 0x1474
\r
228 #define VDEC_C_COMB_MISC_CTRL 0x1478
\r
229 #define VDEC_C_COMB_FLAT_THRESH_CTRL 0x147C
\r
230 #define VDEC_C_COMB_TEST 0x1480
\r
231 #define VDEC_C_BP_MISC_CTRL 0x1484
\r
232 #define VDEC_C_VCR_DET_CTRL 0x1488
\r
233 #define VDEC_C_NOISE_DET_CTRL 0x148C
\r
234 #define VDEC_C_COMB_FLAT_NOISE_CTRL 0x1490
\r
235 #define VDEC_C_VERSION 0x15F8
\r
236 #define VDEC_C_SOFT_RST_CTRL 0x15FC
\r
238 // Video Decoder D Registers
\r
239 #define VDEC_D_MODE_CTRL 0x1600
\r
240 #define VDEC_D_OUT_CTRL1 0x1604
\r
241 #define VDEC_D_OUT_CTRL_NS 0x1608
\r
242 #define VDEC_D_GEN_STAT 0x160C
\r
243 #define VDEC_D_INT_STAT_MASK 0x1610
\r
244 #define VDEC_D_LUMA_CTRL 0x1614
\r
245 #define VDEC_D_CHROMA_CTRL 0x1618
\r
246 #define VDEC_D_CRUSH_CTRL 0x161C
\r
247 #define VDEC_D_HORIZ_TIM_CTRL 0x1620
\r
248 #define VDEC_D_VERT_TIM_CTRL 0x1624
\r
249 #define VDEC_D_MISC_TIM_CTRL 0x1628
\r
250 #define VDEC_D_FIELD_COUNT 0x162C
\r
251 #define VDEC_D_HSCALE_CTRL 0x1630
\r
252 #define VDEC_D_VSCALE_CTRL 0x1634
\r
253 #define VDEC_D_MAN_VGA_CTRL 0x1638
\r
254 #define VDEC_D_MAN_AGC_CTRL 0x163C
\r
255 #define VDEC_D_DFE_CTRL1 0x1640
\r
256 #define VDEC_D_DFE_CTRL2 0x1644
\r
257 #define VDEC_D_DFE_CTRL3 0x1648
\r
258 #define VDEC_D_PLL_CTRL 0x164C
\r
259 #define VDEC_D_PLL_CTRL_FAST 0x1650
\r
260 #define VDEC_D_HTL_CTRL 0x1654
\r
261 #define VDEC_D_SRC_CFG 0x1658
\r
262 #define VDEC_D_SC_STEP_SIZE 0x165C
\r
263 #define VDEC_D_SC_CONVERGE_CTRL 0x1660
\r
264 #define VDEC_D_SC_LOOP_CTRL 0x1664
\r
265 #define VDEC_D_COMB_2D_HFS_CFG 0x1668
\r
266 #define VDEC_D_COMB_2D_HFD_CFG 0x166C
\r
267 #define VDEC_D_COMB_2D_LF_CFG 0x1670
\r
268 #define VDEC_D_COMB_2D_BLEND 0x1674
\r
269 #define VDEC_D_COMB_MISC_CTRL 0x1678
\r
270 #define VDEC_D_COMB_FLAT_THRESH_CTRL 0x167C
\r
271 #define VDEC_D_COMB_TEST 0x1680
\r
272 #define VDEC_D_BP_MISC_CTRL 0x1684
\r
273 #define VDEC_D_VCR_DET_CTRL 0x1688
\r
274 #define VDEC_D_NOISE_DET_CTRL 0x168C
\r
275 #define VDEC_D_COMB_FLAT_NOISE_CTRL 0x1690
\r
276 #define VDEC_D_VERSION 0x17F8
\r
277 #define VDEC_D_SOFT_RST_CTRL 0x17FC
\r
279 // Video Decoder E Registers
\r
280 #define VDEC_E_MODE_CTRL 0x1800
\r
281 #define VDEC_E_OUT_CTRL1 0x1804
\r
282 #define VDEC_E_OUT_CTRL_NS 0x1808
\r
283 #define VDEC_E_GEN_STAT 0x180C
\r
284 #define VDEC_E_INT_STAT_MASK 0x1810
\r
285 #define VDEC_E_LUMA_CTRL 0x1814
\r
286 #define VDEC_E_CHROMA_CTRL 0x1818
\r
287 #define VDEC_E_CRUSH_CTRL 0x181C
\r
288 #define VDEC_E_HORIZ_TIM_CTRL 0x1820
\r
289 #define VDEC_E_VERT_TIM_CTRL 0x1824
\r
290 #define VDEC_E_MISC_TIM_CTRL 0x1828
\r
291 #define VDEC_E_FIELD_COUNT 0x182C
\r
292 #define VDEC_E_HSCALE_CTRL 0x1830
\r
293 #define VDEC_E_VSCALE_CTRL 0x1834
\r
294 #define VDEC_E_MAN_VGA_CTRL 0x1838
\r
295 #define VDEC_E_MAN_AGC_CTRL 0x183C
\r
296 #define VDEC_E_DFE_CTRL1 0x1840
\r
297 #define VDEC_E_DFE_CTRL2 0x1844
\r
298 #define VDEC_E_DFE_CTRL3 0x1848
\r
299 #define VDEC_E_PLL_CTRL 0x184C
\r
300 #define VDEC_E_PLL_CTRL_FAST 0x1850
\r
301 #define VDEC_E_HTL_CTRL 0x1854
\r
302 #define VDEC_E_SRC_CFG 0x1858
\r
303 #define VDEC_E_SC_STEP_SIZE 0x185C
\r
304 #define VDEC_E_SC_CONVERGE_CTRL 0x1860
\r
305 #define VDEC_E_SC_LOOP_CTRL 0x1864
\r
306 #define VDEC_E_COMB_2D_HFS_CFG 0x1868
\r
307 #define VDEC_E_COMB_2D_HFD_CFG 0x186C
\r
308 #define VDEC_E_COMB_2D_LF_CFG 0x1870
\r
309 #define VDEC_E_COMB_2D_BLEND 0x1874
\r
310 #define VDEC_E_COMB_MISC_CTRL 0x1878
\r
311 #define VDEC_E_COMB_FLAT_THRESH_CTRL 0x187C
\r
312 #define VDEC_E_COMB_TEST 0x1880
\r
313 #define VDEC_E_BP_MISC_CTRL 0x1884
\r
314 #define VDEC_E_VCR_DET_CTRL 0x1888
\r
315 #define VDEC_E_NOISE_DET_CTRL 0x188C
\r
316 #define VDEC_E_COMB_FLAT_NOISE_CTRL 0x1890
\r
317 #define VDEC_E_VERSION 0x19F8
\r
318 #define VDEC_E_SOFT_RST_CTRL 0x19FC
\r
320 // Video Decoder F Registers
\r
321 #define VDEC_F_MODE_CTRL 0x1A00
\r
322 #define VDEC_F_OUT_CTRL1 0x1A04
\r
323 #define VDEC_F_OUT_CTRL_NS 0x1A08
\r
324 #define VDEC_F_GEN_STAT 0x1A0C
\r
325 #define VDEC_F_INT_STAT_MASK 0x1A10
\r
326 #define VDEC_F_LUMA_CTRL 0x1A14
\r
327 #define VDEC_F_CHROMA_CTRL 0x1A18
\r
328 #define VDEC_F_CRUSH_CTRL 0x1A1C
\r
329 #define VDEC_F_HORIZ_TIM_CTRL 0x1A20
\r
330 #define VDEC_F_VERT_TIM_CTRL 0x1A24
\r
331 #define VDEC_F_MISC_TIM_CTRL 0x1A28
\r
332 #define VDEC_F_FIELD_COUNT 0x1A2C
\r
333 #define VDEC_F_HSCALE_CTRL 0x1A30
\r
334 #define VDEC_F_VSCALE_CTRL 0x1A34
\r
335 #define VDEC_F_MAN_VGA_CTRL 0x1A38
\r
336 #define VDEC_F_MAN_AGC_CTRL 0x1A3C
\r
337 #define VDEC_F_DFE_CTRL1 0x1A40
\r
338 #define VDEC_F_DFE_CTRL2 0x1A44
\r
339 #define VDEC_F_DFE_CTRL3 0x1A48
\r
340 #define VDEC_F_PLL_CTRL 0x1A4C
\r
341 #define VDEC_F_PLL_CTRL_FAST 0x1A50
\r
342 #define VDEC_F_HTL_CTRL 0x1A54
\r
343 #define VDEC_F_SRC_CFG 0x1A58
\r
344 #define VDEC_F_SC_STEP_SIZE 0x1A5C
\r
345 #define VDEC_F_SC_CONVERGE_CTRL 0x1A60
\r
346 #define VDEC_F_SC_LOOP_CTRL 0x1A64
\r
347 #define VDEC_F_COMB_2D_HFS_CFG 0x1A68
\r
348 #define VDEC_F_COMB_2D_HFD_CFG 0x1A6C
\r
349 #define VDEC_F_COMB_2D_LF_CFG 0x1A70
\r
350 #define VDEC_F_COMB_2D_BLEND 0x1A74
\r
351 #define VDEC_F_COMB_MISC_CTRL 0x1A78
\r
352 #define VDEC_F_COMB_FLAT_THRESH_CTRL 0x1A7C
\r
353 #define VDEC_F_COMB_TEST 0x1A80
\r
354 #define VDEC_F_BP_MISC_CTRL 0x1A84
\r
355 #define VDEC_F_VCR_DET_CTRL 0x1A88
\r
356 #define VDEC_F_NOISE_DET_CTRL 0x1A8C
\r
357 #define VDEC_F_COMB_FLAT_NOISE_CTRL 0x1A90
\r
358 #define VDEC_F_VERSION 0x1BF8
\r
359 #define VDEC_F_SOFT_RST_CTRL 0x1BFC
\r
361 // Video Decoder G Registers
\r
362 #define VDEC_G_MODE_CTRL 0x1C00
\r
363 #define VDEC_G_OUT_CTRL1 0x1C04
\r
364 #define VDEC_G_OUT_CTRL_NS 0x1C08
\r
365 #define VDEC_G_GEN_STAT 0x1C0C
\r
366 #define VDEC_G_INT_STAT_MASK 0x1C10
\r
367 #define VDEC_G_LUMA_CTRL 0x1C14
\r
368 #define VDEC_G_CHROMA_CTRL 0x1C18
\r
369 #define VDEC_G_CRUSH_CTRL 0x1C1C
\r
370 #define VDEC_G_HORIZ_TIM_CTRL 0x1C20
\r
371 #define VDEC_G_VERT_TIM_CTRL 0x1C24
\r
372 #define VDEC_G_MISC_TIM_CTRL 0x1C28
\r
373 #define VDEC_G_FIELD_COUNT 0x1C2C
\r
374 #define VDEC_G_HSCALE_CTRL 0x1C30
\r
375 #define VDEC_G_VSCALE_CTRL 0x1C34
\r
376 #define VDEC_G_MAN_VGA_CTRL 0x1C38
\r
377 #define VDEC_G_MAN_AGC_CTRL 0x1C3C
\r
378 #define VDEC_G_DFE_CTRL1 0x1C40
\r
379 #define VDEC_G_DFE_CTRL2 0x1C44
\r
380 #define VDEC_G_DFE_CTRL3 0x1C48
\r
381 #define VDEC_G_PLL_CTRL 0x1C4C
\r
382 #define VDEC_G_PLL_CTRL_FAST 0x1C50
\r
383 #define VDEC_G_HTL_CTRL 0x1C54
\r
384 #define VDEC_G_SRC_CFG 0x1C58
\r
385 #define VDEC_G_SC_STEP_SIZE 0x1C5C
\r
386 #define VDEC_G_SC_CONVERGE_CTRL 0x1C60
\r
387 #define VDEC_G_SC_LOOP_CTRL 0x1C64
\r
388 #define VDEC_G_COMB_2D_HFS_CFG 0x1C68
\r
389 #define VDEC_G_COMB_2D_HFD_CFG 0x1C6C
\r
390 #define VDEC_G_COMB_2D_LF_CFG 0x1C70
\r
391 #define VDEC_G_COMB_2D_BLEND 0x1C74
\r
392 #define VDEC_G_COMB_MISC_CTRL 0x1C78
\r
393 #define VDEC_G_COMB_FLAT_THRESH_CTRL 0x1C7C
\r
394 #define VDEC_G_COMB_TEST 0x1C80
\r
395 #define VDEC_G_BP_MISC_CTRL 0x1C84
\r
396 #define VDEC_G_VCR_DET_CTRL 0x1C88
\r
397 #define VDEC_G_NOISE_DET_CTRL 0x1C8C
\r
398 #define VDEC_G_COMB_FLAT_NOISE_CTRL 0x1C90
\r
399 #define VDEC_G_VERSION 0x1DF8
\r
400 #define VDEC_G_SOFT_RST_CTRL 0x1DFC
\r
402 // Video Decoder H Registers
\r
403 #define VDEC_H_MODE_CTRL 0x1E00
\r
404 #define VDEC_H_OUT_CTRL1 0x1E04
\r
405 #define VDEC_H_OUT_CTRL_NS 0x1E08
\r
406 #define VDEC_H_GEN_STAT 0x1E0C
\r
407 #define VDEC_H_INT_STAT_MASK 0x1E1E
\r
408 #define VDEC_H_LUMA_CTRL 0x1E14
\r
409 #define VDEC_H_CHROMA_CTRL 0x1E18
\r
410 #define VDEC_H_CRUSH_CTRL 0x1E1C
\r
411 #define VDEC_H_HORIZ_TIM_CTRL 0x1E20
\r
412 #define VDEC_H_VERT_TIM_CTRL 0x1E24
\r
413 #define VDEC_H_MISC_TIM_CTRL 0x1E28
\r
414 #define VDEC_H_FIELD_COUNT 0x1E2C
\r
415 #define VDEC_H_HSCALE_CTRL 0x1E30
\r
416 #define VDEC_H_VSCALE_CTRL 0x1E34
\r
417 #define VDEC_H_MAN_VGA_CTRL 0x1E38
\r
418 #define VDEC_H_MAN_AGC_CTRL 0x1E3C
\r
419 #define VDEC_H_DFE_CTRL1 0x1E40
\r
420 #define VDEC_H_DFE_CTRL2 0x1E44
\r
421 #define VDEC_H_DFE_CTRL3 0x1E48
\r
422 #define VDEC_H_PLL_CTRL 0x1E4C
\r
423 #define VDEC_H_PLL_CTRL_FAST 0x1E50
\r
424 #define VDEC_H_HTL_CTRL 0x1E54
\r
425 #define VDEC_H_SRC_CFG 0x1E58
\r
426 #define VDEC_H_SC_STEP_SIZE 0x1E5C
\r
427 #define VDEC_H_SC_CONVERGE_CTRL 0x1E60
\r
428 #define VDEC_H_SC_LOOP_CTRL 0x1E64
\r
429 #define VDEC_H_COMB_2D_HFS_CFG 0x1E68
\r
430 #define VDEC_H_COMB_2D_HFD_CFG 0x1E6C
\r
431 #define VDEC_H_COMB_2D_LF_CFG 0x1E70
\r
432 #define VDEC_H_COMB_2D_BLEND 0x1E74
\r
433 #define VDEC_H_COMB_MISC_CTRL 0x1E78
\r
434 #define VDEC_H_COMB_FLAT_THRESH_CTRL 0x1E7C
\r
435 #define VDEC_H_COMB_TEST 0x1E80
\r
436 #define VDEC_H_BP_MISC_CTRL 0x1E84
\r
437 #define VDEC_H_VCR_DET_CTRL 0x1E88
\r
438 #define VDEC_H_NOISE_DET_CTRL 0x1E8C
\r
439 #define VDEC_H_COMB_FLAT_NOISE_CTRL 0x1E90
\r
440 #define VDEC_H_VERSION 0x1FF8
\r
441 #define VDEC_H_SOFT_RST_CTRL 0x1FFC
\r
443 //*****************************************************************************
\r
444 // LUMA_CTRL register fields
\r
445 #define VDEC_A_BRITE_CTRL 0x1014
\r
446 #define VDEC_A_CNTRST_CTRL 0x1015
\r
447 #define VDEC_A_PEAK_SEL 0x1016
\r
449 //*****************************************************************************
\r
450 // CHROMA_CTRL register fields
\r
451 #define VDEC_A_USAT_CTRL 0x1018
\r
452 #define VDEC_A_VSAT_CTRL 0x1019
\r
453 #define VDEC_A_HUE_CTRL 0x101A
\r
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