2 comedi/drivers/cb_pcidas.c
4 Developed by Ivan Martinez and Frank Mori Hess, with valuable help from
5 David Schleef and the rest of the Comedi developers comunity.
7 Copyright (C) 2001-2003 Ivan Martinez <imr@oersted.dtu.dk>
8 Copyright (C) 2001,2002 Frank Mori Hess <fmhess@users.sourceforge.net>
10 COMEDI - Linux Control and Measurement Device Interface
11 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 ************************************************************************
31 Description: MeasurementComputing PCI-DAS series with the AMCC S5933 PCI controller
32 Author: Ivan Martinez <imr@oersted.dtu.dk>,
33 Frank Mori Hess <fmhess@users.sourceforge.net>
35 Devices: [Measurement Computing] PCI-DAS1602/16 (cb_pcidas),
36 PCI-DAS1602/16jr, PCI-DAS1602/12, PCI-DAS1200, PCI-DAS1200jr,
37 PCI-DAS1000, PCI-DAS1001, PCI_DAS1002
40 There are many reports of the driver being used with most of the
41 supported cards. Despite no detailed log is maintained, it can
42 be said that the driver is quite tested and stable.
44 The boards may be autocalibrated using the comedi_calibrate
47 Configuration options:
48 [0] - PCI bus of device (optional)
49 [1] - PCI slot of device (optional)
50 If bus/slot is not specified, the first supported
51 PCI device found will be used.
53 For commands, the scanned channels must be consecutive
54 (i.e. 4-5-6-7, 2-3-4,...), and must all have the same
61 analog triggering on 1602 series
64 #include "../comedidev.h"
65 #include <linux/delay.h>
69 #include "amcc_s5933.h"
70 #include "comedi_pci.h"
71 #include "comedi_fc.h"
73 #undef CB_PCIDAS_DEBUG // disable debugging code
74 //#define CB_PCIDAS_DEBUG // enable debugging code
76 // PCI vendor number of ComputerBoards/MeasurementComputing
77 #define PCI_VENDOR_ID_CB 0x1307
78 #define TIMER_BASE 100 // 10MHz master clock
79 #define AI_BUFFER_SIZE 1024 // maximum fifo size of any supported board
80 #define AO_BUFFER_SIZE 1024 // maximum fifo size of any supported board
81 #define NUM_CHANNELS_8800 8
82 #define NUM_CHANNELS_7376 1
83 #define NUM_CHANNELS_8402 2
84 #define NUM_CHANNELS_DAC08 1
86 /* PCI-DAS base addresses */
88 // indices of base address regions
89 #define S5933_BADRINDEX 0
90 #define CONT_STAT_BADRINDEX 1
91 #define ADC_FIFO_BADRINDEX 2
92 #define PACER_BADRINDEX 3
93 #define AO_BADRINDEX 4
94 // sizes of io regions
95 #define CONT_STAT_SIZE 10
96 #define ADC_FIFO_SIZE 4
100 /* Control/Status registers */
101 #define INT_ADCFIFO 0 // INTERRUPT / ADC FIFO register
102 #define INT_EOS 0x1 // interrupt end of scan
103 #define INT_FHF 0x2 // interrupt fifo half full
104 #define INT_FNE 0x3 // interrupt fifo not empty
105 #define INT_MASK 0x3 // mask of interrupt select bits
106 #define INTE 0x4 // interrupt enable
107 #define DAHFIE 0x8 // dac half full interrupt enable
108 #define EOAIE 0x10 // end of aquisition interrupt enable
109 #define DAHFI 0x20 // dac half full read status / write interrupt clear
110 #define EOAI 0x40 // read end of acq. interrupt status / write clear
111 #define INT 0x80 // read interrupt status / write clear
112 #define EOBI 0x200 // read end of burst interrupt status
113 #define ADHFI 0x400 // read half-full interrupt status
114 #define ADNEI 0x800 // read fifo not empty interrupt latch status
115 #define ADNE 0x1000 // read, fifo not empty (realtime, not latched) status
116 #define DAEMIE 0x1000 // write, dac empty interrupt enable
117 #define LADFUL 0x2000 // read fifo overflow / write clear
118 #define DAEMI 0x4000 // dac fifo empty interrupt status / write clear
120 #define ADCMUX_CONT 2 // ADC CHANNEL MUX AND CONTROL register
121 #define BEGIN_SCAN(x) ((x) & 0xf)
122 #define END_SCAN(x) (((x) & 0xf) << 4)
123 #define GAIN_BITS(x) (((x) & 0x3) << 8)
124 #define UNIP 0x800 // Analog front-end unipolar for range
125 #define SE 0x400 // Inputs in single-ended mode
126 #define PACER_MASK 0x3000 // pacer source bits
127 #define PACER_INT 0x1000 // internal pacer
128 #define PACER_EXT_FALL 0x2000 // external falling edge
129 #define PACER_EXT_RISE 0x3000 // external rising edge
130 #define EOC 0x4000 // adc not busy
132 #define TRIG_CONTSTAT 4 // TRIGGER CONTROL/STATUS register
133 #define SW_TRIGGER 0x1 // software start trigger
134 #define EXT_TRIGGER 0x2 // external start trigger
135 #define ANALOG_TRIGGER 0x3 // external analog trigger
136 #define TRIGGER_MASK 0x3 // mask of bits that determine start trigger
137 #define TGEN 0x10 // enable external start trigger
138 #define BURSTE 0x20 // burst mode enable
139 #define XTRCL 0x80 // clear external trigger
141 #define CALIBRATION_REG 6 // CALIBRATION register
142 #define SELECT_8800_BIT 0x100 // select 8800 caldac
143 #define SELECT_TRIMPOT_BIT 0x200 // select ad7376 trim pot
144 #define SELECT_DAC08_BIT 0x400 // select dac08 caldac
145 #define CAL_SRC_BITS(x) (((x) & 0x7) << 11)
146 #define CAL_EN_BIT 0x4000 // read calibration source instead of analog input channel 0
147 #define SERIAL_DATA_IN_BIT 0x8000 // serial data stream going to 8800 and 7376
149 #define DAC_CSR 0x8 // dac control and status register
151 DACEN = 0x2, // dac enable
152 DAC_MODE_UPDATE_BOTH = 0x80, // update both dacs when dac0 is written
154 static inline unsigned int DAC_RANGE(unsigned int channel, unsigned int range)
156 return (range & 0x3) << (8 + 2 * (channel & 0x1));
158 static inline unsigned int DAC_RANGE_MASK(unsigned int channel)
160 return 0x3 << (8 + 2 * (channel & 0x1));
163 // bits for 1602 series only
164 enum dac_csr_bits_1602 {
165 DAC_EMPTY = 0x1, // dac fifo empty, read, write clear
166 DAC_START = 0x4, // start/arm dac fifo operations
167 DAC_PACER_MASK = 0x18, // bits that set dac pacer source
168 DAC_PACER_INT = 0x8, // dac internal pacing
169 DAC_PACER_EXT_FALL = 0x10, // dac external pacing, falling edge
170 DAC_PACER_EXT_RISE = 0x18, // dac external pacing, rising edge
172 static inline unsigned int DAC_CHAN_EN(unsigned int channel)
174 return 1 << (5 + (channel & 0x1)); // enable channel 0 or 1
177 /* analog input fifo */
178 #define ADCDATA 0 // ADC DATA register
179 #define ADCFIFOCLR 2 // ADC FIFO CLEAR
181 // pacer, counter, dio registers
186 // analog output registers for 100x, 1200 series
187 static inline unsigned int DAC_DATA_REG(unsigned int channel)
189 return 2 * (channel & 0x1);
192 /* analog output registers for 1602 series*/
193 #define DACDATA 0 // DAC DATA register
194 #define DACFIFOCLR 2 // DAC FIFO CLEAR
196 // bit in hexadecimal representation of range index that indicates unipolar input range
197 #define IS_UNIPOLAR 0x4
198 // analog input ranges for most boards
199 static const comedi_lrange cb_pcidas_ranges = {
213 // pci-das1001 input ranges
214 static const comedi_lrange cb_pcidas_alt_ranges = {
228 // analog output ranges
229 static const comedi_lrange cb_pcidas_ao_ranges = {
244 typedef struct cb_pcidas_board_struct {
246 unsigned short device_id;
247 int ai_se_chans; // Inputs in single-ended mode
248 int ai_diff_chans; // Inputs in differential mode
249 int ai_bits; // analog input resolution
250 int ai_speed; // fastest conversion period in ns
251 int ao_nchan; // number of analog out channels
252 int has_ao_fifo; // analog output has fifo
253 int ao_scan_speed; // analog output speed for 1602 series (for a scan, not conversion)
254 int fifo_size; // number of samples fifo can hold
255 const comedi_lrange *ranges;
256 enum trimpot_model trimpot;
257 unsigned has_dac08:1;
260 static const cb_pcidas_board cb_pcidas_boards[] = {
262 name: "pci-das1602/16",
272 ranges: &cb_pcidas_ranges,
286 ranges: &cb_pcidas_ranges,
291 name: "pci-das1602/12",
301 ranges: &cb_pcidas_ranges,
306 name: "pci-das1200/jr",
315 ranges: &cb_pcidas_ranges,
320 name: "pci-das1602/16/jr",
329 ranges: &cb_pcidas_ranges,
343 ranges: &cb_pcidas_ranges,
357 ranges: &cb_pcidas_alt_ranges,
371 ranges: &cb_pcidas_ranges,
377 // Number of boards in cb_pcidas_boards
378 #define N_BOARDS (sizeof(cb_pcidas_boards) / sizeof(cb_pcidas_board))
380 static DEFINE_PCI_DEVICE_TABLE(cb_pcidas_pci_table) = {
381 {PCI_VENDOR_ID_CB, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
382 {PCI_VENDOR_ID_CB, 0x000f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
383 {PCI_VENDOR_ID_CB, 0x0010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
384 {PCI_VENDOR_ID_CB, 0x0019, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
385 {PCI_VENDOR_ID_CB, 0x001c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
386 {PCI_VENDOR_ID_CB, 0x004c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
387 {PCI_VENDOR_ID_CB, 0x001a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
388 {PCI_VENDOR_ID_CB, 0x001b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
392 MODULE_DEVICE_TABLE(pci, cb_pcidas_pci_table);
395 * Useful for shorthand access to the particular board structure
397 #define thisboard ((const cb_pcidas_board *)dev->board_ptr)
399 /* this structure is for data unique to this hardware driver. If
400 several hardware drivers keep similar information in this structure,
401 feel free to suggest moving the variable to the struct comedi_device struct. */
403 /* would be useful for a PCI device */
404 struct pci_dev *pci_dev;
406 unsigned long s5933_config;
407 unsigned long control_status;
408 unsigned long adc_fifo;
409 unsigned long pacer_counter_dio;
410 unsigned long ao_registers;
411 // divisors of master clock for analog input pacing
412 unsigned int divisor1;
413 unsigned int divisor2;
414 volatile unsigned int count; // number of analog input samples remaining
415 volatile unsigned int adc_fifo_bits; // bits to write to interupt/adcfifo register
416 volatile unsigned int s5933_intcsr_bits; // bits to write to amcc s5933 interrupt control/status register
417 volatile unsigned int ao_control_bits; // bits to write to ao control and status register
418 short ai_buffer[AI_BUFFER_SIZE];
419 short ao_buffer[AO_BUFFER_SIZE];
420 // divisors of master clock for analog output pacing
421 unsigned int ao_divisor1;
422 unsigned int ao_divisor2;
423 volatile unsigned int ao_count; // number of analog output samples remaining
424 int ao_value[2]; // remember what the analog outputs are set to, to allow readback
425 unsigned int caldac_value[NUM_CHANNELS_8800]; // for readback of caldac
426 unsigned int trimpot_value[NUM_CHANNELS_8402]; // for readback of trimpot
427 unsigned int dac08_value;
428 unsigned int calibration_source;
432 * most drivers define the following macro to make it easy to
433 * access the private structure.
435 #define devpriv ((cb_pcidas_private *)dev->private)
438 * The comedi_driver structure tells the Comedi core module
439 * which functions to call to configure/deconfigure (attach/detach)
440 * the board, and also about the kernel module that contains
443 static int cb_pcidas_attach(struct comedi_device * dev, comedi_devconfig * it);
444 static int cb_pcidas_detach(struct comedi_device * dev);
445 static comedi_driver driver_cb_pcidas = {
446 driver_name:"cb_pcidas",
448 attach:cb_pcidas_attach,
449 detach:cb_pcidas_detach,
452 static int cb_pcidas_ai_rinsn(struct comedi_device * dev, struct comedi_subdevice * s,
453 comedi_insn * insn, unsigned int * data);
454 static int ai_config_insn(struct comedi_device * dev, struct comedi_subdevice * s,
455 comedi_insn * insn, unsigned int * data);
456 static int cb_pcidas_ao_nofifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s,
457 comedi_insn * insn, unsigned int * data);
458 static int cb_pcidas_ao_fifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s,
459 comedi_insn * insn, unsigned int * data);
460 static int cb_pcidas_ao_readback_insn(struct comedi_device * dev, struct comedi_subdevice * s,
461 comedi_insn * insn, unsigned int * data);
462 static int cb_pcidas_ai_cmd(struct comedi_device * dev, struct comedi_subdevice * s);
463 static int cb_pcidas_ai_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
465 static int cb_pcidas_ao_cmd(struct comedi_device * dev, struct comedi_subdevice * s);
466 static int cb_pcidas_ao_inttrig(struct comedi_device * dev, struct comedi_subdevice * subdev,
467 unsigned int trig_num);
468 static int cb_pcidas_ao_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
470 static irqreturn_t cb_pcidas_interrupt(int irq, void *d PT_REGS_ARG);
471 static void handle_ao_interrupt(struct comedi_device * dev, unsigned int status);
472 static int cb_pcidas_cancel(struct comedi_device * dev, struct comedi_subdevice * s);
473 static int cb_pcidas_ao_cancel(struct comedi_device * dev, struct comedi_subdevice * s);
474 static void cb_pcidas_load_counters(struct comedi_device * dev, unsigned int *ns,
476 static int eeprom_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
477 comedi_insn * insn, unsigned int * data);
478 static int caldac_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
479 comedi_insn * insn, unsigned int * data);
480 static int caldac_write_insn(struct comedi_device * dev, struct comedi_subdevice * s,
481 comedi_insn * insn, unsigned int * data);
482 static int trimpot_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
483 comedi_insn * insn, unsigned int * data);
484 static int cb_pcidas_trimpot_write(struct comedi_device * dev, unsigned int channel,
486 static int trimpot_write_insn(struct comedi_device * dev, struct comedi_subdevice * s,
487 comedi_insn * insn, unsigned int * data);
488 static int dac08_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
489 comedi_insn * insn, unsigned int * data);
490 static int dac08_write(struct comedi_device * dev, unsigned int value);
491 static int dac08_write_insn(struct comedi_device * dev, struct comedi_subdevice * s,
492 comedi_insn * insn, unsigned int * data);
493 static int caldac_8800_write(struct comedi_device * dev, unsigned int address,
495 static int trimpot_7376_write(struct comedi_device * dev, uint8_t value);
496 static int trimpot_8402_write(struct comedi_device * dev, unsigned int channel,
498 static int nvram_read(struct comedi_device * dev, unsigned int address,
501 static inline unsigned int cal_enable_bits(struct comedi_device * dev)
503 return CAL_EN_BIT | CAL_SRC_BITS(devpriv->calibration_source);
507 * Attach is called by the Comedi core to configure the driver
508 * for a particular board.
510 static int cb_pcidas_attach(struct comedi_device * dev, comedi_devconfig * it)
512 struct comedi_subdevice *s;
513 struct pci_dev *pcidev;
517 printk("comedi%d: cb_pcidas: ", dev->minor);
520 * Allocate the private structure area.
522 if (alloc_private(dev, sizeof(cb_pcidas_private)) < 0)
526 * Probe the device to determine what device in the series it is.
530 for (pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
532 pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) {
533 // is it not a computer boards card?
534 if (pcidev->vendor != PCI_VENDOR_ID_CB)
536 // loop through cards supported by this driver
537 for (index = 0; index < N_BOARDS; index++) {
538 if (cb_pcidas_boards[index].device_id != pcidev->device)
540 // was a particular bus/slot requested?
541 if (it->options[0] || it->options[1]) {
542 // are we on the wrong bus/slot?
543 if (pcidev->bus->number != it->options[0] ||
544 PCI_SLOT(pcidev->devfn) !=
549 devpriv->pci_dev = pcidev;
550 dev->board_ptr = cb_pcidas_boards + index;
555 printk("No supported ComputerBoards/MeasurementComputing card found on "
556 "requested position\n");
561 printk("Found %s on bus %i, slot %i\n", cb_pcidas_boards[index].name,
562 pcidev->bus->number, PCI_SLOT(pcidev->devfn));
565 * Enable PCI device and reserve I/O ports.
567 if (comedi_pci_enable(pcidev, "cb_pcidas")) {
568 printk(" Failed to enable PCI device and request regions\n");
572 * Initialize devpriv->control_status and devpriv->adc_fifo to point to
573 * their base address.
575 devpriv->s5933_config =
576 pci_resource_start(devpriv->pci_dev, S5933_BADRINDEX);
577 devpriv->control_status =
578 pci_resource_start(devpriv->pci_dev, CONT_STAT_BADRINDEX);
580 pci_resource_start(devpriv->pci_dev, ADC_FIFO_BADRINDEX);
581 devpriv->pacer_counter_dio =
582 pci_resource_start(devpriv->pci_dev, PACER_BADRINDEX);
583 if (thisboard->ao_nchan) {
584 devpriv->ao_registers =
585 pci_resource_start(devpriv->pci_dev, AO_BADRINDEX);
587 // disable and clear interrupts on amcc s5933
588 outl(INTCSR_INBOX_INTR_STATUS,
589 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
592 if (comedi_request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt,
593 IRQF_SHARED, "cb_pcidas", dev)) {
594 printk(" unable to allocate irq %d\n", devpriv->pci_dev->irq);
597 dev->irq = devpriv->pci_dev->irq;
599 //Initialize dev->board_name
600 dev->board_name = thisboard->name;
603 * Allocate the subdevice structures.
605 if (alloc_subdevices(dev, 7) < 0)
608 s = dev->subdevices + 0;
609 /* analog input subdevice */
610 dev->read_subdev = s;
611 s->type = COMEDI_SUBD_AI;
612 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
613 /* WARNING: Number of inputs in differential mode is ignored */
614 s->n_chan = thisboard->ai_se_chans;
615 s->len_chanlist = thisboard->ai_se_chans;
616 s->maxdata = (1 << thisboard->ai_bits) - 1;
617 s->range_table = thisboard->ranges;
618 s->insn_read = cb_pcidas_ai_rinsn;
619 s->insn_config = ai_config_insn;
620 s->do_cmd = cb_pcidas_ai_cmd;
621 s->do_cmdtest = cb_pcidas_ai_cmdtest;
622 s->cancel = cb_pcidas_cancel;
624 /* analog output subdevice */
625 s = dev->subdevices + 1;
626 if (thisboard->ao_nchan) {
627 s->type = COMEDI_SUBD_AO;
628 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
629 s->n_chan = thisboard->ao_nchan;
630 // analog out resolution is the same as analog input resolution, so use ai_bits
631 s->maxdata = (1 << thisboard->ai_bits) - 1;
632 s->range_table = &cb_pcidas_ao_ranges;
633 s->insn_read = cb_pcidas_ao_readback_insn;
634 if (thisboard->has_ao_fifo) {
635 dev->write_subdev = s;
636 s->subdev_flags |= SDF_CMD_WRITE;
637 s->insn_write = cb_pcidas_ao_fifo_winsn;
638 s->do_cmdtest = cb_pcidas_ao_cmdtest;
639 s->do_cmd = cb_pcidas_ao_cmd;
640 s->cancel = cb_pcidas_ao_cancel;
642 s->insn_write = cb_pcidas_ao_nofifo_winsn;
645 s->type = COMEDI_SUBD_UNUSED;
649 s = dev->subdevices + 2;
650 subdev_8255_init(dev, s, NULL, devpriv->pacer_counter_dio + DIO_8255);
653 s = dev->subdevices + 3;
654 s->type = COMEDI_SUBD_MEMORY;
655 s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
658 s->insn_read = eeprom_read_insn;
661 s = dev->subdevices + 4;
662 s->type = COMEDI_SUBD_CALIB;
663 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
664 s->n_chan = NUM_CHANNELS_8800;
666 s->insn_read = caldac_read_insn;
667 s->insn_write = caldac_write_insn;
668 for (i = 0; i < s->n_chan; i++)
669 caldac_8800_write(dev, i, s->maxdata / 2);
671 // trim potentiometer
672 s = dev->subdevices + 5;
673 s->type = COMEDI_SUBD_CALIB;
674 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
675 if (thisboard->trimpot == AD7376) {
676 s->n_chan = NUM_CHANNELS_7376;
679 s->n_chan = NUM_CHANNELS_8402;
682 s->insn_read = trimpot_read_insn;
683 s->insn_write = trimpot_write_insn;
684 for (i = 0; i < s->n_chan; i++)
685 cb_pcidas_trimpot_write(dev, i, s->maxdata / 2);
688 s = dev->subdevices + 6;
689 if (thisboard->has_dac08) {
690 s->type = COMEDI_SUBD_CALIB;
691 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
692 s->n_chan = NUM_CHANNELS_DAC08;
693 s->insn_read = dac08_read_insn;
694 s->insn_write = dac08_write_insn;
696 dac08_write(dev, s->maxdata / 2);
698 s->type = COMEDI_SUBD_UNUSED;
700 // make sure mailbox 4 is empty
701 inl(devpriv->s5933_config + AMCC_OP_REG_IMB4);
702 /* Set bits to enable incoming mailbox interrupts on amcc s5933. */
703 devpriv->s5933_intcsr_bits =
704 INTCSR_INBOX_BYTE(3) | INTCSR_INBOX_SELECT(3) |
705 INTCSR_INBOX_FULL_INT;
706 // clear and enable interrupt on amcc s5933
707 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
708 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
714 * cb_pcidas_detach is called to deconfigure a device. It should deallocate
716 * This function is also called when _attach() fails, so it should be
717 * careful not to release resources that were not necessarily
718 * allocated by _attach(). dev->private and dev->subdevices are
719 * deallocated automatically by the core.
721 static int cb_pcidas_detach(struct comedi_device * dev)
723 printk("comedi%d: cb_pcidas: remove\n", dev->minor);
726 if (devpriv->s5933_config) {
727 // disable and clear interrupts on amcc s5933
728 outl(INTCSR_INBOX_INTR_STATUS,
729 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
730 #ifdef CB_PCIDAS_DEBUG
731 rt_printk("detaching, incsr is 0x%x\n",
732 inl(devpriv->s5933_config +
733 AMCC_OP_REG_INTCSR));
738 comedi_free_irq(dev->irq, dev);
740 subdev_8255_cleanup(dev, dev->subdevices + 2);
741 if (devpriv && devpriv->pci_dev) {
742 if (devpriv->s5933_config) {
743 comedi_pci_disable(devpriv->pci_dev);
745 pci_dev_put(devpriv->pci_dev);
752 * "instructions" read/write data in "one-shot" or "software-triggered"
755 static int cb_pcidas_ai_rinsn(struct comedi_device * dev, struct comedi_subdevice * s,
756 comedi_insn * insn, unsigned int * data)
760 static const int timeout = 10000;
762 // enable calibration input if appropriate
763 if (insn->chanspec & CR_ALT_SOURCE) {
764 outw(cal_enable_bits(dev),
765 devpriv->control_status + CALIBRATION_REG);
768 outw(0, devpriv->control_status + CALIBRATION_REG);
769 channel = CR_CHAN(insn->chanspec);
771 // set mux limits and gain
772 bits = BEGIN_SCAN(channel) |
773 END_SCAN(channel) | GAIN_BITS(CR_RANGE(insn->chanspec));
774 // set unipolar/bipolar
775 if (CR_RANGE(insn->chanspec) & IS_UNIPOLAR)
777 // set singleended/differential
778 if (CR_AREF(insn->chanspec) != AREF_DIFF)
780 outw(bits, devpriv->control_status + ADCMUX_CONT);
783 outw(0, devpriv->adc_fifo + ADCFIFOCLR);
785 /* convert n samples */
786 for (n = 0; n < insn->n; n++) {
787 /* trigger conversion */
788 outw(0, devpriv->adc_fifo + ADCDATA);
790 /* wait for conversion to end */
791 /* return -ETIMEDOUT if there is a timeout */
792 for (i = 0; i < timeout; i++) {
793 if (inw(devpriv->control_status + ADCMUX_CONT) & EOC)
800 data[n] = inw(devpriv->adc_fifo + ADCDATA);
803 /* return the number of samples read/written */
807 static int ai_config_calibration_source(struct comedi_device * dev, unsigned int * data)
809 static const int num_calibration_sources = 8;
810 unsigned int source = data[1];
812 if (source >= num_calibration_sources) {
813 printk("invalid calibration source: %i\n", source);
817 devpriv->calibration_source = source;
822 static int ai_config_insn(struct comedi_device * dev, struct comedi_subdevice * s,
823 comedi_insn * insn, unsigned int * data)
828 case INSN_CONFIG_ALT_SOURCE:
829 return ai_config_calibration_source(dev, data);
838 // analog output insn for pcidas-1000 and 1200 series
839 static int cb_pcidas_ao_nofifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s,
840 comedi_insn * insn, unsigned int * data)
845 // set channel and range
846 channel = CR_CHAN(insn->chanspec);
847 comedi_spin_lock_irqsave(&dev->spinlock, flags);
848 devpriv->ao_control_bits &=
849 ~DAC_MODE_UPDATE_BOTH & ~DAC_RANGE_MASK(channel);
850 devpriv->ao_control_bits |=
851 DACEN | DAC_RANGE(channel, CR_RANGE(insn->chanspec));
852 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
853 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
855 // remember value for readback
856 devpriv->ao_value[channel] = data[0];
858 outw(data[0], devpriv->ao_registers + DAC_DATA_REG(channel));
863 // analog output insn for pcidas-1602 series
864 static int cb_pcidas_ao_fifo_winsn(struct comedi_device * dev, struct comedi_subdevice * s,
865 comedi_insn * insn, unsigned int * data)
871 outw(0, devpriv->ao_registers + DACFIFOCLR);
873 // set channel and range
874 channel = CR_CHAN(insn->chanspec);
875 comedi_spin_lock_irqsave(&dev->spinlock, flags);
876 devpriv->ao_control_bits &=
877 ~DAC_CHAN_EN(0) & ~DAC_CHAN_EN(1) & ~DAC_RANGE_MASK(channel) &
879 devpriv->ao_control_bits |=
880 DACEN | DAC_RANGE(channel,
881 CR_RANGE(insn->chanspec)) | DAC_CHAN_EN(channel) | DAC_START;
882 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
883 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
885 // remember value for readback
886 devpriv->ao_value[channel] = data[0];
888 outw(data[0], devpriv->ao_registers + DACDATA);
893 // analog output readback insn
894 // XXX loses track of analog output value back after an analog ouput command is executed
895 static int cb_pcidas_ao_readback_insn(struct comedi_device * dev, struct comedi_subdevice * s,
896 comedi_insn * insn, unsigned int * data)
898 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
903 static int eeprom_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
904 comedi_insn * insn, unsigned int * data)
909 retval = nvram_read(dev, CR_CHAN(insn->chanspec), &nvram_data);
913 data[0] = nvram_data;
918 static int caldac_write_insn(struct comedi_device * dev, struct comedi_subdevice * s,
919 comedi_insn * insn, unsigned int * data)
921 const unsigned int channel = CR_CHAN(insn->chanspec);
923 return caldac_8800_write(dev, channel, data[0]);
926 static int caldac_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
927 comedi_insn * insn, unsigned int * data)
929 data[0] = devpriv->caldac_value[CR_CHAN(insn->chanspec)];
934 /* 1602/16 pregain offset */
935 static int dac08_write(struct comedi_device * dev, unsigned int value)
937 if (devpriv->dac08_value == value)
940 devpriv->dac08_value = value;
942 outw(cal_enable_bits(dev) | (value & 0xff),
943 devpriv->control_status + CALIBRATION_REG);
945 outw(cal_enable_bits(dev) | SELECT_DAC08_BIT | (value & 0xff),
946 devpriv->control_status + CALIBRATION_REG);
948 outw(cal_enable_bits(dev) | (value & 0xff),
949 devpriv->control_status + CALIBRATION_REG);
955 static int dac08_write_insn(struct comedi_device * dev, struct comedi_subdevice * s,
956 comedi_insn * insn, unsigned int * data)
958 return dac08_write(dev, data[0]);
961 static int dac08_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
962 comedi_insn * insn, unsigned int * data)
964 data[0] = devpriv->dac08_value;
969 static int cb_pcidas_trimpot_write(struct comedi_device * dev,
970 unsigned int channel, unsigned int value)
972 if (devpriv->trimpot_value[channel] == value)
975 devpriv->trimpot_value[channel] = value;
976 switch (thisboard->trimpot) {
978 trimpot_7376_write(dev, value);
981 trimpot_8402_write(dev, channel, value);
984 comedi_error(dev, "driver bug?");
992 static int trimpot_write_insn(struct comedi_device * dev, struct comedi_subdevice * s,
993 comedi_insn * insn, unsigned int * data)
995 unsigned int channel = CR_CHAN(insn->chanspec);
997 return cb_pcidas_trimpot_write(dev, channel, data[0]);
1000 static int trimpot_read_insn(struct comedi_device * dev, struct comedi_subdevice * s,
1001 comedi_insn * insn, unsigned int * data)
1003 unsigned int channel = CR_CHAN(insn->chanspec);
1005 data[0] = devpriv->trimpot_value[channel];
1010 static int cb_pcidas_ai_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
1015 int i, gain, start_chan;
1017 /* cmdtest tests a particular command to see if it is valid.
1018 * Using the cmdtest ioctl, a user can create a valid cmd
1019 * and then have it executes by the cmd ioctl.
1021 * cmdtest returns 1,2,3,4 or 0, depending on which tests
1022 * the command passes. */
1024 /* step 1: make sure trigger sources are trivially valid */
1026 tmp = cmd->start_src;
1027 cmd->start_src &= TRIG_NOW | TRIG_EXT;
1028 if (!cmd->start_src || tmp != cmd->start_src)
1031 tmp = cmd->scan_begin_src;
1032 cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT;
1033 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1036 tmp = cmd->convert_src;
1037 cmd->convert_src &= TRIG_TIMER | TRIG_NOW | TRIG_EXT;
1038 if (!cmd->convert_src || tmp != cmd->convert_src)
1041 tmp = cmd->scan_end_src;
1042 cmd->scan_end_src &= TRIG_COUNT;
1043 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1046 tmp = cmd->stop_src;
1047 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
1048 if (!cmd->stop_src || tmp != cmd->stop_src)
1054 /* step 2: make sure trigger sources are unique and mutually compatible */
1056 if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1058 if (cmd->scan_begin_src != TRIG_FOLLOW &&
1059 cmd->scan_begin_src != TRIG_TIMER &&
1060 cmd->scan_begin_src != TRIG_EXT)
1062 if (cmd->convert_src != TRIG_TIMER &&
1063 cmd->convert_src != TRIG_EXT && cmd->convert_src != TRIG_NOW)
1065 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
1068 // make sure trigger sources are compatible with each other
1069 if (cmd->scan_begin_src == TRIG_FOLLOW && cmd->convert_src == TRIG_NOW)
1071 if (cmd->scan_begin_src != TRIG_FOLLOW && cmd->convert_src != TRIG_NOW)
1073 if (cmd->start_src == TRIG_EXT &&
1074 (cmd->convert_src == TRIG_EXT
1075 || cmd->scan_begin_src == TRIG_EXT))
1081 /* step 3: make sure arguments are trivially compatible */
1083 if (cmd->start_arg != 0) {
1088 if (cmd->scan_begin_src == TRIG_TIMER) {
1089 if (cmd->scan_begin_arg <
1090 thisboard->ai_speed * cmd->chanlist_len) {
1091 cmd->scan_begin_arg =
1092 thisboard->ai_speed * cmd->chanlist_len;
1096 if (cmd->convert_src == TRIG_TIMER) {
1097 if (cmd->convert_arg < thisboard->ai_speed) {
1098 cmd->convert_arg = thisboard->ai_speed;
1103 if (cmd->scan_end_arg != cmd->chanlist_len) {
1104 cmd->scan_end_arg = cmd->chanlist_len;
1107 if (cmd->stop_src == TRIG_NONE) {
1109 if (cmd->stop_arg != 0) {
1118 /* step 4: fix up any arguments */
1120 if (cmd->scan_begin_src == TRIG_TIMER) {
1121 tmp = cmd->scan_begin_arg;
1122 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1123 &(devpriv->divisor1), &(devpriv->divisor2),
1124 &(cmd->scan_begin_arg), cmd->flags & TRIG_ROUND_MASK);
1125 if (tmp != cmd->scan_begin_arg)
1128 if (cmd->convert_src == TRIG_TIMER) {
1129 tmp = cmd->convert_arg;
1130 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1131 &(devpriv->divisor1), &(devpriv->divisor2),
1132 &(cmd->convert_arg), cmd->flags & TRIG_ROUND_MASK);
1133 if (tmp != cmd->convert_arg)
1140 // check channel/gain list against card's limitations
1141 if (cmd->chanlist) {
1142 gain = CR_RANGE(cmd->chanlist[0]);
1143 start_chan = CR_CHAN(cmd->chanlist[0]);
1144 for (i = 1; i < cmd->chanlist_len; i++) {
1145 if (CR_CHAN(cmd->chanlist[i]) !=
1146 (start_chan + i) % s->n_chan) {
1148 "entries in chanlist must be consecutive channels, counting upwards\n");
1151 if (CR_RANGE(cmd->chanlist[i]) != gain) {
1153 "entries in chanlist must all have the same gain\n");
1165 static int cb_pcidas_ai_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
1167 comedi_async *async = s->async;
1168 comedi_cmd *cmd = &async->cmd;
1170 unsigned long flags;
1172 // make sure CAL_EN_BIT is disabled
1173 outw(0, devpriv->control_status + CALIBRATION_REG);
1174 // initialize before settings pacer source and count values
1175 outw(0, devpriv->control_status + TRIG_CONTSTAT);
1177 outw(0, devpriv->adc_fifo + ADCFIFOCLR);
1179 // set mux limits, gain and pacer source
1180 bits = BEGIN_SCAN(CR_CHAN(cmd->chanlist[0])) |
1181 END_SCAN(CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1])) |
1182 GAIN_BITS(CR_RANGE(cmd->chanlist[0]));
1183 // set unipolar/bipolar
1184 if (CR_RANGE(cmd->chanlist[0]) & IS_UNIPOLAR)
1186 // set singleended/differential
1187 if (CR_AREF(cmd->chanlist[0]) != AREF_DIFF)
1190 if (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT)
1191 bits |= PACER_EXT_RISE;
1194 outw(bits, devpriv->control_status + ADCMUX_CONT);
1196 #ifdef CB_PCIDAS_DEBUG
1197 rt_printk("comedi: sent 0x%x to adcmux control\n", bits);
1201 if (cmd->convert_src == TRIG_TIMER)
1202 cb_pcidas_load_counters(dev, &cmd->convert_arg,
1203 cmd->flags & TRIG_ROUND_MASK);
1204 else if (cmd->scan_begin_src == TRIG_TIMER)
1205 cb_pcidas_load_counters(dev, &cmd->scan_begin_arg,
1206 cmd->flags & TRIG_ROUND_MASK);
1208 // set number of conversions
1209 if (cmd->stop_src == TRIG_COUNT) {
1210 devpriv->count = cmd->chanlist_len * cmd->stop_arg;
1212 // enable interrupts
1213 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1214 devpriv->adc_fifo_bits |= INTE;
1215 devpriv->adc_fifo_bits &= ~INT_MASK;
1216 if (cmd->flags & TRIG_WAKE_EOS) {
1217 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1)
1218 devpriv->adc_fifo_bits |= INT_EOS; // interrupt end of burst
1220 devpriv->adc_fifo_bits |= INT_FNE; // interrupt fifo not empty
1222 devpriv->adc_fifo_bits |= INT_FHF; //interrupt fifo half full
1224 #ifdef CB_PCIDAS_DEBUG
1225 rt_printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits);
1227 // enable (and clear) interrupts
1228 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL,
1229 devpriv->control_status + INT_ADCFIFO);
1230 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1232 // set start trigger and burst mode
1234 if (cmd->start_src == TRIG_NOW)
1236 else if (cmd->start_src == TRIG_EXT)
1237 bits |= EXT_TRIGGER | TGEN | XTRCL;
1239 comedi_error(dev, "bug!");
1242 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1)
1244 outw(bits, devpriv->control_status + TRIG_CONTSTAT);
1245 #ifdef CB_PCIDAS_DEBUG
1246 rt_printk("comedi: sent 0x%x to trig control\n", bits);
1252 static int cb_pcidas_ao_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
1258 /* cmdtest tests a particular command to see if it is valid.
1259 * Using the cmdtest ioctl, a user can create a valid cmd
1260 * and then have it executes by the cmd ioctl.
1262 * cmdtest returns 1,2,3,4 or 0, depending on which tests
1263 * the command passes. */
1265 /* step 1: make sure trigger sources are trivially valid */
1267 tmp = cmd->start_src;
1268 cmd->start_src &= TRIG_INT;
1269 if (!cmd->start_src || tmp != cmd->start_src)
1272 tmp = cmd->scan_begin_src;
1273 cmd->scan_begin_src &= TRIG_TIMER | TRIG_EXT;
1274 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1277 tmp = cmd->convert_src;
1278 cmd->convert_src &= TRIG_NOW;
1279 if (!cmd->convert_src || tmp != cmd->convert_src)
1282 tmp = cmd->scan_end_src;
1283 cmd->scan_end_src &= TRIG_COUNT;
1284 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1287 tmp = cmd->stop_src;
1288 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
1289 if (!cmd->stop_src || tmp != cmd->stop_src)
1295 /* step 2: make sure trigger sources are unique and mutually compatible */
1297 if (cmd->scan_begin_src != TRIG_TIMER &&
1298 cmd->scan_begin_src != TRIG_EXT)
1300 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
1306 /* step 3: make sure arguments are trivially compatible */
1308 if (cmd->start_arg != 0) {
1313 if (cmd->scan_begin_src == TRIG_TIMER) {
1314 if (cmd->scan_begin_arg < thisboard->ao_scan_speed) {
1315 cmd->scan_begin_arg = thisboard->ao_scan_speed;
1320 if (cmd->scan_end_arg != cmd->chanlist_len) {
1321 cmd->scan_end_arg = cmd->chanlist_len;
1324 if (cmd->stop_src == TRIG_NONE) {
1326 if (cmd->stop_arg != 0) {
1335 /* step 4: fix up any arguments */
1337 if (cmd->scan_begin_src == TRIG_TIMER) {
1338 tmp = cmd->scan_begin_arg;
1339 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1340 &(devpriv->ao_divisor1), &(devpriv->ao_divisor2),
1341 &(cmd->scan_begin_arg), cmd->flags & TRIG_ROUND_MASK);
1342 if (tmp != cmd->scan_begin_arg)
1349 // check channel/gain list against card's limitations
1350 if (cmd->chanlist && cmd->chanlist_len > 1) {
1351 if (CR_CHAN(cmd->chanlist[0]) != 0 ||
1352 CR_CHAN(cmd->chanlist[1]) != 1) {
1354 "channels must be ordered channel 0, channel 1 in chanlist\n");
1365 static int cb_pcidas_ao_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
1367 comedi_async *async = s->async;
1368 comedi_cmd *cmd = &async->cmd;
1370 unsigned long flags;
1372 // set channel limits, gain
1373 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1374 for (i = 0; i < cmd->chanlist_len; i++) {
1376 devpriv->ao_control_bits |=
1377 DAC_CHAN_EN(CR_CHAN(cmd->chanlist[i]));
1379 devpriv->ao_control_bits |= DAC_RANGE(CR_CHAN(cmd->chanlist[i]),
1380 CR_RANGE(cmd->chanlist[i]));
1383 // disable analog out before settings pacer source and count values
1384 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1385 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1388 outw(0, devpriv->ao_registers + DACFIFOCLR);
1391 if (cmd->scan_begin_src == TRIG_TIMER) {
1392 i8253_cascade_ns_to_timer_2div(TIMER_BASE,
1393 &(devpriv->ao_divisor1), &(devpriv->ao_divisor2),
1394 &(cmd->scan_begin_arg), cmd->flags);
1396 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */
1397 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 1,
1398 devpriv->ao_divisor1, 2);
1399 i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 2,
1400 devpriv->ao_divisor2, 2);
1402 // set number of conversions
1403 if (cmd->stop_src == TRIG_COUNT) {
1404 devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg;
1407 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1408 switch (cmd->scan_begin_src) {
1410 devpriv->ao_control_bits |= DAC_PACER_INT;
1413 devpriv->ao_control_bits |= DAC_PACER_EXT_RISE;
1416 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1417 comedi_error(dev, "error setting dac pacer source");
1421 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1423 async->inttrig = cb_pcidas_ao_inttrig;
1428 static int cb_pcidas_ao_inttrig(struct comedi_device * dev, struct comedi_subdevice * s,
1429 unsigned int trig_num)
1431 unsigned int num_bytes, num_points = thisboard->fifo_size;
1432 comedi_async *async = s->async;
1433 comedi_cmd *cmd = &s->async->cmd;
1434 unsigned long flags;
1440 if (cmd->stop_src == TRIG_COUNT && devpriv->ao_count < num_points)
1441 num_points = devpriv->ao_count;
1443 num_bytes = cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1444 num_points * sizeof(short));
1445 num_points = num_bytes / sizeof(short);
1447 if (cmd->stop_src == TRIG_COUNT) {
1448 devpriv->ao_count -= num_points;
1450 // write data to board's fifo
1451 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes);
1453 // enable dac half-full and empty interrupts
1454 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1455 devpriv->adc_fifo_bits |= DAEMIE | DAHFIE;
1456 #ifdef CB_PCIDAS_DEBUG
1457 rt_printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits);
1459 // enable and clear interrupts
1460 outw(devpriv->adc_fifo_bits | DAEMI | DAHFI,
1461 devpriv->control_status + INT_ADCFIFO);
1464 devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY;
1465 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1466 #ifdef CB_PCIDAS_DEBUG
1467 rt_printk("comedi: sent 0x%x to dac control\n",
1468 devpriv->ao_control_bits);
1470 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1472 async->inttrig = NULL;
1477 static irqreturn_t cb_pcidas_interrupt(int irq, void *d PT_REGS_ARG)
1479 struct comedi_device *dev = (struct comedi_device *) d;
1480 struct comedi_subdevice *s = dev->read_subdev;
1481 comedi_async *async;
1482 int status, s5933_status;
1483 int half_fifo = thisboard->fifo_size / 2;
1484 unsigned int num_samples, i;
1485 static const int timeout = 10000;
1486 unsigned long flags;
1488 if (dev->attached == 0) {
1495 s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1496 #ifdef CB_PCIDAS_DEBUG
1497 rt_printk("intcsr 0x%x\n", s5933_status);
1498 rt_printk("mbef 0x%x\n", inl(devpriv->s5933_config + AMCC_OP_REG_MBEF));
1501 if ((INTCSR_INTR_ASSERTED & s5933_status) == 0)
1504 // make sure mailbox 4 is empty
1505 inl_p(devpriv->s5933_config + AMCC_OP_REG_IMB4);
1506 // clear interrupt on amcc s5933
1507 outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
1508 devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1510 status = inw(devpriv->control_status + INT_ADCFIFO);
1511 #ifdef CB_PCIDAS_DEBUG
1512 if ((status & (INT | EOAI | LADFUL | DAHFI | DAEMI)) == 0) {
1513 comedi_error(dev, "spurious interrupt");
1517 // check for analog output interrupt
1518 if (status & (DAHFI | DAEMI)) {
1519 handle_ao_interrupt(dev, status);
1521 // check for analog input interrupts
1522 // if fifo half-full
1523 if (status & ADHFI) {
1525 num_samples = half_fifo;
1526 if (async->cmd.stop_src == TRIG_COUNT &&
1527 num_samples > devpriv->count) {
1528 num_samples = devpriv->count;
1530 insw(devpriv->adc_fifo + ADCDATA, devpriv->ai_buffer,
1532 cfc_write_array_to_buffer(s, devpriv->ai_buffer,
1533 num_samples * sizeof(short));
1534 devpriv->count -= num_samples;
1535 if (async->cmd.stop_src == TRIG_COUNT && devpriv->count == 0) {
1536 async->events |= COMEDI_CB_EOA;
1537 cb_pcidas_cancel(dev, s);
1539 // clear half-full interrupt latch
1540 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1541 outw(devpriv->adc_fifo_bits | INT,
1542 devpriv->control_status + INT_ADCFIFO);
1543 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1544 // else if fifo not empty
1545 } else if (status & (ADNEI | EOBI)) {
1546 for (i = 0; i < timeout; i++) {
1547 // break if fifo is empty
1548 if ((ADNE & inw(devpriv->control_status +
1551 cfc_write_to_buffer(s, inw(devpriv->adc_fifo));
1552 if (async->cmd.stop_src == TRIG_COUNT && --devpriv->count == 0) { /* end of acquisition */
1553 cb_pcidas_cancel(dev, s);
1554 async->events |= COMEDI_CB_EOA;
1558 // clear not-empty interrupt latch
1559 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1560 outw(devpriv->adc_fifo_bits | INT,
1561 devpriv->control_status + INT_ADCFIFO);
1562 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1563 } else if (status & EOAI) {
1565 "bug! encountered end of aquisition interrupt?");
1566 // clear EOA interrupt latch
1567 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1568 outw(devpriv->adc_fifo_bits | EOAI,
1569 devpriv->control_status + INT_ADCFIFO);
1570 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1572 //check for fifo overflow
1573 if (status & LADFUL) {
1574 comedi_error(dev, "fifo overflow");
1575 // clear overflow interrupt latch
1576 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1577 outw(devpriv->adc_fifo_bits | LADFUL,
1578 devpriv->control_status + INT_ADCFIFO);
1579 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1580 cb_pcidas_cancel(dev, s);
1581 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1584 comedi_event(dev, s);
1589 static void handle_ao_interrupt(struct comedi_device * dev, unsigned int status)
1591 struct comedi_subdevice *s = dev->write_subdev;
1592 comedi_async *async = s->async;
1593 comedi_cmd *cmd = &async->cmd;
1594 unsigned int half_fifo = thisboard->fifo_size / 2;
1595 unsigned int num_points;
1600 if (status & DAEMI) {
1601 // clear dac empty interrupt latch
1602 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1603 outw(devpriv->adc_fifo_bits | DAEMI,
1604 devpriv->control_status + INT_ADCFIFO);
1605 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1606 if (inw(devpriv->ao_registers + DAC_CSR) & DAC_EMPTY) {
1607 if (cmd->stop_src == TRIG_NONE ||
1608 (cmd->stop_src == TRIG_COUNT
1609 && devpriv->ao_count)) {
1610 comedi_error(dev, "dac fifo underflow");
1611 cb_pcidas_ao_cancel(dev, s);
1612 async->events |= COMEDI_CB_ERROR;
1614 async->events |= COMEDI_CB_EOA;
1616 } else if (status & DAHFI) {
1617 unsigned int num_bytes;
1619 // figure out how many points we are writing to fifo
1620 num_points = half_fifo;
1621 if (cmd->stop_src == TRIG_COUNT &&
1622 devpriv->ao_count < num_points)
1623 num_points = devpriv->ao_count;
1625 cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1626 num_points * sizeof(short));
1627 num_points = num_bytes / sizeof(short);
1629 if (async->cmd.stop_src == TRIG_COUNT) {
1630 devpriv->ao_count -= num_points;
1632 // write data to board's fifo
1633 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer,
1635 // clear half-full interrupt latch
1636 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1637 outw(devpriv->adc_fifo_bits | DAHFI,
1638 devpriv->control_status + INT_ADCFIFO);
1639 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1642 comedi_event(dev, s);
1645 // cancel analog input command
1646 static int cb_pcidas_cancel(struct comedi_device * dev, struct comedi_subdevice * s)
1648 unsigned long flags;
1650 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1651 // disable interrupts
1652 devpriv->adc_fifo_bits &= ~INTE & ~EOAIE;
1653 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1654 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1656 // disable start trigger source and burst mode
1657 outw(0, devpriv->control_status + TRIG_CONTSTAT);
1658 // software pacer source
1659 outw(0, devpriv->control_status + ADCMUX_CONT);
1664 // cancel analog output command
1665 static int cb_pcidas_ao_cancel(struct comedi_device * dev, struct comedi_subdevice * s)
1667 unsigned long flags;
1669 comedi_spin_lock_irqsave(&dev->spinlock, flags);
1670 // disable interrupts
1671 devpriv->adc_fifo_bits &= ~DAHFIE & ~DAEMIE;
1672 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1675 devpriv->ao_control_bits &= ~DACEN & ~DAC_PACER_MASK;
1676 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1677 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1682 static void cb_pcidas_load_counters(struct comedi_device * dev, unsigned int *ns,
1685 i8253_cascade_ns_to_timer_2div(TIMER_BASE, &(devpriv->divisor1),
1686 &(devpriv->divisor2), ns, rounding_flags & TRIG_ROUND_MASK);
1688 /* Write the values of ctr1 and ctr2 into counters 1 and 2 */
1689 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 1,
1690 devpriv->divisor1, 2);
1691 i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 2,
1692 devpriv->divisor2, 2);
1695 static void write_calibration_bitstream(struct comedi_device * dev,
1696 unsigned int register_bits, unsigned int bitstream,
1697 unsigned int bitstream_length)
1699 static const int write_delay = 1;
1702 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) {
1703 if (bitstream & bit)
1704 register_bits |= SERIAL_DATA_IN_BIT;
1706 register_bits &= ~SERIAL_DATA_IN_BIT;
1707 comedi_udelay(write_delay);
1708 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1712 static int caldac_8800_write(struct comedi_device * dev, unsigned int address,
1715 static const int num_caldac_channels = 8;
1716 static const int bitstream_length = 11;
1717 unsigned int bitstream = ((address & 0x7) << 8) | value;
1718 static const int caldac_8800_comedi_udelay = 1;
1720 if (address >= num_caldac_channels) {
1721 comedi_error(dev, "illegal caldac channel");
1725 if (value == devpriv->caldac_value[address])
1728 devpriv->caldac_value[address] = value;
1730 write_calibration_bitstream(dev, cal_enable_bits(dev), bitstream,
1733 comedi_udelay(caldac_8800_comedi_udelay);
1734 outw(cal_enable_bits(dev) | SELECT_8800_BIT,
1735 devpriv->control_status + CALIBRATION_REG);
1736 comedi_udelay(caldac_8800_comedi_udelay);
1737 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1742 static int trimpot_7376_write(struct comedi_device * dev, uint8_t value)
1744 static const int bitstream_length = 7;
1745 unsigned int bitstream = value & 0x7f;
1746 unsigned int register_bits;
1747 static const int ad7376_comedi_udelay = 1;
1749 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
1750 comedi_udelay(ad7376_comedi_udelay);
1751 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1753 write_calibration_bitstream(dev, register_bits, bitstream,
1756 comedi_udelay(ad7376_comedi_udelay);
1757 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1764 * ch 1 : adc postgain offset */
1765 static int trimpot_8402_write(struct comedi_device * dev, unsigned int channel,
1768 static const int bitstream_length = 10;
1769 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff);
1770 unsigned int register_bits;
1771 static const int ad8402_comedi_udelay = 1;
1773 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
1774 comedi_udelay(ad8402_comedi_udelay);
1775 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
1777 write_calibration_bitstream(dev, register_bits, bitstream,
1780 comedi_udelay(ad8402_comedi_udelay);
1781 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
1786 static int wait_for_nvram_ready(unsigned long s5933_base_addr)
1788 static const int timeout = 1000;
1791 for (i = 0; i < timeout; i++) {
1792 if ((inb(s5933_base_addr +
1793 AMCC_OP_REG_MCSR_NVCMD) & MCSR_NV_BUSY)
1801 static int nvram_read(struct comedi_device * dev, unsigned int address, uint8_t * data)
1803 unsigned long iobase = devpriv->s5933_config;
1805 if (wait_for_nvram_ready(iobase) < 0)
1808 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_LOW_ADDR,
1809 iobase + AMCC_OP_REG_MCSR_NVCMD);
1810 outb(address & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
1811 outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_HIGH_ADDR,
1812 iobase + AMCC_OP_REG_MCSR_NVCMD);
1813 outb((address >> 8) & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
1814 outb(MCSR_NV_ENABLE | MCSR_NV_READ, iobase + AMCC_OP_REG_MCSR_NVCMD);
1816 if (wait_for_nvram_ready(iobase) < 0)
1819 *data = inb(iobase + AMCC_OP_REG_MCSR_NVDATA);
1825 * A convenient macro that defines init_module() and cleanup_module(),
1828 COMEDI_PCI_INITCLEANUP(driver_cb_pcidas, cb_pcidas_pci_table);