2 * MPC52xx SPI bus driver.
4 * Copyright (C) 2008 Secret Lab Technologies Ltd.
6 * This file is released under the GPLv2
8 * This is the driver for the MPC5200's dedicated SPI controller.
10 * Note: this driver does not support the MPC5200 PSC in SPI mode. For
11 * that driver see drivers/spi/mpc52xx_psc_spi.c
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/of_platform.h>
18 #include <linux/interrupt.h>
19 #include <linux/delay.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/mpc52xx_spi.h>
22 #include <linux/of_spi.h>
24 #include <linux/of_gpio.h>
26 #include <asm/mpc52xx.h>
28 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
29 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
30 MODULE_LICENSE("GPL");
32 /* Register offsets */
33 #define SPI_CTRL1 0x00
34 #define SPI_CTRL1_SPIE (1 << 7)
35 #define SPI_CTRL1_SPE (1 << 6)
36 #define SPI_CTRL1_MSTR (1 << 4)
37 #define SPI_CTRL1_CPOL (1 << 3)
38 #define SPI_CTRL1_CPHA (1 << 2)
39 #define SPI_CTRL1_SSOE (1 << 1)
40 #define SPI_CTRL1_LSBFE (1 << 0)
42 #define SPI_CTRL2 0x01
45 #define SPI_STATUS 0x05
46 #define SPI_STATUS_SPIF (1 << 7)
47 #define SPI_STATUS_WCOL (1 << 6)
48 #define SPI_STATUS_MODF (1 << 4)
51 #define SPI_PORTDATA 0x0d
52 #define SPI_DATADIR 0x10
54 /* FSM state return values */
55 #define FSM_STOP 0 /* Nothing more for the state machine to */
56 /* do. If something interesting happens */
57 /* then and IRQ will be received */
58 #define FSM_POLL 1 /* need to poll for completion, an IRQ is */
60 #define FSM_CONTINUE 2 /* Keep iterating the state machine */
62 /* Driver internal data */
64 struct spi_master *master;
67 int irq0; /* MODF irq */
68 int irq1; /* SPIF irq */
75 u32 wcol_tx_timestamp;
79 struct list_head queue; /* queue of pending messages */
81 struct work_struct work;
83 /* Details of current transfer (length, and buffer pointers) */
84 struct spi_message *message; /* current message */
85 struct spi_transfer *transfer; /* current transfer */
86 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
93 unsigned int *gpio_cs;
99 static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
103 if (ms->gpio_cs_count > 0) {
104 cs = ms->message->spi->chip_select;
105 gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1);
107 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
111 * Start a new transfer. This is called both by the idle state
112 * for the first transfer in a message, and by the wait state when the
113 * previous transfer in a message is complete.
115 static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
117 ms->rx_buf = ms->transfer->rx_buf;
118 ms->tx_buf = ms->transfer->tx_buf;
119 ms->len = ms->transfer->len;
121 /* Activate the chip select */
123 mpc52xx_spi_chipsel(ms, 1);
124 ms->cs_change = ms->transfer->cs_change;
126 /* Write out the first byte */
127 ms->wcol_tx_timestamp = get_tbl();
129 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
131 out_8(ms->regs + SPI_DATA, 0);
134 /* Forward declaration of state handlers */
135 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
137 static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
143 * No transfers are in progress; if another transfer is pending then retrieve
144 * it and kick it off. Otherwise, stop processing the state machine
147 mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
149 struct spi_device *spi;
153 if (status && (irq != NO_IRQ))
154 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
157 /* Check if there is another transfer waiting. */
158 if (list_empty(&ms->queue))
161 /* get the head of the queue */
162 ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
163 list_del_init(&ms->message->queue);
165 /* Setup the controller parameters */
166 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
167 spi = ms->message->spi;
168 if (spi->mode & SPI_CPHA)
169 ctrl1 |= SPI_CTRL1_CPHA;
170 if (spi->mode & SPI_CPOL)
171 ctrl1 |= SPI_CTRL1_CPOL;
172 if (spi->mode & SPI_LSB_FIRST)
173 ctrl1 |= SPI_CTRL1_LSBFE;
174 out_8(ms->regs + SPI_CTRL1, ctrl1);
176 /* Setup the controller speed */
177 /* minimum divider is '2'. Also, add '1' to force rounding the
179 sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
183 while (((sppr - 1) & ~0x7) != 0) {
184 sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
187 sppr--; /* sppr quantity in register is offset by 1 */
189 /* Don't overrun limits of SPI baudrate register */
193 out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
196 ms->transfer = container_of(ms->message->transfers.next,
197 struct spi_transfer, transfer_list);
199 mpc52xx_spi_start_transfer(ms);
200 ms->state = mpc52xx_spi_fsmstate_transfer;
208 * In the middle of a transfer. If the SPI core has completed processing
209 * a byte, then read out the received data and write out the next byte
210 * (unless this transfer is finished; in which case go on to the wait
213 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
217 return ms->irq0 ? FSM_STOP : FSM_POLL;
219 if (status & SPI_STATUS_WCOL) {
220 /* The SPI controller is stoopid. At slower speeds, it may
221 * raise the SPIF flag before the state machine is actually
222 * finished, which causes a collision (internal to the state
223 * machine only). The manual recommends inserting a delay
224 * between receiving the interrupt and sending the next byte,
225 * but it can also be worked around simply by retrying the
226 * transfer which is what we do here. */
228 ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
229 ms->wcol_tx_timestamp = get_tbl();
232 data = *(ms->tx_buf-1);
233 out_8(ms->regs + SPI_DATA, data); /* try again */
235 } else if (status & SPI_STATUS_MODF) {
237 dev_err(&ms->master->dev, "mode fault\n");
238 mpc52xx_spi_chipsel(ms, 0);
239 ms->message->status = -EIO;
240 ms->message->complete(ms->message->context);
241 ms->state = mpc52xx_spi_fsmstate_idle;
245 /* Read data out of the spi device */
248 *ms->rx_buf++ = data;
250 /* Is the transfer complete? */
253 ms->timestamp = get_tbl();
254 ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
255 ms->state = mpc52xx_spi_fsmstate_wait;
259 /* Write out the next byte */
260 ms->wcol_tx_timestamp = get_tbl();
262 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
264 out_8(ms->regs + SPI_DATA, 0);
272 * A transfer has completed; need to wait for the delay period to complete
273 * before starting the next transfer
276 mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
279 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
282 if (((int)get_tbl()) - ms->timestamp < 0)
285 ms->message->actual_length += ms->transfer->len;
287 /* Check if there is another transfer in this message. If there
288 * aren't then deactivate CS, notify sender, and drop back to idle
289 * to start the next message. */
290 if (ms->transfer->transfer_list.next == &ms->message->transfers) {
292 mpc52xx_spi_chipsel(ms, 0);
293 ms->message->status = 0;
294 ms->message->complete(ms->message->context);
295 ms->state = mpc52xx_spi_fsmstate_idle;
299 /* There is another transfer; kick it off */
302 mpc52xx_spi_chipsel(ms, 0);
304 ms->transfer = container_of(ms->transfer->transfer_list.next,
305 struct spi_transfer, transfer_list);
306 mpc52xx_spi_start_transfer(ms);
307 ms->state = mpc52xx_spi_fsmstate_transfer;
312 * mpc52xx_spi_fsm_process - Finite State Machine iteration function
313 * @irq: irq number that triggered the FSM or 0 for polling
314 * @ms: pointer to mpc52xx_spi driver data
316 static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
318 int rc = FSM_CONTINUE;
321 while (rc == FSM_CONTINUE) {
322 /* Interrupt cleared by read of STATUS followed by
323 * read of DATA registers */
324 status = in_8(ms->regs + SPI_STATUS);
325 data = in_8(ms->regs + SPI_DATA);
326 rc = ms->state(irq, ms, status, data);
330 schedule_work(&ms->work);
334 * mpc52xx_spi_irq - IRQ handler
336 static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
338 struct mpc52xx_spi *ms = _ms;
339 spin_lock(&ms->lock);
340 mpc52xx_spi_fsm_process(irq, ms);
341 spin_unlock(&ms->lock);
346 * mpc52xx_spi_wq - Workqueue function for polling the state machine
348 static void mpc52xx_spi_wq(struct work_struct *work)
350 struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
353 spin_lock_irqsave(&ms->lock, flags);
354 mpc52xx_spi_fsm_process(0, ms);
355 spin_unlock_irqrestore(&ms->lock, flags);
362 static int mpc52xx_spi_setup(struct spi_device *spi)
364 if (spi->bits_per_word % 8)
367 if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
370 if (spi->chip_select >= spi->master->num_chipselect)
376 static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
378 struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
381 m->actual_length = 0;
382 m->status = -EINPROGRESS;
384 spin_lock_irqsave(&ms->lock, flags);
385 list_add_tail(&m->queue, &ms->queue);
386 spin_unlock_irqrestore(&ms->lock, flags);
387 schedule_work(&ms->work);
393 * OF Platform Bus Binding
395 static int __devinit mpc52xx_spi_probe(struct of_device *op,
396 const struct of_device_id *match)
398 struct spi_master *master;
399 struct mpc52xx_spi *ms;
406 dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
407 regs = of_iomap(op->node, 0);
411 /* initialize the device */
412 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
413 out_8(regs + SPI_CTRL1, ctrl1);
414 out_8(regs + SPI_CTRL2, 0x0);
415 out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
416 out_8(regs + SPI_PORTDATA, 0x8); /* Deassert /SS signal */
418 /* Clear the status register and re-read it to check for a MODF
419 * failure. This driver cannot currently handle multiple masters
420 * on the SPI bus. This fault will also occur if the SPI signals
421 * are not connected to any pins (port_config setting) */
422 in_8(regs + SPI_STATUS);
423 out_8(regs + SPI_CTRL1, ctrl1);
425 in_8(regs + SPI_DATA);
426 if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
427 dev_err(&op->dev, "mode fault; is port_config correct?\n");
432 dev_dbg(&op->dev, "allocating spi_master struct\n");
433 master = spi_alloc_master(&op->dev, sizeof *ms);
439 master->bus_num = -1;
440 master->setup = mpc52xx_spi_setup;
441 master->transfer = mpc52xx_spi_transfer;
442 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
444 dev_set_drvdata(&op->dev, master);
446 ms = spi_master_get_devdata(master);
449 ms->irq0 = irq_of_parse_and_map(op->node, 0);
450 ms->irq1 = irq_of_parse_and_map(op->node, 1);
451 ms->state = mpc52xx_spi_fsmstate_idle;
452 ms->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
453 ms->gpio_cs_count = of_gpio_count(op->node);
454 if (ms->gpio_cs_count > 0) {
455 master->num_chipselect = ms->gpio_cs_count;
456 ms->gpio_cs = kmalloc(ms->gpio_cs_count * sizeof(unsigned int),
463 for (i = 0; i < ms->gpio_cs_count; i++) {
464 gpio_cs = of_get_gpio(op->node, i);
467 "could not parse the gpio field "
473 rc = gpio_request(gpio_cs, dev_name(&op->dev));
476 "can't request spi cs gpio #%d "
477 "on gpio line %d\n", i, gpio_cs);
481 gpio_direction_output(gpio_cs, 1);
482 ms->gpio_cs[i] = gpio_cs;
485 master->num_chipselect = 1;
487 spin_lock_init(&ms->lock);
488 INIT_LIST_HEAD(&ms->queue);
489 INIT_WORK(&ms->work, mpc52xx_spi_wq);
491 /* Decide if interrupts can be used */
492 if (ms->irq0 && ms->irq1) {
493 rc = request_irq(ms->irq0, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
494 "mpc5200-spi-modf", ms);
495 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
496 "mpc5200-spi-spiF", ms);
498 free_irq(ms->irq0, ms);
499 free_irq(ms->irq1, ms);
500 ms->irq0 = ms->irq1 = 0;
503 /* operate in polled mode */
504 ms->irq0 = ms->irq1 = 0;
508 dev_info(&op->dev, "using polled mode\n");
510 dev_dbg(&op->dev, "registering spi_master struct\n");
511 rc = spi_register_master(master);
515 of_register_spi_devices(master, op->node);
516 dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
521 dev_err(&ms->master->dev, "initialization failed\n");
522 spi_master_put(master);
525 gpio_free(ms->gpio_cs[i]);
527 if (ms->gpio_cs != NULL)
535 static int __devexit mpc52xx_spi_remove(struct of_device *op)
537 struct spi_master *master = dev_get_drvdata(&op->dev);
538 struct mpc52xx_spi *ms = spi_master_get_devdata(master);
541 free_irq(ms->irq0, ms);
542 free_irq(ms->irq1, ms);
544 for (i = 0; i < ms->gpio_cs_count; i++)
545 gpio_free(ms->gpio_cs[i]);
547 if (ms->gpio_cs != NULL)
550 spi_unregister_master(master);
551 spi_master_put(master);
557 static struct of_device_id mpc52xx_spi_match[] __devinitdata = {
558 { .compatible = "fsl,mpc5200-spi", },
561 MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
563 static struct of_platform_driver mpc52xx_spi_of_driver = {
564 .owner = THIS_MODULE,
565 .name = "mpc52xx-spi",
566 .match_table = mpc52xx_spi_match,
567 .probe = mpc52xx_spi_probe,
568 .remove = __exit_p(mpc52xx_spi_remove),
571 static int __init mpc52xx_spi_init(void)
573 return of_register_platform_driver(&mpc52xx_spi_of_driver);
575 module_init(mpc52xx_spi_init);
577 static void __exit mpc52xx_spi_exit(void)
579 of_unregister_platform_driver(&mpc52xx_spi_of_driver);
581 module_exit(mpc52xx_spi_exit);