2 * MPC52xx SPI bus driver.
4 * Copyright (C) 2008 Secret Lab Technologies Ltd.
6 * This file is released under the GPLv2
8 * This is the driver for the MPC5200's dedicated SPI controller.
10 * Note: this driver does not support the MPC5200 PSC in SPI mode. For
11 * that driver see drivers/spi/mpc52xx_psc_spi.c
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/errno.h>
17 #include <linux/of_platform.h>
18 #include <linux/interrupt.h>
19 #include <linux/delay.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/mpc52xx_spi.h>
22 #include <linux/of_spi.h>
25 #include <asm/mpc52xx.h>
27 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
28 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
29 MODULE_LICENSE("GPL");
31 /* Register offsets */
32 #define SPI_CTRL1 0x00
33 #define SPI_CTRL1_SPIE (1 << 7)
34 #define SPI_CTRL1_SPE (1 << 6)
35 #define SPI_CTRL1_MSTR (1 << 4)
36 #define SPI_CTRL1_CPOL (1 << 3)
37 #define SPI_CTRL1_CPHA (1 << 2)
38 #define SPI_CTRL1_SSOE (1 << 1)
39 #define SPI_CTRL1_LSBFE (1 << 0)
41 #define SPI_CTRL2 0x01
44 #define SPI_STATUS 0x05
45 #define SPI_STATUS_SPIF (1 << 7)
46 #define SPI_STATUS_WCOL (1 << 6)
47 #define SPI_STATUS_MODF (1 << 4)
50 #define SPI_PORTDATA 0x0d
51 #define SPI_DATADIR 0x10
53 /* FSM state return values */
54 #define FSM_STOP 0 /* Nothing more for the state machine to */
55 /* do. If something interesting happens */
56 /* then and IRQ will be received */
57 #define FSM_POLL 1 /* need to poll for completion, an IRQ is */
59 #define FSM_CONTINUE 2 /* Keep iterating the state machine */
61 /* Driver internal data */
63 struct spi_master *master;
66 int irq0; /* MODF irq */
67 int irq1; /* SPIF irq */
74 u32 wcol_tx_timestamp;
78 struct list_head queue; /* queue of pending messages */
80 struct work_struct work;
83 /* Details of current transfer (length, and buffer pointers) */
84 struct spi_message *message; /* current message */
85 struct spi_transfer *transfer; /* current transfer */
86 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
97 static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
99 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
103 * Start a new transfer. This is called both by the idle state
104 * for the first transfer in a message, and by the wait state when the
105 * previous transfer in a message is complete.
107 static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
109 ms->rx_buf = ms->transfer->rx_buf;
110 ms->tx_buf = ms->transfer->tx_buf;
111 ms->len = ms->transfer->len;
113 /* Activate the chip select */
115 mpc52xx_spi_chipsel(ms, 1);
116 ms->cs_change = ms->transfer->cs_change;
118 /* Write out the first byte */
119 ms->wcol_tx_timestamp = get_tbl();
121 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
123 out_8(ms->regs + SPI_DATA, 0);
126 /* Forward declaration of state handlers */
127 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
129 static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
135 * No transfers are in progress; if another transfer is pending then retrieve
136 * it and kick it off. Otherwise, stop processing the state machine
139 mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
141 struct spi_device *spi;
145 if (status && (irq != NO_IRQ))
146 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
149 /* Check if there is another transfer waiting. */
150 if (list_empty(&ms->queue))
153 /* get the head of the queue */
154 ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
155 list_del_init(&ms->message->queue);
157 /* Setup the controller parameters */
158 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
159 spi = ms->message->spi;
160 if (spi->mode & SPI_CPHA)
161 ctrl1 |= SPI_CTRL1_CPHA;
162 if (spi->mode & SPI_CPOL)
163 ctrl1 |= SPI_CTRL1_CPOL;
164 if (spi->mode & SPI_LSB_FIRST)
165 ctrl1 |= SPI_CTRL1_LSBFE;
166 out_8(ms->regs + SPI_CTRL1, ctrl1);
168 /* Setup the controller speed */
169 /* minimum divider is '2'. Also, add '1' to force rounding the
171 sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
175 while (((sppr - 1) & ~0x7) != 0) {
176 sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
179 sppr--; /* sppr quantity in register is offset by 1 */
181 /* Don't overrun limits of SPI baudrate register */
185 out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
188 ms->transfer = container_of(ms->message->transfers.next,
189 struct spi_transfer, transfer_list);
191 mpc52xx_spi_start_transfer(ms);
192 ms->state = mpc52xx_spi_fsmstate_transfer;
200 * In the middle of a transfer. If the SPI core has completed processing
201 * a byte, then read out the received data and write out the next byte
202 * (unless this transfer is finished; in which case go on to the wait
205 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
209 return ms->irq0 ? FSM_STOP : FSM_POLL;
211 if (status & SPI_STATUS_WCOL) {
212 /* The SPI controller is stoopid. At slower speeds, it may
213 * raise the SPIF flag before the state machine is actually
214 * finished, which causes a collision (internal to the state
215 * machine only). The manual recommends inserting a delay
216 * between receiving the interrupt and sending the next byte,
217 * but it can also be worked around simply by retrying the
218 * transfer which is what we do here. */
220 ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
221 ms->wcol_tx_timestamp = get_tbl();
224 data = *(ms->tx_buf-1);
225 out_8(ms->regs + SPI_DATA, data); /* try again */
227 } else if (status & SPI_STATUS_MODF) {
229 dev_err(&ms->master->dev, "mode fault\n");
230 mpc52xx_spi_chipsel(ms, 0);
231 ms->message->status = -EIO;
232 ms->message->complete(ms->message->context);
233 ms->state = mpc52xx_spi_fsmstate_idle;
237 /* Read data out of the spi device */
240 *ms->rx_buf++ = data;
242 /* Is the transfer complete? */
245 ms->timestamp = get_tbl();
246 ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
247 ms->state = mpc52xx_spi_fsmstate_wait;
251 /* Write out the next byte */
252 ms->wcol_tx_timestamp = get_tbl();
254 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
256 out_8(ms->regs + SPI_DATA, 0);
264 * A transfer has completed; need to wait for the delay period to complete
265 * before starting the next transfer
268 mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
271 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
274 if (((int)get_tbl()) - ms->timestamp < 0)
277 ms->message->actual_length += ms->transfer->len;
279 /* Check if there is another transfer in this message. If there
280 * aren't then deactivate CS, notify sender, and drop back to idle
281 * to start the next message. */
282 if (ms->transfer->transfer_list.next == &ms->message->transfers) {
284 mpc52xx_spi_chipsel(ms, 0);
285 ms->message->status = 0;
286 ms->message->complete(ms->message->context);
287 ms->state = mpc52xx_spi_fsmstate_idle;
291 /* There is another transfer; kick it off */
294 mpc52xx_spi_chipsel(ms, 0);
296 ms->transfer = container_of(ms->transfer->transfer_list.next,
297 struct spi_transfer, transfer_list);
298 mpc52xx_spi_start_transfer(ms);
299 ms->state = mpc52xx_spi_fsmstate_transfer;
304 * mpc52xx_spi_fsm_process - Finite State Machine iteration function
305 * @irq: irq number that triggered the FSM or 0 for polling
306 * @ms: pointer to mpc52xx_spi driver data
308 static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
310 int rc = FSM_CONTINUE;
313 while (rc == FSM_CONTINUE) {
314 /* Interrupt cleared by read of STATUS followed by
315 * read of DATA registers */
316 status = in_8(ms->regs + SPI_STATUS);
317 data = in_8(ms->regs + SPI_DATA);
318 rc = ms->state(irq, ms, status, data);
322 schedule_work(&ms->work);
326 * mpc52xx_spi_irq - IRQ handler
328 static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
330 struct mpc52xx_spi *ms = _ms;
331 spin_lock(&ms->lock);
332 mpc52xx_spi_fsm_process(irq, ms);
333 spin_unlock(&ms->lock);
338 * mpc52xx_spi_wq - Workqueue function for polling the state machine
340 static void mpc52xx_spi_wq(struct work_struct *work)
342 struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
345 spin_lock_irqsave(&ms->lock, flags);
346 mpc52xx_spi_fsm_process(0, ms);
347 spin_unlock_irqrestore(&ms->lock, flags);
354 static int mpc52xx_spi_setup(struct spi_device *spi)
356 if (spi->bits_per_word % 8)
359 if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
362 if (spi->chip_select >= spi->master->num_chipselect)
368 static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
370 struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
373 m->actual_length = 0;
374 m->status = -EINPROGRESS;
376 spin_lock_irqsave(&ms->lock, flags);
377 list_add_tail(&m->queue, &ms->queue);
378 spin_unlock_irqrestore(&ms->lock, flags);
379 schedule_work(&ms->work);
385 * OF Platform Bus Binding
387 static int __devinit mpc52xx_spi_probe(struct of_device *op,
388 const struct of_device_id *match)
390 struct spi_master *master;
391 struct mpc52xx_spi *ms;
397 dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
398 regs = of_iomap(op->node, 0);
402 /* initialize the device */
403 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
404 out_8(regs + SPI_CTRL1, ctrl1);
405 out_8(regs + SPI_CTRL2, 0x0);
406 out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
407 out_8(regs + SPI_PORTDATA, 0x8); /* Deassert /SS signal */
409 /* Clear the status register and re-read it to check for a MODF
410 * failure. This driver cannot currently handle multiple masters
411 * on the SPI bus. This fault will also occur if the SPI signals
412 * are not connected to any pins (port_config setting) */
413 in_8(regs + SPI_STATUS);
414 out_8(regs + SPI_CTRL1, ctrl1);
416 in_8(regs + SPI_DATA);
417 if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
418 dev_err(&op->dev, "mode fault; is port_config correct?\n");
423 dev_dbg(&op->dev, "allocating spi_master struct\n");
424 master = spi_alloc_master(&op->dev, sizeof *ms);
429 master->bus_num = -1;
430 master->num_chipselect = 1;
431 master->setup = mpc52xx_spi_setup;
432 master->transfer = mpc52xx_spi_transfer;
433 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
435 dev_set_drvdata(&op->dev, master);
437 ms = spi_master_get_devdata(master);
440 ms->irq0 = irq_of_parse_and_map(op->node, 0);
441 ms->irq1 = irq_of_parse_and_map(op->node, 1);
442 ms->state = mpc52xx_spi_fsmstate_idle;
443 ms->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
444 spin_lock_init(&ms->lock);
445 INIT_LIST_HEAD(&ms->queue);
446 INIT_WORK(&ms->work, mpc52xx_spi_wq);
448 /* Decide if interrupts can be used */
449 if (ms->irq0 && ms->irq1) {
450 rc = request_irq(ms->irq0, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
451 "mpc5200-spi-modf", ms);
452 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
453 "mpc5200-spi-spiF", ms);
455 free_irq(ms->irq0, ms);
456 free_irq(ms->irq1, ms);
457 ms->irq0 = ms->irq1 = 0;
460 /* operate in polled mode */
461 ms->irq0 = ms->irq1 = 0;
465 dev_info(&op->dev, "using polled mode\n");
467 dev_dbg(&op->dev, "registering spi_master struct\n");
468 rc = spi_register_master(master);
472 of_register_spi_devices(master, op->node);
473 dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
478 dev_err(&ms->master->dev, "initialization failed\n");
479 spi_master_put(master);
486 static int __devexit mpc52xx_spi_remove(struct of_device *op)
488 struct spi_master *master = dev_get_drvdata(&op->dev);
489 struct mpc52xx_spi *ms = spi_master_get_devdata(master);
491 free_irq(ms->irq0, ms);
492 free_irq(ms->irq1, ms);
494 spi_unregister_master(master);
495 spi_master_put(master);
501 static struct of_device_id mpc52xx_spi_match[] __devinitdata = {
502 { .compatible = "fsl,mpc5200-spi", },
505 MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
507 static struct of_platform_driver mpc52xx_spi_of_driver = {
508 .owner = THIS_MODULE,
509 .name = "mpc52xx-spi",
510 .match_table = mpc52xx_spi_match,
511 .probe = mpc52xx_spi_probe,
512 .remove = __exit_p(mpc52xx_spi_remove),
515 static int __init mpc52xx_spi_init(void)
517 return of_register_platform_driver(&mpc52xx_spi_of_driver);
519 module_init(mpc52xx_spi_init);
521 static void __exit mpc52xx_spi_exit(void)
523 of_unregister_platform_driver(&mpc52xx_spi_of_driver);
525 module_exit(mpc52xx_spi_exit);