2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
9 * based off of the old drivers/char/sh-sci.c by:
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
53 #include <asm/clock.h>
54 #include <asm/sh_bios.h>
60 struct uart_port port;
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs[SCIx_NR_IRQS];
68 /* Port enable callback */
69 void (*enable)(struct uart_port *port);
71 /* Port disable callback */
72 void (*disable)(struct uart_port *port);
75 struct timer_list break_timer;
78 #ifdef CONFIG_HAVE_CLK
84 struct list_head node;
89 struct list_head ports;
91 #ifdef CONFIG_HAVE_CLK
92 struct notifier_block clk_nb;
96 /* Function prototypes */
97 static void sci_stop_tx(struct uart_port *port);
99 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
101 static struct sci_port sci_ports[SCI_NPORTS];
102 static struct uart_driver sci_uart_driver;
104 static inline struct sci_port *
105 to_sci_port(struct uart_port *uart)
107 return container_of(uart, struct sci_port, port);
110 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
112 #ifdef CONFIG_CONSOLE_POLL
113 static inline void handle_error(struct uart_port *port)
115 /* Clear error flags */
116 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
119 static int sci_poll_get_char(struct uart_port *port)
121 unsigned short status;
125 status = sci_in(port, SCxSR);
126 if (status & SCxSR_ERRORS(port)) {
130 } while (!(status & SCxSR_RDxF(port)));
132 c = sci_in(port, SCxRDR);
136 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
142 static void sci_poll_put_char(struct uart_port *port, unsigned char c)
144 unsigned short status;
147 status = sci_in(port, SCxSR);
148 } while (!(status & SCxSR_TDxE(port)));
150 sci_in(port, SCxSR); /* Dummy read */
151 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
152 sci_out(port, SCxTDR, c);
154 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
156 #if defined(__H8300S__)
157 enum { sci_disable, sci_enable };
159 static void h8300_sci_config(struct uart_port *port, unsigned int ctrl)
161 volatile unsigned char *mstpcrl = (volatile unsigned char *)MSTPCRL;
162 int ch = (port->mapbase - SMR0) >> 3;
163 unsigned char mask = 1 << (ch+1);
165 if (ctrl == sci_disable)
171 static void h8300_sci_enable(struct uart_port *port)
173 h8300_sci_config(port, sci_enable);
176 static void h8300_sci_disable(struct uart_port *port)
178 h8300_sci_config(port, sci_disable);
182 #if defined(__H8300H__) || defined(__H8300S__)
183 static void sci_init_pins(struct uart_port *port, unsigned int cflag)
185 int ch = (port->mapbase - SMR0) >> 3;
188 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
189 h8300_sci_pins[ch].rx,
191 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
192 h8300_sci_pins[ch].tx,
196 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
198 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
199 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
201 if (port->mapbase == 0xA4400000) {
202 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
203 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
204 } else if (port->mapbase == 0xA4410000)
205 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
207 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
208 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
212 if (cflag & CRTSCTS) {
214 if (port->mapbase == 0xa4430000) { /* SCIF0 */
215 /* Clear PTCR bit 9-2; enable all scif pins but sck */
216 data = __raw_readw(PORT_PTCR);
217 __raw_writew((data & 0xfc03), PORT_PTCR);
218 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
219 /* Clear PVCR bit 9-2 */
220 data = __raw_readw(PORT_PVCR);
221 __raw_writew((data & 0xfc03), PORT_PVCR);
224 if (port->mapbase == 0xa4430000) { /* SCIF0 */
225 /* Clear PTCR bit 5-2; enable only tx and rx */
226 data = __raw_readw(PORT_PTCR);
227 __raw_writew((data & 0xffc3), PORT_PTCR);
228 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
229 /* Clear PVCR bit 5-2 */
230 data = __raw_readw(PORT_PVCR);
231 __raw_writew((data & 0xffc3), PORT_PVCR);
235 #elif defined(CONFIG_CPU_SH3)
236 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
237 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
241 /* We need to set SCPCR to enable RTS/CTS */
242 data = __raw_readw(SCPCR);
243 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
244 __raw_writew(data & 0x0fcf, SCPCR);
246 if (!(cflag & CRTSCTS)) {
247 /* We need to set SCPCR to enable RTS/CTS */
248 data = __raw_readw(SCPCR);
249 /* Clear out SCP7MD1,0, SCP4MD1,0,
250 Set SCP6MD1,0 = {01} (output) */
251 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
253 data = ctrl_inb(SCPDR);
254 /* Set /RTS2 (bit6) = 0 */
255 ctrl_outb(data & 0xbf, SCPDR);
258 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
259 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
263 if (port->mapbase == 0xffe00000) {
264 data = __raw_readw(PSCR);
266 if (!(cflag & CRTSCTS))
269 __raw_writew(data, PSCR);
272 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
273 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
274 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
275 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
276 defined(CONFIG_CPU_SUBTYPE_SHX3)
277 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
279 if (!(cflag & CRTSCTS))
280 __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
282 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
283 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
285 if (!(cflag & CRTSCTS))
286 __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
289 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
295 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
296 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
297 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
298 defined(CONFIG_CPU_SUBTYPE_SH7786)
299 static inline int scif_txroom(struct uart_port *port)
301 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
304 static inline int scif_rxroom(struct uart_port *port)
306 return sci_in(port, SCRFDR) & 0xff;
308 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
309 static inline int scif_txroom(struct uart_port *port)
311 if ((port->mapbase == 0xffe00000) ||
312 (port->mapbase == 0xffe08000)) {
314 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
317 return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
321 static inline int scif_rxroom(struct uart_port *port)
323 if ((port->mapbase == 0xffe00000) ||
324 (port->mapbase == 0xffe08000)) {
326 return sci_in(port, SCRFDR) & 0xff;
329 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
333 static inline int scif_txroom(struct uart_port *port)
335 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
338 static inline int scif_rxroom(struct uart_port *port)
340 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
344 static inline int sci_txroom(struct uart_port *port)
346 return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
349 static inline int sci_rxroom(struct uart_port *port)
351 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
354 /* ********************************************************************** *
355 * the interrupt related routines *
356 * ********************************************************************** */
358 static void sci_transmit_chars(struct uart_port *port)
360 struct circ_buf *xmit = &port->info->xmit;
361 unsigned int stopped = uart_tx_stopped(port);
362 unsigned short status;
366 status = sci_in(port, SCxSR);
367 if (!(status & SCxSR_TDxE(port))) {
368 ctrl = sci_in(port, SCSCR);
369 if (uart_circ_empty(xmit))
370 ctrl &= ~SCI_CTRL_FLAGS_TIE;
372 ctrl |= SCI_CTRL_FLAGS_TIE;
373 sci_out(port, SCSCR, ctrl);
377 if (port->type == PORT_SCI)
378 count = sci_txroom(port);
380 count = scif_txroom(port);
388 } else if (!uart_circ_empty(xmit) && !stopped) {
389 c = xmit->buf[xmit->tail];
390 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
395 sci_out(port, SCxTDR, c);
398 } while (--count > 0);
400 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
402 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
403 uart_write_wakeup(port);
404 if (uart_circ_empty(xmit)) {
407 ctrl = sci_in(port, SCSCR);
409 if (port->type != PORT_SCI) {
410 sci_in(port, SCxSR); /* Dummy read */
411 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
414 ctrl |= SCI_CTRL_FLAGS_TIE;
415 sci_out(port, SCSCR, ctrl);
419 /* On SH3, SCIF may read end-of-break as a space->mark char */
420 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
422 static inline void sci_receive_chars(struct uart_port *port)
424 struct sci_port *sci_port = to_sci_port(port);
425 struct tty_struct *tty = port->info->port.tty;
426 int i, count, copied = 0;
427 unsigned short status;
430 status = sci_in(port, SCxSR);
431 if (!(status & SCxSR_RDxF(port)))
435 if (port->type == PORT_SCI)
436 count = sci_rxroom(port);
438 count = scif_rxroom(port);
440 /* Don't copy more bytes than there is room for in the buffer */
441 count = tty_buffer_request_room(tty, count);
443 /* If for any reason we can't copy more data, we're done! */
447 if (port->type == PORT_SCI) {
448 char c = sci_in(port, SCxRDR);
449 if (uart_handle_sysrq_char(port, c) ||
450 sci_port->break_flag)
453 tty_insert_flip_char(tty, c, TTY_NORMAL);
455 for (i = 0; i < count; i++) {
456 char c = sci_in(port, SCxRDR);
457 status = sci_in(port, SCxSR);
458 #if defined(CONFIG_CPU_SH3)
459 /* Skip "chars" during break */
460 if (sci_port->break_flag) {
462 (status & SCxSR_FER(port))) {
467 /* Nonzero => end-of-break */
468 dev_dbg(port->dev, "debounce<%02x>\n", c);
469 sci_port->break_flag = 0;
476 #endif /* CONFIG_CPU_SH3 */
477 if (uart_handle_sysrq_char(port, c)) {
482 /* Store data and status */
483 if (status&SCxSR_FER(port)) {
485 dev_notice(port->dev, "frame error\n");
486 } else if (status&SCxSR_PER(port)) {
488 dev_notice(port->dev, "parity error\n");
492 tty_insert_flip_char(tty, c, flag);
496 sci_in(port, SCxSR); /* dummy read */
497 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
500 port->icount.rx += count;
504 /* Tell the rest of the system the news. New characters! */
505 tty_flip_buffer_push(tty);
507 sci_in(port, SCxSR); /* dummy read */
508 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
512 #define SCI_BREAK_JIFFIES (HZ/20)
513 /* The sci generates interrupts during the break,
514 * 1 per millisecond or so during the break period, for 9600 baud.
515 * So dont bother disabling interrupts.
516 * But dont want more than 1 break event.
517 * Use a kernel timer to periodically poll the rx line until
518 * the break is finished.
520 static void sci_schedule_break_timer(struct sci_port *port)
522 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
523 add_timer(&port->break_timer);
525 /* Ensure that two consecutive samples find the break over. */
526 static void sci_break_timer(unsigned long data)
528 struct sci_port *port = (struct sci_port *)data;
530 if (sci_rxd_in(&port->port) == 0) {
531 port->break_flag = 1;
532 sci_schedule_break_timer(port);
533 } else if (port->break_flag == 1) {
535 port->break_flag = 2;
536 sci_schedule_break_timer(port);
538 port->break_flag = 0;
541 static inline int sci_handle_errors(struct uart_port *port)
544 unsigned short status = sci_in(port, SCxSR);
545 struct tty_struct *tty = port->info->port.tty;
547 if (status & SCxSR_ORER(port)) {
549 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
552 dev_notice(port->dev, "overrun error");
555 if (status & SCxSR_FER(port)) {
556 if (sci_rxd_in(port) == 0) {
557 /* Notify of BREAK */
558 struct sci_port *sci_port = to_sci_port(port);
560 if (!sci_port->break_flag) {
561 sci_port->break_flag = 1;
562 sci_schedule_break_timer(sci_port);
564 /* Do sysrq handling. */
565 if (uart_handle_break(port))
568 dev_dbg(port->dev, "BREAK detected\n");
570 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
576 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
579 dev_notice(port->dev, "frame error\n");
583 if (status & SCxSR_PER(port)) {
585 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
588 dev_notice(port->dev, "parity error");
592 tty_flip_buffer_push(tty);
597 static inline int sci_handle_fifo_overrun(struct uart_port *port)
599 struct tty_struct *tty = port->info->port.tty;
602 if (port->type != PORT_SCIF)
605 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
606 sci_out(port, SCLSR, 0);
608 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
609 tty_flip_buffer_push(tty);
611 dev_notice(port->dev, "overrun error\n");
618 static inline int sci_handle_breaks(struct uart_port *port)
621 unsigned short status = sci_in(port, SCxSR);
622 struct tty_struct *tty = port->info->port.tty;
623 struct sci_port *s = to_sci_port(port);
625 if (uart_handle_break(port))
628 if (!s->break_flag && status & SCxSR_BRK(port)) {
629 #if defined(CONFIG_CPU_SH3)
633 /* Notify of BREAK */
634 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
637 dev_dbg(port->dev, "BREAK detected\n");
641 tty_flip_buffer_push(tty);
643 copied += sci_handle_fifo_overrun(port);
648 static irqreturn_t sci_rx_interrupt(int irq, void *port)
650 /* I think sci_receive_chars has to be called irrespective
651 * of whether the I_IXOFF is set, otherwise, how is the interrupt
654 sci_receive_chars(port);
659 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
661 struct uart_port *port = ptr;
663 spin_lock_irq(&port->lock);
664 sci_transmit_chars(port);
665 spin_unlock_irq(&port->lock);
670 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
672 struct uart_port *port = ptr;
675 if (port->type == PORT_SCI) {
676 if (sci_handle_errors(port)) {
677 /* discard character in rx buffer */
679 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
682 sci_handle_fifo_overrun(port);
683 sci_rx_interrupt(irq, ptr);
686 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
688 /* Kick the transmission */
689 sci_tx_interrupt(irq, ptr);
694 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
696 struct uart_port *port = ptr;
699 sci_handle_breaks(port);
700 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
705 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
707 unsigned short ssr_status, scr_status;
708 struct uart_port *port = ptr;
709 irqreturn_t ret = IRQ_NONE;
711 ssr_status = sci_in(port, SCxSR);
712 scr_status = sci_in(port, SCSCR);
715 if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE))
716 ret = sci_tx_interrupt(irq, ptr);
718 if ((ssr_status & 0x0002) && (scr_status & SCI_CTRL_FLAGS_RIE))
719 ret = sci_rx_interrupt(irq, ptr);
720 /* Error Interrupt */
721 if ((ssr_status & 0x0080) && (scr_status & SCI_CTRL_FLAGS_REIE))
722 ret = sci_er_interrupt(irq, ptr);
723 /* Break Interrupt */
724 if ((ssr_status & 0x0010) && (scr_status & SCI_CTRL_FLAGS_REIE))
725 ret = sci_br_interrupt(irq, ptr);
730 #ifdef CONFIG_HAVE_CLK
732 * Here we define a transistion notifier so that we can update all of our
733 * ports' baud rate when the peripheral clock changes.
735 static int sci_notifier(struct notifier_block *self,
736 unsigned long phase, void *p)
738 struct sh_sci_priv *priv = container_of(self,
739 struct sh_sci_priv, clk_nb);
740 struct sci_port *sci_port;
743 if ((phase == CPUFREQ_POSTCHANGE) ||
744 (phase == CPUFREQ_RESUMECHANGE)) {
745 spin_lock_irqsave(&priv->lock, flags);
746 list_for_each_entry(sci_port, &priv->ports, node)
747 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
749 spin_unlock_irqrestore(&priv->lock, flags);
755 static void sci_clk_enable(struct uart_port *port)
757 struct sci_port *sci_port = to_sci_port(port);
759 clk_enable(sci_port->dclk);
760 sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
763 clk_enable(sci_port->iclk);
766 static void sci_clk_disable(struct uart_port *port)
768 struct sci_port *sci_port = to_sci_port(port);
771 clk_disable(sci_port->iclk);
773 clk_disable(sci_port->dclk);
777 static int sci_request_irq(struct sci_port *port)
780 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
781 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
784 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
785 "SCI Transmit Data Empty", "SCI Break" };
787 if (port->irqs[0] == port->irqs[1]) {
788 if (unlikely(!port->irqs[0]))
791 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
792 IRQF_DISABLED, "sci", port)) {
793 dev_err(port->port.dev, "Can't allocate IRQ\n");
797 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
798 if (unlikely(!port->irqs[i]))
801 if (request_irq(port->irqs[i], handlers[i],
802 IRQF_DISABLED, desc[i], port)) {
803 dev_err(port->port.dev, "Can't allocate IRQ\n");
812 static void sci_free_irq(struct sci_port *port)
816 if (port->irqs[0] == port->irqs[1])
817 free_irq(port->irqs[0], port);
819 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
823 free_irq(port->irqs[i], port);
828 static unsigned int sci_tx_empty(struct uart_port *port)
834 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
836 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
837 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
838 /* If you have signals for DTR and DCD, please implement here. */
841 static unsigned int sci_get_mctrl(struct uart_port *port)
843 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
846 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
849 static void sci_start_tx(struct uart_port *port)
853 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
854 ctrl = sci_in(port, SCSCR);
855 ctrl |= SCI_CTRL_FLAGS_TIE;
856 sci_out(port, SCSCR, ctrl);
859 static void sci_stop_tx(struct uart_port *port)
863 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
864 ctrl = sci_in(port, SCSCR);
865 ctrl &= ~SCI_CTRL_FLAGS_TIE;
866 sci_out(port, SCSCR, ctrl);
869 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
873 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
874 ctrl = sci_in(port, SCSCR);
875 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
876 sci_out(port, SCSCR, ctrl);
879 static void sci_stop_rx(struct uart_port *port)
883 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
884 ctrl = sci_in(port, SCSCR);
885 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
886 sci_out(port, SCSCR, ctrl);
889 static void sci_enable_ms(struct uart_port *port)
891 /* Nothing here yet .. */
894 static void sci_break_ctl(struct uart_port *port, int break_state)
896 /* Nothing here yet .. */
899 static int sci_startup(struct uart_port *port)
901 struct sci_port *s = to_sci_port(port);
908 sci_start_rx(port, 1);
913 static void sci_shutdown(struct uart_port *port)
915 struct sci_port *s = to_sci_port(port);
925 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
926 struct ktermios *old)
928 unsigned int status, baud, smr_val;
931 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
933 t = SCBRR_VALUE(baud, port->uartclk);
936 status = sci_in(port, SCxSR);
937 } while (!(status & SCxSR_TEND(port)));
939 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
941 if (port->type != PORT_SCI)
942 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
944 smr_val = sci_in(port, SCSMR) & 3;
945 if ((termios->c_cflag & CSIZE) == CS7)
947 if (termios->c_cflag & PARENB)
949 if (termios->c_cflag & PARODD)
951 if (termios->c_cflag & CSTOPB)
954 uart_update_timeout(port, termios->c_cflag, baud);
956 sci_out(port, SCSMR, smr_val);
960 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
963 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
965 sci_out(port, SCBRR, t);
966 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
969 sci_init_pins(port, termios->c_cflag);
970 sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0);
972 sci_out(port, SCSCR, SCSCR_INIT(port));
974 if ((termios->c_cflag & CREAD) != 0)
975 sci_start_rx(port, 0);
978 static const char *sci_type(struct uart_port *port)
980 switch (port->type) {
994 static void sci_release_port(struct uart_port *port)
996 /* Nothing here yet .. */
999 static int sci_request_port(struct uart_port *port)
1001 /* Nothing here yet .. */
1005 static void sci_config_port(struct uart_port *port, int flags)
1007 struct sci_port *s = to_sci_port(port);
1009 port->type = s->type;
1014 if (port->flags & UPF_IOREMAP) {
1015 port->membase = ioremap_nocache(port->mapbase, 0x40);
1017 if (IS_ERR(port->membase))
1018 dev_err(port->dev, "can't remap port#%d\n", port->line);
1021 * For the simple (and majority of) cases where we don't
1022 * need to do any remapping, just cast the cookie
1025 port->membase = (void __iomem *)port->mapbase;
1029 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1031 struct sci_port *s = to_sci_port(port);
1033 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1035 if (ser->baud_base < 2400)
1036 /* No paper tape reader for Mitch.. */
1042 static struct uart_ops sci_uart_ops = {
1043 .tx_empty = sci_tx_empty,
1044 .set_mctrl = sci_set_mctrl,
1045 .get_mctrl = sci_get_mctrl,
1046 .start_tx = sci_start_tx,
1047 .stop_tx = sci_stop_tx,
1048 .stop_rx = sci_stop_rx,
1049 .enable_ms = sci_enable_ms,
1050 .break_ctl = sci_break_ctl,
1051 .startup = sci_startup,
1052 .shutdown = sci_shutdown,
1053 .set_termios = sci_set_termios,
1055 .release_port = sci_release_port,
1056 .request_port = sci_request_port,
1057 .config_port = sci_config_port,
1058 .verify_port = sci_verify_port,
1059 #ifdef CONFIG_CONSOLE_POLL
1060 .poll_get_char = sci_poll_get_char,
1061 .poll_put_char = sci_poll_put_char,
1065 static void __devinit sci_init_single(struct platform_device *dev,
1066 struct sci_port *sci_port,
1068 struct plat_sci_port *p)
1070 sci_port->port.ops = &sci_uart_ops;
1071 sci_port->port.iotype = UPIO_MEM;
1072 sci_port->port.line = index;
1073 sci_port->port.fifosize = 1;
1075 #if defined(__H8300H__) || defined(__H8300S__)
1077 sci_port->enable = h8300_sci_enable;
1078 sci_port->disable = h8300_sci_disable;
1080 sci_port->port.uartclk = CONFIG_CPU_CLOCK;
1081 #elif defined(CONFIG_HAVE_CLK)
1082 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
1083 sci_port->dclk = clk_get(&dev->dev, "module_clk");
1084 sci_port->enable = sci_clk_enable;
1085 sci_port->disable = sci_clk_disable;
1087 #error "Need a valid uartclk"
1090 sci_port->break_timer.data = (unsigned long)sci_port;
1091 sci_port->break_timer.function = sci_break_timer;
1092 init_timer(&sci_port->break_timer);
1094 sci_port->port.mapbase = p->mapbase;
1095 sci_port->port.membase = p->membase;
1097 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
1098 sci_port->port.flags = p->flags;
1099 sci_port->port.dev = &dev->dev;
1100 sci_port->type = sci_port->port.type = p->type;
1102 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1106 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1107 static struct tty_driver *serial_console_device(struct console *co, int *index)
1109 struct uart_driver *p = &sci_uart_driver;
1111 return p->tty_driver;
1114 static void serial_console_putchar(struct uart_port *port, int ch)
1116 sci_poll_put_char(port, ch);
1120 * Print a string to the serial port trying not to disturb
1121 * any possible real use of the port...
1123 static void serial_console_write(struct console *co, const char *s,
1126 struct uart_port *port = co->data;
1127 struct sci_port *sci_port = to_sci_port(port);
1128 unsigned short bits;
1130 if (sci_port->enable)
1131 sci_port->enable(port);
1133 uart_console_write(port, s, count, serial_console_putchar);
1135 /* wait until fifo is empty and last bit has been transmitted */
1136 bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
1137 while ((sci_in(port, SCxSR) & bits) != bits)
1140 if (sci_port->disable);
1141 sci_port->disable(port);
1144 static int __init serial_console_setup(struct console *co, char *options)
1146 struct sci_port *sci_port;
1147 struct uart_port *port;
1155 * Check whether an invalid uart number has been specified, and
1156 * if so, search for the first available port that does have
1159 if (co->index >= SCI_NPORTS)
1162 sci_port = &sci_ports[co->index];
1163 port = &sci_port->port;
1167 * Also need to check port->type, we don't actually have any
1168 * UPIO_PORT ports, but uart_report_port() handily misreports
1169 * it anyways if we don't have a port available by the time this is
1175 sci_config_port(port, 0);
1177 if (sci_port->enable)
1178 sci_port->enable(port);
1181 uart_parse_options(options, &baud, &parity, &bits, &flow);
1183 ret = uart_set_options(port, co, baud, parity, bits, flow);
1184 #if defined(__H8300H__) || defined(__H8300S__)
1185 /* disable rx interrupt */
1189 /* TODO: disable clock */
1193 static struct console serial_console = {
1195 .device = serial_console_device,
1196 .write = serial_console_write,
1197 .setup = serial_console_setup,
1198 .flags = CON_PRINTBUFFER,
1202 static int __init sci_console_init(void)
1204 register_console(&serial_console);
1207 console_initcall(sci_console_init);
1208 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1210 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1211 #define SCI_CONSOLE (&serial_console)
1213 #define SCI_CONSOLE 0
1216 static char banner[] __initdata =
1217 KERN_INFO "SuperH SCI(F) driver initialized\n";
1219 static struct uart_driver sci_uart_driver = {
1220 .owner = THIS_MODULE,
1221 .driver_name = "sci",
1222 .dev_name = "ttySC",
1224 .minor = SCI_MINOR_START,
1226 .cons = SCI_CONSOLE,
1230 static int __devexit sci_remove(struct platform_device *dev)
1232 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1234 unsigned long flags;
1236 #ifdef CONFIG_HAVE_CLK
1237 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1240 spin_lock_irqsave(&priv->lock, flags);
1241 list_for_each_entry(p, &priv->ports, node)
1242 uart_remove_one_port(&sci_uart_driver, &p->port);
1244 spin_unlock_irqrestore(&priv->lock, flags);
1250 static int __devinit sci_probe_single(struct platform_device *dev,
1252 struct plat_sci_port *p,
1253 struct sci_port *sciport)
1255 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1256 unsigned long flags;
1260 if (unlikely(index >= SCI_NPORTS)) {
1261 dev_notice(&dev->dev, "Attempting to register port "
1262 "%d when only %d are available.\n",
1263 index+1, SCI_NPORTS);
1264 dev_notice(&dev->dev, "Consider bumping "
1265 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1269 sci_init_single(dev, sciport, index, p);
1271 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1275 INIT_LIST_HEAD(&sciport->node);
1277 spin_lock_irqsave(&priv->lock, flags);
1278 list_add(&sciport->node, &priv->ports);
1279 spin_unlock_irqrestore(&priv->lock, flags);
1285 * Register a set of serial devices attached to a platform device. The
1286 * list is terminated with a zero flags entry, which means we expect
1287 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1288 * remapping (such as sh64) should also set UPF_IOREMAP.
1290 static int __devinit sci_probe(struct platform_device *dev)
1292 struct plat_sci_port *p = dev->dev.platform_data;
1293 struct sh_sci_priv *priv;
1294 int i, ret = -EINVAL;
1296 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1300 INIT_LIST_HEAD(&priv->ports);
1301 spin_lock_init(&priv->lock);
1302 platform_set_drvdata(dev, priv);
1304 #ifdef CONFIG_HAVE_CLK
1305 priv->clk_nb.notifier_call = sci_notifier;
1306 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1309 if (dev->id != -1) {
1310 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
1314 for (i = 0; p && p->flags != 0; p++, i++) {
1315 ret = sci_probe_single(dev, i, p, &sci_ports[i]);
1321 #ifdef CONFIG_SH_STANDARD_BIOS
1322 sh_bios_gdb_detach();
1332 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1334 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1336 unsigned long flags;
1338 spin_lock_irqsave(&priv->lock, flags);
1339 list_for_each_entry(p, &priv->ports, node)
1340 uart_suspend_port(&sci_uart_driver, &p->port);
1342 spin_unlock_irqrestore(&priv->lock, flags);
1347 static int sci_resume(struct platform_device *dev)
1349 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1351 unsigned long flags;
1353 spin_lock_irqsave(&priv->lock, flags);
1354 list_for_each_entry(p, &priv->ports, node)
1355 uart_resume_port(&sci_uart_driver, &p->port);
1357 spin_unlock_irqrestore(&priv->lock, flags);
1362 static struct platform_driver sci_driver = {
1364 .remove = __devexit_p(sci_remove),
1365 .suspend = sci_suspend,
1366 .resume = sci_resume,
1369 .owner = THIS_MODULE,
1373 static int __init sci_init(void)
1379 ret = uart_register_driver(&sci_uart_driver);
1380 if (likely(ret == 0)) {
1381 ret = platform_driver_register(&sci_driver);
1383 uart_unregister_driver(&sci_uart_driver);
1389 static void __exit sci_exit(void)
1391 platform_driver_unregister(&sci_driver);
1392 uart_unregister_driver(&sci_uart_driver);
1395 module_init(sci_init);
1396 module_exit(sci_exit);
1398 MODULE_LICENSE("GPL");
1399 MODULE_ALIAS("platform:sh-sci");