2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
20 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
26 #include <linux/module.h>
27 #include <linux/errno.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/sysrq.h>
36 #include <linux/ioport.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/console.h>
41 #include <linux/platform_device.h>
43 #ifdef CONFIG_CPU_FREQ
44 #include <linux/notifier.h>
45 #include <linux/cpufreq.h>
48 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
49 #include <linux/ctype.h>
50 #include <asm/clock.h>
51 #include <asm/sh_bios.h>
59 struct uart_port port;
64 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
65 unsigned int irqs[SCIx_NR_IRQS];
67 /* Port pin configuration */
68 void (*init_pins)(struct uart_port *port,
71 /* Port enable callback */
72 void (*enable)(struct uart_port *port);
74 /* Port disable callback */
75 void (*disable)(struct uart_port *port);
78 struct timer_list break_timer;
83 static struct sci_port *kgdb_sci_port;
86 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
87 static struct sci_port *serial_console_port;
90 /* Function prototypes */
91 static void sci_stop_tx(struct uart_port *port);
93 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
95 static struct sci_port sci_ports[SCI_NPORTS];
96 static struct uart_driver sci_uart_driver;
98 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
99 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
100 static inline void handle_error(struct uart_port *port)
102 /* Clear error flags */
103 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
106 static int get_char(struct uart_port *port)
109 unsigned short status;
112 spin_lock_irqsave(&port->lock, flags);
114 status = sci_in(port, SCxSR);
115 if (status & SCxSR_ERRORS(port)) {
119 } while (!(status & SCxSR_RDxF(port)));
120 c = sci_in(port, SCxRDR);
121 sci_in(port, SCxSR); /* Dummy read */
122 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
123 spin_unlock_irqrestore(&port->lock, flags);
127 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
129 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
130 static void put_char(struct uart_port *port, char c)
133 unsigned short status;
135 spin_lock_irqsave(&port->lock, flags);
138 status = sci_in(port, SCxSR);
139 } while (!(status & SCxSR_TDxE(port)));
141 sci_out(port, SCxTDR, c);
142 sci_in(port, SCxSR); /* Dummy read */
143 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
145 spin_unlock_irqrestore(&port->lock, flags);
149 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
150 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
152 struct uart_port *port = &sci_port->port;
153 const unsigned char *p = buffer;
156 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
160 #ifdef CONFIG_SH_STANDARD_BIOS
161 /* This call only does a trap the first time it is
162 * called, and so is safe to do here unconditionally
164 usegdb |= sh_bios_in_gdb_mode();
166 #ifdef CONFIG_SH_KGDB
167 usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
171 /* $<packet info>#<checksum>. */
175 put_char(port, 'O'); /* 'O'utput to console */
178 for (i=0; i<count; i++) { /* Don't use run length encoding */
189 put_char(port, highhex(checksum));
190 put_char(port, lowhex(checksum));
191 } while (get_char(port) != '+');
193 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
194 for (i=0; i<count; i++) {
196 put_char(port, '\r');
197 put_char(port, *p++);
200 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
202 #ifdef CONFIG_SH_KGDB
203 static int kgdb_sci_getchar(void)
207 /* Keep trying to read a character, this could be neater */
208 while ((c = get_char(&kgdb_sci_port->port)) < 0)
214 static inline void kgdb_sci_putchar(int c)
216 put_char(&kgdb_sci_port->port, c);
218 #endif /* CONFIG_SH_KGDB */
220 #if defined(__H8300S__)
221 enum { sci_disable, sci_enable };
223 static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
225 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
226 int ch = (port->mapbase - SMR0) >> 3;
227 unsigned char mask = 1 << (ch+1);
229 if (ctrl == sci_disable) {
236 static inline void h8300_sci_enable(struct uart_port *port)
238 h8300_sci_config(port, sci_enable);
241 static inline void h8300_sci_disable(struct uart_port *port)
243 h8300_sci_config(port, sci_disable);
247 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
248 defined(__H8300H__) || defined(__H8300S__)
249 static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
251 int ch = (port->mapbase - SMR0) >> 3;
254 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
255 h8300_sci_pins[ch].rx,
257 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
258 h8300_sci_pins[ch].tx,
262 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
265 #define sci_init_pins_sci NULL
268 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
269 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
271 unsigned int fcr_val = 0;
274 fcr_val |= SCFCR_MCE;
276 sci_out(port, SCFCR, fcr_val);
279 #define sci_init_pins_irda NULL
283 #define sci_init_pins_scif NULL
286 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
287 #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
288 /* SH7300 doesn't use RTS/CTS */
289 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
291 sci_out(port, SCFCR, 0);
293 #elif defined(CONFIG_CPU_SH3)
294 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
295 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
297 unsigned int fcr_val = 0;
300 /* We need to set SCPCR to enable RTS/CTS */
301 data = ctrl_inw(SCPCR);
302 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
303 ctrl_outw(data & 0x0fcf, SCPCR);
306 fcr_val |= SCFCR_MCE;
308 /* We need to set SCPCR to enable RTS/CTS */
309 data = ctrl_inw(SCPCR);
310 /* Clear out SCP7MD1,0, SCP4MD1,0,
311 Set SCP6MD1,0 = {01} (output) */
312 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
314 data = ctrl_inb(SCPDR);
315 /* Set /RTS2 (bit6) = 0 */
316 ctrl_outb(data & 0xbf, SCPDR);
319 sci_out(port, SCFCR, fcr_val);
321 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
322 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
324 unsigned int fcr_val = 0;
326 if (cflag & CRTSCTS) {
327 fcr_val |= SCFCR_MCE;
329 ctrl_outw(0x0000, PORT_PSCR);
333 data = ctrl_inw(PORT_PSCR);
336 ctrl_outw(data, PORT_PSCR);
338 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
341 sci_out(port, SCFCR, fcr_val);
345 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
347 unsigned int fcr_val = 0;
349 if (cflag & CRTSCTS) {
350 fcr_val |= SCFCR_MCE;
352 #ifdef CONFIG_CPU_SUBTYPE_SH7343
354 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
355 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
357 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
360 sci_out(port, SCFCR, fcr_val);
364 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
365 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
366 defined(CONFIG_CPU_SUBTYPE_SH7785)
367 static inline int scif_txroom(struct uart_port *port)
369 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
372 static inline int scif_rxroom(struct uart_port *port)
374 return sci_in(port, SCRFDR) & 0x7f;
377 static inline int scif_txroom(struct uart_port *port)
379 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
382 static inline int scif_rxroom(struct uart_port *port)
384 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
387 #endif /* SCIF_ONLY || SCI_AND_SCIF */
389 static inline int sci_txroom(struct uart_port *port)
391 return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
394 static inline int sci_rxroom(struct uart_port *port)
396 return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
399 /* ********************************************************************** *
400 * the interrupt related routines *
401 * ********************************************************************** */
403 static void sci_transmit_chars(struct uart_port *port)
405 struct circ_buf *xmit = &port->info->xmit;
406 unsigned int stopped = uart_tx_stopped(port);
407 unsigned short status;
411 status = sci_in(port, SCxSR);
412 if (!(status & SCxSR_TDxE(port))) {
413 ctrl = sci_in(port, SCSCR);
414 if (uart_circ_empty(xmit)) {
415 ctrl &= ~SCI_CTRL_FLAGS_TIE;
417 ctrl |= SCI_CTRL_FLAGS_TIE;
419 sci_out(port, SCSCR, ctrl);
424 if (port->type == PORT_SCIF)
425 count = scif_txroom(port);
428 count = sci_txroom(port);
436 } else if (!uart_circ_empty(xmit) && !stopped) {
437 c = xmit->buf[xmit->tail];
438 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
443 sci_out(port, SCxTDR, c);
446 } while (--count > 0);
448 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
450 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
451 uart_write_wakeup(port);
452 if (uart_circ_empty(xmit)) {
455 ctrl = sci_in(port, SCSCR);
457 #if !defined(SCI_ONLY)
458 if (port->type == PORT_SCIF) {
459 sci_in(port, SCxSR); /* Dummy read */
460 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
464 ctrl |= SCI_CTRL_FLAGS_TIE;
465 sci_out(port, SCSCR, ctrl);
469 /* On SH3, SCIF may read end-of-break as a space->mark char */
470 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
472 static inline void sci_receive_chars(struct uart_port *port)
474 struct sci_port *sci_port = (struct sci_port *)port;
475 struct tty_struct *tty = port->info->tty;
476 int i, count, copied = 0;
477 unsigned short status;
480 status = sci_in(port, SCxSR);
481 if (!(status & SCxSR_RDxF(port)))
485 #if !defined(SCI_ONLY)
486 if (port->type == PORT_SCIF)
487 count = scif_rxroom(port);
490 count = sci_rxroom(port);
492 /* Don't copy more bytes than there is room for in the buffer */
493 count = tty_buffer_request_room(tty, count);
495 /* If for any reason we can't copy more data, we're done! */
499 if (port->type == PORT_SCI) {
500 char c = sci_in(port, SCxRDR);
501 if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
504 tty_insert_flip_char(tty, c, TTY_NORMAL);
507 for (i=0; i<count; i++) {
508 char c = sci_in(port, SCxRDR);
509 status = sci_in(port, SCxSR);
510 #if defined(CONFIG_CPU_SH3)
511 /* Skip "chars" during break */
512 if (sci_port->break_flag) {
514 (status & SCxSR_FER(port))) {
519 /* Nonzero => end-of-break */
520 pr_debug("scif: debounce<%02x>\n", c);
521 sci_port->break_flag = 0;
528 #endif /* CONFIG_CPU_SH3 */
529 if (uart_handle_sysrq_char(port, c)) {
534 /* Store data and status */
535 if (status&SCxSR_FER(port)) {
537 pr_debug("sci: frame error\n");
538 } else if (status&SCxSR_PER(port)) {
540 pr_debug("sci: parity error\n");
543 tty_insert_flip_char(tty, c, flag);
547 sci_in(port, SCxSR); /* dummy read */
548 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
551 port->icount.rx += count;
555 /* Tell the rest of the system the news. New characters! */
556 tty_flip_buffer_push(tty);
558 sci_in(port, SCxSR); /* dummy read */
559 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
563 #define SCI_BREAK_JIFFIES (HZ/20)
564 /* The sci generates interrupts during the break,
565 * 1 per millisecond or so during the break period, for 9600 baud.
566 * So dont bother disabling interrupts.
567 * But dont want more than 1 break event.
568 * Use a kernel timer to periodically poll the rx line until
569 * the break is finished.
571 static void sci_schedule_break_timer(struct sci_port *port)
573 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
574 add_timer(&port->break_timer);
576 /* Ensure that two consecutive samples find the break over. */
577 static void sci_break_timer(unsigned long data)
579 struct sci_port *port = (struct sci_port *)data;
581 if (sci_rxd_in(&port->port) == 0) {
582 port->break_flag = 1;
583 sci_schedule_break_timer(port);
584 } else if (port->break_flag == 1) {
586 port->break_flag = 2;
587 sci_schedule_break_timer(port);
589 port->break_flag = 0;
592 static inline int sci_handle_errors(struct uart_port *port)
595 unsigned short status = sci_in(port, SCxSR);
596 struct tty_struct *tty = port->info->tty;
598 if (status & SCxSR_ORER(port)) {
600 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
602 pr_debug("sci: overrun error\n");
605 if (status & SCxSR_FER(port)) {
606 if (sci_rxd_in(port) == 0) {
607 /* Notify of BREAK */
608 struct sci_port *sci_port = (struct sci_port *)port;
610 if (!sci_port->break_flag) {
611 sci_port->break_flag = 1;
612 sci_schedule_break_timer(sci_port);
614 /* Do sysrq handling. */
615 if (uart_handle_break(port))
617 pr_debug("sci: BREAK detected\n");
618 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
623 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
625 pr_debug("sci: frame error\n");
629 if (status & SCxSR_PER(port)) {
631 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
633 pr_debug("sci: parity error\n");
637 tty_flip_buffer_push(tty);
642 static inline int sci_handle_breaks(struct uart_port *port)
645 unsigned short status = sci_in(port, SCxSR);
646 struct tty_struct *tty = port->info->tty;
647 struct sci_port *s = &sci_ports[port->line];
649 if (uart_handle_break(port))
652 if (!s->break_flag && status & SCxSR_BRK(port)) {
653 #if defined(CONFIG_CPU_SH3)
657 /* Notify of BREAK */
658 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
660 pr_debug("sci: BREAK detected\n");
663 #if defined(SCIF_ORER)
664 /* XXX: Handle SCIF overrun error */
665 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
666 sci_out(port, SCLSR, 0);
667 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
669 pr_debug("sci: overrun error\n");
675 tty_flip_buffer_push(tty);
680 static irqreturn_t sci_rx_interrupt(int irq, void *port)
682 /* I think sci_receive_chars has to be called irrespective
683 * of whether the I_IXOFF is set, otherwise, how is the interrupt
686 sci_receive_chars(port);
691 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
693 struct uart_port *port = ptr;
695 spin_lock_irq(&port->lock);
696 sci_transmit_chars(port);
697 spin_unlock_irq(&port->lock);
702 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
704 struct uart_port *port = ptr;
707 if (port->type == PORT_SCI) {
708 if (sci_handle_errors(port)) {
709 /* discard character in rx buffer */
711 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
714 #if defined(SCIF_ORER)
715 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
716 struct tty_struct *tty = port->info->tty;
718 sci_out(port, SCLSR, 0);
719 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
720 tty_flip_buffer_push(tty);
721 pr_debug("scif: overrun error\n");
724 sci_rx_interrupt(irq, ptr);
727 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
729 /* Kick the transmission */
730 sci_tx_interrupt(irq, ptr);
735 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
737 struct uart_port *port = ptr;
740 sci_handle_breaks(port);
742 #ifdef CONFIG_SH_KGDB
743 /* Break into the debugger if a break is detected */
747 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
752 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
754 unsigned short ssr_status, scr_status;
755 struct uart_port *port = ptr;
757 ssr_status = sci_in(port,SCxSR);
758 scr_status = sci_in(port,SCSCR);
761 if ((ssr_status & 0x0020) && (scr_status & 0x0080))
762 sci_tx_interrupt(irq, ptr);
764 if ((ssr_status & 0x0002) && (scr_status & 0x0040))
765 sci_rx_interrupt(irq, ptr);
766 /* Error Interrupt */
767 if ((ssr_status & 0x0080) && (scr_status & 0x0400))
768 sci_er_interrupt(irq, ptr);
769 /* Break Interrupt */
770 if ((ssr_status & 0x0010) && (scr_status & 0x0200))
771 sci_br_interrupt(irq, ptr);
776 #ifdef CONFIG_CPU_FREQ
778 * Here we define a transistion notifier so that we can update all of our
779 * ports' baud rate when the peripheral clock changes.
781 static int sci_notifier(struct notifier_block *self,
782 unsigned long phase, void *p)
784 struct cpufreq_freqs *freqs = p;
787 if ((phase == CPUFREQ_POSTCHANGE) ||
788 (phase == CPUFREQ_RESUMECHANGE)){
789 for (i = 0; i < SCI_NPORTS; i++) {
790 struct uart_port *port = &sci_ports[i].port;
794 * Update the uartclk per-port if frequency has
795 * changed, since it will no longer necessarily be
796 * consistent with the old frequency.
798 * Really we want to be able to do something like
799 * uart_change_speed() or something along those lines
800 * here to implicitly reset the per-port baud rate..
802 * Clean this up later..
804 clk = clk_get(NULL, "module_clk");
805 port->uartclk = clk_get_rate(clk) * 16;
809 printk(KERN_INFO "%s: got a postchange notification "
810 "for cpu %d (old %d, new %d)\n",
811 __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
817 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
818 #endif /* CONFIG_CPU_FREQ */
820 static int sci_request_irq(struct sci_port *port)
823 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
824 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
827 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
828 "SCI Transmit Data Empty", "SCI Break" };
830 if (port->irqs[0] == port->irqs[1]) {
831 if (!port->irqs[0]) {
832 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
836 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
837 IRQF_DISABLED, "sci", port)) {
838 printk(KERN_ERR "sci: Cannot allocate irq.\n");
842 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
845 if (request_irq(port->irqs[i], handlers[i],
846 IRQF_DISABLED, desc[i], port)) {
847 printk(KERN_ERR "sci: Cannot allocate irq.\n");
856 static void sci_free_irq(struct sci_port *port)
860 if (port->irqs[0] == port->irqs[1]) {
862 printk("sci: sci_free_irq error\n");
864 free_irq(port->irqs[0], port);
866 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
870 free_irq(port->irqs[i], port);
875 static unsigned int sci_tx_empty(struct uart_port *port)
881 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
883 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
884 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
885 /* If you have signals for DTR and DCD, please implement here. */
888 static unsigned int sci_get_mctrl(struct uart_port *port)
890 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
893 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
896 static void sci_start_tx(struct uart_port *port)
900 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
901 ctrl = sci_in(port, SCSCR);
902 ctrl |= SCI_CTRL_FLAGS_TIE;
903 sci_out(port, SCSCR, ctrl);
906 static void sci_stop_tx(struct uart_port *port)
910 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
911 ctrl = sci_in(port, SCSCR);
912 ctrl &= ~SCI_CTRL_FLAGS_TIE;
913 sci_out(port, SCSCR, ctrl);
916 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
920 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
921 ctrl = sci_in(port, SCSCR);
922 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
923 sci_out(port, SCSCR, ctrl);
926 static void sci_stop_rx(struct uart_port *port)
930 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
931 ctrl = sci_in(port, SCSCR);
932 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
933 sci_out(port, SCSCR, ctrl);
936 static void sci_enable_ms(struct uart_port *port)
938 /* Nothing here yet .. */
941 static void sci_break_ctl(struct uart_port *port, int break_state)
943 /* Nothing here yet .. */
946 static int sci_startup(struct uart_port *port)
948 struct sci_port *s = &sci_ports[port->line];
955 sci_start_rx(port, 1);
960 static void sci_shutdown(struct uart_port *port)
962 struct sci_port *s = &sci_ports[port->line];
972 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
973 struct ktermios *old)
975 struct sci_port *s = &sci_ports[port->line];
976 unsigned int status, baud, smr_val;
979 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
987 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
988 struct clk *clk = clk_get(NULL, "module_clk");
989 t = SCBRR_VALUE(baud, clk_get_rate(clk));
992 t = SCBRR_VALUE(baud);
999 status = sci_in(port, SCxSR);
1000 } while (!(status & SCxSR_TEND(port)));
1002 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1004 #if !defined(SCI_ONLY)
1005 if (port->type == PORT_SCIF)
1006 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1009 smr_val = sci_in(port, SCSMR) & 3;
1010 if ((termios->c_cflag & CSIZE) == CS7)
1012 if (termios->c_cflag & PARENB)
1014 if (termios->c_cflag & PARODD)
1016 if (termios->c_cflag & CSTOPB)
1019 uart_update_timeout(port, termios->c_cflag, baud);
1021 sci_out(port, SCSMR, smr_val);
1025 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1028 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1030 sci_out(port, SCBRR, t);
1031 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1034 if (likely(s->init_pins))
1035 s->init_pins(port, termios->c_cflag);
1037 sci_out(port, SCSCR, SCSCR_INIT(port));
1039 if ((termios->c_cflag & CREAD) != 0)
1040 sci_start_rx(port,0);
1043 static const char *sci_type(struct uart_port *port)
1045 switch (port->type) {
1046 case PORT_SCI: return "sci";
1047 case PORT_SCIF: return "scif";
1048 case PORT_IRDA: return "irda";
1054 static void sci_release_port(struct uart_port *port)
1056 /* Nothing here yet .. */
1059 static int sci_request_port(struct uart_port *port)
1061 /* Nothing here yet .. */
1065 static void sci_config_port(struct uart_port *port, int flags)
1067 struct sci_port *s = &sci_ports[port->line];
1069 port->type = s->type;
1071 switch (port->type) {
1073 s->init_pins = sci_init_pins_sci;
1076 s->init_pins = sci_init_pins_scif;
1079 s->init_pins = sci_init_pins_irda;
1083 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1084 if (port->mapbase == 0)
1085 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1087 port->membase = (void __iomem *)port->mapbase;
1091 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1093 struct sci_port *s = &sci_ports[port->line];
1095 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1097 if (ser->baud_base < 2400)
1098 /* No paper tape reader for Mitch.. */
1104 static struct uart_ops sci_uart_ops = {
1105 .tx_empty = sci_tx_empty,
1106 .set_mctrl = sci_set_mctrl,
1107 .get_mctrl = sci_get_mctrl,
1108 .start_tx = sci_start_tx,
1109 .stop_tx = sci_stop_tx,
1110 .stop_rx = sci_stop_rx,
1111 .enable_ms = sci_enable_ms,
1112 .break_ctl = sci_break_ctl,
1113 .startup = sci_startup,
1114 .shutdown = sci_shutdown,
1115 .set_termios = sci_set_termios,
1117 .release_port = sci_release_port,
1118 .request_port = sci_request_port,
1119 .config_port = sci_config_port,
1120 .verify_port = sci_verify_port,
1123 static void __init sci_init_ports(void)
1125 static int first = 1;
1133 for (i = 0; i < SCI_NPORTS; i++) {
1134 sci_ports[i].port.ops = &sci_uart_ops;
1135 sci_ports[i].port.iotype = UPIO_MEM;
1136 sci_ports[i].port.line = i;
1137 sci_ports[i].port.fifosize = 1;
1139 #if defined(__H8300H__) || defined(__H8300S__)
1141 sci_ports[i].enable = h8300_sci_enable;
1142 sci_ports[i].disable = h8300_sci_disable;
1144 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1145 #elif defined(CONFIG_SUPERH64)
1146 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1149 * XXX: We should use a proper SCI/SCIF clock
1152 struct clk *clk = clk_get(NULL, "module_clk");
1153 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1158 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1159 sci_ports[i].break_timer.function = sci_break_timer;
1161 init_timer(&sci_ports[i].break_timer);
1165 int __init early_sci_setup(struct uart_port *port)
1167 if (unlikely(port->line > SCI_NPORTS))
1172 sci_ports[port->line].port.membase = port->membase;
1173 sci_ports[port->line].port.mapbase = port->mapbase;
1174 sci_ports[port->line].port.type = port->type;
1179 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1181 * Print a string to the serial port trying not to disturb
1182 * any possible real use of the port...
1184 static void serial_console_write(struct console *co, const char *s,
1187 put_string(serial_console_port, s, count);
1190 static int __init serial_console_setup(struct console *co, char *options)
1192 struct uart_port *port;
1200 * Check whether an invalid uart number has been specified, and
1201 * if so, search for the first available port that does have
1204 if (co->index >= SCI_NPORTS)
1207 serial_console_port = &sci_ports[co->index];
1208 port = &serial_console_port->port;
1211 * Also need to check port->type, we don't actually have any
1212 * UPIO_PORT ports, but uart_report_port() handily misreports
1213 * it anyways if we don't have a port available by the time this is
1218 if (!port->membase || !port->mapbase)
1221 port->type = serial_console_port->type;
1223 if (port->flags & UPF_IOREMAP)
1224 sci_config_port(port, 0);
1226 if (serial_console_port->enable)
1227 serial_console_port->enable(port);
1230 uart_parse_options(options, &baud, &parity, &bits, &flow);
1232 ret = uart_set_options(port, co, baud, parity, bits, flow);
1233 #if defined(__H8300H__) || defined(__H8300S__)
1234 /* disable rx interrupt */
1241 static struct console serial_console = {
1243 .device = uart_console_device,
1244 .write = serial_console_write,
1245 .setup = serial_console_setup,
1246 .flags = CON_PRINTBUFFER,
1248 .data = &sci_uart_driver,
1251 static int __init sci_console_init(void)
1254 register_console(&serial_console);
1257 console_initcall(sci_console_init);
1258 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1260 #ifdef CONFIG_SH_KGDB
1262 * FIXME: Most of this can go away.. at the moment, we rely on
1263 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1264 * most of that can easily be done here instead.
1266 * For the time being, just accept the values that were parsed earlier..
1268 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1269 int *parity, int *bits)
1272 *parity = tolower(kgdb_parity);
1273 *bits = kgdb_bits - '0';
1277 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1278 * care of the early-on initialization for kgdb, regardless of whether we
1279 * actually use kgdb as a console or not.
1281 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1283 int __init kgdb_console_setup(struct console *co, char *options)
1285 struct uart_port *port = &sci_ports[kgdb_portnum].port;
1291 if (co->index != kgdb_portnum)
1292 co->index = kgdb_portnum;
1294 kgdb_sci_port = &sci_ports[co->index];
1295 port = &kgdb_sci_port->port;
1298 * Also need to check port->type, we don't actually have any
1299 * UPIO_PORT ports, but uart_report_port() handily misreports
1300 * it anyways if we don't have a port available by the time this is
1305 if (!port->membase || !port->mapbase)
1309 uart_parse_options(options, &baud, &parity, &bits, &flow);
1311 kgdb_console_get_options(port, &baud, &parity, &bits);
1313 kgdb_getchar = kgdb_sci_getchar;
1314 kgdb_putchar = kgdb_sci_putchar;
1316 return uart_set_options(port, co, baud, parity, bits, flow);
1318 #endif /* CONFIG_SH_KGDB */
1320 #ifdef CONFIG_SH_KGDB_CONSOLE
1321 static struct console kgdb_console = {
1323 .device = uart_console_device,
1324 .write = kgdb_console_write,
1325 .setup = kgdb_console_setup,
1326 .flags = CON_PRINTBUFFER,
1328 .data = &sci_uart_driver,
1331 /* Register the KGDB console so we get messages (d'oh!) */
1332 static int __init kgdb_console_init(void)
1335 register_console(&kgdb_console);
1338 console_initcall(kgdb_console_init);
1339 #endif /* CONFIG_SH_KGDB_CONSOLE */
1341 #if defined(CONFIG_SH_KGDB_CONSOLE)
1342 #define SCI_CONSOLE &kgdb_console
1343 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1344 #define SCI_CONSOLE &serial_console
1346 #define SCI_CONSOLE 0
1349 static char banner[] __initdata =
1350 KERN_INFO "SuperH SCI(F) driver initialized\n";
1352 static struct uart_driver sci_uart_driver = {
1353 .owner = THIS_MODULE,
1354 .driver_name = "sci",
1355 .dev_name = "ttySC",
1357 .minor = SCI_MINOR_START,
1359 .cons = SCI_CONSOLE,
1363 * Register a set of serial devices attached to a platform device. The
1364 * list is terminated with a zero flags entry, which means we expect
1365 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1366 * remapping (such as sh64) should also set UPF_IOREMAP.
1368 static int __devinit sci_probe(struct platform_device *dev)
1370 struct plat_sci_port *p = dev->dev.platform_data;
1373 for (i = 0; p && p->flags != 0; p++, i++) {
1374 struct sci_port *sciport = &sci_ports[i];
1377 if (unlikely(i == SCI_NPORTS)) {
1378 dev_notice(&dev->dev, "Attempting to register port "
1379 "%d when only %d are available.\n",
1381 dev_notice(&dev->dev, "Consider bumping "
1382 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1386 sciport->port.mapbase = p->mapbase;
1389 * For the simple (and majority of) cases where we don't need
1390 * to do any remapping, just cast the cookie directly.
1392 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1393 p->membase = (void __iomem *)p->mapbase;
1395 sciport->port.membase = p->membase;
1397 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1398 sciport->port.flags = p->flags;
1399 sciport->port.dev = &dev->dev;
1401 sciport->type = sciport->port.type = p->type;
1403 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1405 uart_add_one_port(&sci_uart_driver, &sciport->port);
1408 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1409 kgdb_sci_port = &sci_ports[kgdb_portnum];
1410 kgdb_getchar = kgdb_sci_getchar;
1411 kgdb_putchar = kgdb_sci_putchar;
1414 #ifdef CONFIG_CPU_FREQ
1415 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1416 dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
1419 #ifdef CONFIG_SH_STANDARD_BIOS
1420 sh_bios_gdb_detach();
1426 static int __devexit sci_remove(struct platform_device *dev)
1430 for (i = 0; i < SCI_NPORTS; i++)
1431 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1436 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1440 for (i = 0; i < SCI_NPORTS; i++) {
1441 struct sci_port *p = &sci_ports[i];
1443 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1444 uart_suspend_port(&sci_uart_driver, &p->port);
1450 static int sci_resume(struct platform_device *dev)
1454 for (i = 0; i < SCI_NPORTS; i++) {
1455 struct sci_port *p = &sci_ports[i];
1457 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1458 uart_resume_port(&sci_uart_driver, &p->port);
1464 static struct platform_driver sci_driver = {
1466 .remove = __devexit_p(sci_remove),
1467 .suspend = sci_suspend,
1468 .resume = sci_resume,
1471 .owner = THIS_MODULE,
1475 static int __init sci_init(void)
1483 ret = uart_register_driver(&sci_uart_driver);
1484 if (likely(ret == 0)) {
1485 ret = platform_driver_register(&sci_driver);
1487 uart_unregister_driver(&sci_uart_driver);
1493 static void __exit sci_exit(void)
1495 platform_driver_unregister(&sci_driver);
1496 uart_unregister_driver(&sci_uart_driver);
1499 module_init(sci_init);
1500 module_exit(sci_exit);
1502 MODULE_LICENSE("GPL");