2 * Blackfin On-Chip Serial Driver
4 * Copyright 2006-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
31 #include <asm/mach/bfin_serial_5xx.h>
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
37 #include <asm/cacheflush.h>
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME "ttyBF"
42 #define BFIN_SERIAL_MAJOR 204
43 #define BFIN_SERIAL_MINOR 64
46 * Setup for console. Argument comes from the menuconfig
48 #define DMA_RX_XCOUNT 512
49 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
51 #define DMA_RX_FLUSH_JIFFIES 5
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
62 * interrupts are disabled on entry
64 static void bfin_serial_stop_tx(struct uart_port *port)
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
71 while (!(UART_GET_LSR(uart) & TEMT))
74 #ifdef CONFIG_SERIAL_BFIN_DMA
75 disable_dma(uart->tx_dma_channel);
79 UART_PUT_LSR(uart, TFI);
80 UART_CLEAR_IER(uart, ETBEI);
82 ier = UART_GET_IER(uart);
84 UART_PUT_IER(uart, ier);
90 * port is locked and interrupts are disabled
92 static void bfin_serial_start_tx(struct uart_port *port)
94 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
96 #ifdef CONFIG_SERIAL_BFIN_DMA
97 bfin_serial_dma_tx_chars(uart);
100 UART_SET_IER(uart, ETBEI);
103 ier = UART_GET_IER(uart);
105 UART_PUT_IER(uart, ier);
107 bfin_serial_tx_chars(uart);
112 * Interrupts are enabled
114 static void bfin_serial_stop_rx(struct uart_port *port)
116 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
117 #ifdef CONFIG_KGDB_UART
118 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
121 UART_CLEAR_IER(uart, ERBFI);
125 ier = UART_GET_IER(uart);
127 UART_PUT_IER(uart, ier);
129 #ifdef CONFIG_KGDB_UART
135 * Set the modem control timer to fire immediately.
137 static void bfin_serial_enable_ms(struct uart_port *port)
141 #ifdef CONFIG_KGDB_UART
142 static int kgdb_entry_state;
144 void kgdb_put_debug_char(int chr)
146 struct bfin_serial_port *uart;
148 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
149 uart = &bfin_serial_ports[0];
151 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
153 while (!(UART_GET_LSR(uart) & THRE)) {
158 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
161 UART_PUT_CHAR(uart, (unsigned char)chr);
165 int kgdb_get_debug_char(void)
167 struct bfin_serial_port *uart;
170 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
171 uart = &bfin_serial_ports[0];
173 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
175 while(!(UART_GET_LSR(uart) & DR)) {
179 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
182 chr = UART_GET_CHAR(uart);
189 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
190 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
191 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
193 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
194 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
197 #ifdef CONFIG_SERIAL_BFIN_PIO
198 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
200 struct tty_struct *tty = uart->port.info->tty;
201 unsigned int status, ch, flg;
202 static struct timeval anomaly_start = { .tv_sec = 0 };
203 #ifdef CONFIG_KGDB_UART
204 struct pt_regs *regs = get_irq_regs();
207 status = UART_GET_LSR(uart);
208 UART_CLEAR_LSR(uart);
210 ch = UART_GET_CHAR(uart);
211 uart->port.icount.rx++;
213 #ifdef CONFIG_KGDB_UART
214 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
215 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
216 kgdb_breakkey_pressed(regs);
218 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
219 kgdb_entry_state = 1;
220 } else if (kgdb_entry_state == 1 && ch == 'q') {
221 kgdb_entry_state = 0;
222 kgdb_breakkey_pressed(regs);
224 } else if (ch == 0x3) {/* Ctrl + C */
225 kgdb_entry_state = 0;
226 kgdb_breakkey_pressed(regs);
229 kgdb_entry_state = 0;
234 if (ANOMALY_05000230) {
235 /* The BF533 (and BF561) family of processors have a nice anomaly
236 * where they continuously generate characters for a "single" break.
237 * We have to basically ignore this flood until the "next" valid
238 * character comes across. Due to the nature of the flood, it is
239 * not possible to reliably catch bytes that are sent too quickly
240 * after this break. So application code talking to the Blackfin
241 * which sends a break signal must allow at least 1.5 character
242 * times after the end of the break for things to stabilize. This
243 * timeout was picked as it must absolutely be larger than 1
244 * character time +/- some percent. So 1.5 sounds good. All other
245 * Blackfin families operate properly. Woo.
246 * Note: While Anomaly 05000230 does not directly address this,
247 * the changes that went in for it also fixed this issue.
248 * That anomaly was fixed in 0.5+ silicon. I like bunnies.
250 if (anomaly_start.tv_sec) {
254 if ((~ch & (~ch + 1)) & 0xff)
255 goto known_good_char;
257 do_gettimeofday(&curr);
258 if (curr.tv_sec - anomaly_start.tv_sec > 1)
259 goto known_good_char;
262 if (curr.tv_sec != anomaly_start.tv_sec)
263 usecs += USEC_PER_SEC;
264 usecs += curr.tv_usec - anomaly_start.tv_usec;
266 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
267 goto known_good_char;
270 anomaly_start.tv_sec = 0;
272 anomaly_start = curr;
277 anomaly_start.tv_sec = 0;
282 if (ANOMALY_05000230)
283 if (bfin_revid() < 5)
284 do_gettimeofday(&anomaly_start);
285 uart->port.icount.brk++;
286 if (uart_handle_break(&uart->port))
288 status &= ~(PE | FE);
291 uart->port.icount.parity++;
293 uart->port.icount.overrun++;
295 uart->port.icount.frame++;
297 status &= uart->port.read_status_mask;
301 else if (status & PE)
303 else if (status & FE)
308 if (uart_handle_sysrq_char(&uart->port, ch))
311 uart_insert_char(&uart->port, status, OE, ch, flg);
314 tty_flip_buffer_push(tty);
317 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
319 struct circ_buf *xmit = &uart->port.info->xmit;
321 if (uart->port.x_char) {
322 UART_PUT_CHAR(uart, uart->port.x_char);
323 uart->port.icount.tx++;
324 uart->port.x_char = 0;
327 * Check the modem control lines before
328 * transmitting anything.
330 bfin_serial_mctrl_check(uart);
332 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
333 bfin_serial_stop_tx(&uart->port);
337 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
338 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
339 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
340 uart->port.icount.tx++;
344 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
345 uart_write_wakeup(&uart->port);
347 if (uart_circ_empty(xmit))
348 bfin_serial_stop_tx(&uart->port);
351 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
353 struct bfin_serial_port *uart = dev_id;
355 spin_lock(&uart->port.lock);
356 while (UART_GET_LSR(uart) & DR)
357 bfin_serial_rx_chars(uart);
358 spin_unlock(&uart->port.lock);
363 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
365 struct bfin_serial_port *uart = dev_id;
367 spin_lock(&uart->port.lock);
368 if (UART_GET_LSR(uart) & THRE)
369 bfin_serial_tx_chars(uart);
370 spin_unlock(&uart->port.lock);
376 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
377 static void bfin_serial_do_work(struct work_struct *work)
379 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
381 bfin_serial_mctrl_check(uart);
385 #ifdef CONFIG_SERIAL_BFIN_DMA
386 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
388 struct circ_buf *xmit = &uart->port.info->xmit;
396 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
397 bfin_serial_stop_tx(&uart->port);
402 if (uart->port.x_char) {
403 UART_PUT_CHAR(uart, uart->port.x_char);
404 uart->port.icount.tx++;
405 uart->port.x_char = 0;
409 * Check the modem control lines before
410 * transmitting anything.
412 bfin_serial_mctrl_check(uart);
414 spin_lock_irqsave(&uart->port.lock, flags);
415 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
416 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
417 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
418 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
419 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
420 set_dma_config(uart->tx_dma_channel,
421 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
426 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
427 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
428 set_dma_x_modify(uart->tx_dma_channel, 1);
429 enable_dma(uart->tx_dma_channel);
431 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
432 uart->port.icount.tx += uart->tx_count;
435 UART_SET_IER(uart, ETBEI);
437 ier = UART_GET_IER(uart);
439 UART_PUT_IER(uart, ier);
441 spin_unlock_irqrestore(&uart->port.lock, flags);
444 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
446 struct tty_struct *tty = uart->port.info->tty;
449 status = UART_GET_LSR(uart);
450 UART_CLEAR_LSR(uart);
452 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
455 uart->port.icount.brk++;
456 if (uart_handle_break(&uart->port))
457 goto dma_ignore_char;
458 status &= ~(PE | FE);
461 uart->port.icount.parity++;
463 uart->port.icount.overrun++;
465 uart->port.icount.frame++;
467 status &= uart->port.read_status_mask;
471 else if (status & PE)
473 else if (status & FE)
478 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
479 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
480 goto dma_ignore_char;
481 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
485 tty_flip_buffer_push(tty);
488 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
493 spin_lock_irqsave(&uart->port.lock, flags);
494 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
495 if (x_pos == DMA_RX_XCOUNT)
498 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
500 if (pos>uart->rx_dma_buf.tail) {
501 uart->rx_dma_buf.tail = pos;
502 bfin_serial_dma_rx_chars(uart);
503 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
505 spin_unlock_irqrestore(&uart->port.lock, flags);
506 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
507 add_timer(&(uart->rx_dma_timer));
510 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
512 struct bfin_serial_port *uart = dev_id;
513 struct circ_buf *xmit = &uart->port.info->xmit;
516 spin_lock(&uart->port.lock);
517 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
518 clear_dma_irqstat(uart->tx_dma_channel);
519 disable_dma(uart->tx_dma_channel);
521 UART_CLEAR_IER(uart, ETBEI);
523 ier = UART_GET_IER(uart);
525 UART_PUT_IER(uart, ier);
527 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
528 uart_write_wakeup(&uart->port);
532 bfin_serial_dma_tx_chars(uart);
535 spin_unlock(&uart->port.lock);
539 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
541 struct bfin_serial_port *uart = dev_id;
542 unsigned short irqstat;
544 uart->rx_dma_nrows++;
545 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
546 uart->rx_dma_nrows = 0;
547 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
548 bfin_serial_dma_rx_chars(uart);
549 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
551 spin_lock(&uart->port.lock);
552 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
553 clear_dma_irqstat(uart->rx_dma_channel);
555 spin_unlock(&uart->port.lock);
561 * Return TIOCSER_TEMT when transmitter is not busy.
563 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
565 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
568 lsr = UART_GET_LSR(uart);
575 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
577 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
578 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
579 if (uart->cts_pin < 0)
580 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
583 if (UART_GET_MSR(uart) & CTS)
585 if (gpio_get_value(uart->cts_pin))
587 return TIOCM_DSR | TIOCM_CAR;
590 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
593 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
595 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
596 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
597 if (uart->rts_pin < 0)
600 if (mctrl & TIOCM_RTS)
602 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
604 gpio_set_value(uart->rts_pin, 0);
608 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
610 gpio_set_value(uart->rts_pin, 1);
616 * Handle any change of modem status signal since we were last called.
618 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
620 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
622 struct uart_info *info = uart->port.info;
623 struct tty_struct *tty = info->tty;
625 status = bfin_serial_get_mctrl(&uart->port);
626 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
627 if (!(status & TIOCM_CTS)) {
629 schedule_work(&uart->cts_workqueue);
637 * Interrupts are always disabled.
639 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
641 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
642 u16 lcr = UART_GET_LCR(uart);
647 UART_PUT_LCR(uart, lcr);
651 static int bfin_serial_startup(struct uart_port *port)
653 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
655 #ifdef CONFIG_SERIAL_BFIN_DMA
656 dma_addr_t dma_handle;
658 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
659 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
663 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
664 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
665 free_dma(uart->rx_dma_channel);
669 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
670 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
672 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
673 uart->rx_dma_buf.head = 0;
674 uart->rx_dma_buf.tail = 0;
675 uart->rx_dma_nrows = 0;
677 set_dma_config(uart->rx_dma_channel,
678 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
679 INTR_ON_ROW, DIMENSION_2D,
682 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
683 set_dma_x_modify(uart->rx_dma_channel, 1);
684 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
685 set_dma_y_modify(uart->rx_dma_channel, 1);
686 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
687 enable_dma(uart->rx_dma_channel);
689 uart->rx_dma_timer.data = (unsigned long)(uart);
690 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
691 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
692 add_timer(&(uart->rx_dma_timer));
694 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
695 "BFIN_UART_RX", uart)) {
696 # ifdef CONFIG_KGDB_UART
697 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
699 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
701 # ifdef CONFIG_KGDB_UART
708 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
709 "BFIN_UART_TX", uart)) {
710 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
711 free_irq(uart->port.irq, uart);
716 UART_SET_IER(uart, ERBFI);
718 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
723 static void bfin_serial_shutdown(struct uart_port *port)
725 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
727 #ifdef CONFIG_SERIAL_BFIN_DMA
728 disable_dma(uart->tx_dma_channel);
729 free_dma(uart->tx_dma_channel);
730 disable_dma(uart->rx_dma_channel);
731 free_dma(uart->rx_dma_channel);
732 del_timer(&(uart->rx_dma_timer));
733 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
735 #ifdef CONFIG_KGDB_UART
736 if (uart->port.line != CONFIG_KGDB_UART_PORT)
738 free_irq(uart->port.irq, uart);
739 free_irq(uart->port.irq+1, uart);
744 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
745 struct ktermios *old)
747 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
749 unsigned int baud, quot;
750 unsigned short val, ier, lsr, lcr = 0;
752 switch (termios->c_cflag & CSIZE) {
766 printk(KERN_ERR "%s: word lengh not supported\n",
770 if (termios->c_cflag & CSTOPB)
772 if (termios->c_cflag & PARENB)
774 if (!(termios->c_cflag & PARODD))
776 if (termios->c_cflag & CMSPAR)
779 port->read_status_mask = OE;
780 if (termios->c_iflag & INPCK)
781 port->read_status_mask |= (FE | PE);
782 if (termios->c_iflag & (BRKINT | PARMRK))
783 port->read_status_mask |= BI;
786 * Characters to ignore
788 port->ignore_status_mask = 0;
789 if (termios->c_iflag & IGNPAR)
790 port->ignore_status_mask |= FE | PE;
791 if (termios->c_iflag & IGNBRK) {
792 port->ignore_status_mask |= BI;
794 * If we're ignoring parity and break indicators,
795 * ignore overruns too (for real raw support).
797 if (termios->c_iflag & IGNPAR)
798 port->ignore_status_mask |= OE;
801 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
802 quot = uart_get_divisor(port, baud);
803 spin_lock_irqsave(&uart->port.lock, flags);
805 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
808 lsr = UART_GET_LSR(uart);
809 } while (!(lsr & TEMT));
812 ier = UART_GET_IER(uart);
814 UART_CLEAR_IER(uart, 0xF);
816 UART_PUT_IER(uart, 0);
820 /* Set DLAB in LCR to Access DLL and DLH */
821 val = UART_GET_LCR(uart);
823 UART_PUT_LCR(uart, val);
827 UART_PUT_DLL(uart, quot & 0xFF);
829 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
833 /* Clear DLAB in LCR to Access THR RBR IER */
834 val = UART_GET_LCR(uart);
836 UART_PUT_LCR(uart, val);
840 UART_PUT_LCR(uart, lcr);
844 UART_SET_IER(uart, ier);
846 UART_PUT_IER(uart, ier);
849 val = UART_GET_GCTL(uart);
851 UART_PUT_GCTL(uart, val);
853 spin_unlock_irqrestore(&uart->port.lock, flags);
856 static const char *bfin_serial_type(struct uart_port *port)
858 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
860 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
864 * Release the memory region(s) being used by 'port'.
866 static void bfin_serial_release_port(struct uart_port *port)
871 * Request the memory region(s) being used by 'port'.
873 static int bfin_serial_request_port(struct uart_port *port)
879 * Configure/autoconfigure the port.
881 static void bfin_serial_config_port(struct uart_port *port, int flags)
883 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
885 if (flags & UART_CONFIG_TYPE &&
886 bfin_serial_request_port(&uart->port) == 0)
887 uart->port.type = PORT_BFIN;
891 * Verify the new serial_struct (for TIOCSSERIAL).
892 * The only change we allow are to the flags and type, and
893 * even then only between PORT_BFIN and PORT_UNKNOWN
896 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
901 static struct uart_ops bfin_serial_pops = {
902 .tx_empty = bfin_serial_tx_empty,
903 .set_mctrl = bfin_serial_set_mctrl,
904 .get_mctrl = bfin_serial_get_mctrl,
905 .stop_tx = bfin_serial_stop_tx,
906 .start_tx = bfin_serial_start_tx,
907 .stop_rx = bfin_serial_stop_rx,
908 .enable_ms = bfin_serial_enable_ms,
909 .break_ctl = bfin_serial_break_ctl,
910 .startup = bfin_serial_startup,
911 .shutdown = bfin_serial_shutdown,
912 .set_termios = bfin_serial_set_termios,
913 .type = bfin_serial_type,
914 .release_port = bfin_serial_release_port,
915 .request_port = bfin_serial_request_port,
916 .config_port = bfin_serial_config_port,
917 .verify_port = bfin_serial_verify_port,
920 static void __init bfin_serial_init_ports(void)
922 static int first = 1;
929 for (i = 0; i < nr_ports; i++) {
930 bfin_serial_ports[i].port.uartclk = get_sclk();
931 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
932 bfin_serial_ports[i].port.line = i;
933 bfin_serial_ports[i].port.iotype = UPIO_MEM;
934 bfin_serial_ports[i].port.membase =
935 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
936 bfin_serial_ports[i].port.mapbase =
937 bfin_serial_resource[i].uart_base_addr;
938 bfin_serial_ports[i].port.irq =
939 bfin_serial_resource[i].uart_irq;
940 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
941 #ifdef CONFIG_SERIAL_BFIN_DMA
942 bfin_serial_ports[i].tx_done = 1;
943 bfin_serial_ports[i].tx_count = 0;
944 bfin_serial_ports[i].tx_dma_channel =
945 bfin_serial_resource[i].uart_tx_dma_channel;
946 bfin_serial_ports[i].rx_dma_channel =
947 bfin_serial_resource[i].uart_rx_dma_channel;
948 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
950 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
951 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
952 bfin_serial_ports[i].cts_pin =
953 bfin_serial_resource[i].uart_cts_pin;
954 bfin_serial_ports[i].rts_pin =
955 bfin_serial_resource[i].uart_rts_pin;
957 bfin_serial_hw_init(&bfin_serial_ports[i]);
962 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
964 * If the port was already initialised (eg, by a boot loader),
965 * try to determine the current setup.
968 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
969 int *parity, int *bits)
971 unsigned short status;
973 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
974 if (status == (ERBFI | ETBEI)) {
975 /* ok, the port was enabled */
976 unsigned short lcr, val;
977 unsigned short dlh, dll;
979 lcr = UART_GET_LCR(uart);
988 switch (lcr & 0x03) {
989 case 0: *bits = 5; break;
990 case 1: *bits = 6; break;
991 case 2: *bits = 7; break;
992 case 3: *bits = 8; break;
995 /* Set DLAB in LCR to Access DLL and DLH */
996 val = UART_GET_LCR(uart);
998 UART_PUT_LCR(uart, val);
1001 dll = UART_GET_DLL(uart);
1002 dlh = UART_GET_DLH(uart);
1004 #ifndef CONFIG_BF54x
1005 /* Clear DLAB in LCR to Access THR RBR IER */
1006 val = UART_GET_LCR(uart);
1008 UART_PUT_LCR(uart, val);
1011 *baud = get_sclk() / (16*(dll | dlh << 8));
1013 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1017 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1018 static struct uart_driver bfin_serial_reg;
1021 bfin_serial_console_setup(struct console *co, char *options)
1023 struct bfin_serial_port *uart;
1024 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1028 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1036 * Check whether an invalid uart number has been specified, and
1037 * if so, search for the first available port that does have
1040 if (co->index == -1 || co->index >= nr_ports)
1042 uart = &bfin_serial_ports[co->index];
1044 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1046 uart_parse_options(options, &baud, &parity, &bits, &flow);
1048 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1050 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1055 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1056 defined (CONFIG_EARLY_PRINTK) */
1058 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1059 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1061 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1062 while (!(UART_GET_LSR(uart) & THRE))
1064 UART_PUT_CHAR(uart, ch);
1069 * Interrupts are disabled on entering
1072 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1074 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1077 spin_lock_irqsave(&uart->port.lock, flags);
1078 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1079 spin_unlock_irqrestore(&uart->port.lock, flags);
1083 static struct console bfin_serial_console = {
1084 .name = BFIN_SERIAL_NAME,
1085 .write = bfin_serial_console_write,
1086 .device = uart_console_device,
1087 .setup = bfin_serial_console_setup,
1088 .flags = CON_PRINTBUFFER,
1090 .data = &bfin_serial_reg,
1093 static int __init bfin_serial_rs_console_init(void)
1095 bfin_serial_init_ports();
1096 register_console(&bfin_serial_console);
1097 #ifdef CONFIG_KGDB_UART
1098 kgdb_entry_state = 0;
1103 console_initcall(bfin_serial_rs_console_init);
1105 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1107 #define BFIN_SERIAL_CONSOLE NULL
1108 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1111 #ifdef CONFIG_EARLY_PRINTK
1112 static __init void early_serial_putc(struct uart_port *port, int ch)
1114 unsigned timeout = 0xffff;
1115 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1117 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1119 UART_PUT_CHAR(uart, ch);
1122 static __init void early_serial_write(struct console *con, const char *s,
1125 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1128 for (i = 0; i < n; i++, s++) {
1130 early_serial_putc(&uart->port, '\r');
1131 early_serial_putc(&uart->port, *s);
1135 static struct __init console bfin_early_serial_console = {
1136 .name = "early_BFuart",
1137 .write = early_serial_write,
1138 .device = uart_console_device,
1139 .flags = CON_PRINTBUFFER,
1140 .setup = bfin_serial_console_setup,
1142 .data = &bfin_serial_reg,
1145 struct console __init *bfin_earlyserial_init(unsigned int port,
1148 struct bfin_serial_port *uart;
1151 if (port == -1 || port >= nr_ports)
1153 bfin_serial_init_ports();
1154 bfin_early_serial_console.index = port;
1155 uart = &bfin_serial_ports[port];
1161 bfin_serial_set_termios(&uart->port, &t, &t);
1162 return &bfin_early_serial_console;
1165 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1167 static struct uart_driver bfin_serial_reg = {
1168 .owner = THIS_MODULE,
1169 .driver_name = "bfin-uart",
1170 .dev_name = BFIN_SERIAL_NAME,
1171 .major = BFIN_SERIAL_MAJOR,
1172 .minor = BFIN_SERIAL_MINOR,
1174 .cons = BFIN_SERIAL_CONSOLE,
1177 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1179 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1182 uart_suspend_port(&bfin_serial_reg, &uart->port);
1187 static int bfin_serial_resume(struct platform_device *dev)
1189 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1192 uart_resume_port(&bfin_serial_reg, &uart->port);
1197 static int bfin_serial_probe(struct platform_device *dev)
1199 struct resource *res = dev->resource;
1202 for (i = 0; i < dev->num_resources; i++, res++)
1203 if (res->flags & IORESOURCE_MEM)
1206 if (i < dev->num_resources) {
1207 for (i = 0; i < nr_ports; i++, res++) {
1208 if (bfin_serial_ports[i].port.mapbase != res->start)
1210 bfin_serial_ports[i].port.dev = &dev->dev;
1211 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1212 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1219 static int bfin_serial_remove(struct platform_device *pdev)
1221 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1224 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1225 gpio_free(uart->cts_pin);
1226 gpio_free(uart->rts_pin);
1229 platform_set_drvdata(pdev, NULL);
1232 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1237 static struct platform_driver bfin_serial_driver = {
1238 .probe = bfin_serial_probe,
1239 .remove = bfin_serial_remove,
1240 .suspend = bfin_serial_suspend,
1241 .resume = bfin_serial_resume,
1243 .name = "bfin-uart",
1247 static int __init bfin_serial_init(void)
1250 #ifdef CONFIG_KGDB_UART
1251 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1255 pr_info("Serial: Blackfin serial driver\n");
1257 bfin_serial_init_ports();
1259 ret = uart_register_driver(&bfin_serial_reg);
1261 ret = platform_driver_register(&bfin_serial_driver);
1263 pr_debug("uart register failed\n");
1264 uart_unregister_driver(&bfin_serial_reg);
1267 #ifdef CONFIG_KGDB_UART
1268 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1269 request_irq(uart->port.irq, bfin_serial_rx_int,
1270 IRQF_DISABLED, "BFIN_UART_RX", uart);
1271 pr_info("Request irq for kgdb uart port\n");
1273 UART_SET_IER(uart, ERBFI);
1275 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1278 t.c_cflag = CS8|B57600;
1282 t.c_line = CONFIG_KGDB_UART_PORT;
1283 bfin_serial_set_termios(&uart->port, &t, &t);
1289 static void __exit bfin_serial_exit(void)
1291 platform_driver_unregister(&bfin_serial_driver);
1292 uart_unregister_driver(&bfin_serial_reg);
1295 module_init(bfin_serial_init);
1296 module_exit(bfin_serial_exit);
1298 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1299 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1300 MODULE_LICENSE("GPL");
1301 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);