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   1 /*
   2  * File:         drivers/serial/bfin_5xx.c
   3  * Based on:     Based on drivers/serial/sa1100.c
   4  * Author:       Aubrey Li <aubrey.li@analog.com>
   5  *
   6  * Created:
   7  * Description:  Driver for blackfin 5xx serial ports
   8  *
   9  * Modified:
  10  *               Copyright 2006 Analog Devices Inc.
  11  *
  12  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2 of the License, or
  17  * (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, see the file COPYING, or write
  26  * to the Free Software Foundation, Inc.,
  27  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28  */
  29
  30 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  31 #define SUPPORT_SYSRQ
  32 #endif
  33
  34 #include <linux/module.h>
  35 #include <linux/ioport.h>
  36 #include <linux/init.h>
  37 #include <linux/console.h>
  38 #include <linux/sysrq.h>
  39 #include <linux/platform_device.h>
  40 #include <linux/tty.h>
  41 #include <linux/tty_flip.h>
  42 #include <linux/serial_core.h>
  43
  44 #ifdef CONFIG_KGDB_UART
  45 #include <linux/kgdb.h>
  46 #include <asm/irq_regs.h>
  47 #endif
  48
  49 #include <asm/gpio.h>
  50 #include <asm/mach/bfin_serial_5xx.h>
  51
  52 #ifdef CONFIG_SERIAL_BFIN_DMA
  53 #include <linux/dma-mapping.h>
  54 #include <asm/io.h>
  55 #include <asm/irq.h>
  56 #include <asm/cacheflush.h>
  57 #endif
  58
  59 /* UART name and device definitions */
  60 #define BFIN_SERIAL_NAME        "ttyBF"
  61 #define BFIN_SERIAL_MAJOR       204
  62 #define BFIN_SERIAL_MINOR       64
  63
  64 /*
  65  * Setup for console. Argument comes from the menuconfig
  66  */
  67 #define DMA_RX_XCOUNT           512
  68 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  69
  70 #define DMA_RX_FLUSH_JIFFIES    5
  71
  72 #ifdef CONFIG_SERIAL_BFIN_DMA
  73 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  74 #else
  75 static void bfin_serial_do_work(struct work_struct *work);
  76 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  77 #endif
  78
  79 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  80
  81 /*
  82  * interrupts are disabled on entry
  83  */
  84 static void bfin_serial_stop_tx(struct uart_port *port)
  85 {
  86         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  87 #ifndef CONFIG_BF54x
  88         unsigned short ier;
  89 #endif
  90
  91         while (!(UART_GET_LSR(uart) & TEMT))
  92                 continue;
  93
  94 #ifdef CONFIG_SERIAL_BFIN_DMA
  95         disable_dma(uart->tx_dma_channel);
  96 #else
  97 #ifdef CONFIG_BF54x
  98         /* Waiting for Transmission Finished */
  99         while (!(UART_GET_LSR(uart) & TFI))
 100                 continue;
 101         /* Clear TFI bit */
 102         UART_PUT_LSR(uart, TFI);
 103         UART_CLEAR_IER(uart, ETBEI);
 104 #else
 105         ier = UART_GET_IER(uart);
 106         ier &= ~ETBEI;
 107         UART_PUT_IER(uart, ier);
 108 #endif
 109 #endif
 110 }
 111
 112 /*
 113  * port is locked and interrupts are disabled
 114  */
 115 static void bfin_serial_start_tx(struct uart_port *port)
 116 {
 117         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 118
 119 #ifdef CONFIG_SERIAL_BFIN_DMA
 120         bfin_serial_dma_tx_chars(uart);
 121 #else
 122 #ifdef CONFIG_BF54x
 123         UART_SET_IER(uart, ETBEI);
 124 #else
 125         unsigned short ier;
 126         ier = UART_GET_IER(uart);
 127         ier |= ETBEI;
 128         UART_PUT_IER(uart, ier);
 129 #endif
 130         bfin_serial_tx_chars(uart);
 131 #endif
 132 }
 133
 134 /*
 135  * Interrupts are enabled
 136  */
 137 static void bfin_serial_stop_rx(struct uart_port *port)
 138 {
 139         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 140 #ifdef  CONFIG_KGDB_UART
 141         if (uart->port.line != CONFIG_KGDB_UART_PORT) {
 142 #endif
 143 #ifdef CONFIG_BF54x
 144         UART_CLEAR_IER(uart, ERBFI);
 145 #else
 146         unsigned short ier;
 147
 148         ier = UART_GET_IER(uart);
 149         ier &= ~ERBFI;
 150         UART_PUT_IER(uart, ier);
 151 #endif
 152 #ifdef  CONFIG_KGDB_UART
 153         }
 154 #endif
 155 }
 156
 157 /*
 158  * Set the modem control timer to fire immediately.
 159  */
 160 static void bfin_serial_enable_ms(struct uart_port *port)
 161 {
 162 }
 163
 164 #ifdef CONFIG_KGDB_UART
 165 static int kgdb_entry_state;
 166
 167 void kgdb_put_debug_char(int chr)
 168 {
 169         struct bfin_serial_port *uart;
 170
 171         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
 172                 uart = &bfin_serial_ports[0];
 173         else
 174                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
 175
 176         while (!(UART_GET_LSR(uart) & THRE)) {
 177                 SSYNC();
 178         }
 179
 180 #ifndef CONFIG_BF54x
 181         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
 182         SSYNC();
 183 #endif
 184         UART_PUT_CHAR(uart, (unsigned char)chr);
 185         SSYNC();
 186 }
 187
 188 int kgdb_get_debug_char(void)
 189 {
 190         struct bfin_serial_port *uart;
 191         unsigned char chr;
 192
 193         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
 194                 uart = &bfin_serial_ports[0];
 195         else
 196                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
 197
 198         while(!(UART_GET_LSR(uart) & DR)) {
 199                 SSYNC();
 200         }
 201 #ifndef CONFIG_BF54x
 202         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
 203         SSYNC();
 204 #endif
 205         chr = UART_GET_CHAR(uart);
 206         SSYNC();
 207
 208         return chr;
 209 }
 210 #endif
 211
 212 #ifdef CONFIG_SERIAL_BFIN_PIO
 213 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 214 {
 215         struct tty_struct *tty = uart->port.info->tty;
 216         unsigned int status, ch, flg;
 217         static int in_break = 0;
 218 #ifdef CONFIG_KGDB_UART
 219         struct pt_regs *regs = get_irq_regs();
 220 #endif
 221
 222         ch = UART_GET_CHAR(uart);
 223         status = UART_GET_LSR(uart);
 224         uart->port.icount.rx++;
 225
 226 #ifdef CONFIG_KGDB_UART
 227         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
 228                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
 229                         kgdb_breakkey_pressed(regs);
 230                         return;
 231                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
 232                         kgdb_entry_state = 1;
 233                 } else if (kgdb_entry_state == 1 && ch == 'q') {
 234                         kgdb_entry_state = 0;
 235                         kgdb_breakkey_pressed(regs);
 236                         return;
 237                 } else if (ch == 0x3) {/* Ctrl + C */
 238                         kgdb_entry_state = 0;
 239                         kgdb_breakkey_pressed(regs);
 240                         return;
 241                 } else {
 242                         kgdb_entry_state = 0;
 243                 }
 244         }
 245 #endif
 246
 247         if (ANOMALY_05000230) {
 248                 /* The BF533 family of processors have a nice misbehavior where
 249                  * they continuously generate characters for a "single" break.
 250                  * We have to basically ignore this flood until the "next" valid
 251                  * character comes across.  All other Blackfin families operate
 252                  * properly though.
 253                  * Note: While Anomaly 05000230 does not directly address this,
 254                  *       the changes that went in for it also fixed this issue.
 255                  */
 256                 if (in_break) {
 257                         if (ch != 0) {
 258                                 in_break = 0;
 259                                 ch = UART_GET_CHAR(uart);
 260                                 if (bfin_revid() < 5)
 261                                         return;
 262                         } else
 263                                 return;
 264                 }
 265         }
 266
 267         if (status & BI) {
 268                 if (ANOMALY_05000230)
 269                         in_break = 1;
 270                 uart->port.icount.brk++;
 271                 if (uart_handle_break(&uart->port))
 272                         goto ignore_char;
 273                 status &= ~(PE | FE);
 274         }
 275         if (status & PE)
 276                 uart->port.icount.parity++;
 277         if (status & OE)
 278                 uart->port.icount.overrun++;
 279         if (status & FE)
 280                 uart->port.icount.frame++;
 281
 282         status &= uart->port.read_status_mask;
 283
 284         if (status & BI)
 285                 flg = TTY_BREAK;
 286         else if (status & PE)
 287                 flg = TTY_PARITY;
 288         else if (status & FE)
 289                 flg = TTY_FRAME;
 290         else
 291                 flg = TTY_NORMAL;
 292
 293         if (uart_handle_sysrq_char(&uart->port, ch))
 294                 goto ignore_char;
 295
 296         uart_insert_char(&uart->port, status, OE, ch, flg);
 297
 298  ignore_char:
 299         tty_flip_buffer_push(tty);
 300 }
 301
 302 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 303 {
 304         struct circ_buf *xmit = &uart->port.info->xmit;
 305
 306         if (uart->port.x_char) {
 307                 UART_PUT_CHAR(uart, uart->port.x_char);
 308                 uart->port.icount.tx++;
 309                 uart->port.x_char = 0;
 310                 return;
 311         }
 312         /*
 313          * Check the modem control lines before
 314          * transmitting anything.
 315          */
 316         bfin_serial_mctrl_check(uart);
 317
 318         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 319                 bfin_serial_stop_tx(&uart->port);
 320                 return;
 321         }
 322
 323         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 324                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 325                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 326                 uart->port.icount.tx++;
 327                 SSYNC();
 328         }
 329
 330         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 331                 uart_write_wakeup(&uart->port);
 332
 333         if (uart_circ_empty(xmit))
 334                 bfin_serial_stop_tx(&uart->port);
 335 }
 336
 337 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 338 {
 339         struct bfin_serial_port *uart = dev_id;
 340
 341         spin_lock(&uart->port.lock);
 342         while ((UART_GET_IER(uart) & ERBFI) && (UART_GET_LSR(uart) & DR))
 343                 bfin_serial_rx_chars(uart);
 344         spin_unlock(&uart->port.lock);
 345
 346         return IRQ_HANDLED;
 347 }
 348
 349 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 350 {
 351         struct bfin_serial_port *uart = dev_id;
 352
 353         spin_lock(&uart->port.lock);
 354         if ((UART_GET_IER(uart) & ETBEI) && (UART_GET_LSR(uart) & THRE))
 355                 bfin_serial_tx_chars(uart);
 356         spin_unlock(&uart->port.lock);
 357
 358         return IRQ_HANDLED;
 359 }
 360
 361
 362 static void bfin_serial_do_work(struct work_struct *work)
 363 {
 364         struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
 365
 366         bfin_serial_mctrl_check(uart);
 367 }
 368 #endif
 369
 370 #ifdef CONFIG_SERIAL_BFIN_DMA
 371 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 372 {
 373         struct circ_buf *xmit = &uart->port.info->xmit;
 374         unsigned short ier;
 375         int flags = 0;
 376
 377         if (!uart->tx_done)
 378                 return;
 379
 380         uart->tx_done = 0;
 381
 382         if (uart->port.x_char) {
 383                 UART_PUT_CHAR(uart, uart->port.x_char);
 384                 uart->port.icount.tx++;
 385                 uart->port.x_char = 0;
 386                 uart->tx_done = 1;
 387                 return;
 388         }
 389         /*
 390          * Check the modem control lines before
 391          * transmitting anything.
 392          */
 393         bfin_serial_mctrl_check(uart);
 394
 395         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 396                 bfin_serial_stop_tx(&uart->port);
 397                 uart->tx_done = 1;
 398                 return;
 399         }
 400
 401         spin_lock_irqsave(&uart->port.lock, flags);
 402         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 403         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 404                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 405         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 406                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 407         set_dma_config(uart->tx_dma_channel,
 408                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 409                         INTR_ON_BUF,
 410                         DIMENSION_LINEAR,
 411                         DATA_SIZE_8,
 412                         DMA_SYNC_RESTART));
 413         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 414         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 415         set_dma_x_modify(uart->tx_dma_channel, 1);
 416         enable_dma(uart->tx_dma_channel);
 417 #ifdef CONFIG_BF54x
 418         UART_SET_IER(uart, ETBEI);
 419 #else
 420         ier = UART_GET_IER(uart);
 421         ier |= ETBEI;
 422         UART_PUT_IER(uart, ier);
 423 #endif
 424         spin_unlock_irqrestore(&uart->port.lock, flags);
 425 }
 426
 427 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 428 {
 429         struct tty_struct *tty = uart->port.info->tty;
 430         int i, flg, status;
 431
 432         status = UART_GET_LSR(uart);
 433         uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
 434
 435         if (status & BI) {
 436                 uart->port.icount.brk++;
 437                 if (uart_handle_break(&uart->port))
 438                         goto dma_ignore_char;
 439                 status &= ~(PE | FE);
 440         }
 441         if (status & PE)
 442                 uart->port.icount.parity++;
 443         if (status & OE)
 444                 uart->port.icount.overrun++;
 445         if (status & FE)
 446                 uart->port.icount.frame++;
 447
 448         status &= uart->port.read_status_mask;
 449
 450         if (status & BI)
 451                 flg = TTY_BREAK;
 452         else if (status & PE)
 453                 flg = TTY_PARITY;
 454         else if (status & FE)
 455                 flg = TTY_FRAME;
 456         else
 457                 flg = TTY_NORMAL;
 458
 459         for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
 460                 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 461                         goto dma_ignore_char;
 462                 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
 463         }
 464
 465  dma_ignore_char:
 466         tty_flip_buffer_push(tty);
 467 }
 468
 469 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 470 {
 471         int x_pos, pos;
 472         int flags = 0;
 473
 474         bfin_serial_dma_tx_chars(uart);
 475
 476         spin_lock_irqsave(&uart->port.lock, flags);
 477         x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
 478         if (x_pos == DMA_RX_XCOUNT)
 479                 x_pos = 0;
 480
 481         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 482
 483         if (pos>uart->rx_dma_buf.tail) {
 484                 uart->rx_dma_buf.tail = pos;
 485                 bfin_serial_dma_rx_chars(uart);
 486                 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
 487         }
 488         spin_unlock_irqrestore(&uart->port.lock, flags);
 489         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 490         add_timer(&(uart->rx_dma_timer));
 491 }
 492
 493 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 494 {
 495         struct bfin_serial_port *uart = dev_id;
 496         struct circ_buf *xmit = &uart->port.info->xmit;
 497         unsigned short ier;
 498
 499         spin_lock(&uart->port.lock);
 500         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 501                 clear_dma_irqstat(uart->tx_dma_channel);
 502                 disable_dma(uart->tx_dma_channel);
 503 #ifdef CONFIG_BF54x
 504                 UART_CLEAR_IER(uart, ETBEI);
 505 #else
 506                 ier = UART_GET_IER(uart);
 507                 ier &= ~ETBEI;
 508                 UART_PUT_IER(uart, ier);
 509 #endif
 510                 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
 511                 uart->port.icount.tx+=uart->tx_count;
 512
 513                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 514                         uart_write_wakeup(&uart->port);
 515
 516                 if (uart_circ_empty(xmit))
 517                         bfin_serial_stop_tx(&uart->port);
 518                 uart->tx_done = 1;
 519         }
 520
 521         spin_unlock(&uart->port.lock);
 522         return IRQ_HANDLED;
 523 }
 524
 525 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 526 {
 527         struct bfin_serial_port *uart = dev_id;
 528         unsigned short irqstat;
 529
 530         uart->rx_dma_nrows++;
 531         if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
 532                 uart->rx_dma_nrows = 0;
 533                 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
 534                 bfin_serial_dma_rx_chars(uart);
 535                 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
 536         }
 537         spin_lock(&uart->port.lock);
 538         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 539         clear_dma_irqstat(uart->rx_dma_channel);
 540
 541         spin_unlock(&uart->port.lock);
 542         return IRQ_HANDLED;
 543 }
 544 #endif
 545
 546 /*
 547  * Return TIOCSER_TEMT when transmitter is not busy.
 548  */
 549 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 550 {
 551         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 552         unsigned short lsr;
 553
 554         lsr = UART_GET_LSR(uart);
 555         if (lsr & TEMT)
 556                 return TIOCSER_TEMT;
 557         else
 558                 return 0;
 559 }
 560
 561 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 562 {
 563 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 564         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 565         if (uart->cts_pin < 0)
 566                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 567
 568         if (gpio_get_value(uart->cts_pin))
 569                 return TIOCM_DSR | TIOCM_CAR;
 570         else
 571 #endif
 572                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 573 }
 574
 575 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 576 {
 577 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 578         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 579         if (uart->rts_pin < 0)
 580                 return;
 581
 582         if (mctrl & TIOCM_RTS)
 583                 gpio_set_value(uart->rts_pin, 0);
 584         else
 585                 gpio_set_value(uart->rts_pin, 1);
 586 #endif
 587 }
 588
 589 /*
 590  * Handle any change of modem status signal since we were last called.
 591  */
 592 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
 593 {
 594 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 595         unsigned int status;
 596 # ifdef CONFIG_SERIAL_BFIN_DMA
 597         struct uart_info *info = uart->port.info;
 598         struct tty_struct *tty = info->tty;
 599
 600         status = bfin_serial_get_mctrl(&uart->port);
 601         if (!(status & TIOCM_CTS)) {
 602                 tty->hw_stopped = 1;
 603         } else {
 604                 tty->hw_stopped = 0;
 605         }
 606 # else
 607         status = bfin_serial_get_mctrl(&uart->port);
 608         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 609         if (!(status & TIOCM_CTS))
 610                 schedule_work(&uart->cts_workqueue);
 611 # endif
 612 #endif
 613 }
 614
 615 /*
 616  * Interrupts are always disabled.
 617  */
 618 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 619 {
 620         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 621         u16 lcr = UART_GET_LCR(uart);
 622         if (break_state)
 623                 lcr |= SB;
 624         else
 625                 lcr &= ~SB;
 626         UART_PUT_LCR(uart, lcr);
 627         SSYNC();
 628 }
 629
 630 static int bfin_serial_startup(struct uart_port *port)
 631 {
 632         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 633
 634 #ifdef CONFIG_SERIAL_BFIN_DMA
 635         dma_addr_t dma_handle;
 636
 637         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 638                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 639                 return -EBUSY;
 640         }
 641
 642         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 643                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 644                 free_dma(uart->rx_dma_channel);
 645                 return -EBUSY;
 646         }
 647
 648         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 649         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 650
 651         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 652         uart->rx_dma_buf.head = 0;
 653         uart->rx_dma_buf.tail = 0;
 654         uart->rx_dma_nrows = 0;
 655
 656         set_dma_config(uart->rx_dma_channel,
 657                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 658                                 INTR_ON_ROW, DIMENSION_2D,
 659                                 DATA_SIZE_8,
 660                                 DMA_SYNC_RESTART));
 661         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 662         set_dma_x_modify(uart->rx_dma_channel, 1);
 663         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 664         set_dma_y_modify(uart->rx_dma_channel, 1);
 665         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 666         enable_dma(uart->rx_dma_channel);
 667
 668         uart->rx_dma_timer.data = (unsigned long)(uart);
 669         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 670         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 671         add_timer(&(uart->rx_dma_timer));
 672 #else
 673         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
 674              "BFIN_UART_RX", uart)) {
 675 # ifdef CONFIG_KGDB_UART
 676                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
 677 # endif
 678                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 679                 return -EBUSY;
 680 # ifdef CONFIG_KGDB_UART
 681                 }
 682 # endif
 683         }
 684
 685
 686         if (request_irq
 687             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
 688              "BFIN_UART_TX", uart)) {
 689                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 690                 free_irq(uart->port.irq, uart);
 691                 return -EBUSY;
 692         }
 693 #endif
 694 #ifdef CONFIG_BF54x
 695         UART_SET_IER(uart, ERBFI);
 696 #else
 697         UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
 698 #endif
 699         return 0;
 700 }
 701
 702 static void bfin_serial_shutdown(struct uart_port *port)
 703 {
 704         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 705
 706 #ifdef CONFIG_SERIAL_BFIN_DMA
 707         disable_dma(uart->tx_dma_channel);
 708         free_dma(uart->tx_dma_channel);
 709         disable_dma(uart->rx_dma_channel);
 710         free_dma(uart->rx_dma_channel);
 711         del_timer(&(uart->rx_dma_timer));
 712 #else
 713 #ifdef  CONFIG_KGDB_UART
 714         if (uart->port.line != CONFIG_KGDB_UART_PORT)
 715 #endif
 716         free_irq(uart->port.irq, uart);
 717         free_irq(uart->port.irq+1, uart);
 718 #endif
 719 }
 720
 721 static void
 722 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 723                    struct ktermios *old)
 724 {
 725         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 726         unsigned long flags;
 727         unsigned int baud, quot;
 728         unsigned short val, ier, lsr, lcr = 0;
 729
 730         switch (termios->c_cflag & CSIZE) {
 731         case CS8:
 732                 lcr = WLS(8);
 733                 break;
 734         case CS7:
 735                 lcr = WLS(7);
 736                 break;
 737         case CS6:
 738                 lcr = WLS(6);
 739                 break;
 740         case CS5:
 741                 lcr = WLS(5);
 742                 break;
 743         default:
 744                 printk(KERN_ERR "%s: word lengh not supported\n",
 745                         __FUNCTION__);
 746         }
 747
 748         if (termios->c_cflag & CSTOPB)
 749                 lcr |= STB;
 750         if (termios->c_cflag & PARENB)
 751                 lcr |= PEN;
 752         if (!(termios->c_cflag & PARODD))
 753                 lcr |= EPS;
 754         if (termios->c_cflag & CMSPAR)
 755                 lcr |= STP;
 756
 757         port->read_status_mask = OE;
 758         if (termios->c_iflag & INPCK)
 759                 port->read_status_mask |= (FE | PE);
 760         if (termios->c_iflag & (BRKINT | PARMRK))
 761                 port->read_status_mask |= BI;
 762
 763         /*
 764          * Characters to ignore
 765          */
 766         port->ignore_status_mask = 0;
 767         if (termios->c_iflag & IGNPAR)
 768                 port->ignore_status_mask |= FE | PE;
 769         if (termios->c_iflag & IGNBRK) {
 770                 port->ignore_status_mask |= BI;
 771                 /*
 772                  * If we're ignoring parity and break indicators,
 773                  * ignore overruns too (for real raw support).
 774                  */
 775                 if (termios->c_iflag & IGNPAR)
 776                         port->ignore_status_mask |= OE;
 777         }
 778
 779         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 780         quot = uart_get_divisor(port, baud);
 781         spin_lock_irqsave(&uart->port.lock, flags);
 782
 783         do {
 784                 lsr = UART_GET_LSR(uart);
 785         } while (!(lsr & TEMT));
 786
 787         /* Disable UART */
 788         ier = UART_GET_IER(uart);
 789 #ifdef CONFIG_BF54x
 790         UART_CLEAR_IER(uart, 0xF);
 791 #else
 792         UART_PUT_IER(uart, 0);
 793 #endif
 794
 795 #ifndef CONFIG_BF54x
 796         /* Set DLAB in LCR to Access DLL and DLH */
 797         val = UART_GET_LCR(uart);
 798         val |= DLAB;
 799         UART_PUT_LCR(uart, val);
 800         SSYNC();
 801 #endif
 802
 803         UART_PUT_DLL(uart, quot & 0xFF);
 804         SSYNC();
 805         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 806         SSYNC();
 807
 808 #ifndef CONFIG_BF54x
 809         /* Clear DLAB in LCR to Access THR RBR IER */
 810         val = UART_GET_LCR(uart);
 811         val &= ~DLAB;
 812         UART_PUT_LCR(uart, val);
 813         SSYNC();
 814 #endif
 815
 816         UART_PUT_LCR(uart, lcr);
 817
 818         /* Enable UART */
 819 #ifdef CONFIG_BF54x
 820         UART_SET_IER(uart, ier);
 821 #else
 822         UART_PUT_IER(uart, ier);
 823 #endif
 824
 825         val = UART_GET_GCTL(uart);
 826         val |= UCEN;
 827         UART_PUT_GCTL(uart, val);
 828
 829         spin_unlock_irqrestore(&uart->port.lock, flags);
 830 }
 831
 832 static const char *bfin_serial_type(struct uart_port *port)
 833 {
 834         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 835
 836         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 837 }
 838
 839 /*
 840  * Release the memory region(s) being used by 'port'.
 841  */
 842 static void bfin_serial_release_port(struct uart_port *port)
 843 {
 844 }
 845
 846 /*
 847  * Request the memory region(s) being used by 'port'.
 848  */
 849 static int bfin_serial_request_port(struct uart_port *port)
 850 {
 851         return 0;
 852 }
 853
 854 /*
 855  * Configure/autoconfigure the port.
 856  */
 857 static void bfin_serial_config_port(struct uart_port *port, int flags)
 858 {
 859         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 860
 861         if (flags & UART_CONFIG_TYPE &&
 862             bfin_serial_request_port(&uart->port) == 0)
 863                 uart->port.type = PORT_BFIN;
 864 }
 865
 866 /*
 867  * Verify the new serial_struct (for TIOCSSERIAL).
 868  * The only change we allow are to the flags and type, and
 869  * even then only between PORT_BFIN and PORT_UNKNOWN
 870  */
 871 static int
 872 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 873 {
 874         return 0;
 875 }
 876
 877 static struct uart_ops bfin_serial_pops = {
 878         .tx_empty       = bfin_serial_tx_empty,
 879         .set_mctrl      = bfin_serial_set_mctrl,
 880         .get_mctrl      = bfin_serial_get_mctrl,
 881         .stop_tx        = bfin_serial_stop_tx,
 882         .start_tx       = bfin_serial_start_tx,
 883         .stop_rx        = bfin_serial_stop_rx,
 884         .enable_ms      = bfin_serial_enable_ms,
 885         .break_ctl      = bfin_serial_break_ctl,
 886         .startup        = bfin_serial_startup,
 887         .shutdown       = bfin_serial_shutdown,
 888         .set_termios    = bfin_serial_set_termios,
 889         .type           = bfin_serial_type,
 890         .release_port   = bfin_serial_release_port,
 891         .request_port   = bfin_serial_request_port,
 892         .config_port    = bfin_serial_config_port,
 893         .verify_port    = bfin_serial_verify_port,
 894 };
 895
 896 static void __init bfin_serial_init_ports(void)
 897 {
 898         static int first = 1;
 899         int i;
 900
 901         if (!first)
 902                 return;
 903         first = 0;
 904
 905         for (i = 0; i < nr_ports; i++) {
 906                 bfin_serial_ports[i].port.uartclk   = get_sclk();
 907                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
 908                 bfin_serial_ports[i].port.line      = i;
 909                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
 910                 bfin_serial_ports[i].port.membase   =
 911                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
 912                 bfin_serial_ports[i].port.mapbase   =
 913                         bfin_serial_resource[i].uart_base_addr;
 914                 bfin_serial_ports[i].port.irq       =
 915                         bfin_serial_resource[i].uart_irq;
 916                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
 917 #ifdef CONFIG_SERIAL_BFIN_DMA
 918                 bfin_serial_ports[i].tx_done        = 1;
 919                 bfin_serial_ports[i].tx_count       = 0;
 920                 bfin_serial_ports[i].tx_dma_channel =
 921                         bfin_serial_resource[i].uart_tx_dma_channel;
 922                 bfin_serial_ports[i].rx_dma_channel =
 923                         bfin_serial_resource[i].uart_rx_dma_channel;
 924                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
 925 #else
 926                 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
 927 #endif
 928 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 929                 bfin_serial_ports[i].cts_pin        =
 930                         bfin_serial_resource[i].uart_cts_pin;
 931                 bfin_serial_ports[i].rts_pin        =
 932                         bfin_serial_resource[i].uart_rts_pin;
 933 #endif
 934                 bfin_serial_hw_init(&bfin_serial_ports[i]);
 935         }
 936
 937 }
 938
 939 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
 940 /*
 941  * If the port was already initialised (eg, by a boot loader),
 942  * try to determine the current setup.
 943  */
 944 static void __init
 945 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
 946                            int *parity, int *bits)
 947 {
 948         unsigned short status;
 949
 950         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
 951         if (status == (ERBFI | ETBEI)) {
 952                 /* ok, the port was enabled */
 953                 unsigned short lcr, val;
 954                 unsigned short dlh, dll;
 955
 956                 lcr = UART_GET_LCR(uart);
 957
 958                 *parity = 'n';
 959                 if (lcr & PEN) {
 960                         if (lcr & EPS)
 961                                 *parity = 'e';
 962                         else
 963                                 *parity = 'o';
 964                 }
 965                 switch (lcr & 0x03) {
 966                         case 0: *bits = 5; break;
 967                         case 1: *bits = 6; break;
 968                         case 2: *bits = 7; break;
 969                         case 3: *bits = 8; break;
 970                 }
 971 #ifndef CONFIG_BF54x
 972                 /* Set DLAB in LCR to Access DLL and DLH */
 973                 val = UART_GET_LCR(uart);
 974                 val |= DLAB;
 975                 UART_PUT_LCR(uart, val);
 976 #endif
 977
 978                 dll = UART_GET_DLL(uart);
 979                 dlh = UART_GET_DLH(uart);
 980
 981 #ifndef CONFIG_BF54x
 982                 /* Clear DLAB in LCR to Access THR RBR IER */
 983                 val = UART_GET_LCR(uart);
 984                 val &= ~DLAB;
 985                 UART_PUT_LCR(uart, val);
 986 #endif
 987
 988                 *baud = get_sclk() / (16*(dll | dlh << 8));
 989         }
 990         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
 991 }
 992 #endif
 993
 994 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 995 static struct uart_driver bfin_serial_reg;
 996
 997 static int __init
 998 bfin_serial_console_setup(struct console *co, char *options)
 999 {
1000         struct bfin_serial_port *uart;
1001 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1002         int baud = 57600;
1003         int bits = 8;
1004         int parity = 'n';
1005 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
1006         int flow = 'r';
1007 #  else
1008         int flow = 'n';
1009 #  endif
1010 # endif
1011
1012         /*
1013          * Check whether an invalid uart number has been specified, and
1014          * if so, search for the first available port that does have
1015          * console support.
1016          */
1017         if (co->index == -1 || co->index >= nr_ports)
1018                 co->index = 0;
1019         uart = &bfin_serial_ports[co->index];
1020
1021 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1022         if (options)
1023                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1024         else
1025                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1026
1027         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1028 # else
1029         return 0;
1030 # endif
1031 }
1032 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1033                                  defined (CONFIG_EARLY_PRINTK) */
1034
1035 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1036 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1037 {
1038         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1039         while (!(UART_GET_LSR(uart) & THRE))
1040                 barrier();
1041         UART_PUT_CHAR(uart, ch);
1042         SSYNC();
1043 }
1044
1045 /*
1046  * Interrupts are disabled on entering
1047  */
1048 static void
1049 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1050 {
1051         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1052         int flags = 0;
1053
1054         spin_lock_irqsave(&uart->port.lock, flags);
1055         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1056         spin_unlock_irqrestore(&uart->port.lock, flags);
1057
1058 }
1059
1060 static struct console bfin_serial_console = {
1061         .name           = BFIN_SERIAL_NAME,
1062         .write          = bfin_serial_console_write,
1063         .device         = uart_console_device,
1064         .setup          = bfin_serial_console_setup,
1065         .flags          = CON_PRINTBUFFER,
1066         .index          = -1,
1067         .data           = &bfin_serial_reg,
1068 };
1069
1070 static int __init bfin_serial_rs_console_init(void)
1071 {
1072         bfin_serial_init_ports();
1073         register_console(&bfin_serial_console);
1074 #ifdef CONFIG_KGDB_UART
1075         kgdb_entry_state = 0;
1076         init_kgdb_uart();
1077 #endif
1078         return 0;
1079 }
1080 console_initcall(bfin_serial_rs_console_init);
1081
1082 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1083 #else
1084 #define BFIN_SERIAL_CONSOLE     NULL
1085 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1086
1087
1088 #ifdef CONFIG_EARLY_PRINTK
1089 static __init void early_serial_putc(struct uart_port *port, int ch)
1090 {
1091         unsigned timeout = 0xffff;
1092         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1093
1094         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1095                 cpu_relax();
1096         UART_PUT_CHAR(uart, ch);
1097 }
1098
1099 static __init void early_serial_write(struct console *con, const char *s,
1100                                         unsigned int n)
1101 {
1102         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1103         unsigned int i;
1104
1105         for (i = 0; i < n; i++, s++) {
1106                 if (*s == '\n')
1107                         early_serial_putc(&uart->port, '\r');
1108                 early_serial_putc(&uart->port, *s);
1109         }
1110 }
1111
1112 static struct __init console bfin_early_serial_console = {
1113         .name = "early_BFuart",
1114         .write = early_serial_write,
1115         .device = uart_console_device,
1116         .flags = CON_PRINTBUFFER,
1117         .setup = bfin_serial_console_setup,
1118         .index = -1,
1119         .data  = &bfin_serial_reg,
1120 };
1121
1122 struct console __init *bfin_earlyserial_init(unsigned int port,
1123                                                 unsigned int cflag)
1124 {
1125         struct bfin_serial_port *uart;
1126         struct ktermios t;
1127
1128         if (port == -1 || port >= nr_ports)
1129                 port = 0;
1130         bfin_serial_init_ports();
1131         bfin_early_serial_console.index = port;
1132         uart = &bfin_serial_ports[port];
1133         t.c_cflag = cflag;
1134         t.c_iflag = 0;
1135         t.c_oflag = 0;
1136         t.c_lflag = ICANON;
1137         t.c_line = port;
1138         bfin_serial_set_termios(&uart->port, &t, &t);
1139         return &bfin_early_serial_console;
1140 }
1141
1142 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1143
1144 static struct uart_driver bfin_serial_reg = {
1145         .owner                  = THIS_MODULE,
1146         .driver_name            = "bfin-uart",
1147         .dev_name               = BFIN_SERIAL_NAME,
1148         .major                  = BFIN_SERIAL_MAJOR,
1149         .minor                  = BFIN_SERIAL_MINOR,
1150         .nr                     = NR_PORTS,
1151         .cons                   = BFIN_SERIAL_CONSOLE,
1152 };
1153
1154 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1155 {
1156         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1157
1158         if (uart)
1159                 uart_suspend_port(&bfin_serial_reg, &uart->port);
1160
1161         return 0;
1162 }
1163
1164 static int bfin_serial_resume(struct platform_device *dev)
1165 {
1166         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1167
1168         if (uart)
1169                 uart_resume_port(&bfin_serial_reg, &uart->port);
1170
1171         return 0;
1172 }
1173
1174 static int bfin_serial_probe(struct platform_device *dev)
1175 {
1176         struct resource *res = dev->resource;
1177         int i;
1178
1179         for (i = 0; i < dev->num_resources; i++, res++)
1180                 if (res->flags & IORESOURCE_MEM)
1181                         break;
1182
1183         if (i < dev->num_resources) {
1184                 for (i = 0; i < nr_ports; i++, res++) {
1185                         if (bfin_serial_ports[i].port.mapbase != res->start)
1186                                 continue;
1187                         bfin_serial_ports[i].port.dev = &dev->dev;
1188                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1189                         platform_set_drvdata(dev, &bfin_serial_ports[i]);
1190                 }
1191         }
1192
1193         return 0;
1194 }
1195
1196 static int bfin_serial_remove(struct platform_device *pdev)
1197 {
1198         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1199
1200
1201 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1202         gpio_free(uart->cts_pin);
1203         gpio_free(uart->rts_pin);
1204 #endif
1205
1206         platform_set_drvdata(pdev, NULL);
1207
1208         if (uart)
1209                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1210
1211         return 0;
1212 }
1213
1214 static struct platform_driver bfin_serial_driver = {
1215         .probe          = bfin_serial_probe,
1216         .remove         = bfin_serial_remove,
1217         .suspend        = bfin_serial_suspend,
1218         .resume         = bfin_serial_resume,
1219         .driver         = {
1220                 .name   = "bfin-uart",
1221         },
1222 };
1223
1224 static int __init bfin_serial_init(void)
1225 {
1226         int ret;
1227 #ifdef CONFIG_KGDB_UART
1228         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1229         struct ktermios t;
1230 #endif
1231
1232         pr_info("Serial: Blackfin serial driver\n");
1233
1234         bfin_serial_init_ports();
1235
1236         ret = uart_register_driver(&bfin_serial_reg);
1237         if (ret == 0) {
1238                 ret = platform_driver_register(&bfin_serial_driver);
1239                 if (ret) {
1240                         pr_debug("uart register failed\n");
1241                         uart_unregister_driver(&bfin_serial_reg);
1242                 }
1243         }
1244 #ifdef CONFIG_KGDB_UART
1245         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1246                 request_irq(uart->port.irq, bfin_serial_rx_int,
1247                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1248                 pr_info("Request irq for kgdb uart port\n");
1249 #ifdef CONFIG_BF54x
1250                 UART_SET_IER(uart, ERBFI);
1251 #else
1252                 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1253 #endif
1254                 SSYNC();
1255                 t.c_cflag = CS8|B57600;
1256                 t.c_iflag = 0;
1257                 t.c_oflag = 0;
1258                 t.c_lflag = ICANON;
1259                 t.c_line = CONFIG_KGDB_UART_PORT;
1260                 bfin_serial_set_termios(&uart->port, &t, &t);
1261         }
1262 #endif
1263         return ret;
1264 }
1265
1266 static void __exit bfin_serial_exit(void)
1267 {
1268         platform_driver_unregister(&bfin_serial_driver);
1269         uart_unregister_driver(&bfin_serial_reg);
1270 }
1271
1272 module_init(bfin_serial_init);
1273 module_exit(bfin_serial_exit);
1274
1275 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1276 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1277 MODULE_LICENSE("GPL");
1278 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);