2 * Blackfin On-Chip Serial Driver
4 * Copyright 2006-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
31 #include <asm/mach/bfin_serial_5xx.h>
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
37 #include <asm/cacheflush.h>
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME "ttyBF"
42 #define BFIN_SERIAL_MAJOR 204
43 #define BFIN_SERIAL_MINOR 64
46 * Setup for console. Argument comes from the menuconfig
48 #define DMA_RX_XCOUNT 512
49 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
51 #define DMA_RX_FLUSH_JIFFIES 5
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
62 * interrupts are disabled on entry
64 static void bfin_serial_stop_tx(struct uart_port *port)
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 struct circ_buf *xmit = &uart->port.info->xmit;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
72 while (!(UART_GET_LSR(uart) & TEMT))
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76 disable_dma(uart->tx_dma_channel);
77 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
78 uart->port.icount.tx += uart->tx_count;
84 UART_PUT_LSR(uart, TFI);
85 UART_CLEAR_IER(uart, ETBEI);
87 ier = UART_GET_IER(uart);
89 UART_PUT_IER(uart, ier);
95 * port is locked and interrupts are disabled
97 static void bfin_serial_start_tx(struct uart_port *port)
99 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
101 #ifdef CONFIG_SERIAL_BFIN_DMA
103 bfin_serial_dma_tx_chars(uart);
106 UART_SET_IER(uart, ETBEI);
109 ier = UART_GET_IER(uart);
111 UART_PUT_IER(uart, ier);
113 bfin_serial_tx_chars(uart);
118 * Interrupts are enabled
120 static void bfin_serial_stop_rx(struct uart_port *port)
122 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123 #ifdef CONFIG_KGDB_UART
124 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
127 UART_CLEAR_IER(uart, ERBFI);
131 ier = UART_GET_IER(uart);
133 UART_PUT_IER(uart, ier);
135 #ifdef CONFIG_KGDB_UART
141 * Set the modem control timer to fire immediately.
143 static void bfin_serial_enable_ms(struct uart_port *port)
147 #ifdef CONFIG_KGDB_UART
148 static int kgdb_entry_state;
150 void kgdb_put_debug_char(int chr)
152 struct bfin_serial_port *uart;
154 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
155 uart = &bfin_serial_ports[0];
157 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
159 while (!(UART_GET_LSR(uart) & THRE)) {
164 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
167 UART_PUT_CHAR(uart, (unsigned char)chr);
171 int kgdb_get_debug_char(void)
173 struct bfin_serial_port *uart;
176 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
177 uart = &bfin_serial_ports[0];
179 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
181 while(!(UART_GET_LSR(uart) & DR)) {
185 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
188 chr = UART_GET_CHAR(uart);
195 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
196 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
197 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
199 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
200 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
203 #ifdef CONFIG_SERIAL_BFIN_PIO
204 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
206 struct tty_struct *tty = uart->port.info->tty;
207 unsigned int status, ch, flg;
208 static struct timeval anomaly_start = { .tv_sec = 0 };
209 #ifdef CONFIG_KGDB_UART
210 struct pt_regs *regs = get_irq_regs();
213 status = UART_GET_LSR(uart);
214 UART_CLEAR_LSR(uart);
216 ch = UART_GET_CHAR(uart);
217 uart->port.icount.rx++;
219 #ifdef CONFIG_KGDB_UART
220 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
221 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
222 kgdb_breakkey_pressed(regs);
224 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
225 kgdb_entry_state = 1;
226 } else if (kgdb_entry_state == 1 && ch == 'q') {
227 kgdb_entry_state = 0;
228 kgdb_breakkey_pressed(regs);
230 } else if (ch == 0x3) {/* Ctrl + C */
231 kgdb_entry_state = 0;
232 kgdb_breakkey_pressed(regs);
235 kgdb_entry_state = 0;
240 if (ANOMALY_05000230) {
241 /* The BF533 (and BF561) family of processors have a nice anomaly
242 * where they continuously generate characters for a "single" break.
243 * We have to basically ignore this flood until the "next" valid
244 * character comes across. Due to the nature of the flood, it is
245 * not possible to reliably catch bytes that are sent too quickly
246 * after this break. So application code talking to the Blackfin
247 * which sends a break signal must allow at least 1.5 character
248 * times after the end of the break for things to stabilize. This
249 * timeout was picked as it must absolutely be larger than 1
250 * character time +/- some percent. So 1.5 sounds good. All other
251 * Blackfin families operate properly. Woo.
252 * Note: While Anomaly 05000230 does not directly address this,
253 * the changes that went in for it also fixed this issue.
254 * That anomaly was fixed in 0.5+ silicon. I like bunnies.
256 if (anomaly_start.tv_sec) {
260 if ((~ch & (~ch + 1)) & 0xff)
261 goto known_good_char;
263 do_gettimeofday(&curr);
264 if (curr.tv_sec - anomaly_start.tv_sec > 1)
265 goto known_good_char;
268 if (curr.tv_sec != anomaly_start.tv_sec)
269 usecs += USEC_PER_SEC;
270 usecs += curr.tv_usec - anomaly_start.tv_usec;
272 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
273 goto known_good_char;
276 anomaly_start.tv_sec = 0;
278 anomaly_start = curr;
283 anomaly_start.tv_sec = 0;
288 if (ANOMALY_05000230)
289 if (bfin_revid() < 5)
290 do_gettimeofday(&anomaly_start);
291 uart->port.icount.brk++;
292 if (uart_handle_break(&uart->port))
294 status &= ~(PE | FE);
297 uart->port.icount.parity++;
299 uart->port.icount.overrun++;
301 uart->port.icount.frame++;
303 status &= uart->port.read_status_mask;
307 else if (status & PE)
309 else if (status & FE)
314 if (uart_handle_sysrq_char(&uart->port, ch))
317 uart_insert_char(&uart->port, status, OE, ch, flg);
320 tty_flip_buffer_push(tty);
323 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
325 struct circ_buf *xmit = &uart->port.info->xmit;
327 if (uart->port.x_char) {
328 UART_PUT_CHAR(uart, uart->port.x_char);
329 uart->port.icount.tx++;
330 uart->port.x_char = 0;
333 * Check the modem control lines before
334 * transmitting anything.
336 bfin_serial_mctrl_check(uart);
338 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
339 bfin_serial_stop_tx(&uart->port);
343 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
344 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
345 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
346 uart->port.icount.tx++;
350 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
351 uart_write_wakeup(&uart->port);
353 if (uart_circ_empty(xmit))
354 bfin_serial_stop_tx(&uart->port);
357 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
359 struct bfin_serial_port *uart = dev_id;
361 spin_lock(&uart->port.lock);
362 while (UART_GET_LSR(uart) & DR)
363 bfin_serial_rx_chars(uart);
364 spin_unlock(&uart->port.lock);
369 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
371 struct bfin_serial_port *uart = dev_id;
373 spin_lock(&uart->port.lock);
374 if (UART_GET_LSR(uart) & THRE)
375 bfin_serial_tx_chars(uart);
376 spin_unlock(&uart->port.lock);
382 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
383 static void bfin_serial_do_work(struct work_struct *work)
385 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
387 bfin_serial_mctrl_check(uart);
391 #ifdef CONFIG_SERIAL_BFIN_DMA
392 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
394 struct circ_buf *xmit = &uart->port.info->xmit;
400 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
406 if (uart->port.x_char) {
407 UART_PUT_CHAR(uart, uart->port.x_char);
408 uart->port.icount.tx++;
409 uart->port.x_char = 0;
413 * Check the modem control lines before
414 * transmitting anything.
416 bfin_serial_mctrl_check(uart);
418 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
419 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
420 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
421 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
422 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
423 set_dma_config(uart->tx_dma_channel,
424 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
429 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
430 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
431 set_dma_x_modify(uart->tx_dma_channel, 1);
432 enable_dma(uart->tx_dma_channel);
435 UART_SET_IER(uart, ETBEI);
437 ier = UART_GET_IER(uart);
439 UART_PUT_IER(uart, ier);
443 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
445 struct tty_struct *tty = uart->port.info->tty;
448 status = UART_GET_LSR(uart);
449 UART_CLEAR_LSR(uart);
451 uart->port.icount.rx +=
452 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
456 uart->port.icount.brk++;
457 if (uart_handle_break(&uart->port))
458 goto dma_ignore_char;
459 status &= ~(PE | FE);
462 uart->port.icount.parity++;
464 uart->port.icount.overrun++;
466 uart->port.icount.frame++;
468 status &= uart->port.read_status_mask;
472 else if (status & PE)
474 else if (status & FE)
479 for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
480 if (i >= UART_XMIT_SIZE)
482 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
483 uart_insert_char(&uart->port, status, OE,
484 uart->rx_dma_buf.buf[i], flg);
488 tty_flip_buffer_push(tty);
491 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
496 spin_lock_irqsave(&uart->port.lock, flags);
497 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
498 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
499 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
500 if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
501 uart->rx_dma_nrows = 0;
502 x_pos = DMA_RX_XCOUNT - x_pos;
503 if (x_pos == DMA_RX_XCOUNT)
506 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
507 if (pos != uart->rx_dma_buf.tail) {
508 uart->rx_dma_buf.head = pos;
509 bfin_serial_dma_rx_chars(uart);
510 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
512 spin_unlock_irqrestore(&uart->port.lock, flags);
513 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
514 add_timer(&(uart->rx_dma_timer));
517 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
519 struct bfin_serial_port *uart = dev_id;
520 struct circ_buf *xmit = &uart->port.info->xmit;
523 spin_lock(&uart->port.lock);
524 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
525 disable_dma(uart->tx_dma_channel);
526 clear_dma_irqstat(uart->tx_dma_channel);
528 UART_CLEAR_IER(uart, ETBEI);
530 ier = UART_GET_IER(uart);
532 UART_PUT_IER(uart, ier);
534 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
535 uart->port.icount.tx += uart->tx_count;
537 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
538 uart_write_wakeup(&uart->port);
540 bfin_serial_dma_tx_chars(uart);
543 spin_unlock(&uart->port.lock);
547 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
549 struct bfin_serial_port *uart = dev_id;
550 unsigned short irqstat;
553 uart->rx_dma_nrows = DMA_RX_YCOUNT -
554 get_dma_curr_ycount(uart->rx_dma_channel);
555 pos = DMA_RX_XCOUNT * uart->rx_dma_nrows;
556 if (pos != uart->rx_dma_buf.tail) {
557 uart->rx_dma_buf.head = pos;
558 bfin_serial_dma_rx_chars(uart);
559 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
562 spin_lock(&uart->port.lock);
563 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
564 clear_dma_irqstat(uart->rx_dma_channel);
566 spin_unlock(&uart->port.lock);
572 * Return TIOCSER_TEMT when transmitter is not busy.
574 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
576 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
579 lsr = UART_GET_LSR(uart);
586 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
588 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
589 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
590 if (uart->cts_pin < 0)
591 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
594 if (UART_GET_MSR(uart) & CTS)
596 if (gpio_get_value(uart->cts_pin))
598 return TIOCM_DSR | TIOCM_CAR;
601 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
604 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
606 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
607 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
608 if (uart->rts_pin < 0)
611 if (mctrl & TIOCM_RTS)
613 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
615 gpio_set_value(uart->rts_pin, 0);
619 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
621 gpio_set_value(uart->rts_pin, 1);
627 * Handle any change of modem status signal since we were last called.
629 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
631 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
633 struct uart_info *info = uart->port.info;
634 struct tty_struct *tty = info->tty;
636 status = bfin_serial_get_mctrl(&uart->port);
637 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
638 if (!(status & TIOCM_CTS)) {
640 schedule_work(&uart->cts_workqueue);
648 * Interrupts are always disabled.
650 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
652 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
653 u16 lcr = UART_GET_LCR(uart);
658 UART_PUT_LCR(uart, lcr);
662 static int bfin_serial_startup(struct uart_port *port)
664 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
666 #ifdef CONFIG_SERIAL_BFIN_DMA
667 dma_addr_t dma_handle;
669 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
670 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
674 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
675 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
676 free_dma(uart->rx_dma_channel);
680 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
681 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
683 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
684 uart->rx_dma_buf.head = 0;
685 uart->rx_dma_buf.tail = 0;
686 uart->rx_dma_nrows = 0;
688 set_dma_config(uart->rx_dma_channel,
689 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
690 INTR_ON_ROW, DIMENSION_2D,
693 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
694 set_dma_x_modify(uart->rx_dma_channel, 1);
695 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
696 set_dma_y_modify(uart->rx_dma_channel, 1);
697 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
698 enable_dma(uart->rx_dma_channel);
700 uart->rx_dma_timer.data = (unsigned long)(uart);
701 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
702 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
703 add_timer(&(uart->rx_dma_timer));
705 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
706 "BFIN_UART_RX", uart)) {
707 # ifdef CONFIG_KGDB_UART
708 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
710 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
712 # ifdef CONFIG_KGDB_UART
719 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
720 "BFIN_UART_TX", uart)) {
721 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
722 free_irq(uart->port.irq, uart);
727 UART_SET_IER(uart, ERBFI);
729 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
734 static void bfin_serial_shutdown(struct uart_port *port)
736 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
738 #ifdef CONFIG_SERIAL_BFIN_DMA
739 disable_dma(uart->tx_dma_channel);
740 free_dma(uart->tx_dma_channel);
741 disable_dma(uart->rx_dma_channel);
742 free_dma(uart->rx_dma_channel);
743 del_timer(&(uart->rx_dma_timer));
744 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
746 #ifdef CONFIG_KGDB_UART
747 if (uart->port.line != CONFIG_KGDB_UART_PORT)
749 free_irq(uart->port.irq, uart);
750 free_irq(uart->port.irq+1, uart);
755 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
756 struct ktermios *old)
758 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
760 unsigned int baud, quot;
761 unsigned short val, ier, lsr, lcr = 0;
763 switch (termios->c_cflag & CSIZE) {
777 printk(KERN_ERR "%s: word lengh not supported\n",
781 if (termios->c_cflag & CSTOPB)
783 if (termios->c_cflag & PARENB)
785 if (!(termios->c_cflag & PARODD))
787 if (termios->c_cflag & CMSPAR)
790 port->read_status_mask = OE;
791 if (termios->c_iflag & INPCK)
792 port->read_status_mask |= (FE | PE);
793 if (termios->c_iflag & (BRKINT | PARMRK))
794 port->read_status_mask |= BI;
797 * Characters to ignore
799 port->ignore_status_mask = 0;
800 if (termios->c_iflag & IGNPAR)
801 port->ignore_status_mask |= FE | PE;
802 if (termios->c_iflag & IGNBRK) {
803 port->ignore_status_mask |= BI;
805 * If we're ignoring parity and break indicators,
806 * ignore overruns too (for real raw support).
808 if (termios->c_iflag & IGNPAR)
809 port->ignore_status_mask |= OE;
812 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
813 quot = uart_get_divisor(port, baud);
814 spin_lock_irqsave(&uart->port.lock, flags);
816 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
819 lsr = UART_GET_LSR(uart);
820 } while (!(lsr & TEMT));
823 ier = UART_GET_IER(uart);
825 UART_CLEAR_IER(uart, 0xF);
827 UART_PUT_IER(uart, 0);
831 /* Set DLAB in LCR to Access DLL and DLH */
832 val = UART_GET_LCR(uart);
834 UART_PUT_LCR(uart, val);
838 UART_PUT_DLL(uart, quot & 0xFF);
840 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
844 /* Clear DLAB in LCR to Access THR RBR IER */
845 val = UART_GET_LCR(uart);
847 UART_PUT_LCR(uart, val);
851 UART_PUT_LCR(uart, lcr);
855 UART_SET_IER(uart, ier);
857 UART_PUT_IER(uart, ier);
860 val = UART_GET_GCTL(uart);
862 UART_PUT_GCTL(uart, val);
864 spin_unlock_irqrestore(&uart->port.lock, flags);
867 static const char *bfin_serial_type(struct uart_port *port)
869 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
871 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
875 * Release the memory region(s) being used by 'port'.
877 static void bfin_serial_release_port(struct uart_port *port)
882 * Request the memory region(s) being used by 'port'.
884 static int bfin_serial_request_port(struct uart_port *port)
890 * Configure/autoconfigure the port.
892 static void bfin_serial_config_port(struct uart_port *port, int flags)
894 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
896 if (flags & UART_CONFIG_TYPE &&
897 bfin_serial_request_port(&uart->port) == 0)
898 uart->port.type = PORT_BFIN;
902 * Verify the new serial_struct (for TIOCSSERIAL).
903 * The only change we allow are to the flags and type, and
904 * even then only between PORT_BFIN and PORT_UNKNOWN
907 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
912 static struct uart_ops bfin_serial_pops = {
913 .tx_empty = bfin_serial_tx_empty,
914 .set_mctrl = bfin_serial_set_mctrl,
915 .get_mctrl = bfin_serial_get_mctrl,
916 .stop_tx = bfin_serial_stop_tx,
917 .start_tx = bfin_serial_start_tx,
918 .stop_rx = bfin_serial_stop_rx,
919 .enable_ms = bfin_serial_enable_ms,
920 .break_ctl = bfin_serial_break_ctl,
921 .startup = bfin_serial_startup,
922 .shutdown = bfin_serial_shutdown,
923 .set_termios = bfin_serial_set_termios,
924 .type = bfin_serial_type,
925 .release_port = bfin_serial_release_port,
926 .request_port = bfin_serial_request_port,
927 .config_port = bfin_serial_config_port,
928 .verify_port = bfin_serial_verify_port,
931 static void __init bfin_serial_init_ports(void)
933 static int first = 1;
940 for (i = 0; i < nr_ports; i++) {
941 bfin_serial_ports[i].port.uartclk = get_sclk();
942 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
943 bfin_serial_ports[i].port.line = i;
944 bfin_serial_ports[i].port.iotype = UPIO_MEM;
945 bfin_serial_ports[i].port.membase =
946 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
947 bfin_serial_ports[i].port.mapbase =
948 bfin_serial_resource[i].uart_base_addr;
949 bfin_serial_ports[i].port.irq =
950 bfin_serial_resource[i].uart_irq;
951 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
952 #ifdef CONFIG_SERIAL_BFIN_DMA
953 bfin_serial_ports[i].tx_done = 1;
954 bfin_serial_ports[i].tx_count = 0;
955 bfin_serial_ports[i].tx_dma_channel =
956 bfin_serial_resource[i].uart_tx_dma_channel;
957 bfin_serial_ports[i].rx_dma_channel =
958 bfin_serial_resource[i].uart_rx_dma_channel;
959 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
961 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
962 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
963 bfin_serial_ports[i].cts_pin =
964 bfin_serial_resource[i].uart_cts_pin;
965 bfin_serial_ports[i].rts_pin =
966 bfin_serial_resource[i].uart_rts_pin;
968 bfin_serial_hw_init(&bfin_serial_ports[i]);
973 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
975 * If the port was already initialised (eg, by a boot loader),
976 * try to determine the current setup.
979 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
980 int *parity, int *bits)
982 unsigned short status;
984 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
985 if (status == (ERBFI | ETBEI)) {
986 /* ok, the port was enabled */
987 unsigned short lcr, val;
988 unsigned short dlh, dll;
990 lcr = UART_GET_LCR(uart);
999 switch (lcr & 0x03) {
1000 case 0: *bits = 5; break;
1001 case 1: *bits = 6; break;
1002 case 2: *bits = 7; break;
1003 case 3: *bits = 8; break;
1005 #ifndef CONFIG_BF54x
1006 /* Set DLAB in LCR to Access DLL and DLH */
1007 val = UART_GET_LCR(uart);
1009 UART_PUT_LCR(uart, val);
1012 dll = UART_GET_DLL(uart);
1013 dlh = UART_GET_DLH(uart);
1015 #ifndef CONFIG_BF54x
1016 /* Clear DLAB in LCR to Access THR RBR IER */
1017 val = UART_GET_LCR(uart);
1019 UART_PUT_LCR(uart, val);
1022 *baud = get_sclk() / (16*(dll | dlh << 8));
1024 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1028 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1029 static struct uart_driver bfin_serial_reg;
1032 bfin_serial_console_setup(struct console *co, char *options)
1034 struct bfin_serial_port *uart;
1035 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1039 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1047 * Check whether an invalid uart number has been specified, and
1048 * if so, search for the first available port that does have
1051 if (co->index == -1 || co->index >= nr_ports)
1053 uart = &bfin_serial_ports[co->index];
1055 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1057 uart_parse_options(options, &baud, &parity, &bits, &flow);
1059 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1061 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1066 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1067 defined (CONFIG_EARLY_PRINTK) */
1069 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1070 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1072 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1073 while (!(UART_GET_LSR(uart) & THRE))
1075 UART_PUT_CHAR(uart, ch);
1080 * Interrupts are disabled on entering
1083 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1085 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1088 spin_lock_irqsave(&uart->port.lock, flags);
1089 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1090 spin_unlock_irqrestore(&uart->port.lock, flags);
1094 static struct console bfin_serial_console = {
1095 .name = BFIN_SERIAL_NAME,
1096 .write = bfin_serial_console_write,
1097 .device = uart_console_device,
1098 .setup = bfin_serial_console_setup,
1099 .flags = CON_PRINTBUFFER,
1101 .data = &bfin_serial_reg,
1104 static int __init bfin_serial_rs_console_init(void)
1106 bfin_serial_init_ports();
1107 register_console(&bfin_serial_console);
1108 #ifdef CONFIG_KGDB_UART
1109 kgdb_entry_state = 0;
1114 console_initcall(bfin_serial_rs_console_init);
1116 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1118 #define BFIN_SERIAL_CONSOLE NULL
1119 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1122 #ifdef CONFIG_EARLY_PRINTK
1123 static __init void early_serial_putc(struct uart_port *port, int ch)
1125 unsigned timeout = 0xffff;
1126 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1128 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1130 UART_PUT_CHAR(uart, ch);
1133 static __init void early_serial_write(struct console *con, const char *s,
1136 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1139 for (i = 0; i < n; i++, s++) {
1141 early_serial_putc(&uart->port, '\r');
1142 early_serial_putc(&uart->port, *s);
1146 static struct __init console bfin_early_serial_console = {
1147 .name = "early_BFuart",
1148 .write = early_serial_write,
1149 .device = uart_console_device,
1150 .flags = CON_PRINTBUFFER,
1151 .setup = bfin_serial_console_setup,
1153 .data = &bfin_serial_reg,
1156 struct console __init *bfin_earlyserial_init(unsigned int port,
1159 struct bfin_serial_port *uart;
1162 if (port == -1 || port >= nr_ports)
1164 bfin_serial_init_ports();
1165 bfin_early_serial_console.index = port;
1166 uart = &bfin_serial_ports[port];
1172 bfin_serial_set_termios(&uart->port, &t, &t);
1173 return &bfin_early_serial_console;
1176 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1178 static struct uart_driver bfin_serial_reg = {
1179 .owner = THIS_MODULE,
1180 .driver_name = "bfin-uart",
1181 .dev_name = BFIN_SERIAL_NAME,
1182 .major = BFIN_SERIAL_MAJOR,
1183 .minor = BFIN_SERIAL_MINOR,
1185 .cons = BFIN_SERIAL_CONSOLE,
1188 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1190 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1193 uart_suspend_port(&bfin_serial_reg, &uart->port);
1198 static int bfin_serial_resume(struct platform_device *dev)
1200 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1203 uart_resume_port(&bfin_serial_reg, &uart->port);
1208 static int bfin_serial_probe(struct platform_device *dev)
1210 struct resource *res = dev->resource;
1213 for (i = 0; i < dev->num_resources; i++, res++)
1214 if (res->flags & IORESOURCE_MEM)
1217 if (i < dev->num_resources) {
1218 for (i = 0; i < nr_ports; i++, res++) {
1219 if (bfin_serial_ports[i].port.mapbase != res->start)
1221 bfin_serial_ports[i].port.dev = &dev->dev;
1222 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1223 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1230 static int bfin_serial_remove(struct platform_device *pdev)
1232 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1235 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1236 gpio_free(uart->cts_pin);
1237 gpio_free(uart->rts_pin);
1240 platform_set_drvdata(pdev, NULL);
1243 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1248 static struct platform_driver bfin_serial_driver = {
1249 .probe = bfin_serial_probe,
1250 .remove = bfin_serial_remove,
1251 .suspend = bfin_serial_suspend,
1252 .resume = bfin_serial_resume,
1254 .name = "bfin-uart",
1258 static int __init bfin_serial_init(void)
1261 #ifdef CONFIG_KGDB_UART
1262 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1266 pr_info("Serial: Blackfin serial driver\n");
1268 bfin_serial_init_ports();
1270 ret = uart_register_driver(&bfin_serial_reg);
1272 ret = platform_driver_register(&bfin_serial_driver);
1274 pr_debug("uart register failed\n");
1275 uart_unregister_driver(&bfin_serial_reg);
1278 #ifdef CONFIG_KGDB_UART
1279 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1280 request_irq(uart->port.irq, bfin_serial_rx_int,
1281 IRQF_DISABLED, "BFIN_UART_RX", uart);
1282 pr_info("Request irq for kgdb uart port\n");
1284 UART_SET_IER(uart, ERBFI);
1286 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1289 t.c_cflag = CS8|B57600;
1293 t.c_line = CONFIG_KGDB_UART_PORT;
1294 bfin_serial_set_termios(&uart->port, &t, &t);
1300 static void __exit bfin_serial_exit(void)
1302 platform_driver_unregister(&bfin_serial_driver);
1303 uart_unregister_driver(&bfin_serial_reg);
1306 module_init(bfin_serial_init);
1307 module_exit(bfin_serial_exit);
1309 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1310 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1311 MODULE_LICENSE("GPL");
1312 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);