1 /* sun_esp.c: ESP front-end for Sparc SBUS systems.
3 * Copyright (C) 2007, 2008 David S. Miller (davem@davemloft.net)
6 #include <linux/kernel.h>
7 #include <linux/types.h>
8 #include <linux/delay.h>
9 #include <linux/module.h>
11 #include <linux/init.h>
19 #include <scsi/scsi_host.h>
23 #define DRV_MODULE_NAME "sun_esp"
24 #define PFX DRV_MODULE_NAME ": "
25 #define DRV_VERSION "1.000"
26 #define DRV_MODULE_RELDATE "April 19, 2007"
28 #define dma_read32(REG) \
29 sbus_readl(esp->dma_regs + (REG))
30 #define dma_write32(VAL, REG) \
31 sbus_writel((VAL), esp->dma_regs + (REG))
33 /* DVMA chip revisions */
44 static int __devinit esp_sbus_setup_dma(struct esp *esp,
45 struct of_device *dma_of)
49 esp->dma_regs = of_ioremap(&dma_of->resource[0], 0,
50 resource_size(&dma_of->resource[0]),
55 switch (dma_read32(DMA_CSR) & DMA_DEVICE_ID) {
57 esp->dmarev = dvmarev0;
60 esp->dmarev = dvmaesc1;
63 esp->dmarev = dvmarev1;
66 esp->dmarev = dvmarev2;
69 esp->dmarev = dvmahme;
72 esp->dmarev = dvmarevplus;
80 static int __devinit esp_sbus_map_regs(struct esp *esp, int hme)
82 struct sbus_dev *sdev = esp->dev;
85 /* On HME, two reg sets exist, first is DVMA,
86 * second is ESP registers.
89 res = &sdev->resource[1];
91 res = &sdev->resource[0];
93 esp->regs = sbus_ioremap(res, 0, SBUS_ESP_REG_SIZE, "ESP");
100 static int __devinit esp_sbus_map_command_block(struct esp *esp)
102 struct sbus_dev *sdev = esp->dev;
104 esp->command_block = sbus_alloc_consistent(sdev, 16,
105 &esp->command_block_dma);
106 if (!esp->command_block)
111 static int __devinit esp_sbus_register_irq(struct esp *esp)
113 struct Scsi_Host *host = esp->host;
114 struct sbus_dev *sdev = esp->dev;
116 host->irq = sdev->irqs[0];
117 return request_irq(host->irq, scsi_esp_intr, IRQF_SHARED, "ESP", esp);
120 static void __devinit esp_get_scsi_id(struct esp *esp)
122 struct sbus_dev *sdev = esp->dev;
123 struct device_node *dp = sdev->ofdev.node;
125 esp->scsi_id = of_getintprop_default(dp, "initiator-id", 0xff);
126 if (esp->scsi_id != 0xff)
129 esp->scsi_id = of_getintprop_default(dp, "scsi-initiator-id", 0xff);
130 if (esp->scsi_id != 0xff)
139 esp->scsi_id = of_getintprop_default(sdev->bus->ofdev.node,
140 "scsi-initiator-id", 7);
143 esp->host->this_id = esp->scsi_id;
144 esp->scsi_id_mask = (1 << esp->scsi_id);
147 static void __devinit esp_get_differential(struct esp *esp)
149 struct sbus_dev *sdev = esp->dev;
150 struct device_node *dp = sdev->ofdev.node;
152 if (of_find_property(dp, "differential", NULL))
153 esp->flags |= ESP_FLAG_DIFFERENTIAL;
155 esp->flags &= ~ESP_FLAG_DIFFERENTIAL;
158 static void __devinit esp_get_clock_params(struct esp *esp)
160 struct sbus_dev *sdev = esp->dev;
161 struct device_node *dp = sdev->ofdev.node;
162 struct device_node *bus_dp;
166 if (sdev != NULL && sdev->bus != NULL)
167 bus_dp = sdev->bus->ofdev.node;
169 fmhz = of_getintprop_default(dp, "clock-frequency", 0);
171 fmhz = (!bus_dp) ? 0 :
172 of_getintprop_default(bus_dp, "clock-frequency", 0);
177 static void __devinit esp_get_bursts(struct esp *esp, struct of_device *dma_of)
179 struct device_node *dma_dp = dma_of->node;
180 struct sbus_dev *sdev = esp->dev;
181 struct device_node *dp;
184 dp = sdev->ofdev.node;
185 bursts = of_getintprop_default(dp, "burst-sizes", 0xff);
186 val = of_getintprop_default(dma_dp, "burst-sizes", 0xff);
191 u8 val = of_getintprop_default(sdev->bus->ofdev.node,
192 "burst-sizes", 0xff);
197 if (bursts == 0xff ||
198 (bursts & DMA_BURST16) == 0 ||
199 (bursts & DMA_BURST32) == 0)
200 bursts = (DMA_BURST32 - 1);
202 esp->bursts = bursts;
205 static void __devinit esp_sbus_get_props(struct esp *esp, struct of_device *espdma)
207 esp_get_scsi_id(esp);
208 esp_get_differential(esp);
209 esp_get_clock_params(esp);
210 esp_get_bursts(esp, espdma);
213 static void sbus_esp_write8(struct esp *esp, u8 val, unsigned long reg)
215 sbus_writeb(val, esp->regs + (reg * 4UL));
218 static u8 sbus_esp_read8(struct esp *esp, unsigned long reg)
220 return sbus_readb(esp->regs + (reg * 4UL));
223 static dma_addr_t sbus_esp_map_single(struct esp *esp, void *buf,
226 return sbus_map_single(esp->dev, buf, sz, dir);
229 static int sbus_esp_map_sg(struct esp *esp, struct scatterlist *sg,
232 return sbus_map_sg(esp->dev, sg, num_sg, dir);
235 static void sbus_esp_unmap_single(struct esp *esp, dma_addr_t addr,
238 sbus_unmap_single(esp->dev, addr, sz, dir);
241 static void sbus_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
244 sbus_unmap_sg(esp->dev, sg, num_sg, dir);
247 static int sbus_esp_irq_pending(struct esp *esp)
249 if (dma_read32(DMA_CSR) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))
254 static void sbus_esp_reset_dma(struct esp *esp)
256 int can_do_burst16, can_do_burst32, can_do_burst64;
257 int can_do_sbus64, lim;
260 can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
261 can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
264 if (sbus_can_dma_64bit(esp->dev))
266 if (sbus_can_burst64(esp->sdev))
267 can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
269 /* Put the DVMA into a known state. */
270 if (esp->dmarev != dvmahme) {
271 val = dma_read32(DMA_CSR);
272 dma_write32(val | DMA_RST_SCSI, DMA_CSR);
273 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
275 switch (esp->dmarev) {
277 dma_write32(DMA_RESET_FAS366, DMA_CSR);
278 dma_write32(DMA_RST_SCSI, DMA_CSR);
280 esp->prev_hme_dmacsr = (DMA_PARITY_OFF | DMA_2CLKS |
281 DMA_SCSI_DISAB | DMA_INT_ENAB);
283 esp->prev_hme_dmacsr &= ~(DMA_ENABLE | DMA_ST_WRITE |
287 esp->prev_hme_dmacsr |= DMA_BRST64;
288 else if (can_do_burst32)
289 esp->prev_hme_dmacsr |= DMA_BRST32;
292 esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
293 sbus_set_sbus64(esp->dev, esp->bursts);
297 while (dma_read32(DMA_CSR) & DMA_PEND_READ) {
299 printk(KERN_ALERT PFX "esp%d: DMA_PEND_READ "
301 esp->host->unique_id);
307 dma_write32(0, DMA_CSR);
308 dma_write32(esp->prev_hme_dmacsr, DMA_CSR);
310 dma_write32(0, DMA_ADDR);
314 if (esp->rev != ESP100) {
315 val = dma_read32(DMA_CSR);
316 dma_write32(val | DMA_3CLKS, DMA_CSR);
321 val = dma_read32(DMA_CSR);
324 if (can_do_burst32) {
328 dma_write32(val, DMA_CSR);
332 val = dma_read32(DMA_CSR);
333 val |= DMA_ADD_ENABLE;
334 val &= ~DMA_BCNT_ENAB;
335 if (!can_do_burst32 && can_do_burst16) {
336 val |= DMA_ESC_BURST;
338 val &= ~(DMA_ESC_BURST);
340 dma_write32(val, DMA_CSR);
347 /* Enable interrupts. */
348 val = dma_read32(DMA_CSR);
349 dma_write32(val | DMA_INT_ENAB, DMA_CSR);
352 static void sbus_esp_dma_drain(struct esp *esp)
357 if (esp->dmarev == dvmahme)
360 csr = dma_read32(DMA_CSR);
361 if (!(csr & DMA_FIFO_ISDRAIN))
364 if (esp->dmarev != dvmarev3 && esp->dmarev != dvmaesc1)
365 dma_write32(csr | DMA_FIFO_STDRAIN, DMA_CSR);
368 while (dma_read32(DMA_CSR) & DMA_FIFO_ISDRAIN) {
370 printk(KERN_ALERT PFX "esp%d: DMA will not drain!\n",
371 esp->host->unique_id);
378 static void sbus_esp_dma_invalidate(struct esp *esp)
380 if (esp->dmarev == dvmahme) {
381 dma_write32(DMA_RST_SCSI, DMA_CSR);
383 esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
384 (DMA_PARITY_OFF | DMA_2CLKS |
385 DMA_SCSI_DISAB | DMA_INT_ENAB)) &
386 ~(DMA_ST_WRITE | DMA_ENABLE));
388 dma_write32(0, DMA_CSR);
389 dma_write32(esp->prev_hme_dmacsr, DMA_CSR);
391 /* This is necessary to avoid having the SCSI channel
392 * engine lock up on us.
394 dma_write32(0, DMA_ADDR);
400 while ((val = dma_read32(DMA_CSR)) & DMA_PEND_READ) {
402 printk(KERN_ALERT PFX "esp%d: DMA will not "
403 "invalidate!\n", esp->host->unique_id);
409 val &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
411 dma_write32(val, DMA_CSR);
412 val &= ~DMA_FIFO_INV;
413 dma_write32(val, DMA_CSR);
417 static void sbus_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
418 u32 dma_count, int write, u8 cmd)
422 BUG_ON(!(cmd & ESP_CMD_DMA));
424 sbus_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
425 sbus_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
426 if (esp->rev == FASHME) {
427 sbus_esp_write8(esp, (esp_count >> 16) & 0xff, FAS_RLO);
428 sbus_esp_write8(esp, 0, FAS_RHI);
430 scsi_esp_cmd(esp, cmd);
432 csr = esp->prev_hme_dmacsr;
433 csr |= DMA_SCSI_DISAB | DMA_ENABLE;
437 csr &= ~DMA_ST_WRITE;
438 esp->prev_hme_dmacsr = csr;
440 dma_write32(dma_count, DMA_COUNT);
441 dma_write32(addr, DMA_ADDR);
442 dma_write32(csr, DMA_CSR);
444 csr = dma_read32(DMA_CSR);
449 csr &= ~DMA_ST_WRITE;
450 dma_write32(csr, DMA_CSR);
451 if (esp->dmarev == dvmaesc1) {
452 u32 end = PAGE_ALIGN(addr + dma_count + 16U);
453 dma_write32(end - addr, DMA_COUNT);
455 dma_write32(addr, DMA_ADDR);
457 scsi_esp_cmd(esp, cmd);
462 static int sbus_esp_dma_error(struct esp *esp)
464 u32 csr = dma_read32(DMA_CSR);
466 if (csr & DMA_HNDL_ERROR)
472 static const struct esp_driver_ops sbus_esp_ops = {
473 .esp_write8 = sbus_esp_write8,
474 .esp_read8 = sbus_esp_read8,
475 .map_single = sbus_esp_map_single,
476 .map_sg = sbus_esp_map_sg,
477 .unmap_single = sbus_esp_unmap_single,
478 .unmap_sg = sbus_esp_unmap_sg,
479 .irq_pending = sbus_esp_irq_pending,
480 .reset_dma = sbus_esp_reset_dma,
481 .dma_drain = sbus_esp_dma_drain,
482 .dma_invalidate = sbus_esp_dma_invalidate,
483 .send_dma_cmd = sbus_esp_send_dma_cmd,
484 .dma_error = sbus_esp_dma_error,
487 static int __devinit esp_sbus_probe_one(struct device *dev,
488 struct sbus_dev *esp_dev,
489 struct of_device *espdma,
490 struct sbus_bus *sbus,
493 struct scsi_host_template *tpnt = &scsi_esp_template;
494 struct Scsi_Host *host;
498 host = scsi_host_alloc(tpnt, sizeof(struct esp));
504 host->max_id = (hme ? 16 : 8);
505 esp = shost_priv(host);
509 esp->ops = &sbus_esp_ops;
512 esp->flags |= ESP_FLAG_WIDE_CAPABLE;
514 err = esp_sbus_setup_dma(esp, espdma);
518 err = esp_sbus_map_regs(esp, hme);
522 err = esp_sbus_map_command_block(esp);
524 goto fail_unmap_regs;
526 err = esp_sbus_register_irq(esp);
528 goto fail_unmap_command_block;
530 esp_sbus_get_props(esp, espdma);
532 /* Before we try to touch the ESP chip, ESC1 dma can
533 * come up with the reset bit set, so make sure that
536 if (esp->dmarev == dvmaesc1) {
537 u32 val = dma_read32(DMA_CSR);
539 dma_write32(val & ~DMA_RST_SCSI, DMA_CSR);
542 dev_set_drvdata(&esp_dev->ofdev.dev, esp);
544 err = scsi_esp_register(esp, dev);
551 free_irq(host->irq, esp);
552 fail_unmap_command_block:
553 sbus_free_consistent(esp->dev, 16,
555 esp->command_block_dma);
557 sbus_iounmap(esp->regs, SBUS_ESP_REG_SIZE);
564 static int __devinit esp_sbus_probe(struct of_device *dev, const struct of_device_id *match)
566 struct sbus_dev *sdev = to_sbus_device(&dev->dev);
567 struct device_node *dma_node = NULL;
568 struct device_node *dp = dev->node;
569 struct of_device *dma_of = NULL;
573 (!strcmp(dp->parent->name, "espdma") ||
574 !strcmp(dp->parent->name, "dma")))
575 dma_node = dp->parent;
576 else if (!strcmp(dp->name, "SUNW,fas")) {
577 dma_node = sdev->ofdev.node;
581 dma_of = of_find_device_by_node(dma_node);
585 return esp_sbus_probe_one(&dev->dev, sdev, dma_of,
589 static int __devexit esp_sbus_remove(struct of_device *dev)
591 struct esp *esp = dev_get_drvdata(&dev->dev);
592 struct of_device *dma_of = esp->dma;
593 unsigned int irq = esp->host->irq;
596 scsi_esp_unregister(esp);
598 /* Disable interrupts. */
599 val = dma_read32(DMA_CSR);
600 dma_write32(val & ~DMA_INT_ENAB, DMA_CSR);
603 sbus_free_consistent(esp->dev, 16,
605 esp->command_block_dma);
606 sbus_iounmap(esp->regs, SBUS_ESP_REG_SIZE);
607 of_iounmap(&dma_of->resource[0], esp->dma_regs,
608 resource_size(&dma_of->resource[0]));
610 scsi_host_put(esp->host);
615 static struct of_device_id esp_match[] = {
627 MODULE_DEVICE_TABLE(of, esp_match);
629 static struct of_platform_driver esp_sbus_driver = {
631 .match_table = esp_match,
632 .probe = esp_sbus_probe,
633 .remove = __devexit_p(esp_sbus_remove),
636 static int __init sunesp_init(void)
638 return of_register_driver(&esp_sbus_driver, &sbus_bus_type);
641 static void __exit sunesp_exit(void)
643 of_unregister_driver(&esp_sbus_driver);
646 MODULE_DESCRIPTION("Sun ESP SCSI driver");
647 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
648 MODULE_LICENSE("GPL");
649 MODULE_VERSION(DRV_VERSION);
651 module_init(sunesp_init);
652 module_exit(sunesp_exit);