2 * SuperTrak EX Series Storage Controller driver for Linux
4 * Copyright (C) 2005, 2006 Promise Technology Inc.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 * Ed Lin <promise_linux@promise.com>
16 #include <linux/init.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/time.h>
21 #include <linux/pci.h>
22 #include <linux/blkdev.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/module.h>
26 #include <linux/spinlock.h>
29 #include <asm/byteorder.h>
30 #include <scsi/scsi.h>
31 #include <scsi/scsi_device.h>
32 #include <scsi/scsi_cmnd.h>
33 #include <scsi/scsi_host.h>
34 #include <scsi/scsi_tcq.h>
35 #include <scsi/scsi_dbg.h>
37 #define DRV_NAME "stex"
38 #define ST_DRIVER_VERSION "3.6.0000.1"
39 #define ST_VER_MAJOR 3
40 #define ST_VER_MINOR 6
42 #define ST_BUILD_VER 1
45 /* MU register offset */
46 IMR0 = 0x10, /* MU_INBOUND_MESSAGE_REG0 */
47 IMR1 = 0x14, /* MU_INBOUND_MESSAGE_REG1 */
48 OMR0 = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
49 OMR1 = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
50 IDBL = 0x20, /* MU_INBOUND_DOORBELL */
51 IIS = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
52 IIM = 0x28, /* MU_INBOUND_INTERRUPT_MASK */
53 ODBL = 0x2c, /* MU_OUTBOUND_DOORBELL */
54 OIS = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
55 OIM = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
57 /* MU register value */
58 MU_INBOUND_DOORBELL_HANDSHAKE = 1,
59 MU_INBOUND_DOORBELL_REQHEADCHANGED = 2,
60 MU_INBOUND_DOORBELL_STATUSTAILCHANGED = 4,
61 MU_INBOUND_DOORBELL_HMUSTOPPED = 8,
62 MU_INBOUND_DOORBELL_RESET = 16,
64 MU_OUTBOUND_DOORBELL_HANDSHAKE = 1,
65 MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2,
66 MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED = 4,
67 MU_OUTBOUND_DOORBELL_BUSCHANGE = 8,
68 MU_OUTBOUND_DOORBELL_HASEVENT = 16,
71 MU_STATE_STARTING = 1,
72 MU_STATE_FMU_READY_FOR_HANDSHAKE = 2,
73 MU_STATE_SEND_HANDSHAKE_FRAME = 3,
75 MU_STATE_RESETTING = 5,
78 MU_HANDSHAKE_SIGNATURE = 0x55aaaa55,
79 MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000,
80 MU_HARD_RESET_WAIT = 30000,
83 /* firmware returned values */
84 SRB_STATUS_SUCCESS = 0x01,
85 SRB_STATUS_ERROR = 0x04,
86 SRB_STATUS_BUSY = 0x05,
87 SRB_STATUS_INVALID_REQUEST = 0x06,
88 SRB_STATUS_SELECTION_TIMEOUT = 0x0A,
92 TASK_ATTRIBUTE_SIMPLE = 0x0,
93 TASK_ATTRIBUTE_HEADOFQUEUE = 0x1,
94 TASK_ATTRIBUTE_ORDERED = 0x2,
95 TASK_ATTRIBUTE_ACA = 0x4,
97 /* request count, etc. */
100 /* one message wasted, use MU_MAX_REQUEST+1
101 to handle MU_MAX_REQUEST messages */
102 MU_REQ_COUNT = (MU_MAX_REQUEST + 1),
103 MU_STATUS_COUNT = (MU_MAX_REQUEST + 1),
105 STEX_CDB_LENGTH = MAX_COMMAND_SIZE,
106 REQ_VARIABLE_LEN = 1024,
107 STATUS_VAR_LEN = 128,
108 ST_CAN_QUEUE = MU_MAX_REQUEST,
109 ST_CMD_PER_LUN = MU_MAX_REQUEST,
113 SG_CF_EOT = 0x80, /* end of table */
114 SG_CF_64B = 0x40, /* 64 bit item */
115 SG_CF_HOST = 0x20, /* sg in host memory */
122 PASSTHRU_REQ_TYPE = 0x00000001,
123 PASSTHRU_REQ_NO_WAKEUP = 0x00000100,
124 ST_INTERNAL_TIMEOUT = 30,
129 /* vendor specific commands of Promise */
131 SINBAND_MGT_CMD = 0xd9,
133 CONTROLLER_CMD = 0xe1,
134 DEBUGGING_CMD = 0xe2,
137 PASSTHRU_GET_ADAPTER = 0x05,
138 PASSTHRU_GET_DRVVER = 0x10,
140 CTLR_CONFIG_CMD = 0x03,
141 CTLR_SHUTDOWN = 0x0d,
143 CTLR_POWER_STATE_CHANGE = 0x0e,
144 CTLR_POWER_SAVING = 0x01,
146 PASSTHRU_SIGNATURE = 0x4e415041,
147 MGT_CMD_SIGNATURE = 0xba,
151 ST_ADDITIONAL_MEM = 0x200000,
154 /* SCSI inquiry data */
155 typedef struct st_inq {
157 u8 DeviceTypeQualifier :3;
158 u8 DeviceTypeModifier :7;
159 u8 RemovableMedia :1;
161 u8 ResponseDataFormat :4;
171 u8 LinkedCommands :1;
175 u8 RelativeAddressing :1;
178 u8 ProductRevisionLevel[4];
179 u8 VendorSpecific[20];
184 u8 ctrl; /* SG_CF_xxx */
195 struct st_sgitem table[ST_MAX_SG];
198 struct handshake_frame {
199 __le32 rb_phy; /* request payload queue physical address */
201 __le16 req_sz; /* size of each request payload */
202 __le16 req_cnt; /* count of reqs the buffer can hold */
203 __le16 status_sz; /* size of each status payload */
204 __le16 status_cnt; /* count of status the buffer can hold */
205 __le32 hosttime; /* seconds from Jan 1, 1970 (GMT) */
207 u8 partner_type; /* who sends this frame */
209 __le32 partner_ver_major;
210 __le32 partner_ver_minor;
211 __le32 partner_ver_oem;
212 __le32 partner_ver_build;
213 __le32 extra_offset; /* NEW */
214 __le32 extra_size; /* NEW */
225 u8 payload_sz; /* payload size in 4-byte, not used */
226 u8 cdb[STEX_CDB_LENGTH];
227 u8 variable[REQ_VARIABLE_LEN];
237 u8 payload_sz; /* payload size in 4-byte */
238 u8 variable[STATUS_VAR_LEN];
253 struct ver_info drv_ver;
254 struct ver_info bios_ver;
283 #define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg))
284 #define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg))
285 #define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
286 #define STEX_EXTRA_SIZE max(sizeof(struct st_frame), sizeof(ST_INQ))
287 #define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
291 struct scsi_cmnd *cmd;
294 unsigned int sense_bufflen;
303 void __iomem *mmio_base; /* iomapped PCI memory space */
305 dma_addr_t dma_handle;
308 struct Scsi_Host *host;
309 struct pci_dev *pdev;
316 struct status_msg *status_buffer;
317 void *copy_buffer; /* temp buffer for driver-handled commands */
318 struct st_ccb ccb[MU_MAX_REQUEST];
319 struct st_ccb *wait_ccb;
320 wait_queue_head_t waitq;
322 unsigned int mu_status;
325 unsigned int cardtype;
328 static const char console_inq_page[] =
330 0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
331 0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20, /* "Promise " */
332 0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E, /* "RAID Con" */
333 0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20, /* "sole " */
334 0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20, /* "1.00 " */
335 0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D, /* "SX/RSAF-" */
336 0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20, /* "TE1.00 " */
337 0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
340 MODULE_AUTHOR("Ed Lin");
341 MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
342 MODULE_LICENSE("GPL");
343 MODULE_VERSION(ST_DRIVER_VERSION);
345 static void stex_gettime(__le32 *time)
348 do_gettimeofday(&tv);
350 *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
351 *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
354 static struct status_msg *stex_get_status(struct st_hba *hba)
356 struct status_msg *status =
357 hba->status_buffer + hba->status_tail;
360 hba->status_tail %= MU_STATUS_COUNT;
365 static void stex_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
367 cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
369 cmd->sense_buffer[0] = 0x70; /* fixed format, current */
370 cmd->sense_buffer[2] = sk;
371 cmd->sense_buffer[7] = 18 - 8; /* additional sense length */
372 cmd->sense_buffer[12] = asc;
373 cmd->sense_buffer[13] = ascq;
376 static void stex_invalid_field(struct scsi_cmnd *cmd,
377 void (*done)(struct scsi_cmnd *))
379 /* "Invalid field in cbd" */
380 stex_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0);
384 static struct req_msg *stex_alloc_req(struct st_hba *hba)
386 struct req_msg *req = ((struct req_msg *)hba->dma_mem) +
390 hba->req_head %= MU_REQ_COUNT;
395 static int stex_map_sg(struct st_hba *hba,
396 struct req_msg *req, struct st_ccb *ccb)
398 struct scsi_cmnd *cmd;
399 struct scatterlist *sg;
400 struct st_sgtable *dst;
404 dst = (struct st_sgtable *)req->variable;
405 dst->max_sg_count = cpu_to_le16(ST_MAX_SG);
406 dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd));
408 nseg = scsi_dma_map(cmd);
412 ccb->sg_count = nseg;
413 dst->sg_count = cpu_to_le16((u16)nseg);
415 scsi_for_each_sg(cmd, sg, nseg, i) {
416 dst->table[i].count = cpu_to_le32((u32)sg_dma_len(sg));
418 cpu_to_le32(sg_dma_address(sg) & 0xffffffff);
419 dst->table[i].addr_hi =
420 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
421 dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST;
423 dst->table[--i].ctrl |= SG_CF_EOT;
429 static void stex_internal_copy(struct scsi_cmnd *cmd,
430 const void *src, size_t *count, int sg_count, int direction)
434 void *s, *d, *base = NULL;
437 if (*count > scsi_bufflen(cmd))
438 *count = scsi_bufflen(cmd);
444 offset = *count - lcount;
446 base = scsi_kmap_atomic_sg(scsi_sglist(cmd),
447 sg_count, &offset, &len);
454 if (direction == ST_TO_CMD)
460 scsi_kunmap_atomic_sg(base);
464 static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
467 size_t count = sizeof(struct st_frame);
469 p = hba->copy_buffer;
470 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_FROM_CMD);
471 memset(p->base, 0, sizeof(u32)*6);
472 *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0);
475 p->drv_ver.major = ST_VER_MAJOR;
476 p->drv_ver.minor = ST_VER_MINOR;
477 p->drv_ver.oem = ST_OEM;
478 p->drv_ver.build = ST_BUILD_VER;
480 p->bus = hba->pdev->bus->number;
481 p->slot = hba->pdev->devfn;
483 p->irq_vec = hba->pdev->irq;
484 p->id = hba->pdev->vendor << 16 | hba->pdev->device;
486 hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device;
488 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_TO_CMD);
492 stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
494 req->tag = cpu_to_le16(tag);
495 req->task_attr = TASK_ATTRIBUTE_SIMPLE;
496 req->task_manage = 0; /* not supported yet */
498 hba->ccb[tag].req = req;
501 writel(hba->req_head, hba->mmio_base + IMR0);
502 writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
503 readl(hba->mmio_base + IDBL); /* flush */
507 stex_slave_alloc(struct scsi_device *sdev)
509 /* Cheat: usually extracted from Inquiry data */
510 sdev->tagged_supported = 1;
512 scsi_activate_tcq(sdev, sdev->host->can_queue);
518 stex_slave_config(struct scsi_device *sdev)
520 sdev->use_10_for_rw = 1;
521 sdev->use_10_for_ms = 1;
522 sdev->timeout = 60 * HZ;
523 sdev->tagged_supported = 1;
529 stex_slave_destroy(struct scsi_device *sdev)
531 scsi_deactivate_tcq(sdev, 1);
535 stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
538 struct Scsi_Host *host;
542 host = cmd->device->host;
543 id = cmd->device->id;
544 lun = cmd->device->lun;
545 hba = (struct st_hba *) &host->hostdata[0];
547 switch (cmd->cmnd[0]) {
550 static char ms10_caching_page[12] =
551 { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
553 page = cmd->cmnd[2] & 0x3f;
554 if (page == 0x8 || page == 0x3f) {
555 size_t cp_len = sizeof(ms10_caching_page);
556 stex_internal_copy(cmd, ms10_caching_page,
557 &cp_len, scsi_sg_count(cmd),
559 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
562 stex_invalid_field(cmd, done);
567 * The shasta firmware does not report actual luns in the
568 * target, so fail the command to force sequential lun scan.
569 * Also, the console device does not support this command.
571 if (hba->cardtype == st_shasta || id == host->max_id - 1) {
572 stex_invalid_field(cmd, done);
576 case TEST_UNIT_READY:
577 if (id == host->max_id - 1) {
578 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
584 if (id != host->max_id - 1)
586 if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
587 size_t cp_len = sizeof(console_inq_page);
588 stex_internal_copy(cmd, console_inq_page,
589 &cp_len, scsi_sg_count(cmd),
591 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
594 stex_invalid_field(cmd, done);
597 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
598 struct st_drvver ver;
599 size_t cp_len = sizeof(ver);
600 ver.major = ST_VER_MAJOR;
601 ver.minor = ST_VER_MINOR;
603 ver.build = ST_BUILD_VER;
604 ver.signature[0] = PASSTHRU_SIGNATURE;
605 ver.console_id = host->max_id - 1;
606 ver.host_no = hba->host->host_no;
607 stex_internal_copy(cmd, &ver, &cp_len,
608 scsi_sg_count(cmd), ST_TO_CMD);
609 cmd->result = sizeof(ver) == cp_len ?
610 DID_OK << 16 | COMMAND_COMPLETE << 8 :
611 DID_ERROR << 16 | COMMAND_COMPLETE << 8;
619 cmd->scsi_done = done;
621 tag = cmd->request->tag;
623 if (unlikely(tag >= host->can_queue))
624 return SCSI_MLQUEUE_HOST_BUSY;
626 req = stex_alloc_req(hba);
632 memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
634 hba->ccb[tag].cmd = cmd;
635 hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
636 hba->ccb[tag].sense_buffer = cmd->sense_buffer;
637 hba->ccb[tag].req_type = 0;
639 if (cmd->sc_data_direction != DMA_NONE)
640 stex_map_sg(hba, req, &hba->ccb[tag]);
642 stex_send_cmd(hba, req, tag);
646 static void stex_scsi_done(struct st_ccb *ccb)
648 struct scsi_cmnd *cmd = ccb->cmd;
651 if (ccb->srb_status == SRB_STATUS_SUCCESS || ccb->srb_status == 0) {
652 result = ccb->scsi_status;
653 switch (ccb->scsi_status) {
655 result |= DID_OK << 16 | COMMAND_COMPLETE << 8;
657 case SAM_STAT_CHECK_CONDITION:
658 result |= DRIVER_SENSE << 24;
661 result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
664 result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8;
668 else if (ccb->srb_status & SRB_SEE_SENSE)
669 result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION;
670 else switch (ccb->srb_status) {
671 case SRB_STATUS_SELECTION_TIMEOUT:
672 result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8;
674 case SRB_STATUS_BUSY:
675 result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
677 case SRB_STATUS_INVALID_REQUEST:
678 case SRB_STATUS_ERROR:
680 result = DID_ERROR << 16 | COMMAND_COMPLETE << 8;
684 cmd->result = result;
688 static void stex_copy_data(struct st_ccb *ccb,
689 struct status_msg *resp, unsigned int variable)
691 size_t count = variable;
692 if (resp->scsi_status != SAM_STAT_GOOD) {
693 if (ccb->sense_buffer != NULL)
694 memcpy(ccb->sense_buffer, resp->variable,
695 min(variable, ccb->sense_bufflen));
699 if (ccb->cmd == NULL)
701 stex_internal_copy(ccb->cmd,
702 resp->variable, &count, ccb->sg_count, ST_TO_CMD);
705 static void stex_ys_commands(struct st_hba *hba,
706 struct st_ccb *ccb, struct status_msg *resp)
710 if (ccb->cmd->cmnd[0] == MGT_CMD &&
711 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
712 scsi_set_resid(ccb->cmd, scsi_bufflen(ccb->cmd) -
713 le32_to_cpu(*(__le32 *)&resp->variable[0]));
717 if (resp->srb_status != 0)
720 /* determine inquiry command status by DeviceTypeQualifier */
721 if (ccb->cmd->cmnd[0] == INQUIRY &&
722 resp->scsi_status == SAM_STAT_GOOD) {
725 count = STEX_EXTRA_SIZE;
726 stex_internal_copy(ccb->cmd, hba->copy_buffer,
727 &count, ccb->sg_count, ST_FROM_CMD);
728 inq_data = (ST_INQ *)hba->copy_buffer;
729 if (inq_data->DeviceTypeQualifier != 0)
730 ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
732 ccb->srb_status = SRB_STATUS_SUCCESS;
736 static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
738 void __iomem *base = hba->mmio_base;
739 struct status_msg *resp;
744 if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))
747 /* status payloads */
748 hba->status_head = readl(base + OMR1);
749 if (unlikely(hba->status_head >= MU_STATUS_COUNT)) {
750 printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n",
751 pci_name(hba->pdev));
756 * it's not a valid status payload if:
757 * 1. there are no pending requests(e.g. during init stage)
758 * 2. there are some pending requests, but the controller is in
759 * reset status, and its type is not st_yosemite
760 * firmware of st_yosemite in reset status will return pending requests
761 * to driver, so we allow it to pass
763 if (unlikely(hba->out_req_cnt <= 0 ||
764 (hba->mu_status == MU_STATE_RESETTING &&
765 hba->cardtype != st_yosemite))) {
766 hba->status_tail = hba->status_head;
770 while (hba->status_tail != hba->status_head) {
771 resp = stex_get_status(hba);
772 tag = le16_to_cpu(resp->tag);
773 if (unlikely(tag >= hba->host->can_queue)) {
774 printk(KERN_WARNING DRV_NAME
775 "(%s): invalid tag\n", pci_name(hba->pdev));
779 ccb = &hba->ccb[tag];
780 if (hba->wait_ccb == ccb)
781 hba->wait_ccb = NULL;
782 if (unlikely(ccb->req == NULL)) {
783 printk(KERN_WARNING DRV_NAME
784 "(%s): lagging req\n", pci_name(hba->pdev));
789 size = resp->payload_sz * sizeof(u32); /* payload size */
790 if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
791 size > sizeof(*resp))) {
792 printk(KERN_WARNING DRV_NAME "(%s): bad status size\n",
793 pci_name(hba->pdev));
795 size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */
797 stex_copy_data(ccb, resp, size);
800 ccb->srb_status = resp->srb_status;
801 ccb->scsi_status = resp->scsi_status;
803 if (likely(ccb->cmd != NULL)) {
804 if (hba->cardtype == st_yosemite)
805 stex_ys_commands(hba, ccb, resp);
807 if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD &&
808 ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER))
809 stex_controller_info(hba, ccb);
811 scsi_dma_unmap(ccb->cmd);
814 } else if (ccb->req_type & PASSTHRU_REQ_TYPE) {
816 if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) {
821 if (waitqueue_active(&hba->waitq))
822 wake_up(&hba->waitq);
827 writel(hba->status_head, base + IMR1);
828 readl(base + IMR1); /* flush */
831 static irqreturn_t stex_intr(int irq, void *__hba)
833 struct st_hba *hba = __hba;
834 void __iomem *base = hba->mmio_base;
839 spin_lock_irqsave(hba->host->host_lock, flags);
841 data = readl(base + ODBL);
843 if (data && data != 0xffffffff) {
844 /* clear the interrupt */
845 writel(data, base + ODBL);
846 readl(base + ODBL); /* flush */
847 stex_mu_intr(hba, data);
851 spin_unlock_irqrestore(hba->host->host_lock, flags);
853 return IRQ_RETVAL(handled);
856 static int stex_handshake(struct st_hba *hba)
858 void __iomem *base = hba->mmio_base;
859 struct handshake_frame *h;
860 dma_addr_t status_phys;
862 unsigned long before;
864 if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
865 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
868 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
869 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
870 printk(KERN_ERR DRV_NAME
871 "(%s): no handshake signature\n",
872 pci_name(hba->pdev));
882 data = readl(base + OMR1);
883 if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) {
885 if (hba->host->can_queue > data)
886 hba->host->can_queue = data;
889 h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
890 h->rb_phy = cpu_to_le32(hba->dma_handle);
891 h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16);
892 h->req_sz = cpu_to_le16(sizeof(struct req_msg));
893 h->req_cnt = cpu_to_le16(MU_REQ_COUNT);
894 h->status_sz = cpu_to_le16(sizeof(struct status_msg));
895 h->status_cnt = cpu_to_le16(MU_STATUS_COUNT);
896 stex_gettime(&h->hosttime);
897 h->partner_type = HMU_PARTNER_TYPE;
898 if (hba->dma_size > STEX_BUFFER_SIZE) {
899 h->extra_offset = cpu_to_le32(STEX_BUFFER_SIZE);
900 h->extra_size = cpu_to_le32(ST_ADDITIONAL_MEM);
902 h->extra_offset = h->extra_size = 0;
904 status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE;
905 writel(status_phys, base + IMR0);
907 writel((status_phys >> 16) >> 16, base + IMR1);
910 writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
912 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
913 readl(base + IDBL); /* flush */
917 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
918 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
919 printk(KERN_ERR DRV_NAME
920 "(%s): no signature after handshake frame\n",
921 pci_name(hba->pdev));
928 writel(0, base + IMR0);
930 writel(0, base + OMR0);
932 writel(0, base + IMR1);
934 writel(0, base + OMR1);
935 readl(base + OMR1); /* flush */
936 hba->mu_status = MU_STATE_STARTED;
940 static int stex_abort(struct scsi_cmnd *cmd)
942 struct Scsi_Host *host = cmd->device->host;
943 struct st_hba *hba = (struct st_hba *)host->hostdata;
944 u16 tag = cmd->request->tag;
947 int result = SUCCESS;
950 printk(KERN_INFO DRV_NAME
951 "(%s): aborting command\n", pci_name(hba->pdev));
952 scsi_print_command(cmd);
954 base = hba->mmio_base;
955 spin_lock_irqsave(host->host_lock, flags);
956 if (tag < host->can_queue && hba->ccb[tag].cmd == cmd)
957 hba->wait_ccb = &hba->ccb[tag];
959 for (tag = 0; tag < host->can_queue; tag++)
960 if (hba->ccb[tag].cmd == cmd) {
961 hba->wait_ccb = &hba->ccb[tag];
964 if (tag >= host->can_queue)
968 data = readl(base + ODBL);
969 if (data == 0 || data == 0xffffffff)
972 writel(data, base + ODBL);
973 readl(base + ODBL); /* flush */
975 stex_mu_intr(hba, data);
977 if (hba->wait_ccb == NULL) {
978 printk(KERN_WARNING DRV_NAME
979 "(%s): lost interrupt\n", pci_name(hba->pdev));
985 hba->wait_ccb->req = NULL; /* nullify the req's future return */
986 hba->wait_ccb = NULL;
989 spin_unlock_irqrestore(host->host_lock, flags);
993 static void stex_hard_reset(struct st_hba *hba)
1000 for (i = 0; i < 16; i++)
1001 pci_read_config_dword(hba->pdev, i * 4,
1002 &hba->pdev->saved_config_space[i]);
1004 /* Reset secondary bus. Our controller(MU/ATU) is the only device on
1005 secondary bus. Consult Intel 80331/3 developer's manual for detail */
1006 bus = hba->pdev->bus;
1007 pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
1008 pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET;
1009 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1012 * 1 ms may be enough for 8-port controllers. But 16-port controllers
1013 * require more time to finish bus reset. Use 100 ms here for safety
1016 pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
1017 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1019 for (i = 0; i < MU_HARD_RESET_WAIT; i++) {
1020 pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
1021 if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER))
1027 for (i = 0; i < 16; i++)
1028 pci_write_config_dword(hba->pdev, i * 4,
1029 hba->pdev->saved_config_space[i]);
1032 static int stex_reset(struct scsi_cmnd *cmd)
1035 unsigned long flags;
1036 unsigned long before;
1037 hba = (struct st_hba *) &cmd->device->host->hostdata[0];
1039 printk(KERN_INFO DRV_NAME
1040 "(%s): resetting host\n", pci_name(hba->pdev));
1041 scsi_print_command(cmd);
1043 hba->mu_status = MU_STATE_RESETTING;
1045 if (hba->cardtype == st_shasta)
1046 stex_hard_reset(hba);
1048 if (hba->cardtype != st_yosemite) {
1049 if (stex_handshake(hba)) {
1050 printk(KERN_WARNING DRV_NAME
1051 "(%s): resetting: handshake failed\n",
1052 pci_name(hba->pdev));
1055 spin_lock_irqsave(hba->host->host_lock, flags);
1058 hba->status_head = 0;
1059 hba->status_tail = 0;
1060 hba->out_req_cnt = 0;
1061 spin_unlock_irqrestore(hba->host->host_lock, flags);
1066 writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1067 readl(hba->mmio_base + IDBL); /* flush */
1069 while (hba->out_req_cnt > 0) {
1070 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
1071 printk(KERN_WARNING DRV_NAME
1072 "(%s): reset timeout\n", pci_name(hba->pdev));
1078 hba->mu_status = MU_STATE_STARTED;
1082 static int stex_biosparam(struct scsi_device *sdev,
1083 struct block_device *bdev, sector_t capacity, int geom[])
1085 int heads = 255, sectors = 63;
1087 if (capacity < 0x200000) {
1092 sector_div(capacity, heads * sectors);
1101 static struct scsi_host_template driver_template = {
1102 .module = THIS_MODULE,
1104 .proc_name = DRV_NAME,
1105 .bios_param = stex_biosparam,
1106 .queuecommand = stex_queuecommand,
1107 .slave_alloc = stex_slave_alloc,
1108 .slave_configure = stex_slave_config,
1109 .slave_destroy = stex_slave_destroy,
1110 .eh_abort_handler = stex_abort,
1111 .eh_host_reset_handler = stex_reset,
1112 .can_queue = ST_CAN_QUEUE,
1114 .sg_tablesize = ST_MAX_SG,
1115 .cmd_per_lun = ST_CMD_PER_LUN,
1118 static int stex_set_dma_mask(struct pci_dev * pdev)
1121 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1122 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1124 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1126 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1130 static int __devinit
1131 stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1134 struct Scsi_Host *host;
1137 err = pci_enable_device(pdev);
1141 pci_set_master(pdev);
1143 host = scsi_host_alloc(&driver_template, sizeof(struct st_hba));
1146 printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n",
1152 hba = (struct st_hba *)host->hostdata;
1153 memset(hba, 0, sizeof(struct st_hba));
1155 err = pci_request_regions(pdev, DRV_NAME);
1157 printk(KERN_ERR DRV_NAME "(%s): request regions failed\n",
1159 goto out_scsi_host_put;
1162 hba->mmio_base = ioremap_nocache(pci_resource_start(pdev, 0),
1163 pci_resource_len(pdev, 0));
1164 if ( !hba->mmio_base) {
1165 printk(KERN_ERR DRV_NAME "(%s): memory map failed\n",
1168 goto out_release_regions;
1171 err = stex_set_dma_mask(pdev);
1173 printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n",
1178 hba->cardtype = (unsigned int) id->driver_data;
1179 if (hba->cardtype == st_vsc && (pdev->subsystem_device & 0xf) == 0x1)
1180 hba->cardtype = st_vsc1;
1181 hba->dma_size = (hba->cardtype == st_vsc1) ?
1182 (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE);
1183 hba->dma_mem = dma_alloc_coherent(&pdev->dev,
1184 hba->dma_size, &hba->dma_handle, GFP_KERNEL);
1185 if (!hba->dma_mem) {
1187 printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n",
1192 hba->status_buffer =
1193 (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
1194 hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE;
1195 hba->mu_status = MU_STATE_STARTING;
1197 if (hba->cardtype == st_shasta) {
1199 host->max_id = 16 + 1;
1200 } else if (hba->cardtype == st_yosemite) {
1201 host->max_lun = 128;
1202 host->max_id = 1 + 1;
1204 /* st_vsc and st_vsc1 */
1206 host->max_id = 128 + 1;
1208 host->max_channel = 0;
1209 host->unique_id = host->host_no;
1210 host->max_cmd_len = STEX_CDB_LENGTH;
1214 init_waitqueue_head(&hba->waitq);
1216 err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
1218 printk(KERN_ERR DRV_NAME "(%s): request irq failed\n",
1223 err = stex_handshake(hba);
1227 err = scsi_init_shared_tag_map(host, host->can_queue);
1229 printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n",
1234 pci_set_drvdata(pdev, hba);
1236 err = scsi_add_host(host, &pdev->dev);
1238 printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n",
1243 scsi_scan_host(host);
1248 free_irq(pdev->irq, hba);
1250 dma_free_coherent(&pdev->dev, hba->dma_size,
1251 hba->dma_mem, hba->dma_handle);
1253 iounmap(hba->mmio_base);
1254 out_release_regions:
1255 pci_release_regions(pdev);
1257 scsi_host_put(host);
1259 pci_disable_device(pdev);
1264 static void stex_hba_stop(struct st_hba *hba)
1266 struct req_msg *req;
1267 unsigned long flags;
1268 unsigned long before;
1271 spin_lock_irqsave(hba->host->host_lock, flags);
1272 req = stex_alloc_req(hba);
1273 memset(req->cdb, 0, STEX_CDB_LENGTH);
1275 if (hba->cardtype == st_yosemite) {
1276 req->cdb[0] = MGT_CMD;
1277 req->cdb[1] = MGT_CMD_SIGNATURE;
1278 req->cdb[2] = CTLR_CONFIG_CMD;
1279 req->cdb[3] = CTLR_SHUTDOWN;
1281 req->cdb[0] = CONTROLLER_CMD;
1282 req->cdb[1] = CTLR_POWER_STATE_CHANGE;
1283 req->cdb[2] = CTLR_POWER_SAVING;
1286 hba->ccb[tag].cmd = NULL;
1287 hba->ccb[tag].sg_count = 0;
1288 hba->ccb[tag].sense_bufflen = 0;
1289 hba->ccb[tag].sense_buffer = NULL;
1290 hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE;
1292 stex_send_cmd(hba, req, tag);
1293 spin_unlock_irqrestore(hba->host->host_lock, flags);
1296 while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
1297 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ))
1303 static void stex_hba_free(struct st_hba *hba)
1305 free_irq(hba->pdev->irq, hba);
1307 iounmap(hba->mmio_base);
1309 pci_release_regions(hba->pdev);
1311 dma_free_coherent(&hba->pdev->dev, hba->dma_size,
1312 hba->dma_mem, hba->dma_handle);
1315 static void stex_remove(struct pci_dev *pdev)
1317 struct st_hba *hba = pci_get_drvdata(pdev);
1319 scsi_remove_host(hba->host);
1321 pci_set_drvdata(pdev, NULL);
1327 scsi_host_put(hba->host);
1329 pci_disable_device(pdev);
1332 static void stex_shutdown(struct pci_dev *pdev)
1334 struct st_hba *hba = pci_get_drvdata(pdev);
1339 static struct pci_device_id stex_pci_tbl[] = {
1341 { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1342 st_shasta }, /* SuperTrak EX8350/8300/16350/16300 */
1343 { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1344 st_shasta }, /* SuperTrak EX12350 */
1345 { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1346 st_shasta }, /* SuperTrak EX4350 */
1347 { 0x105a, 0xe350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1348 st_shasta }, /* SuperTrak EX24350 */
1351 { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
1354 { 0x105a, 0x8650, PCI_ANY_ID, 0x4600, 0, 0,
1355 st_yosemite }, /* SuperTrak EX4650 */
1356 { 0x105a, 0x8650, PCI_ANY_ID, 0x4610, 0, 0,
1357 st_yosemite }, /* SuperTrak EX4650o */
1358 { 0x105a, 0x8650, PCI_ANY_ID, 0x8600, 0, 0,
1359 st_yosemite }, /* SuperTrak EX8650EL */
1360 { 0x105a, 0x8650, PCI_ANY_ID, 0x8601, 0, 0,
1361 st_yosemite }, /* SuperTrak EX8650 */
1362 { 0x105a, 0x8650, PCI_ANY_ID, 0x8602, 0, 0,
1363 st_yosemite }, /* SuperTrak EX8654 */
1364 { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1365 st_yosemite }, /* generic st_yosemite */
1366 { } /* terminate list */
1368 MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
1370 static struct pci_driver stex_pci_driver = {
1372 .id_table = stex_pci_tbl,
1373 .probe = stex_probe,
1374 .remove = __devexit_p(stex_remove),
1375 .shutdown = stex_shutdown,
1378 static int __init stex_init(void)
1380 printk(KERN_INFO DRV_NAME
1381 ": Promise SuperTrak EX Driver version: %s\n",
1384 return pci_register_driver(&stex_pci_driver);
1387 static void __exit stex_exit(void)
1389 pci_unregister_driver(&stex_pci_driver);
1392 module_init(stex_init);
1393 module_exit(stex_exit);