2 * ipr.h -- driver for IBM Power Linux RAID adapters
4 * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
6 * Copyright (C) 2003, 2004 IBM Corporation
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
23 * that broke 64bit platforms.
29 #include <linux/types.h>
30 #include <linux/completion.h>
31 #include <linux/list.h>
32 #include <linux/kref.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
39 #define IPR_DRIVER_VERSION "2.0.14"
40 #define IPR_DRIVER_DATE "(May 2, 2005)"
43 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
44 * ops per device for devices not running tagged command queuing.
45 * This can be adjusted at runtime through sysfs device attributes.
47 #define IPR_MAX_CMD_PER_LUN 6
50 * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
51 * ops the mid-layer can send to the adapter.
53 #define IPR_NUM_BASE_CMD_BLKS 100
55 #define IPR_SUBS_DEV_ID_2780 0x0264
56 #define IPR_SUBS_DEV_ID_5702 0x0266
57 #define IPR_SUBS_DEV_ID_5703 0x0278
58 #define IPR_SUBS_DEV_ID_572E 0x028D
59 #define IPR_SUBS_DEV_ID_573E 0x02D3
60 #define IPR_SUBS_DEV_ID_573D 0x02D4
61 #define IPR_SUBS_DEV_ID_571A 0x02C0
62 #define IPR_SUBS_DEV_ID_571B 0x02BE
63 #define IPR_SUBS_DEV_ID_571E 0x02BF
65 #define IPR_NAME "ipr"
70 #define IPR_RC_JOB_CONTINUE 1
71 #define IPR_RC_JOB_RETURN 2
76 #define IPR_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
77 #define IPR_IOASC_SYNC_REQUIRED 0x023f0000
78 #define IPR_IOASC_MED_DO_NOT_REALLOC 0x03110C00
79 #define IPR_IOASC_HW_SEL_TIMEOUT 0x04050000
80 #define IPR_IOASC_HW_DEV_BUS_STATUS 0x04448500
81 #define IPR_IOASC_IOASC_MASK 0xFFFFFF00
82 #define IPR_IOASC_SCSI_STATUS_MASK 0x000000FF
83 #define IPR_IOASC_IR_RESOURCE_HANDLE 0x05250000
84 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA 0x05258100
85 #define IPR_IOASA_IR_DUAL_IOA_DISABLED 0x052C8000
86 #define IPR_IOASC_BUS_WAS_RESET 0x06290000
87 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER 0x06298000
88 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST 0x0B5A0000
90 #define IPR_FIRST_DRIVER_IOASC 0x10000000
91 #define IPR_IOASC_IOA_WAS_RESET 0x10000001
92 #define IPR_IOASC_PCI_ACCESS_ERROR 0x10000002
94 #define IPR_NUM_LOG_HCAMS 2
95 #define IPR_NUM_CFG_CHG_HCAMS 2
96 #define IPR_NUM_HCAMS (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
97 #define IPR_MAX_NUM_TARGETS_PER_BUS 0x10
98 #define IPR_MAX_NUM_LUNS_PER_TARGET 256
99 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET 8
100 #define IPR_VSET_BUS 0xff
101 #define IPR_IOA_BUS 0xff
102 #define IPR_IOA_TARGET 0xff
103 #define IPR_IOA_LUN 0xff
104 #define IPR_MAX_NUM_BUSES 4
105 #define IPR_MAX_BUS_TO_SCAN IPR_MAX_NUM_BUSES
107 #define IPR_NUM_RESET_RELOAD_RETRIES 3
109 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
110 #define IPR_NUM_INTERNAL_CMD_BLKS (IPR_NUM_HCAMS + \
111 ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
113 #define IPR_MAX_COMMANDS IPR_NUM_BASE_CMD_BLKS
114 #define IPR_NUM_CMD_BLKS (IPR_NUM_BASE_CMD_BLKS + \
115 IPR_NUM_INTERNAL_CMD_BLKS)
117 #define IPR_MAX_PHYSICAL_DEVS 192
119 #define IPR_MAX_SGLIST 64
120 #define IPR_IOA_MAX_SECTORS 32767
121 #define IPR_VSET_MAX_SECTORS 512
122 #define IPR_MAX_CDB_LEN 16
124 #define IPR_DEFAULT_BUS_WIDTH 16
125 #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
126 #define IPR_U160_SCSI_RATE ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
127 #define IPR_U320_SCSI_RATE ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
128 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
130 #define IPR_IOA_RES_HANDLE 0xffffffff
131 #define IPR_IOA_RES_ADDR 0x00ffffff
136 #define IPR_QUERY_RSRC_STATE 0xC2
137 #define IPR_RESET_DEVICE 0xC3
138 #define IPR_RESET_TYPE_SELECT 0x80
139 #define IPR_LUN_RESET 0x40
140 #define IPR_TARGET_RESET 0x20
141 #define IPR_BUS_RESET 0x10
142 #define IPR_ID_HOST_RR_Q 0xC4
143 #define IPR_QUERY_IOA_CONFIG 0xC5
144 #define IPR_CANCEL_ALL_REQUESTS 0xCE
145 #define IPR_HOST_CONTROLLED_ASYNC 0xCF
146 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE 0x01
147 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA 0x02
148 #define IPR_SET_SUPPORTED_DEVICES 0xFB
149 #define IPR_IOA_SHUTDOWN 0xF7
150 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE 0x05
155 #define IPR_SHUTDOWN_TIMEOUT (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
156 #define IPR_VSET_RW_TIMEOUT (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
157 #define IPR_ABBREV_SHUTDOWN_TIMEOUT (10 * HZ)
158 #define IPR_DEVICE_RESET_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
159 #define IPR_CANCEL_ALL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
160 #define IPR_ABORT_TASK_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
161 #define IPR_INTERNAL_TIMEOUT (ipr_fastfail ? 10 * HZ : 30 * HZ)
162 #define IPR_WRITE_BUFFER_TIMEOUT (10 * 60 * HZ)
163 #define IPR_SET_SUP_DEVICE_TIMEOUT (2 * 60 * HZ)
164 #define IPR_REQUEST_SENSE_TIMEOUT (10 * HZ)
165 #define IPR_OPERATIONAL_TIMEOUT (5 * 60)
166 #define IPR_WAIT_FOR_RESET_TIMEOUT (2 * HZ)
167 #define IPR_CHECK_FOR_RESET_TIMEOUT (HZ / 10)
168 #define IPR_WAIT_FOR_BIST_TIMEOUT (2 * HZ)
169 #define IPR_DUMP_TIMEOUT (15 * HZ)
174 #define IPR_VENDOR_ID_LEN 8
175 #define IPR_PROD_ID_LEN 16
176 #define IPR_SERIAL_NUM_LEN 8
181 #define IPR_FMT2_MBX_ADDR_MASK 0x0fffffff
182 #define IPR_FMT2_MBX_BAR_SEL_MASK 0xf0000000
183 #define IPR_FMT2_MKR_BAR_SEL_SHIFT 28
184 #define IPR_GET_FMT2_BAR_SEL(mbx) \
185 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
186 #define IPR_SDT_FMT2_BAR0_SEL 0x0
187 #define IPR_SDT_FMT2_BAR1_SEL 0x1
188 #define IPR_SDT_FMT2_BAR2_SEL 0x2
189 #define IPR_SDT_FMT2_BAR3_SEL 0x3
190 #define IPR_SDT_FMT2_BAR4_SEL 0x4
191 #define IPR_SDT_FMT2_BAR5_SEL 0x5
192 #define IPR_SDT_FMT2_EXP_ROM_SEL 0x8
193 #define IPR_FMT2_SDT_READY_TO_USE 0xC4D4E3F2
194 #define IPR_DOORBELL 0x82800000
196 #define IPR_PCII_IOA_TRANS_TO_OPER (0x80000000 >> 0)
197 #define IPR_PCII_IOARCB_XFER_FAILED (0x80000000 >> 3)
198 #define IPR_PCII_IOA_UNIT_CHECKED (0x80000000 >> 4)
199 #define IPR_PCII_NO_HOST_RRQ (0x80000000 >> 5)
200 #define IPR_PCII_CRITICAL_OPERATION (0x80000000 >> 6)
201 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE (0x80000000 >> 7)
202 #define IPR_PCII_IOARRIN_LOST (0x80000000 >> 27)
203 #define IPR_PCII_MMIO_ERROR (0x80000000 >> 28)
204 #define IPR_PCII_PROC_ERR_STATE (0x80000000 >> 29)
205 #define IPR_PCII_HRRQ_UPDATED (0x80000000 >> 30)
206 #define IPR_PCII_CORE_ISSUED_RST_REQ (0x80000000 >> 31)
208 #define IPR_PCII_ERROR_INTERRUPTS \
209 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
210 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
212 #define IPR_PCII_OPER_INTERRUPTS \
213 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
215 #define IPR_UPROCI_RESET_ALERT (0x80000000 >> 7)
216 #define IPR_UPROCI_IO_DEBUG_ALERT (0x80000000 >> 9)
218 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC 200000 /* 200 ms */
219 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC 200000 /* 200 ms */
224 #define IPR_MAX_IOA_DUMP_SIZE (4 * 1024 * 1024)
225 #define IPR_NUM_SDT_ENTRIES 511
226 #define IPR_MAX_NUM_DUMP_PAGES ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
231 #define IPR_NUM_IOADL_ENTRIES IPR_MAX_SGLIST
234 * Adapter interface types
237 struct ipr_res_addr {
242 #define IPR_GET_PHYS_LOC(res_addr) \
243 (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
244 }__attribute__((packed, aligned (4)));
246 struct ipr_std_inq_vpids {
247 u8 vendor_id[IPR_VENDOR_ID_LEN];
248 u8 product_id[IPR_PROD_ID_LEN];
249 }__attribute__((packed));
252 struct ipr_std_inq_vpids vpids;
253 u8 sn[IPR_SERIAL_NUM_LEN];
254 }__attribute__((packed));
256 struct ipr_std_inq_data {
257 u8 peri_qual_dev_type;
258 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
259 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
261 u8 removeable_medium_rsvd;
262 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
264 #define IPR_IS_DASD_DEVICE(std_inq) \
265 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
266 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
268 #define IPR_IS_SES_DEVICE(std_inq) \
269 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
278 struct ipr_std_inq_vpids vpids;
280 u8 ros_rsvd_ram_rsvd[4];
282 u8 serial_num[IPR_SERIAL_NUM_LEN];
283 }__attribute__ ((packed));
285 struct ipr_config_table_entry {
289 #define IPR_IS_IOA_RESOURCE 0x80
290 #define IPR_IS_ARRAY_MEMBER 0x20
291 #define IPR_IS_HOT_SPARE 0x10
294 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
295 #define IPR_SUBTYPE_AF_DASD 0
296 #define IPR_SUBTYPE_GENERIC_SCSI 1
297 #define IPR_SUBTYPE_VOLUME_SET 2
299 struct ipr_res_addr res_addr;
302 struct ipr_std_inq_data std_inq_data;
303 }__attribute__ ((packed, aligned (4)));
305 struct ipr_config_table_hdr {
308 #define IPR_UCODE_DOWNLOAD_REQ 0x10
310 }__attribute__((packed, aligned (4)));
312 struct ipr_config_table {
313 struct ipr_config_table_hdr hdr;
314 struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
315 }__attribute__((packed, aligned (4)));
317 struct ipr_hostrcb_cfg_ch_not {
318 struct ipr_config_table_entry cfgte;
320 }__attribute__((packed, aligned (4)));
322 struct ipr_supported_device {
326 struct ipr_std_inq_vpids vpids;
328 }__attribute__((packed, aligned (4)));
330 /* Command packet structure */
332 __be16 reserved; /* Reserved by IOA */
334 #define IPR_RQTYPE_SCSICDB 0x00
335 #define IPR_RQTYPE_IOACMD 0x01
336 #define IPR_RQTYPE_HCAM 0x02
341 #define IPR_FLAGS_HI_WRITE_NOT_READ 0x80
342 #define IPR_FLAGS_HI_NO_ULEN_CHK 0x20
343 #define IPR_FLAGS_HI_SYNC_OVERRIDE 0x10
344 #define IPR_FLAGS_HI_SYNC_COMPLETE 0x08
345 #define IPR_FLAGS_HI_NO_LINK_DESC 0x04
348 #define IPR_FLAGS_LO_ALIGNED_BFR 0x20
349 #define IPR_FLAGS_LO_DELAY_AFTER_RST 0x10
350 #define IPR_FLAGS_LO_UNTAGGED_TASK 0x00
351 #define IPR_FLAGS_LO_SIMPLE_TASK 0x02
352 #define IPR_FLAGS_LO_ORDERED_TASK 0x04
353 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK 0x06
354 #define IPR_FLAGS_LO_ACA_TASK 0x08
358 }__attribute__ ((packed, aligned(4)));
360 /* IOA Request Control Block 128 bytes */
362 __be32 ioarcb_host_pci_addr;
365 __be32 host_response_handle;
370 __be32 write_data_transfer_length;
371 __be32 read_data_transfer_length;
372 __be32 write_ioadl_addr;
373 __be32 write_ioadl_len;
374 __be32 read_ioadl_addr;
375 __be32 read_ioadl_len;
377 __be32 ioasa_host_pci_addr;
381 struct ipr_cmd_pkt cmd_pkt;
383 __be32 add_cmd_parms_len;
384 __be32 add_cmd_parms[10];
385 }__attribute__((packed, aligned (4)));
387 struct ipr_ioadl_desc {
388 __be32 flags_and_data_len;
389 #define IPR_IOADL_FLAGS_MASK 0xff000000
390 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
391 #define IPR_IOADL_DATA_LEN_MASK 0x00ffffff
392 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
393 #define IPR_IOADL_FLAGS_READ 0x48000000
394 #define IPR_IOADL_FLAGS_READ_LAST 0x49000000
395 #define IPR_IOADL_FLAGS_WRITE 0x68000000
396 #define IPR_IOADL_FLAGS_WRITE_LAST 0x69000000
397 #define IPR_IOADL_FLAGS_LAST 0x01000000
400 }__attribute__((packed, aligned (8)));
402 struct ipr_ioasa_vset {
403 __be32 failing_lba_hi;
404 __be32 failing_lba_lo;
406 }__attribute__((packed, aligned (4)));
408 struct ipr_ioasa_af_dasd {
410 }__attribute__((packed, aligned (4)));
412 struct ipr_ioasa_gpdd {
417 }__attribute__((packed, aligned (4)));
419 struct ipr_ioasa_raw {
421 }__attribute__((packed, aligned (4)));
425 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
426 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
427 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
428 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
430 __be16 ret_stat_len; /* Length of the returned IOASA */
432 __be16 avail_stat_len; /* Total Length of status available. */
434 __be32 residual_data_len; /* number of bytes in the host data */
435 /* buffers that were not used by the IOARCB command. */
438 #define IPR_NO_ILID 0
439 #define IPR_DRIVER_ILID 0xffffffff
443 __be32 fd_phys_locator;
445 __be32 fd_res_handle;
447 __be32 ioasc_specific; /* status code specific field */
448 #define IPR_IOASC_SPECIFIC_MASK 0x00ffffff
449 #define IPR_FIELD_POINTER_VALID (0x80000000 >> 8)
450 #define IPR_FIELD_POINTER_MASK 0x0000ffff
453 struct ipr_ioasa_vset vset;
454 struct ipr_ioasa_af_dasd dasd;
455 struct ipr_ioasa_gpdd gpdd;
456 struct ipr_ioasa_raw raw;
458 }__attribute__((packed, aligned (4)));
460 struct ipr_mode_parm_hdr {
463 u8 device_spec_parms;
465 }__attribute__((packed));
467 struct ipr_mode_pages {
468 struct ipr_mode_parm_hdr hdr;
469 u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
470 }__attribute__((packed));
472 struct ipr_mode_page_hdr {
474 #define IPR_MODE_PAGE_PS 0x80
475 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
477 }__attribute__ ((packed));
479 struct ipr_dev_bus_entry {
480 struct ipr_res_addr res_addr;
482 #define IPR_SCSI_ATTR_ENABLE_QAS 0x80
483 #define IPR_SCSI_ATTR_DISABLE_QAS 0x40
484 #define IPR_SCSI_ATTR_QAS_MASK 0xC0
485 #define IPR_SCSI_ATTR_ENABLE_TM 0x20
486 #define IPR_SCSI_ATTR_NO_TERM_PWR 0x10
487 #define IPR_SCSI_ATTR_TM_SUPPORTED 0x08
488 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED 0x04
492 u8 extended_reset_delay;
493 #define IPR_EXTENDED_RESET_DELAY 7
495 __be32 max_xfer_rate;
500 }__attribute__((packed, aligned (4)));
502 struct ipr_mode_page28 {
503 struct ipr_mode_page_hdr hdr;
506 struct ipr_dev_bus_entry bus[0];
507 }__attribute__((packed));
510 struct ipr_std_inq_data std_inq_data;
511 u8 ascii_part_num[12];
513 u8 ascii_plant_code[4];
514 }__attribute__((packed));
516 struct ipr_inquiry_page3 {
517 u8 peri_qual_dev_type;
529 }__attribute__((packed));
531 #define IPR_INQUIRY_PAGE0_ENTRIES 20
532 struct ipr_inquiry_page0 {
533 u8 peri_qual_dev_type;
537 u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
538 }__attribute__((packed));
540 struct ipr_hostrcb_device_data_entry {
542 struct ipr_res_addr dev_res_addr;
543 struct ipr_vpd new_vpd;
544 struct ipr_vpd ioa_last_with_dev_vpd;
545 struct ipr_vpd cfc_last_with_dev_vpd;
547 }__attribute__((packed, aligned (4)));
549 struct ipr_hostrcb_array_data_entry {
551 struct ipr_res_addr expected_dev_res_addr;
552 struct ipr_res_addr dev_res_addr;
553 }__attribute__((packed, aligned (4)));
555 struct ipr_hostrcb_type_ff_error {
556 __be32 ioa_data[246];
557 }__attribute__((packed, aligned (4)));
559 struct ipr_hostrcb_type_01_error {
563 __be32 ioa_data[236];
564 }__attribute__((packed, aligned (4)));
566 struct ipr_hostrcb_type_02_error {
567 struct ipr_vpd ioa_vpd;
568 struct ipr_vpd cfc_vpd;
569 struct ipr_vpd ioa_last_attached_to_cfc_vpd;
570 struct ipr_vpd cfc_last_attached_to_ioa_vpd;
572 }__attribute__((packed, aligned (4)));
574 struct ipr_hostrcb_type_03_error {
575 struct ipr_vpd ioa_vpd;
576 struct ipr_vpd cfc_vpd;
577 __be32 errors_detected;
578 __be32 errors_logged;
580 struct ipr_hostrcb_device_data_entry dev[3];
581 }__attribute__((packed, aligned (4)));
583 struct ipr_hostrcb_type_04_error {
584 struct ipr_vpd ioa_vpd;
585 struct ipr_vpd cfc_vpd;
587 struct ipr_hostrcb_array_data_entry array_member[10];
588 __be32 exposed_mode_adn;
590 struct ipr_vpd incomp_dev_vpd;
592 struct ipr_hostrcb_array_data_entry array_member2[8];
593 struct ipr_res_addr last_func_vset_res_addr;
594 u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
595 u8 protection_level[8];
596 }__attribute__((packed, aligned (4)));
598 struct ipr_hostrcb_type_07_error {
599 u8 failure_reason[64];
602 }__attribute__((packed, aligned (4)));
604 struct ipr_hostrcb_error {
605 __be32 failing_dev_ioasc;
606 struct ipr_res_addr failing_dev_res_addr;
607 __be32 failing_dev_res_handle;
610 struct ipr_hostrcb_type_ff_error type_ff_error;
611 struct ipr_hostrcb_type_01_error type_01_error;
612 struct ipr_hostrcb_type_02_error type_02_error;
613 struct ipr_hostrcb_type_03_error type_03_error;
614 struct ipr_hostrcb_type_04_error type_04_error;
615 struct ipr_hostrcb_type_07_error type_07_error;
617 }__attribute__((packed, aligned (4)));
619 struct ipr_hostrcb_raw {
620 __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
621 }__attribute__((packed, aligned (4)));
625 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE 0xE1
626 #define IPR_HOST_RCB_OP_CODE_LOG_DATA 0xE2
629 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED 0x00
630 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY 0x01
631 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY 0x02
632 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY 0x10
633 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY 0x11
635 u8 notifications_lost;
636 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST 0
637 #define IPR_HOST_RCB_NOTIFICATIONS_LOST 0x80
640 #define IPR_HOSTRCB_INTERNAL_OPER 0x80
641 #define IPR_HOSTRCB_ERR_RESP_SENT 0x40
644 #define IPR_HOST_RCB_OVERLAY_ID_1 0x01
645 #define IPR_HOST_RCB_OVERLAY_ID_2 0x02
646 #define IPR_HOST_RCB_OVERLAY_ID_3 0x03
647 #define IPR_HOST_RCB_OVERLAY_ID_4 0x04
648 #define IPR_HOST_RCB_OVERLAY_ID_6 0x06
649 #define IPR_HOST_RCB_OVERLAY_ID_7 0x07
650 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT 0xFF
654 __be32 time_since_last_ioa_reset;
659 struct ipr_hostrcb_error error;
660 struct ipr_hostrcb_cfg_ch_not ccn;
661 struct ipr_hostrcb_raw raw;
663 }__attribute__((packed, aligned (4)));
666 struct ipr_hcam hcam;
667 dma_addr_t hostrcb_dma;
668 struct list_head queue;
671 /* IPR smart dump table structures */
672 struct ipr_sdt_entry {
673 __be32 bar_str_offset;
679 #define IPR_SDT_ENDIAN 0x80
680 #define IPR_SDT_VALID_ENTRY 0x20
684 }__attribute__((packed, aligned (4)));
686 struct ipr_sdt_header {
689 __be32 num_entries_used;
691 }__attribute__((packed, aligned (4)));
694 struct ipr_sdt_header hdr;
695 struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
696 }__attribute__((packed, aligned (4)));
699 struct ipr_sdt_header hdr;
700 struct ipr_sdt_entry entry[1];
701 }__attribute__((packed, aligned (4)));
706 struct ipr_bus_attributes {
714 struct ipr_resource_entry {
715 struct ipr_config_table_entry cfgte;
716 u8 needs_sync_complete:1;
720 u8 resetting_device:1;
722 struct scsi_device *sdev;
723 struct list_head queue;
726 struct ipr_resource_hdr {
731 struct ipr_resource_table {
732 struct ipr_resource_hdr hdr;
733 struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
736 struct ipr_misc_cbs {
737 struct ipr_ioa_vpd ioa_vpd;
738 struct ipr_inquiry_page0 page0_data;
739 struct ipr_inquiry_page3 page3_data;
740 struct ipr_mode_pages mode_pages;
741 struct ipr_supported_device supp_dev;
744 struct ipr_interrupt_offsets {
745 unsigned long set_interrupt_mask_reg;
746 unsigned long clr_interrupt_mask_reg;
747 unsigned long sense_interrupt_mask_reg;
748 unsigned long clr_interrupt_reg;
750 unsigned long sense_interrupt_reg;
751 unsigned long ioarrin_reg;
752 unsigned long sense_uproc_interrupt_reg;
753 unsigned long set_uproc_interrupt_reg;
754 unsigned long clr_uproc_interrupt_reg;
757 struct ipr_interrupts {
758 void __iomem *set_interrupt_mask_reg;
759 void __iomem *clr_interrupt_mask_reg;
760 void __iomem *sense_interrupt_mask_reg;
761 void __iomem *clr_interrupt_reg;
763 void __iomem *sense_interrupt_reg;
764 void __iomem *ioarrin_reg;
765 void __iomem *sense_uproc_interrupt_reg;
766 void __iomem *set_uproc_interrupt_reg;
767 void __iomem *clr_uproc_interrupt_reg;
770 struct ipr_chip_cfg_t {
773 struct ipr_interrupt_offsets regs;
779 const struct ipr_chip_cfg_t *cfg;
782 enum ipr_shutdown_type {
783 IPR_SHUTDOWN_NORMAL = 0x00,
784 IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
785 IPR_SHUTDOWN_ABBREV = 0x80,
786 IPR_SHUTDOWN_NONE = 0x100
789 struct ipr_trace_entry {
794 #define IPR_TRACE_START 0x00
795 #define IPR_TRACE_FINISH 0xff
811 struct scatterlist scatterlist[1];
822 enum ipr_cache_state {
829 /* Per-controller data */
832 #define IPR_EYECATCHER "iprcfg"
834 struct list_head queue;
836 u8 allow_interrupts:1;
837 u8 in_reset_reload:1;
838 u8 in_ioa_bringdown:1;
839 u8 ioa_unit_checked:1;
843 u8 allow_ml_add_del:1;
845 enum ipr_cache_state cache_state;
846 u16 type; /* CCIN of the card */
849 #define IPR_MAX_LOG_LEVEL 4
850 #define IPR_DEFAULT_LOG_LEVEL 2
852 #define IPR_NUM_TRACE_INDEX_BITS 8
853 #define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
854 #define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
856 #define IPR_TRACE_START_LABEL "trace"
857 struct ipr_trace_entry *trace;
858 u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
861 * Queue for free command blocks
863 char ipr_free_label[8];
864 #define IPR_FREEQ_LABEL "free-q"
865 struct list_head free_q;
868 * Queue for command blocks outstanding to the adapter
870 char ipr_pending_label[8];
871 #define IPR_PENDQ_LABEL "pend-q"
872 struct list_head pending_q;
874 char cfg_table_start[8];
875 #define IPR_CFG_TBL_START "cfg"
876 struct ipr_config_table *cfg_table;
877 dma_addr_t cfg_table_dma;
879 char resource_table_label[8];
880 #define IPR_RES_TABLE_LABEL "res_tbl"
881 struct ipr_resource_entry *res_entries;
882 struct list_head free_res_q;
883 struct list_head used_res_q;
885 char ipr_hcam_label[8];
886 #define IPR_HCAM_LABEL "hcams"
887 struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
888 dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
889 struct list_head hostrcb_free_q;
890 struct list_head hostrcb_pending_q;
893 dma_addr_t host_rrq_dma;
894 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK 0xfffffffc
895 #define IPR_HRRQ_RESP_BIT_SET 0x00000002
896 #define IPR_HRRQ_TOGGLE_BIT 0x00000001
897 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT 2
898 volatile __be32 *hrrq_start;
899 volatile __be32 *hrrq_end;
900 volatile __be32 *hrrq_curr;
901 volatile u32 toggle_bit;
903 struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
905 const struct ipr_chip_cfg_t *chip_cfg;
907 void __iomem *hdw_dma_regs; /* iomapped PCI memory space */
908 unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
909 void __iomem *ioa_mailbox;
910 struct ipr_interrupts regs;
912 u16 saved_pcix_cmd_reg;
917 struct Scsi_Host *host;
918 struct pci_dev *pdev;
919 struct ipr_sglist *ucode_sglist;
920 struct ipr_mode_pages *saved_mode_pages;
921 u8 saved_mode_page_len;
923 struct work_struct work_q;
925 wait_queue_head_t reset_wait_q;
927 struct ipr_dump *dump;
928 enum ipr_sdt_state sdt_state;
930 struct ipr_misc_cbs *vpd_cbs;
931 dma_addr_t vpd_cbs_dma;
933 struct pci_pool *ipr_cmd_pool;
935 struct ipr_cmnd *reset_cmd;
937 char ipr_cmd_label[8];
938 #define IPR_CMD_LABEL "ipr_cmnd"
939 struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
940 u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
944 struct ipr_ioarcb ioarcb;
945 struct ipr_ioasa ioasa;
946 struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
947 struct list_head queue;
948 struct scsi_cmnd *scsi_cmd;
949 struct completion completion;
950 struct timer_list timer;
951 void (*done) (struct ipr_cmnd *);
952 int (*job_step) (struct ipr_cmnd *);
954 u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
955 dma_addr_t sense_buffer_dma;
956 unsigned short dma_use_sg;
957 dma_addr_t dma_handle;
958 struct ipr_cmnd *sibling;
960 enum ipr_shutdown_type shutdown_type;
961 struct ipr_hostrcb *hostrcb;
962 unsigned long time_left;
963 unsigned long scratch;
964 struct ipr_resource_entry *res;
965 struct scsi_device *sdev;
968 struct ipr_ioa_cfg *ioa_cfg;
971 struct ipr_ses_table_entry {
973 char compare_product_id_byte[17];
974 u32 max_bus_speed_limit; /* MB/sec limit for this backplane */
977 struct ipr_dump_header {
979 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
982 u32 first_entry_offset;
984 #define IPR_DUMP_STATUS_SUCCESS 0
985 #define IPR_DUMP_STATUS_QUAL_SUCCESS 2
986 #define IPR_DUMP_STATUS_FAILED 0xffffffff
988 #define IPR_DUMP_OS_LINUX 0x4C4E5558
990 #define IPR_DUMP_DRIVER_NAME 0x49505232
991 }__attribute__((packed, aligned (4)));
993 struct ipr_dump_entry_header {
995 #define IPR_DUMP_EYE_CATCHER 0xC5D4E3F2
1000 #define IPR_DUMP_DATA_TYPE_ASCII 0x41534349
1001 #define IPR_DUMP_DATA_TYPE_BINARY 0x42494E41
1003 #define IPR_DUMP_IOA_DUMP_ID 0x494F4131
1004 #define IPR_DUMP_LOCATION_ID 0x4C4F4341
1005 #define IPR_DUMP_TRACE_ID 0x54524143
1006 #define IPR_DUMP_DRIVER_VERSION_ID 0x44525652
1007 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1008 #define IPR_DUMP_IOA_CTRL_BLK 0x494F4342
1009 #define IPR_DUMP_PEND_OPS 0x414F5053
1011 }__attribute__((packed, aligned (4)));
1013 struct ipr_dump_location_entry {
1014 struct ipr_dump_entry_header hdr;
1015 u8 location[BUS_ID_SIZE];
1016 }__attribute__((packed));
1018 struct ipr_dump_trace_entry {
1019 struct ipr_dump_entry_header hdr;
1020 u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1021 }__attribute__((packed, aligned (4)));
1023 struct ipr_dump_version_entry {
1024 struct ipr_dump_entry_header hdr;
1025 u8 version[sizeof(IPR_DRIVER_VERSION)];
1028 struct ipr_dump_ioa_type_entry {
1029 struct ipr_dump_entry_header hdr;
1034 struct ipr_driver_dump {
1035 struct ipr_dump_header hdr;
1036 struct ipr_dump_version_entry version_entry;
1037 struct ipr_dump_location_entry location_entry;
1038 struct ipr_dump_ioa_type_entry ioa_type_entry;
1039 struct ipr_dump_trace_entry trace_entry;
1040 }__attribute__((packed));
1042 struct ipr_ioa_dump {
1043 struct ipr_dump_entry_header hdr;
1045 __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1047 u32 next_page_index;
1050 #define IPR_SDT_FMT2 2
1051 #define IPR_SDT_UNKNOWN 3
1052 }__attribute__((packed, aligned (4)));
1056 struct ipr_ioa_cfg *ioa_cfg;
1057 struct ipr_driver_dump driver_dump;
1058 struct ipr_ioa_dump ioa_dump;
1061 struct ipr_error_table_t {
1068 struct ipr_software_inq_lid_info {
1070 __be32 timestamp[3];
1071 }__attribute__((packed, aligned (4)));
1073 struct ipr_ucode_image_header {
1074 __be32 header_length;
1075 __be32 lid_table_offset;
1078 u8 minor_release[2];
1080 char eyecatcher[16];
1082 struct ipr_software_inq_lid_info lid[1];
1083 }__attribute__((packed, aligned (4)));
1088 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1090 #ifdef CONFIG_SCSI_IPR_TRACE
1091 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1092 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1094 #define ipr_create_trace_file(kobj, attr) 0
1095 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1098 #ifdef CONFIG_SCSI_IPR_DUMP
1099 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1100 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1102 #define ipr_create_dump_file(kobj, attr) 0
1103 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1107 * Error logging macros
1109 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1110 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1111 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1112 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1113 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1115 #define ipr_sdev_printk(level, sdev, fmt, args...) \
1116 sdev_printk(level, sdev, fmt, ## args)
1118 #define ipr_sdev_err(sdev, fmt, ...) \
1119 ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1121 #define ipr_sdev_info(sdev, fmt, ...) \
1122 ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1124 #define ipr_sdev_dbg(sdev, fmt, ...) \
1125 IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1127 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1128 printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1129 res.bus, res.target, res.lun, ##__VA_ARGS__)
1131 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1132 ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1133 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1134 IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1136 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...) \
1138 if ((res).bus >= IPR_MAX_NUM_BUSES) { \
1139 ipr_err(fmt": unknown\n", ##__VA_ARGS__); \
1141 ipr_err(fmt": %d:%d:%d:%d\n", \
1142 ##__VA_ARGS__, (ioa_cfg)->host->host_no, \
1143 (res).bus, (res).target, (res).lun); \
1147 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1148 __FILE__, __FUNCTION__, __LINE__)
1150 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1151 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1153 #define ipr_err_separator \
1154 ipr_err("----------------------------------------------------------\n")
1162 * ipr_is_ioa_resource - Determine if a resource is the IOA
1163 * @res: resource entry struct
1166 * 1 if IOA / 0 if not IOA
1168 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1170 return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1174 * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1175 * @res: resource entry struct
1178 * 1 if AF DASD / 0 if not AF DASD
1180 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1182 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1183 !ipr_is_ioa_resource(res) &&
1184 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1191 * ipr_is_vset_device - Determine if a resource is a VSET
1192 * @res: resource entry struct
1195 * 1 if VSET / 0 if not VSET
1197 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1199 if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1200 !ipr_is_ioa_resource(res) &&
1201 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1208 * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1209 * @res: resource entry struct
1212 * 1 if GSCSI / 0 if not GSCSI
1214 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1216 if (!ipr_is_ioa_resource(res) &&
1217 IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1224 * ipr_is_device - Determine if resource address is that of a device
1225 * @res_addr: resource address struct
1228 * 1 if AF / 0 if not AF
1230 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1232 if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1233 (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1240 * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1241 * @sdt_word: SDT address
1244 * 1 if format 2 / 0 if not
1246 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1248 u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1251 case IPR_SDT_FMT2_BAR0_SEL:
1252 case IPR_SDT_FMT2_BAR1_SEL:
1253 case IPR_SDT_FMT2_BAR2_SEL:
1254 case IPR_SDT_FMT2_BAR3_SEL:
1255 case IPR_SDT_FMT2_BAR4_SEL:
1256 case IPR_SDT_FMT2_BAR5_SEL:
1257 case IPR_SDT_FMT2_EXP_ROM_SEL: