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   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-06 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.4.x, 2.6.x supported                                  *
  31  *                                                                      *
  32  * $Log: gdth.c,v $
  33  * Revision 1.74  2006/04/10 13:44:47  achim
  34  * Community changes for 2.6.x
  35  * Kernel 2.2.x no longer supported
  36  * scsi_request interface removed, thanks to Christoph Hellwig
  37  *
  38  * Revision 1.73  2004/03/31 13:33:03  achim
  39  * Special command 0xfd implemented to detect 64-bit DMA support
  40  *
  41  * Revision 1.72  2004/03/17 08:56:04  achim
  42  * 64-bit DMA only enabled if FW >= x.43
  43  *
  44  * Revision 1.71  2004/03/05 15:51:29  achim
  45  * Screen service: separate message buffer, bugfixes
  46  *
  47  * Revision 1.70  2004/02/27 12:19:07  achim
  48  * Bugfix: Reset bit in config (0xfe) call removed
  49  *
  50  * Revision 1.69  2004/02/20 09:50:24  achim
  51  * Compatibility changes for kernels < 2.4.20
  52  * Bugfix screen service command size
  53  * pci_set_dma_mask() error handling added
  54  *
  55  * Revision 1.68  2004/02/19 15:46:54  achim
  56  * 64-bit DMA bugfixes
  57  * Drive size bugfix for drives > 1TB
  58  *
  59  * Revision 1.67  2004/01/14 13:11:57  achim
  60  * Tool access over /proc no longer supported
  61  * Bugfixes IOCTLs
  62  *
  63  * Revision 1.66  2003/12/19 15:04:06  achim
  64  * Bugfixes support for drives > 2TB
  65  *
  66  * Revision 1.65  2003/12/15 11:21:56  achim
  67  * 64-bit DMA support added
  68  * Support for drives > 2 TB implemented
  69  * Kernels 2.2.x, 2.4.x, 2.6.x supported
  70  *
  71  * Revision 1.64  2003/09/17 08:30:26  achim
  72  * EISA/ISA controller scan disabled
  73  * Command line switch probe_eisa_isa added
  74  *
  75  * Revision 1.63  2003/07/12 14:01:00  Daniele Bellucci <bellucda@tiscali.it>
  76  * Minor cleanups in gdth_ioctl.
  77  *
  78  * Revision 1.62  2003/02/27 15:01:59  achim
  79  * Dynamic DMA mapping implemented
  80  * New (character device) IOCTL interface added
  81  * Other controller related changes made
  82  *
  83  * Revision 1.61  2002/11/08 13:09:52  boji
  84  * Added support for XSCALE based RAID Controllers
  85  * Fixed SCREENSERVICE initialization in SMP cases
  86  * Added checks for gdth_polling before GDTH_HA_LOCK
  87  *
  88  * Revision 1.60  2002/02/05 09:35:22  achim
  89  * MODULE_LICENSE only if kernel >= 2.4.11
  90  *
  91  * Revision 1.59  2002/01/30 09:46:33  achim
  92  * Small changes
  93  *
  94  * Revision 1.58  2002/01/29 15:30:02  achim
  95  * Set default value of shared_access to Y
  96  * New status S_CACHE_RESERV for clustering added
  97  *
  98  * Revision 1.57  2001/08/21 11:16:35  achim
  99  * Bugfix free_irq()
 100  *
 101  * Revision 1.56  2001/08/09 11:19:39  achim
 102  * Scsi_Host_Template changes
 103  *
 104  * Revision 1.55  2001/08/09 10:11:28  achim
 105  * Command HOST_UNFREEZE_IO before cache service init.
 106  *
 107  * Revision 1.54  2001/07/20 13:48:12  achim
 108  * Expand: gdth_analyse_hdrive() removed
 109  *
 110  * Revision 1.53  2001/07/17 09:52:49  achim
 111  * Small OEM related change
 112  *
 113  * Revision 1.52  2001/06/19 15:06:20  achim
 114  * New host command GDT_UNFREEZE_IO added
 115  *
 116  * Revision 1.51  2001/05/22 06:42:37  achim
 117  * PCI: Subdevice ID added
 118  *
 119  * Revision 1.50  2001/05/17 13:42:16  achim
 120  * Support for Intel Storage RAID Controllers added
 121  *
 122  * Revision 1.50  2001/05/17 12:12:34  achim
 123  * Support for Intel Storage RAID Controllers added
 124  *
 125  * Revision 1.49  2001/03/15 15:07:17  achim
 126  * New __setup interface for boot command line options added
 127  *
 128  * Revision 1.48  2001/02/06 12:36:28  achim
 129  * Bugfix Cluster protocol
 130  *
 131  * Revision 1.47  2001/01/10 14:42:06  achim
 132  * New switch shared_access added
 133  *
 134  * Revision 1.46  2001/01/09 08:11:35  achim
 135  * gdth_command() removed
 136  * meaning of Scsi_Pointer members changed
 137  *
 138  * Revision 1.45  2000/11/16 12:02:24  achim
 139  * Changes for kernel 2.4
 140  *
 141  * Revision 1.44  2000/10/11 08:44:10  achim
 142  * Clustering changes: New flag media_changed added
 143  *
 144  * Revision 1.43  2000/09/20 12:59:01  achim
 145  * DPMEM remap functions for all PCI controller types implemented
 146  * Small changes for ia64 platform
 147  *
 148  * Revision 1.42  2000/07/20 09:04:50  achim
 149  * Small changes for kernel 2.4
 150  *
 151  * Revision 1.41  2000/07/04 14:11:11  achim
 152  * gdth_analyse_hdrive() added to rescan drives after online expansion
 153  *
 154  * Revision 1.40  2000/06/27 11:24:16  achim
 155  * Changes Clustering, Screenservice
 156  *
 157  * Revision 1.39  2000/06/15 13:09:04  achim
 158  * Changes for gdth_do_cmd()
 159  *
 160  * Revision 1.38  2000/06/15 12:08:43  achim
 161  * Bugfix gdth_sync_event(), service SCREENSERVICE
 162  * Data direction for command 0xc2 changed to DOU
 163  *
 164  * Revision 1.37  2000/05/25 13:50:10  achim
 165  * New driver parameter virt_ctr added
 166  *
 167  * Revision 1.36  2000/05/04 08:50:46  achim
 168  * Event buffer now in gdth_ha_str
 169  *
 170  * Revision 1.35  2000/03/03 10:44:08  achim
 171  * New event_string only valid for the RP controller family
 172  *
 173  * Revision 1.34  2000/03/02 14:55:29  achim
 174  * New mechanism for async. event handling implemented
 175  *
 176  * Revision 1.33  2000/02/21 15:37:37  achim
 177  * Bugfix Alpha platform + DPMEM above 4GB
 178  *
 179  * Revision 1.32  2000/02/14 16:17:37  achim
 180  * Bugfix sense_buffer[] + raw devices
 181  *
 182  * Revision 1.31  2000/02/10 10:29:00  achim
 183  * Delete sense_buffer[0], if command OK
 184  *
 185  * Revision 1.30  1999/11/02 13:42:39  achim
 186  * ARRAY_DRV_LIST2 implemented
 187  * Now 255 log. and 100 host drives supported
 188  *
 189  * Revision 1.29  1999/10/05 13:28:47  achim
 190  * GDT_CLUST_RESET added
 191  *
 192  * Revision 1.28  1999/08/12 13:44:54  achim
 193  * MOUNTALL removed
 194  * Cluster drives -> removeable drives
 195  *
 196  * Revision 1.27  1999/06/22 07:22:38  achim
 197  * Small changes
 198  *
 199  * Revision 1.26  1999/06/10 16:09:12  achim
 200  * Cluster Host Drive support: Bugfixes
 201  *
 202  * Revision 1.25  1999/06/01 16:03:56  achim
 203  * gdth_init_pci(): Manipulate config. space to start RP controller
 204  *
 205  * Revision 1.24  1999/05/26 11:53:06  achim
 206  * Cluster Host Drive support added
 207  *
 208  * Revision 1.23  1999/03/26 09:12:31  achim
 209  * Default value for hdr_channel set to 0
 210  *
 211  * Revision 1.22  1999/03/22 16:27:16  achim
 212  * Bugfix: gdth_store_event() must not be locked with GDTH_LOCK_HA()
 213  *
 214  * Revision 1.21  1999/03/16 13:40:34  achim
 215  * Problems with reserved drives solved
 216  * gdth_eh_bus_reset() implemented
 217  *
 218  * Revision 1.20  1999/03/10 09:08:13  achim
 219  * Bugfix: Corrections in gdth_direction_tab[] made
 220  * Bugfix: Increase command timeout (gdth_update_timeout()) NOT in gdth_putq()
 221  *
 222  * Revision 1.19  1999/03/05 14:38:16  achim
 223  * Bugfix: Heads/Sectors mapping for reserved devices possibly wrong
 224  * -> gdth_eval_mapping() implemented, changes in gdth_bios_param()
 225  * INIT_RETRIES set to 100s to avoid DEINIT-Timeout for controllers
 226  * with BIOS disabled and memory test set to Intensive
 227  * Enhanced /proc support
 228  *
 229  * Revision 1.18  1999/02/24 09:54:33  achim
 230  * Command line parameter hdr_channel implemented
 231  * Bugfix for EISA controllers + Linux 2.2.x
 232  *
 233  * Revision 1.17  1998/12/17 15:58:11  achim
 234  * Command line parameters implemented
 235  * Changes for Alpha platforms
 236  * PCI controller scan changed
 237  * SMP support improved (spin_lock_irqsave(),...)
 238  * New async. events, new scan/reserve commands included
 239  *
 240  * Revision 1.16  1998/09/28 16:08:46  achim
 241  * GDT_PCIMPR: DPMEM remapping, if required
 242  * mdelay() added
 243  *
 244  * Revision 1.15  1998/06/03 14:54:06  achim
 245  * gdth_delay(), gdth_flush() implemented
 246  * Bugfix: gdth_release() changed
 247  *
 248  * Revision 1.14  1998/05/22 10:01:17  achim
 249  * mj: pcibios_strerror() removed
 250  * Improved SMP support (if version >= 2.1.95)
 251  * gdth_halt(): halt_called flag added (if version < 2.1)
 252  *
 253  * Revision 1.13  1998/04/16 09:14:57  achim
 254  * Reserve drives (for raw service) implemented
 255  * New error handling code enabled
 256  * Get controller name from board_info() IOCTL
 257  * Final round of PCI device driver patches by Martin Mares
 258  *
 259  * Revision 1.12  1998/03/03 09:32:37  achim
 260  * Fibre channel controller support added
 261  *
 262  * Revision 1.11  1998/01/27 16:19:14  achim
 263  * SA_SHIRQ added
 264  * add_timer()/del_timer() instead of GDTH_TIMER
 265  * scsi_add_timer()/scsi_del_timer() instead of SCSI_TIMER
 266  * New error handling included
 267  *
 268  * Revision 1.10  1997/10/31 12:29:57  achim
 269  * Read heads/sectors from host drive
 270  *
 271  * Revision 1.9  1997/09/04 10:07:25  achim
 272  * IO-mapping with virt_to_bus(), gdth_readb(), gdth_writeb(), ...
 273  * register_reboot_notifier() to get a notify on shutown used
 274  *
 275  * Revision 1.8  1997/04/02 12:14:30  achim
 276  * Version 1.00 (see gdth.h), tested with kernel 2.0.29
 277  *
 278  * Revision 1.7  1997/03/12 13:33:37  achim
 279  * gdth_reset() changed, new async. events
 280  *
 281  * Revision 1.6  1997/03/04 14:01:11  achim
 282  * Shutdown routine gdth_halt() implemented
 283  *
 284  * Revision 1.5  1997/02/21 09:08:36  achim
 285  * New controller included (RP, RP1, RP2 series)
 286  * IOCTL interface implemented
 287  *
 288  * Revision 1.4  1996/07/05 12:48:55  achim
 289  * Function gdth_bios_param() implemented
 290  * New constant GDTH_MAXC_P_L inserted
 291  * GDT_WRITE_THR, GDT_EXT_INFO implemented
 292  * Function gdth_reset() changed
 293  *
 294  * Revision 1.3  1996/05/10 09:04:41  achim
 295  * Small changes for Linux 1.2.13
 296  *
 297  * Revision 1.2  1996/05/09 12:45:27  achim
 298  * Loadable module support implemented
 299  * /proc support corrections made
 300  *
 301  * Revision 1.1  1996/04/11 07:35:57  achim
 302  * Initial revision
 303  *
 304  ************************************************************************/
 305
 306 /* All GDT Disk Array Controllers are fully supported by this driver.
 307  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
 308  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
 309  * list of all controller types.
 310  *
 311  * If you have one or more GDT3000/3020 EISA controllers with
 312  * controller BIOS disabled, you have to set the IRQ values with the
 313  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
 314  * the IRQ values for the EISA controllers.
 315  *
 316  * After the optional list of IRQ values, other possible
 317  * command line options are:
 318  * disable:Y                    disable driver
 319  * disable:N                    enable driver
 320  * reserve_mode:0               reserve no drives for the raw service
 321  * reserve_mode:1               reserve all not init., removable drives
 322  * reserve_mode:2               reserve all not init. drives
 323  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
 324  *                              h- controller no., b- channel no.,
 325  *                              t- target ID, l- LUN
 326  * reverse_scan:Y               reverse scan order for PCI controllers
 327  * reverse_scan:N               scan PCI controllers like BIOS
 328  * max_ids:x                    x - target ID count per channel (1..MAXID)
 329  * rescan:Y                     rescan all channels/IDs
 330  * rescan:N                     use all devices found until now
 331  * virt_ctr:Y                   map every channel to a virtual controller
 332  * virt_ctr:N                   use multi channel support
 333  * hdr_channel:x                x - number of virtual bus for host drives
 334  * shared_access:Y              disable driver reserve/release protocol to
 335  *                              access a shared resource from several nodes,
 336  *                              appropriate controller firmware required
 337  * shared_access:N              enable driver reserve/release protocol
 338  * probe_eisa_isa:Y             scan for EISA/ISA controllers
 339  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
 340  * force_dma32:Y                use only 32 bit DMA mode
 341  * force_dma32:N                use 64 bit DMA mode, if supported
 342  *
 343  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
 344  *                          max_ids:127,rescan:N,virt_ctr:N,hdr_channel:0,
 345  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
 346  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
 347  *
 348  * When loading the gdth driver as a module, the same options are available.
 349  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
 350  * options changes slightly. You must replace all ',' between options
 351  * with ' ' and all ':' with '=' and you must use
 352  * '1' in place of 'Y' and '0' in place of 'N'.
 353  *
 354  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
 355  *           max_ids=127 rescan=0 virt_ctr=0 hdr_channel=0 shared_access=0
 356  *           probe_eisa_isa=0 force_dma32=0"
 357  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
 358  */
 359
 360 /* The meaning of the Scsi_Pointer members in this driver is as follows:
 361  * ptr:                     Chaining
 362  * this_residual:           Command priority
 363  * buffer:                  phys. DMA sense buffer
 364  * dma_handle:              phys. DMA buffer (kernel >= 2.4.0)
 365  * buffers_residual:        Timeout value
 366  * Status:                  Command status (gdth_do_cmd()), DMA mem. mappings
 367  * Message:                 Additional info (gdth_do_cmd()), DMA direction
 368  * have_data_in:            Flag for gdth_wait_completion()
 369  * sent_command:            Opcode special command
 370  * phase:                   Service/parameter/return code special command
 371  */
 372
 373
 374 /* interrupt coalescing */
 375 /* #define INT_COAL */
 376
 377 /* statistics */
 378 #define GDTH_STATISTICS
 379
 380 #include <linux/module.h>
 381
 382 #include <linux/version.h>
 383 #include <linux/kernel.h>
 384 #include <linux/types.h>
 385 #include <linux/pci.h>
 386 #include <linux/string.h>
 387 #include <linux/ctype.h>
 388 #include <linux/ioport.h>
 389 #include <linux/delay.h>
 390 #include <linux/interrupt.h>
 391 #include <linux/in.h>
 392 #include <linux/proc_fs.h>
 393 #include <linux/time.h>
 394 #include <linux/timer.h>
 395 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,6)
 396 #include <linux/dma-mapping.h>
 397 #else
 398 #define DMA_32BIT_MASK  0x00000000ffffffffULL
 399 #define DMA_64BIT_MASK  0xffffffffffffffffULL
 400 #endif
 401
 402 #ifdef GDTH_RTC
 403 #include <linux/mc146818rtc.h>
 404 #endif
 405 #include <linux/reboot.h>
 406
 407 #include <asm/dma.h>
 408 #include <asm/system.h>
 409 #include <asm/io.h>
 410 #include <asm/uaccess.h>
 411 #include <linux/spinlock.h>
 412 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 413 #include <linux/blkdev.h>
 414 #else
 415 #include <linux/blk.h>
 416 #include "sd.h"
 417 #endif
 418
 419 #include "scsi.h"
 420 #include <scsi/scsi_host.h>
 421 #include "gdth_kcompat.h"
 422 #include "gdth.h"
 423
 424 static void gdth_delay(int milliseconds);
 425 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs);
 426 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
 427 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp);
 428 static int gdth_async_event(int hanum);
 429 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 430
 431 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority);
 432 static void gdth_next(int hanum);
 433 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b);
 434 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp);
 435 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
 436                                       ushort idx, gdth_evt_data *evt);
 437 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 438 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
 439                                gdth_evt_str *estr);
 440 static void gdth_clear_events(void);
 441
 442 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
 443                                     char *buffer,ushort count);
 444 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp);
 445 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive);
 446
 447 static int gdth_search_eisa(ushort eisa_adr);
 448 static int gdth_search_isa(ulong32 bios_adr);
 449 static int gdth_search_pci(gdth_pci_str *pcistr);
 450 static void gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 451                             ushort vendor, ushort dev);
 452 static void gdth_sort_pci(gdth_pci_str *pcistr, int cnt);
 453 static int gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha);
 454 static int gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha);
 455 static int gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha);
 456
 457 static void gdth_enable_int(int hanum);
 458 static int gdth_get_status(unchar *pIStatus,int irq);
 459 static int gdth_test_busy(int hanum);
 460 static int gdth_get_cmd_index(int hanum);
 461 static void gdth_release_event(int hanum);
 462 static int gdth_wait(int hanum,int index,ulong32 time);
 463 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
 464                              ulong64 p2,ulong64 p3);
 465 static int gdth_search_drives(int hanum);
 466 static int gdth_analyse_hdrive(int hanum, ushort hdrive);
 467
 468 static const char *gdth_ctr_name(int hanum);
 469
 470 static int gdth_open(struct inode *inode, struct file *filep);
 471 static int gdth_close(struct inode *inode, struct file *filep);
 472 static int gdth_ioctl(struct inode *inode, struct file *filep,
 473                       unsigned int cmd, unsigned long arg);
 474
 475 static void gdth_flush(int hanum);
 476 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf);
 477 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *));
 478 static void gdth_scsi_done(struct scsi_cmnd *scp);
 479
 480 #ifdef DEBUG_GDTH
 481 static unchar   DebugState = DEBUG_GDTH;
 482
 483 #ifdef __SERIAL__
 484 #define MAX_SERBUF 160
 485 static void ser_init(void);
 486 static void ser_puts(char *str);
 487 static void ser_putc(char c);
 488 static int  ser_printk(const char *fmt, ...);
 489 static char strbuf[MAX_SERBUF+1];
 490 #ifdef __COM2__
 491 #define COM_BASE 0x2f8
 492 #else
 493 #define COM_BASE 0x3f8
 494 #endif
 495 static void ser_init()
 496 {
 497     unsigned port=COM_BASE;
 498
 499     outb(0x80,port+3);
 500     outb(0,port+1);
 501     /* 19200 Baud, if 9600: outb(12,port) */
 502     outb(6, port);
 503     outb(3,port+3);
 504     outb(0,port+1);
 505     /*
 506     ser_putc('I');
 507     ser_putc(' ');
 508     */
 509 }
 510
 511 static void ser_puts(char *str)
 512 {
 513     char *ptr;
 514
 515     ser_init();
 516     for (ptr=str;*ptr;++ptr)
 517         ser_putc(*ptr);
 518 }
 519
 520 static void ser_putc(char c)
 521 {
 522     unsigned port=COM_BASE;
 523
 524     while ((inb(port+5) & 0x20)==0);
 525     outb(c,port);
 526     if (c==0x0a)
 527     {
 528         while ((inb(port+5) & 0x20)==0);
 529         outb(0x0d,port);
 530     }
 531 }
 532
 533 static int ser_printk(const char *fmt, ...)
 534 {
 535     va_list args;
 536     int i;
 537
 538     va_start(args,fmt);
 539     i = vsprintf(strbuf,fmt,args);
 540     ser_puts(strbuf);
 541     va_end(args);
 542     return i;
 543 }
 544
 545 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 546 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 547 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 548
 549 #else /* !__SERIAL__ */
 550 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 551 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 552 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 553 #endif
 554
 555 #else /* !DEBUG */
 556 #define TRACE(a)
 557 #define TRACE2(a)
 558 #define TRACE3(a)
 559 #endif
 560
 561 #ifdef GDTH_STATISTICS
 562 static ulong32 max_rq=0, max_index=0, max_sg=0;
 563 #ifdef INT_COAL
 564 static ulong32 max_int_coal=0;
 565 #endif
 566 static ulong32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 567 static struct timer_list gdth_timer;
 568 #endif
 569
 570 #define PTR2USHORT(a)   (ushort)(ulong)(a)
 571 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 572 #define INDEX_OK(i,t)   ((i)<ARRAY_SIZE(t))
 573
 574 #define NUMDATA(a)      ( (gdth_num_str  *)((a)->hostdata))
 575 #define HADATA(a)       (&((gdth_ext_str *)((a)->hostdata))->haext)
 576 #define CMDDATA(a)      (&((gdth_ext_str *)((a)->hostdata))->cmdext)
 577
 578 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 579
 580 #define gdth_readb(addr)        readb(addr)
 581 #define gdth_readw(addr)        readw(addr)
 582 #define gdth_readl(addr)        readl(addr)
 583 #define gdth_writeb(b,addr)     writeb((b),(addr))
 584 #define gdth_writew(b,addr)     writew((b),(addr))
 585 #define gdth_writel(b,addr)     writel((b),(addr))
 586
 587 static unchar   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 588 static unchar   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 589 static unchar   gdth_polling;                           /* polling if TRUE */
 590 static unchar   gdth_from_wait  = FALSE;                /* gdth_wait() */
 591 static int      wait_index,wait_hanum;                  /* gdth_wait() */
 592 static int      gdth_ctr_count  = 0;                    /* controller count */
 593 static int      gdth_ctr_vcount = 0;                    /* virt. ctr. count */
 594 static int      gdth_ctr_released = 0;                  /* gdth_release() */
 595 static struct Scsi_Host *gdth_ctr_tab[MAXHA];           /* controller table */
 596 static struct Scsi_Host *gdth_ctr_vtab[MAXHA*MAXBUS];   /* virt. ctr. table */
 597 static unchar   gdth_write_through = FALSE;             /* write through */
 598 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 599 static int elastidx;
 600 static int eoldidx;
 601 static int major;
 602
 603 #define DIN     1                               /* IN data direction */
 604 #define DOU     2                               /* OUT data direction */
 605 #define DNO     DIN                             /* no data transfer */
 606 #define DUN     DIN                             /* unknown data direction */
 607 static unchar gdth_direction_tab[0x100] = {
 608     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 609     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 610     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 611     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 612     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 613     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 614     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 615     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 616     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 617     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 618     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 619     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 620     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 621     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 622     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 623     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 624 };
 625
 626 /* LILO and modprobe/insmod parameters */
 627 /* IRQ list for GDT3000/3020 EISA controllers */
 628 static int irq[MAXHA] __initdata =
 629 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 630  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 631 /* disable driver flag */
 632 static int disable __initdata = 0;
 633 /* reserve flag */
 634 static int reserve_mode = 1;
 635 /* reserve list */
 636 static int reserve_list[MAX_RES_ARGS] =
 637 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 638  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 639  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 640 /* scan order for PCI controllers */
 641 static int reverse_scan = 0;
 642 /* virtual channel for the host drives */
 643 static int hdr_channel = 0;
 644 /* max. IDs per channel */
 645 static int max_ids = MAXID;
 646 /* rescan all IDs */
 647 static int rescan = 0;
 648 /* map channels to virtual controllers */
 649 static int virt_ctr = 0;
 650 /* shared access */
 651 static int shared_access = 1;
 652 /* enable support for EISA and ISA controllers */
 653 static int probe_eisa_isa = 0;
 654 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 655 static int force_dma32 = 0;
 656
 657 /* parameters for modprobe/insmod */
 658 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
 659 module_param_array(irq, int, NULL, 0);
 660 module_param(disable, int, 0);
 661 module_param(reserve_mode, int, 0);
 662 module_param_array(reserve_list, int, NULL, 0);
 663 module_param(reverse_scan, int, 0);
 664 module_param(hdr_channel, int, 0);
 665 module_param(max_ids, int, 0);
 666 module_param(rescan, int, 0);
 667 module_param(virt_ctr, int, 0);
 668 module_param(shared_access, int, 0);
 669 module_param(probe_eisa_isa, int, 0);
 670 module_param(force_dma32, int, 0);
 671 #else
 672 MODULE_PARM(irq, "i");
 673 MODULE_PARM(disable, "i");
 674 MODULE_PARM(reserve_mode, "i");
 675 MODULE_PARM(reserve_list, "4-" __MODULE_STRING(MAX_RES_ARGS) "i");
 676 MODULE_PARM(reverse_scan, "i");
 677 MODULE_PARM(hdr_channel, "i");
 678 MODULE_PARM(max_ids, "i");
 679 MODULE_PARM(rescan, "i");
 680 MODULE_PARM(virt_ctr, "i");
 681 MODULE_PARM(shared_access, "i");
 682 MODULE_PARM(probe_eisa_isa, "i");
 683 MODULE_PARM(force_dma32, "i");
 684 #endif
 685 MODULE_AUTHOR("Achim Leubner");
 686 MODULE_LICENSE("GPL");
 687
 688 /* ioctl interface */
 689 static const struct file_operations gdth_fops = {
 690     .ioctl   = gdth_ioctl,
 691     .open    = gdth_open,
 692     .release = gdth_close,
 693 };
 694
 695 #define GDTH_MAGIC      0xc2e7c389      /* I got it from /dev/urandom */
 696 #define IS_GDTH_INTERNAL_CMD(scp)       (scp->underflow == GDTH_MAGIC)
 697
 698 #include "gdth_proc.h"
 699 #include "gdth_proc.c"
 700
 701 /* notifier block to get a notify on system shutdown/halt/reboot */
 702 static struct notifier_block gdth_notifier = {
 703     gdth_halt, NULL, 0
 704 };
 705 static int notifier_disabled = 0;
 706
 707 static void gdth_delay(int milliseconds)
 708 {
 709     if (milliseconds == 0) {
 710         udelay(1);
 711     } else {
 712         mdelay(milliseconds);
 713     }
 714 }
 715
 716 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 717 static void gdth_scsi_done(struct scsi_cmnd *scp)
 718 {
 719     TRACE2(("gdth_scsi_done()\n"));
 720
 721     if (IS_GDTH_INTERNAL_CMD(scp))
 722         complete((struct completion *)scp->request);
 723 }
 724
 725 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 726                    int timeout, u32 *info)
 727 {
 728     Scsi_Cmnd *scp;
 729     DECLARE_COMPLETION_ONSTACK(wait);
 730     int rval;
 731
 732     scp = kzalloc(sizeof(*scp), GFP_KERNEL);
 733     if (!scp)
 734         return -ENOMEM;
 735
 736     scp->device = sdev;
 737     /* use request field to save the ptr. to completion struct. */
 738     scp->request = (struct request *)&wait;
 739     scp->timeout_per_command = timeout*HZ;
 740     scp->request_buffer = gdtcmd;
 741     scp->cmd_len = 12;
 742     memcpy(scp->cmnd, cmnd, 12);
 743     scp->SCp.this_residual = IOCTL_PRI;   /* priority */
 744     scp->underflow = GDTH_MAGIC;
 745     gdth_queuecommand(scp, gdth_scsi_done);
 746     wait_for_completion(&wait);
 747
 748     rval = scp->SCp.Status;
 749     if (info)
 750         *info = scp->SCp.Message;
 751     kfree(scp);
 752     return rval;
 753 }
 754 #else
 755 static void gdth_scsi_done(Scsi_Cmnd *scp)
 756 {
 757     TRACE2(("gdth_scsi_done()\n"));
 758
 759     scp->request.rq_status = RQ_SCSI_DONE;
 760     if (scp->request.waiting)
 761         complete(scp->request.waiting);
 762 }
 763
 764 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 765                    int timeout, u32 *info)
 766 {
 767     Scsi_Cmnd *scp = scsi_allocate_device(sdev, 1, FALSE);
 768     unsigned bufflen = gdtcmd ? sizeof(gdth_cmd_str) : 0;
 769     DECLARE_COMPLETION_ONSTACK(wait);
 770     int rval;
 771
 772     if (!scp)
 773         return -ENOMEM;
 774     scp->cmd_len = 12;
 775     scp->use_sg = 0;
 776     scp->SCp.this_residual = IOCTL_PRI;   /* priority */
 777     scp->request.rq_status = RQ_SCSI_BUSY;
 778     scp->request.waiting = &wait;
 779     scsi_do_cmd(scp, cmnd, gdtcmd, bufflen, gdth_scsi_done, timeout*HZ, 1);
 780     wait_for_completion(&wait);
 781
 782     rval = scp->SCp.Status;
 783     if (info)
 784         *info = scp->SCp.Message;
 785
 786     scsi_release_command(scp);
 787     return rval;
 788 }
 789 #endif
 790
 791 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
 792                  int timeout, u32 *info)
 793 {
 794     struct scsi_device *sdev = scsi_get_host_dev(shost);
 795     int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
 796
 797     scsi_free_host_dev(sdev);
 798     return rval;
 799 }
 800
 801 static void gdth_eval_mapping(ulong32 size, ulong32 *cyls, int *heads, int *secs)
 802 {
 803     *cyls = size /HEADS/SECS;
 804     if (*cyls <= MAXCYLS) {
 805         *heads = HEADS;
 806         *secs = SECS;
 807     } else {                                        /* too high for 64*32 */
 808         *cyls = size /MEDHEADS/MEDSECS;
 809         if (*cyls <= MAXCYLS) {
 810             *heads = MEDHEADS;
 811             *secs = MEDSECS;
 812         } else {                                    /* too high for 127*63 */
 813             *cyls = size /BIGHEADS/BIGSECS;
 814             *heads = BIGHEADS;
 815             *secs = BIGSECS;
 816         }
 817     }
 818 }
 819
 820 /* controller search and initialization functions */
 821
 822 static int __init gdth_search_eisa(ushort eisa_adr)
 823 {
 824     ulong32 id;
 825
 826     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 827     id = inl(eisa_adr+ID0REG);
 828     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 829         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 830             return 0;                           /* not EISA configured */
 831         return 1;
 832     }
 833     if (id == GDT3_ID)                          /* GDT3000 */
 834         return 1;
 835
 836     return 0;
 837 }
 838
 839
 840 static int __init gdth_search_isa(ulong32 bios_adr)
 841 {
 842     void __iomem *addr;
 843     ulong32 id;
 844
 845     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 846     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(ulong32))) != NULL) {
 847         id = gdth_readl(addr);
 848         iounmap(addr);
 849         if (id == GDT2_ID)                          /* GDT2000 */
 850             return 1;
 851     }
 852     return 0;
 853 }
 854
 855
 856 static int __init gdth_search_pci(gdth_pci_str *pcistr)
 857 {
 858     ushort device, cnt;
 859
 860     TRACE(("gdth_search_pci()\n"));
 861
 862     cnt = 0;
 863     for (device = 0; device <= PCI_DEVICE_ID_VORTEX_GDT6555; ++device)
 864         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 865     for (device = PCI_DEVICE_ID_VORTEX_GDT6x17RP;
 866          device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP; ++device)
 867         gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX, device);
 868     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 869                     PCI_DEVICE_ID_VORTEX_GDTNEWRX);
 870     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_VORTEX,
 871                     PCI_DEVICE_ID_VORTEX_GDTNEWRX2);
 872     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 873                     PCI_DEVICE_ID_INTEL_SRC);
 874     gdth_search_dev(pcistr, &cnt, PCI_VENDOR_ID_INTEL,
 875                     PCI_DEVICE_ID_INTEL_SRC_XSCALE);
 876     return cnt;
 877 }
 878
 879 /* Vortex only makes RAID controllers.
 880  * We do not really want to specify all 550 ids here, so wildcard match.
 881  */
 882 static struct pci_device_id gdthtable[] __maybe_unused = {
 883     {PCI_VENDOR_ID_VORTEX,PCI_ANY_ID,PCI_ANY_ID, PCI_ANY_ID},
 884     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC,PCI_ANY_ID,PCI_ANY_ID},
 885     {PCI_VENDOR_ID_INTEL,PCI_DEVICE_ID_INTEL_SRC_XSCALE,PCI_ANY_ID,PCI_ANY_ID},
 886     {0}
 887 };
 888 MODULE_DEVICE_TABLE(pci,gdthtable);
 889
 890 static void __init gdth_search_dev(gdth_pci_str *pcistr, ushort *cnt,
 891                                    ushort vendor, ushort device)
 892 {
 893     ulong base0, base1, base2;
 894     struct pci_dev *pdev;
 895
 896     TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 897           *cnt, vendor, device));
 898
 899     pdev = NULL;
 900     while ((pdev = pci_find_device(vendor, device, pdev))
 901            != NULL) {
 902         if (pci_enable_device(pdev))
 903             continue;
 904         if (*cnt >= MAXHA)
 905             return;
 906         /* GDT PCI controller found, resources are already in pdev */
 907         pcistr[*cnt].pdev = pdev;
 908         pcistr[*cnt].irq = pdev->irq;
 909         base0 = pci_resource_flags(pdev, 0);
 910         base1 = pci_resource_flags(pdev, 1);
 911         base2 = pci_resource_flags(pdev, 2);
 912         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 913             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 914             if (!(base0 & IORESOURCE_MEM))
 915                 continue;
 916             pcistr[*cnt].dpmem = pci_resource_start(pdev, 0);
 917         } else {                                  /* GDT6110, GDT6120, .. */
 918             if (!(base0 & IORESOURCE_MEM) ||
 919                 !(base2 & IORESOURCE_MEM) ||
 920                 !(base1 & IORESOURCE_IO))
 921                 continue;
 922             pcistr[*cnt].dpmem = pci_resource_start(pdev, 2);
 923             pcistr[*cnt].io_mm = pci_resource_start(pdev, 0);
 924             pcistr[*cnt].io    = pci_resource_start(pdev, 1);
 925         }
 926         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 927                 pcistr[*cnt].pdev->bus->number,
 928                 PCI_SLOT(pcistr[*cnt].pdev->devfn),
 929                 pcistr[*cnt].irq, pcistr[*cnt].dpmem));
 930         (*cnt)++;
 931     }
 932 }
 933
 934
 935 static void __init gdth_sort_pci(gdth_pci_str *pcistr, int cnt)
 936 {
 937     gdth_pci_str temp;
 938     int i, changed;
 939
 940     TRACE(("gdth_sort_pci() cnt %d\n",cnt));
 941     if (cnt == 0)
 942         return;
 943
 944     do {
 945         changed = FALSE;
 946         for (i = 0; i < cnt-1; ++i) {
 947             if (!reverse_scan) {
 948                 if ((pcistr[i].pdev->bus->number > pcistr[i+1].pdev->bus->number) ||
 949                     (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
 950                      PCI_SLOT(pcistr[i].pdev->devfn) >
 951                      PCI_SLOT(pcistr[i+1].pdev->devfn))) {
 952                     temp = pcistr[i];
 953                     pcistr[i] = pcistr[i+1];
 954                     pcistr[i+1] = temp;
 955                     changed = TRUE;
 956                 }
 957             } else {
 958                 if ((pcistr[i].pdev->bus->number < pcistr[i+1].pdev->bus->number) ||
 959                     (pcistr[i].pdev->bus->number == pcistr[i+1].pdev->bus->number &&
 960                      PCI_SLOT(pcistr[i].pdev->devfn) <
 961                      PCI_SLOT(pcistr[i+1].pdev->devfn))) {
 962                     temp = pcistr[i];
 963                     pcistr[i] = pcistr[i+1];
 964                     pcistr[i+1] = temp;
 965                     changed = TRUE;
 966                 }
 967             }
 968         }
 969     } while (changed);
 970 }
 971
 972
 973 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
 974 {
 975     ulong32 retries,id;
 976     unchar prot_ver,eisacf,i,irq_found;
 977
 978     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 979
 980     /* disable board interrupts, deinitialize services */
 981     outb(0xff,eisa_adr+EDOORREG);
 982     outb(0x00,eisa_adr+EDENABREG);
 983     outb(0x00,eisa_adr+EINTENABREG);
 984
 985     outb(0xff,eisa_adr+LDOORREG);
 986     retries = INIT_RETRIES;
 987     gdth_delay(20);
 988     while (inb(eisa_adr+EDOORREG) != 0xff) {
 989         if (--retries == 0) {
 990             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 991             return 0;
 992         }
 993         gdth_delay(1);
 994         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 995     }
 996     prot_ver = inb(eisa_adr+MAILBOXREG);
 997     outb(0xff,eisa_adr+EDOORREG);
 998     if (prot_ver != PROTOCOL_VERSION) {
 999         printk("GDT-EISA: Illegal protocol version\n");
1000         return 0;
1001     }
1002     ha->bmic = eisa_adr;
1003     ha->brd_phys = (ulong32)eisa_adr >> 12;
1004
1005     outl(0,eisa_adr+MAILBOXREG);
1006     outl(0,eisa_adr+MAILBOXREG+4);
1007     outl(0,eisa_adr+MAILBOXREG+8);
1008     outl(0,eisa_adr+MAILBOXREG+12);
1009
1010     /* detect IRQ */
1011     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
1012         ha->oem_id = OEM_ID_ICP;
1013         ha->type = GDT_EISA;
1014         ha->stype = id;
1015         outl(1,eisa_adr+MAILBOXREG+8);
1016         outb(0xfe,eisa_adr+LDOORREG);
1017         retries = INIT_RETRIES;
1018         gdth_delay(20);
1019         while (inb(eisa_adr+EDOORREG) != 0xfe) {
1020             if (--retries == 0) {
1021                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
1022                 return 0;
1023             }
1024             gdth_delay(1);
1025         }
1026         ha->irq = inb(eisa_adr+MAILBOXREG);
1027         outb(0xff,eisa_adr+EDOORREG);
1028         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
1029         /* check the result */
1030         if (ha->irq == 0) {
1031                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
1032                 for (i = 0, irq_found = FALSE;
1033                      i < MAXHA && irq[i] != 0xff; ++i) {
1034                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
1035                     irq_found = TRUE;
1036                     break;
1037                 }
1038                 }
1039             if (irq_found) {
1040                 ha->irq = irq[i];
1041                 irq[i] = 0;
1042                 printk("GDT-EISA: Can not detect controller IRQ,\n");
1043                 printk("Use IRQ setting from command line (IRQ = %d)\n",
1044                        ha->irq);
1045             } else {
1046                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
1047                 printk("the controller BIOS or use command line parameters\n");
1048                 return 0;
1049             }
1050         }
1051     } else {
1052         eisacf = inb(eisa_adr+EISAREG) & 7;
1053         if (eisacf > 4)                         /* level triggered */
1054             eisacf -= 4;
1055         ha->irq = gdth_irq_tab[eisacf];
1056         ha->oem_id = OEM_ID_ICP;
1057         ha->type = GDT_EISA;
1058         ha->stype = id;
1059     }
1060
1061     ha->dma64_support = 0;
1062     return 1;
1063 }
1064
1065
1066 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
1067 {
1068     register gdt2_dpram_str __iomem *dp2_ptr;
1069     int i;
1070     unchar irq_drq,prot_ver;
1071     ulong32 retries;
1072
1073     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
1074
1075     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
1076     if (ha->brd == NULL) {
1077         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
1078         return 0;
1079     }
1080     dp2_ptr = ha->brd;
1081     gdth_writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
1082     /* reset interface area */
1083     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
1084     if (gdth_readl(&dp2_ptr->u) != 0) {
1085         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
1086         iounmap(ha->brd);
1087         return 0;
1088     }
1089
1090     /* disable board interrupts, read DRQ and IRQ */
1091     gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1092     gdth_writeb(0x00, &dp2_ptr->io.irqen);
1093     gdth_writeb(0x00, &dp2_ptr->u.ic.S_Status);
1094     gdth_writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
1095
1096     irq_drq = gdth_readb(&dp2_ptr->io.rq);
1097     for (i=0; i<3; ++i) {
1098         if ((irq_drq & 1)==0)
1099             break;
1100         irq_drq >>= 1;
1101     }
1102     ha->drq = gdth_drq_tab[i];
1103
1104     irq_drq = gdth_readb(&dp2_ptr->io.rq) >> 3;
1105     for (i=1; i<5; ++i) {
1106         if ((irq_drq & 1)==0)
1107             break;
1108         irq_drq >>= 1;
1109     }
1110     ha->irq = gdth_irq_tab[i];
1111
1112     /* deinitialize services */
1113     gdth_writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
1114     gdth_writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
1115     gdth_writeb(0, &dp2_ptr->io.event);
1116     retries = INIT_RETRIES;
1117     gdth_delay(20);
1118     while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
1119         if (--retries == 0) {
1120             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
1121             iounmap(ha->brd);
1122             return 0;
1123         }
1124         gdth_delay(1);
1125     }
1126     prot_ver = (unchar)gdth_readl(&dp2_ptr->u.ic.S_Info[0]);
1127     gdth_writeb(0, &dp2_ptr->u.ic.Status);
1128     gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1129     if (prot_ver != PROTOCOL_VERSION) {
1130         printk("GDT-ISA: Illegal protocol version\n");
1131         iounmap(ha->brd);
1132         return 0;
1133     }
1134
1135     ha->oem_id = OEM_ID_ICP;
1136     ha->type = GDT_ISA;
1137     ha->ic_all_size = sizeof(dp2_ptr->u);
1138     ha->stype= GDT2_ID;
1139     ha->brd_phys = bios_adr >> 4;
1140
1141     /* special request to controller BIOS */
1142     gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
1143     gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
1144     gdth_writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
1145     gdth_writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
1146     gdth_writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
1147     gdth_writeb(0, &dp2_ptr->io.event);
1148     retries = INIT_RETRIES;
1149     gdth_delay(20);
1150     while (gdth_readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
1151         if (--retries == 0) {
1152             printk("GDT-ISA: Initialization error\n");
1153             iounmap(ha->brd);
1154             return 0;
1155         }
1156         gdth_delay(1);
1157     }
1158     gdth_writeb(0, &dp2_ptr->u.ic.Status);
1159     gdth_writeb(0xff, &dp2_ptr->io.irqdel);
1160
1161     ha->dma64_support = 0;
1162     return 1;
1163 }
1164
1165
1166 static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha)
1167 {
1168     register gdt6_dpram_str __iomem *dp6_ptr;
1169     register gdt6c_dpram_str __iomem *dp6c_ptr;
1170     register gdt6m_dpram_str __iomem *dp6m_ptr;
1171     ulong32 retries;
1172     unchar prot_ver;
1173     ushort command;
1174     int i, found = FALSE;
1175
1176     TRACE(("gdth_init_pci()\n"));
1177
1178     if (pcistr->pdev->vendor == PCI_VENDOR_ID_INTEL)
1179         ha->oem_id = OEM_ID_INTEL;
1180     else
1181         ha->oem_id = OEM_ID_ICP;
1182     ha->brd_phys = (pcistr->pdev->bus->number << 8) | (pcistr->pdev->devfn & 0xf8);
1183     ha->stype = (ulong32)pcistr->pdev->device;
1184     ha->irq = pcistr->irq;
1185     ha->pdev = pcistr->pdev;
1186
1187     if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
1188         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1189         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
1190         if (ha->brd == NULL) {
1191             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1192             return 0;
1193         }
1194         /* check and reset interface area */
1195         dp6_ptr = ha->brd;
1196         gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1197         if (gdth_readl(&dp6_ptr->u) != DPMEM_MAGIC) {
1198             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1199                    pcistr->dpmem);
1200             found = FALSE;
1201             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1202                 iounmap(ha->brd);
1203                 ha->brd = ioremap(i, sizeof(ushort));
1204                 if (ha->brd == NULL) {
1205                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1206                     return 0;
1207                 }
1208                 if (gdth_readw(ha->brd) != 0xffff) {
1209                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
1210                     continue;
1211                 }
1212                 iounmap(ha->brd);
1213                 pci_write_config_dword(pcistr->pdev,
1214                                        PCI_BASE_ADDRESS_0, i);
1215                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
1216                 if (ha->brd == NULL) {
1217                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1218                     return 0;
1219                 }
1220                 dp6_ptr = ha->brd;
1221                 gdth_writel(DPMEM_MAGIC, &dp6_ptr->u);
1222                 if (gdth_readl(&dp6_ptr->u) == DPMEM_MAGIC) {
1223                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1224                     found = TRUE;
1225                     break;
1226                 }
1227             }
1228             if (!found) {
1229                 printk("GDT-PCI: No free address found!\n");
1230                 iounmap(ha->brd);
1231                 return 0;
1232             }
1233         }
1234         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
1235         if (gdth_readl(&dp6_ptr->u) != 0) {
1236             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1237             iounmap(ha->brd);
1238             return 0;
1239         }
1240
1241         /* disable board interrupts, deinit services */
1242         gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1243         gdth_writeb(0x00, &dp6_ptr->io.irqen);
1244         gdth_writeb(0x00, &dp6_ptr->u.ic.S_Status);
1245         gdth_writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
1246
1247         gdth_writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
1248         gdth_writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
1249         gdth_writeb(0, &dp6_ptr->io.event);
1250         retries = INIT_RETRIES;
1251         gdth_delay(20);
1252         while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
1253             if (--retries == 0) {
1254                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1255                 iounmap(ha->brd);
1256                 return 0;
1257             }
1258             gdth_delay(1);
1259         }
1260         prot_ver = (unchar)gdth_readl(&dp6_ptr->u.ic.S_Info[0]);
1261         gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1262         gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1263         if (prot_ver != PROTOCOL_VERSION) {
1264             printk("GDT-PCI: Illegal protocol version\n");
1265             iounmap(ha->brd);
1266             return 0;
1267         }
1268
1269         ha->type = GDT_PCI;
1270         ha->ic_all_size = sizeof(dp6_ptr->u);
1271
1272         /* special command to controller BIOS */
1273         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
1274         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
1275         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
1276         gdth_writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
1277         gdth_writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
1278         gdth_writeb(0, &dp6_ptr->io.event);
1279         retries = INIT_RETRIES;
1280         gdth_delay(20);
1281         while (gdth_readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
1282             if (--retries == 0) {
1283                 printk("GDT-PCI: Initialization error\n");
1284                 iounmap(ha->brd);
1285                 return 0;
1286             }
1287             gdth_delay(1);
1288         }
1289         gdth_writeb(0, &dp6_ptr->u.ic.S_Status);
1290         gdth_writeb(0xff, &dp6_ptr->io.irqdel);
1291
1292         ha->dma64_support = 0;
1293
1294     } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
1295         ha->plx = (gdt6c_plx_regs *)pcistr->io;
1296         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
1297             pcistr->dpmem,ha->irq));
1298         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
1299         if (ha->brd == NULL) {
1300             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1301             iounmap(ha->brd);
1302             return 0;
1303         }
1304         /* check and reset interface area */
1305         dp6c_ptr = ha->brd;
1306         gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1307         if (gdth_readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
1308             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1309                    pcistr->dpmem);
1310             found = FALSE;
1311             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1312                 iounmap(ha->brd);
1313                 ha->brd = ioremap(i, sizeof(ushort));
1314                 if (ha->brd == NULL) {
1315                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1316                     return 0;
1317                 }
1318                 if (gdth_readw(ha->brd) != 0xffff) {
1319                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1320                     continue;
1321                 }
1322                 iounmap(ha->brd);
1323                 pci_write_config_dword(pcistr->pdev,
1324                                        PCI_BASE_ADDRESS_2, i);
1325                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1326                 if (ha->brd == NULL) {
1327                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1328                     return 0;
1329                 }
1330                 dp6c_ptr = ha->brd;
1331                 gdth_writel(DPMEM_MAGIC, &dp6c_ptr->u);
1332                 if (gdth_readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1333                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1334                     found = TRUE;
1335                     break;
1336                 }
1337             }
1338             if (!found) {
1339                 printk("GDT-PCI: No free address found!\n");
1340                 iounmap(ha->brd);
1341                 return 0;
1342             }
1343         }
1344         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1345         if (gdth_readl(&dp6c_ptr->u) != 0) {
1346             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1347             iounmap(ha->brd);
1348             return 0;
1349         }
1350
1351         /* disable board interrupts, deinit services */
1352         outb(0x00,PTR2USHORT(&ha->plx->control1));
1353         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1354
1355         gdth_writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1356         gdth_writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1357
1358         gdth_writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1359         gdth_writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1360
1361         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1362
1363         retries = INIT_RETRIES;
1364         gdth_delay(20);
1365         while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1366             if (--retries == 0) {
1367                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1368                 iounmap(ha->brd);
1369                 return 0;
1370             }
1371             gdth_delay(1);
1372         }
1373         prot_ver = (unchar)gdth_readl(&dp6c_ptr->u.ic.S_Info[0]);
1374         gdth_writeb(0, &dp6c_ptr->u.ic.Status);
1375         if (prot_ver != PROTOCOL_VERSION) {
1376             printk("GDT-PCI: Illegal protocol version\n");
1377             iounmap(ha->brd);
1378             return 0;
1379         }
1380
1381         ha->type = GDT_PCINEW;
1382         ha->ic_all_size = sizeof(dp6c_ptr->u);
1383
1384         /* special command to controller BIOS */
1385         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1386         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1387         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1388         gdth_writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1389         gdth_writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1390
1391         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1392
1393         retries = INIT_RETRIES;
1394         gdth_delay(20);
1395         while (gdth_readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1396             if (--retries == 0) {
1397                 printk("GDT-PCI: Initialization error\n");
1398                 iounmap(ha->brd);
1399                 return 0;
1400             }
1401             gdth_delay(1);
1402         }
1403         gdth_writeb(0, &dp6c_ptr->u.ic.S_Status);
1404
1405         ha->dma64_support = 0;
1406
1407     } else {                                            /* MPR */
1408         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1409         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1410         if (ha->brd == NULL) {
1411             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1412             return 0;
1413         }
1414
1415         /* manipulate config. space to enable DPMEM, start RP controller */
1416         pci_read_config_word(pcistr->pdev, PCI_COMMAND, &command);
1417         command |= 6;
1418         pci_write_config_word(pcistr->pdev, PCI_COMMAND, command);
1419         if (pci_resource_start(pcistr->pdev, 8) == 1UL)
1420             pci_resource_start(pcistr->pdev, 8) = 0UL;
1421         i = 0xFEFF0001UL;
1422         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS, i);
1423         gdth_delay(1);
1424         pci_write_config_dword(pcistr->pdev, PCI_ROM_ADDRESS,
1425                                pci_resource_start(pcistr->pdev, 8));
1426
1427         dp6m_ptr = ha->brd;
1428
1429         /* Ensure that it is safe to access the non HW portions of DPMEM.
1430          * Aditional check needed for Xscale based RAID controllers */
1431         while( ((int)gdth_readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1432             gdth_delay(1);
1433
1434         /* check and reset interface area */
1435         gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1436         if (gdth_readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1437             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1438                    pcistr->dpmem);
1439             found = FALSE;
1440             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1441                 iounmap(ha->brd);
1442                 ha->brd = ioremap(i, sizeof(ushort));
1443                 if (ha->brd == NULL) {
1444                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1445                     return 0;
1446                 }
1447                 if (gdth_readw(ha->brd) != 0xffff) {
1448                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1449                     continue;
1450                 }
1451                 iounmap(ha->brd);
1452                 pci_write_config_dword(pcistr->pdev,
1453                                        PCI_BASE_ADDRESS_0, i);
1454                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1455                 if (ha->brd == NULL) {
1456                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1457                     return 0;
1458                 }
1459                 dp6m_ptr = ha->brd;
1460                 gdth_writel(DPMEM_MAGIC, &dp6m_ptr->u);
1461                 if (gdth_readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1462                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1463                     found = TRUE;
1464                     break;
1465                 }
1466             }
1467             if (!found) {
1468                 printk("GDT-PCI: No free address found!\n");
1469                 iounmap(ha->brd);
1470                 return 0;
1471             }
1472         }
1473         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1474
1475         /* disable board interrupts, deinit services */
1476         gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1477                     &dp6m_ptr->i960r.edoor_en_reg);
1478         gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1479         gdth_writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1480         gdth_writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1481
1482         gdth_writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1483         gdth_writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1484         gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1485         retries = INIT_RETRIES;
1486         gdth_delay(20);
1487         while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1488             if (--retries == 0) {
1489                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1490                 iounmap(ha->brd);
1491                 return 0;
1492             }
1493             gdth_delay(1);
1494         }
1495         prot_ver = (unchar)gdth_readl(&dp6m_ptr->u.ic.S_Info[0]);
1496         gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1497         if (prot_ver != PROTOCOL_VERSION) {
1498             printk("GDT-PCI: Illegal protocol version\n");
1499             iounmap(ha->brd);
1500             return 0;
1501         }
1502
1503         ha->type = GDT_PCIMPR;
1504         ha->ic_all_size = sizeof(dp6m_ptr->u);
1505
1506         /* special command to controller BIOS */
1507         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1508         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1509         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1510         gdth_writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1511         gdth_writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1512         gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1513         retries = INIT_RETRIES;
1514         gdth_delay(20);
1515         while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1516             if (--retries == 0) {
1517                 printk("GDT-PCI: Initialization error\n");
1518                 iounmap(ha->brd);
1519                 return 0;
1520             }
1521             gdth_delay(1);
1522         }
1523         gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1524
1525         /* read FW version to detect 64-bit DMA support */
1526         gdth_writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1527         gdth_writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1528         retries = INIT_RETRIES;
1529         gdth_delay(20);
1530         while (gdth_readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1531             if (--retries == 0) {
1532                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1533                 iounmap(ha->brd);
1534                 return 0;
1535             }
1536             gdth_delay(1);
1537         }
1538         prot_ver = (unchar)(gdth_readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1539         gdth_writeb(0, &dp6m_ptr->u.ic.S_Status);
1540         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1541             ha->dma64_support = 0;
1542         else
1543             ha->dma64_support = 1;
1544     }
1545
1546     return 1;
1547 }
1548
1549
1550 /* controller protocol functions */
1551
1552 static void __init gdth_enable_int(int hanum)
1553 {
1554     gdth_ha_str *ha;
1555     ulong flags;
1556     gdt2_dpram_str __iomem *dp2_ptr;
1557     gdt6_dpram_str __iomem *dp6_ptr;
1558     gdt6m_dpram_str __iomem *dp6m_ptr;
1559
1560     TRACE(("gdth_enable_int() hanum %d\n",hanum));
1561     ha = HADATA(gdth_ctr_tab[hanum]);
1562     spin_lock_irqsave(&ha->smp_lock, flags);
1563
1564     if (ha->type == GDT_EISA) {
1565         outb(0xff, ha->bmic + EDOORREG);
1566         outb(0xff, ha->bmic + EDENABREG);
1567         outb(0x01, ha->bmic + EINTENABREG);
1568     } else if (ha->type == GDT_ISA) {
1569         dp2_ptr = ha->brd;
1570         gdth_writeb(1, &dp2_ptr->io.irqdel);
1571         gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1572         gdth_writeb(1, &dp2_ptr->io.irqen);
1573     } else if (ha->type == GDT_PCI) {
1574         dp6_ptr = ha->brd;
1575         gdth_writeb(1, &dp6_ptr->io.irqdel);
1576         gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1577         gdth_writeb(1, &dp6_ptr->io.irqen);
1578     } else if (ha->type == GDT_PCINEW) {
1579         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1580         outb(0x03, PTR2USHORT(&ha->plx->control1));
1581     } else if (ha->type == GDT_PCIMPR) {
1582         dp6m_ptr = ha->brd;
1583         gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1584         gdth_writeb(gdth_readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1585                     &dp6m_ptr->i960r.edoor_en_reg);
1586     }
1587     spin_unlock_irqrestore(&ha->smp_lock, flags);
1588 }
1589
1590
1591 static int gdth_get_status(unchar *pIStatus,int irq)
1592 {
1593     register gdth_ha_str *ha;
1594     int i;
1595
1596     TRACE(("gdth_get_status() irq %d ctr_count %d\n",
1597            irq,gdth_ctr_count));
1598
1599     *pIStatus = 0;
1600     for (i=0; i<gdth_ctr_count; ++i) {
1601         ha = HADATA(gdth_ctr_tab[i]);
1602         if (ha->irq != (unchar)irq)             /* check IRQ */
1603             continue;
1604         if (ha->type == GDT_EISA)
1605             *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1606         else if (ha->type == GDT_ISA)
1607             *pIStatus =
1608                 gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1609         else if (ha->type == GDT_PCI)
1610             *pIStatus =
1611                 gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1612         else if (ha->type == GDT_PCINEW)
1613             *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1614         else if (ha->type == GDT_PCIMPR)
1615             *pIStatus =
1616                 gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1617
1618         if (*pIStatus)
1619             return i;                           /* board found */
1620     }
1621     return -1;
1622 }
1623
1624
1625 static int gdth_test_busy(int hanum)
1626 {
1627     register gdth_ha_str *ha;
1628     register int gdtsema0 = 0;
1629
1630     TRACE(("gdth_test_busy() hanum %d\n",hanum));
1631
1632     ha = HADATA(gdth_ctr_tab[hanum]);
1633     if (ha->type == GDT_EISA)
1634         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1635     else if (ha->type == GDT_ISA)
1636         gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1637     else if (ha->type == GDT_PCI)
1638         gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1639     else if (ha->type == GDT_PCINEW)
1640         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1641     else if (ha->type == GDT_PCIMPR)
1642         gdtsema0 =
1643             (int)gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1644
1645     return (gdtsema0 & 1);
1646 }
1647
1648
1649 static int gdth_get_cmd_index(int hanum)
1650 {
1651     register gdth_ha_str *ha;
1652     int i;
1653
1654     TRACE(("gdth_get_cmd_index() hanum %d\n",hanum));
1655
1656     ha = HADATA(gdth_ctr_tab[hanum]);
1657     for (i=0; i<GDTH_MAXCMDS; ++i) {
1658         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1659             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1660             ha->cmd_tab[i].service = ha->pccb->Service;
1661             ha->pccb->CommandIndex = (ulong32)i+2;
1662             return (i+2);
1663         }
1664     }
1665     return 0;
1666 }
1667
1668
1669 static void gdth_set_sema0(int hanum)
1670 {
1671     register gdth_ha_str *ha;
1672
1673     TRACE(("gdth_set_sema0() hanum %d\n",hanum));
1674
1675     ha = HADATA(gdth_ctr_tab[hanum]);
1676     if (ha->type == GDT_EISA) {
1677         outb(1, ha->bmic + SEMA0REG);
1678     } else if (ha->type == GDT_ISA) {
1679         gdth_writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1680     } else if (ha->type == GDT_PCI) {
1681         gdth_writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1682     } else if (ha->type == GDT_PCINEW) {
1683         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1684     } else if (ha->type == GDT_PCIMPR) {
1685         gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1686     }
1687 }
1688
1689
1690 static void gdth_copy_command(int hanum)
1691 {
1692     register gdth_ha_str *ha;
1693     register gdth_cmd_str *cmd_ptr;
1694     register gdt6m_dpram_str __iomem *dp6m_ptr;
1695     register gdt6c_dpram_str __iomem *dp6c_ptr;
1696     gdt6_dpram_str __iomem *dp6_ptr;
1697     gdt2_dpram_str __iomem *dp2_ptr;
1698     ushort cp_count,dp_offset,cmd_no;
1699
1700     TRACE(("gdth_copy_command() hanum %d\n",hanum));
1701
1702     ha = HADATA(gdth_ctr_tab[hanum]);
1703     cp_count = ha->cmd_len;
1704     dp_offset= ha->cmd_offs_dpmem;
1705     cmd_no   = ha->cmd_cnt;
1706     cmd_ptr  = ha->pccb;
1707
1708     ++ha->cmd_cnt;
1709     if (ha->type == GDT_EISA)
1710         return;                                 /* no DPMEM, no copy */
1711
1712     /* set cpcount dword aligned */
1713     if (cp_count & 3)
1714         cp_count += (4 - (cp_count & 3));
1715
1716     ha->cmd_offs_dpmem += cp_count;
1717
1718     /* set offset and service, copy command to DPMEM */
1719     if (ha->type == GDT_ISA) {
1720         dp2_ptr = ha->brd;
1721         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1722                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1723         gdth_writew((ushort)cmd_ptr->Service,
1724                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1725         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1726     } else if (ha->type == GDT_PCI) {
1727         dp6_ptr = ha->brd;
1728         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1729                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1730         gdth_writew((ushort)cmd_ptr->Service,
1731                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1732         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1733     } else if (ha->type == GDT_PCINEW) {
1734         dp6c_ptr = ha->brd;
1735         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1736                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1737         gdth_writew((ushort)cmd_ptr->Service,
1738                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1739         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1740     } else if (ha->type == GDT_PCIMPR) {
1741         dp6m_ptr = ha->brd;
1742         gdth_writew(dp_offset + DPMEM_COMMAND_OFFSET,
1743                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1744         gdth_writew((ushort)cmd_ptr->Service,
1745                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1746         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1747     }
1748 }
1749
1750
1751 static void gdth_release_event(int hanum)
1752 {
1753     register gdth_ha_str *ha;
1754
1755     TRACE(("gdth_release_event() hanum %d\n",hanum));
1756     ha = HADATA(gdth_ctr_tab[hanum]);
1757
1758 #ifdef GDTH_STATISTICS
1759     {
1760         ulong32 i,j;
1761         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1762             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1763                 ++i;
1764         }
1765         if (max_index < i) {
1766             max_index = i;
1767             TRACE3(("GDT: max_index = %d\n",(ushort)i));
1768         }
1769     }
1770 #endif
1771
1772     if (ha->pccb->OpCode == GDT_INIT)
1773         ha->pccb->Service |= 0x80;
1774
1775     if (ha->type == GDT_EISA) {
1776         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1777             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1778         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1779     } else if (ha->type == GDT_ISA) {
1780         gdth_writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1781     } else if (ha->type == GDT_PCI) {
1782         gdth_writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1783     } else if (ha->type == GDT_PCINEW) {
1784         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1785     } else if (ha->type == GDT_PCIMPR) {
1786         gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1787     }
1788 }
1789
1790
1791 static int gdth_wait(int hanum,int index,ulong32 time)
1792 {
1793     gdth_ha_str *ha;
1794     int answer_found = FALSE;
1795
1796     TRACE(("gdth_wait() hanum %d index %d time %d\n",hanum,index,time));
1797
1798     ha = HADATA(gdth_ctr_tab[hanum]);
1799     if (index == 0)
1800         return 1;                               /* no wait required */
1801
1802     gdth_from_wait = TRUE;
1803     do {
1804         gdth_interrupt((int)ha->irq,ha);
1805         if (wait_hanum==hanum && wait_index==index) {
1806             answer_found = TRUE;
1807             break;
1808         }
1809         gdth_delay(1);
1810     } while (--time);
1811     gdth_from_wait = FALSE;
1812
1813     while (gdth_test_busy(hanum))
1814         gdth_delay(0);
1815
1816     return (answer_found);
1817 }
1818
1819
1820 static int gdth_internal_cmd(int hanum,unchar service,ushort opcode,ulong32 p1,
1821                              ulong64 p2,ulong64 p3)
1822 {
1823     register gdth_ha_str *ha;
1824     register gdth_cmd_str *cmd_ptr;
1825     int retries,index;
1826
1827     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1828
1829     ha = HADATA(gdth_ctr_tab[hanum]);
1830     cmd_ptr = ha->pccb;
1831     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1832
1833     /* make command  */
1834     for (retries = INIT_RETRIES;;) {
1835         cmd_ptr->Service          = service;
1836         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1837         if (!(index=gdth_get_cmd_index(hanum))) {
1838             TRACE(("GDT: No free command index found\n"));
1839             return 0;
1840         }
1841         gdth_set_sema0(hanum);
1842         cmd_ptr->OpCode           = opcode;
1843         cmd_ptr->BoardNode        = LOCALBOARD;
1844         if (service == CACHESERVICE) {
1845             if (opcode == GDT_IOCTL) {
1846                 cmd_ptr->u.ioctl.subfunc = p1;
1847                 cmd_ptr->u.ioctl.channel = (ulong32)p2;
1848                 cmd_ptr->u.ioctl.param_size = (ushort)p3;
1849                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1850             } else {
1851                 if (ha->cache_feat & GDT_64BIT) {
1852                     cmd_ptr->u.cache64.DeviceNo = (ushort)p1;
1853                     cmd_ptr->u.cache64.BlockNo  = p2;
1854                 } else {
1855                     cmd_ptr->u.cache.DeviceNo = (ushort)p1;
1856                     cmd_ptr->u.cache.BlockNo  = (ulong32)p2;
1857                 }
1858             }
1859         } else if (service == SCSIRAWSERVICE) {
1860             if (ha->raw_feat & GDT_64BIT) {
1861                 cmd_ptr->u.raw64.direction  = p1;
1862                 cmd_ptr->u.raw64.bus        = (unchar)p2;
1863                 cmd_ptr->u.raw64.target     = (unchar)p3;
1864                 cmd_ptr->u.raw64.lun        = (unchar)(p3 >> 8);
1865             } else {
1866                 cmd_ptr->u.raw.direction  = p1;
1867                 cmd_ptr->u.raw.bus        = (unchar)p2;
1868                 cmd_ptr->u.raw.target     = (unchar)p3;
1869                 cmd_ptr->u.raw.lun        = (unchar)(p3 >> 8);
1870             }
1871         } else if (service == SCREENSERVICE) {
1872             if (opcode == GDT_REALTIME) {
1873                 *(ulong32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1874                 *(ulong32 *)&cmd_ptr->u.screen.su.data[4] = (ulong32)p2;
1875                 *(ulong32 *)&cmd_ptr->u.screen.su.data[8] = (ulong32)p3;
1876             }
1877         }
1878         ha->cmd_len          = sizeof(gdth_cmd_str);
1879         ha->cmd_offs_dpmem   = 0;
1880         ha->cmd_cnt          = 0;
1881         gdth_copy_command(hanum);
1882         gdth_release_event(hanum);
1883         gdth_delay(20);
1884         if (!gdth_wait(hanum,index,INIT_TIMEOUT)) {
1885             printk("GDT: Initialization error (timeout service %d)\n",service);
1886             return 0;
1887         }
1888         if (ha->status != S_BSY || --retries == 0)
1889             break;
1890         gdth_delay(1);
1891     }
1892
1893     return (ha->status != S_OK ? 0:1);
1894 }
1895
1896
1897 /* search for devices */
1898
1899 static int __init gdth_search_drives(int hanum)
1900 {
1901     register gdth_ha_str *ha;
1902     ushort cdev_cnt, i;
1903     int ok;
1904     ulong32 bus_no, drv_cnt, drv_no, j;
1905     gdth_getch_str *chn;
1906     gdth_drlist_str *drl;
1907     gdth_iochan_str *ioc;
1908     gdth_raw_iochan_str *iocr;
1909     gdth_arcdl_str *alst;
1910     gdth_alist_str *alst2;
1911     gdth_oem_str_ioctl *oemstr;
1912 #ifdef INT_COAL
1913     gdth_perf_modes *pmod;
1914 #endif
1915
1916 #ifdef GDTH_RTC
1917     unchar rtc[12];
1918     ulong flags;
1919 #endif
1920
1921     TRACE(("gdth_search_drives() hanum %d\n",hanum));
1922     ha = HADATA(gdth_ctr_tab[hanum]);
1923     ok = 0;
1924
1925     /* initialize controller services, at first: screen service */
1926     ha->screen_feat = 0;
1927     if (!force_dma32) {
1928         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_X_INIT_SCR,0,0,0);
1929         if (ok)
1930             ha->screen_feat = GDT_64BIT;
1931     }
1932     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1933         ok = gdth_internal_cmd(hanum,SCREENSERVICE,GDT_INIT,0,0,0);
1934     if (!ok) {
1935         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1936                hanum, ha->status);
1937         return 0;
1938     }
1939     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1940
1941 #ifdef GDTH_RTC
1942     /* read realtime clock info, send to controller */
1943     /* 1. wait for the falling edge of update flag */
1944     spin_lock_irqsave(&rtc_lock, flags);
1945     for (j = 0; j < 1000000; ++j)
1946         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1947             break;
1948     for (j = 0; j < 1000000; ++j)
1949         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1950             break;
1951     /* 2. read info */
1952     do {
1953         for (j = 0; j < 12; ++j)
1954             rtc[j] = CMOS_READ(j);
1955     } while (rtc[0] != CMOS_READ(0));
1956     spin_unlock_irqrestore(&rtc_lock, flags);
1957     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(ulong32 *)&rtc[0],
1958             *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]));
1959     /* 3. send to controller firmware */
1960     gdth_internal_cmd(hanum,SCREENSERVICE,GDT_REALTIME, *(ulong32 *)&rtc[0],
1961                       *(ulong32 *)&rtc[4], *(ulong32 *)&rtc[8]);
1962 #endif
1963
1964     /* unfreeze all IOs */
1965     gdth_internal_cmd(hanum,CACHESERVICE,GDT_UNFREEZE_IO,0,0,0);
1966
1967     /* initialize cache service */
1968     ha->cache_feat = 0;
1969     if (!force_dma32) {
1970         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INIT_HOST,LINUX_OS,0,0);
1971         if (ok)
1972             ha->cache_feat = GDT_64BIT;
1973     }
1974     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1975         ok = gdth_internal_cmd(hanum,CACHESERVICE,GDT_INIT,LINUX_OS,0,0);
1976     if (!ok) {
1977         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1978                hanum, ha->status);
1979         return 0;
1980     }
1981     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1982     cdev_cnt = (ushort)ha->info;
1983     ha->fw_vers = ha->service;
1984
1985 #ifdef INT_COAL
1986     if (ha->type == GDT_PCIMPR) {
1987         /* set perf. modes */
1988         pmod = (gdth_perf_modes *)ha->pscratch;
1989         pmod->version          = 1;
1990         pmod->st_mode          = 1;    /* enable one status buffer */
1991         *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1992         pmod->st_buff_indx1    = COALINDEX;
1993         pmod->st_buff_addr2    = 0;
1994         pmod->st_buff_u_addr2  = 0;
1995         pmod->st_buff_indx2    = 0;
1996         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1997         pmod->cmd_mode         = 0;    // disable all cmd buffers
1998         pmod->cmd_buff_addr1   = 0;
1999         pmod->cmd_buff_u_addr1 = 0;
2000         pmod->cmd_buff_indx1   = 0;
2001         pmod->cmd_buff_addr2   = 0;
2002         pmod->cmd_buff_u_addr2 = 0;
2003         pmod->cmd_buff_indx2   = 0;
2004         pmod->cmd_buff_size    = 0;
2005         pmod->reserved1        = 0;
2006         pmod->reserved2        = 0;
2007         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,SET_PERF_MODES,
2008                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
2009             printk("GDT-HA %d: Interrupt coalescing activated\n", hanum);
2010         }
2011     }
2012 #endif
2013
2014     /* detect number of buses - try new IOCTL */
2015     iocr = (gdth_raw_iochan_str *)ha->pscratch;
2016     iocr->hdr.version        = 0xffffffff;
2017     iocr->hdr.list_entries   = MAXBUS;
2018     iocr->hdr.first_chan     = 0;
2019     iocr->hdr.last_chan      = MAXBUS-1;
2020     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
2021     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_RAW_DESC,
2022                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
2023         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
2024         ha->bus_cnt = iocr->hdr.chan_count;
2025         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2026             if (iocr->list[bus_no].proc_id < MAXID)
2027                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
2028             else
2029                 ha->bus_id[bus_no] = 0xff;
2030         }
2031     } else {
2032         /* old method */
2033         chn = (gdth_getch_str *)ha->pscratch;
2034         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
2035             chn->channel_no = bus_no;
2036             if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2037                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
2038                                    IO_CHANNEL | INVALID_CHANNEL,
2039                                    sizeof(gdth_getch_str))) {
2040                 if (bus_no == 0) {
2041                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
2042                            hanum, ha->status);
2043                     return 0;
2044                 }
2045                 break;
2046             }
2047             if (chn->siop_id < MAXID)
2048                 ha->bus_id[bus_no] = chn->siop_id;
2049             else
2050                 ha->bus_id[bus_no] = 0xff;
2051         }
2052         ha->bus_cnt = (unchar)bus_no;
2053     }
2054     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
2055
2056     /* read cache configuration */
2057     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_INFO,
2058                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
2059         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
2060                hanum, ha->status);
2061         return 0;
2062     }
2063     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
2064     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
2065             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
2066             ha->cpar.write_back,ha->cpar.block_size));
2067
2068     /* read board info and features */
2069     ha->more_proc = FALSE;
2070     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_INFO,
2071                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
2072         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
2073                sizeof(gdth_binfo_str));
2074         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,BOARD_FEATURES,
2075                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
2076             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
2077             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
2078             ha->more_proc = TRUE;
2079         }
2080     } else {
2081         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
2082         strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
2083     }
2084     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
2085
2086     /* read more informations */
2087     if (ha->more_proc) {
2088         /* physical drives, channel addresses */
2089         ioc = (gdth_iochan_str *)ha->pscratch;
2090         ioc->hdr.version        = 0xffffffff;
2091         ioc->hdr.list_entries   = MAXBUS;
2092         ioc->hdr.first_chan     = 0;
2093         ioc->hdr.last_chan      = MAXBUS-1;
2094         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
2095         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,IOCHAN_DESC,
2096                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
2097             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2098                 ha->raw[bus_no].address = ioc->list[bus_no].address;
2099                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
2100             }
2101         } else {
2102             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2103                 ha->raw[bus_no].address = IO_CHANNEL;
2104                 ha->raw[bus_no].local_no = bus_no;
2105             }
2106         }
2107         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2108             chn = (gdth_getch_str *)ha->pscratch;
2109             chn->channel_no = ha->raw[bus_no].local_no;
2110             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2111                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
2112                                   ha->raw[bus_no].address | INVALID_CHANNEL,
2113                                   sizeof(gdth_getch_str))) {
2114                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
2115                 TRACE2(("Channel %d: %d phys. drives\n",
2116                         bus_no,chn->drive_cnt));
2117             }
2118             if (ha->raw[bus_no].pdev_cnt > 0) {
2119                 drl = (gdth_drlist_str *)ha->pscratch;
2120                 drl->sc_no = ha->raw[bus_no].local_no;
2121                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
2122                 if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2123                                       SCSI_DR_LIST | L_CTRL_PATTERN,
2124                                       ha->raw[bus_no].address | INVALID_CHANNEL,
2125                                       sizeof(gdth_drlist_str))) {
2126                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
2127                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
2128                 } else {
2129                     ha->raw[bus_no].pdev_cnt = 0;
2130                 }
2131             }
2132         }
2133
2134         /* logical drives */
2135         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_CNT,
2136                               INVALID_CHANNEL,sizeof(ulong32))) {
2137             drv_cnt = *(ulong32 *)ha->pscratch;
2138             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,CACHE_DRV_LIST,
2139                                   INVALID_CHANNEL,drv_cnt * sizeof(ulong32))) {
2140                 for (j = 0; j < drv_cnt; ++j) {
2141                     drv_no = ((ulong32 *)ha->pscratch)[j];
2142                     if (drv_no < MAX_LDRIVES) {
2143                         ha->hdr[drv_no].is_logdrv = TRUE;
2144                         TRACE2(("Drive %d is log. drive\n",drv_no));
2145                     }
2146                 }
2147             }
2148             alst = (gdth_arcdl_str *)ha->pscratch;
2149             alst->entries_avail = MAX_LDRIVES;
2150             alst->first_entry = 0;
2151             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
2152             if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2153                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
2154                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
2155                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
2156                 for (j = 0; j < alst->entries_init; ++j) {
2157                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
2158                     ha->hdr[j].is_master = alst->list[j].is_master;
2159                     ha->hdr[j].is_parity = alst->list[j].is_parity;
2160                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
2161                     ha->hdr[j].master_no = alst->list[j].cd_handle;
2162                 }
2163             } else if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2164                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
2165                                          0, 35 * sizeof(gdth_alist_str))) {
2166                 for (j = 0; j < 35; ++j) {
2167                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
2168                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
2169                     ha->hdr[j].is_master = alst2->is_master;
2170                     ha->hdr[j].is_parity = alst2->is_parity;
2171                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
2172                     ha->hdr[j].master_no = alst2->cd_handle;
2173                 }
2174             }
2175         }
2176     }
2177
2178     /* initialize raw service */
2179     ha->raw_feat = 0;
2180     if (!force_dma32) {
2181         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_X_INIT_RAW,0,0,0);
2182         if (ok)
2183             ha->raw_feat = GDT_64BIT;
2184     }
2185     if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
2186         ok = gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_INIT,0,0,0);
2187     if (!ok) {
2188         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
2189                hanum, ha->status);
2190         return 0;
2191     }
2192     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
2193
2194     /* set/get features raw service (scatter/gather) */
2195     if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_SET_FEAT,SCATTER_GATHER,
2196                           0,0)) {
2197         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
2198         if (gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_GET_FEAT,0,0,0)) {
2199             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
2200                     ha->info));
2201             ha->raw_feat |= (ushort)ha->info;
2202         }
2203     }
2204
2205     /* set/get features cache service (equal to raw service) */
2206     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_SET_FEAT,0,
2207                           SCATTER_GATHER,0)) {
2208         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
2209         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_GET_FEAT,0,0,0)) {
2210             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
2211                     ha->info));
2212             ha->cache_feat |= (ushort)ha->info;
2213         }
2214     }
2215
2216     /* reserve drives for raw service */
2217     if (reserve_mode != 0) {
2218         gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE_ALL,
2219                           reserve_mode == 1 ? 1 : 3, 0, 0);
2220         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
2221                 ha->status));
2222     }
2223     for (i = 0; i < MAX_RES_ARGS; i += 4) {
2224         if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
2225             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
2226             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
2227                     reserve_list[i], reserve_list[i+1],
2228                     reserve_list[i+2], reserve_list[i+3]));
2229             if (!gdth_internal_cmd(hanum,SCSIRAWSERVICE,GDT_RESERVE,0,
2230                                    reserve_list[i+1], reserve_list[i+2] |
2231                                    (reserve_list[i+3] << 8))) {
2232                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
2233                        hanum, ha->status);
2234              }
2235         }
2236     }
2237
2238     /* Determine OEM string using IOCTL */
2239     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
2240     oemstr->params.ctl_version = 0x01;
2241     oemstr->params.buffer_size = sizeof(oemstr->text);
2242     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_IOCTL,
2243                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
2244                           sizeof(gdth_oem_str_ioctl))) {
2245         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
2246         printk("GDT-HA %d: Vendor: %s Name: %s\n",
2247                hanum,oemstr->text.oem_company_name,ha->binfo.type_string);
2248         /* Save the Host Drive inquiry data */
2249 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2250         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
2251                 sizeof(ha->oem_name));
2252 #else
2253         strncpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,7);
2254         ha->oem_name[7] = '\0';
2255 #endif
2256     } else {
2257         /* Old method, based on PCI ID */
2258         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
2259         printk("GDT-HA %d: Name: %s\n",
2260                hanum,ha->binfo.type_string);
2261 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2262         if (ha->oem_id == OEM_ID_INTEL)
2263             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
2264         else
2265             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
2266 #else
2267         if (ha->oem_id == OEM_ID_INTEL)
2268             strcpy(ha->oem_name,"Intel  ");
2269         else
2270             strcpy(ha->oem_name,"ICP    ");
2271 #endif
2272     }
2273
2274     /* scanning for host drives */
2275     for (i = 0; i < cdev_cnt; ++i)
2276         gdth_analyse_hdrive(hanum,i);
2277
2278     TRACE(("gdth_search_drives() OK\n"));
2279     return 1;
2280 }
2281
2282 static int gdth_analyse_hdrive(int hanum,ushort hdrive)
2283 {
2284     register gdth_ha_str *ha;
2285     ulong32 drv_cyls;
2286     int drv_hds, drv_secs;
2287
2288     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n",hanum,hdrive));
2289     if (hdrive >= MAX_HDRIVES)
2290         return 0;
2291     ha = HADATA(gdth_ctr_tab[hanum]);
2292
2293     if (!gdth_internal_cmd(hanum,CACHESERVICE,GDT_INFO,hdrive,0,0))
2294         return 0;
2295     ha->hdr[hdrive].present = TRUE;
2296     ha->hdr[hdrive].size = ha->info;
2297
2298     /* evaluate mapping (sectors per head, heads per cylinder) */
2299     ha->hdr[hdrive].size &= ~SECS32;
2300     if (ha->info2 == 0) {
2301         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
2302     } else {
2303         drv_hds = ha->info2 & 0xff;
2304         drv_secs = (ha->info2 >> 8) & 0xff;
2305         drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
2306     }
2307     ha->hdr[hdrive].heads = (unchar)drv_hds;
2308     ha->hdr[hdrive].secs  = (unchar)drv_secs;
2309     /* round size */
2310     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
2311
2312     if (ha->cache_feat & GDT_64BIT) {
2313         if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_X_INFO,hdrive,0,0)
2314             && ha->info2 != 0) {
2315             ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
2316         }
2317     }
2318     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
2319             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
2320
2321     /* get informations about device */
2322     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_DEVTYPE,hdrive,0,0)) {
2323         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
2324                 hdrive,ha->info));
2325         ha->hdr[hdrive].devtype = (ushort)ha->info;
2326     }
2327
2328     /* cluster info */
2329     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_CLUST_INFO,hdrive,0,0)) {
2330         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
2331                 hdrive,ha->info));
2332         if (!shared_access)
2333             ha->hdr[hdrive].cluster_type = (unchar)ha->info;
2334     }
2335
2336     /* R/W attributes */
2337     if (gdth_internal_cmd(hanum,CACHESERVICE,GDT_RW_ATTRIBS,hdrive,0,0)) {
2338         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
2339                 hdrive,ha->info));
2340         ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
2341     }
2342
2343     return 1;
2344 }
2345
2346
2347 /* command queueing/sending functions */
2348
2349 static void gdth_putq(int hanum,Scsi_Cmnd *scp,unchar priority)
2350 {
2351     register gdth_ha_str *ha;
2352     register Scsi_Cmnd *pscp;
2353     register Scsi_Cmnd *nscp;
2354     ulong flags;
2355     unchar b, t;
2356
2357     TRACE(("gdth_putq() priority %d\n",priority));
2358     ha = HADATA(gdth_ctr_tab[hanum]);
2359     spin_lock_irqsave(&ha->smp_lock, flags);
2360
2361     if (!IS_GDTH_INTERNAL_CMD(scp)) {
2362         scp->SCp.this_residual = (int)priority;
2363         b = virt_ctr ? NUMDATA(scp->device->host)->busnum:scp->device->channel;
2364         t = scp->device->id;
2365         if (priority >= DEFAULT_PRI) {
2366             if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2367                 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2368                 TRACE2(("gdth_putq(): locked IO ->update_timeout()\n"));
2369                 scp->SCp.buffers_residual = gdth_update_timeout(hanum, scp, 0);
2370             }
2371         }
2372     }
2373
2374     if (ha->req_first==NULL) {
2375         ha->req_first = scp;                    /* queue was empty */
2376         scp->SCp.ptr = NULL;
2377     } else {                                    /* queue not empty */
2378         pscp = ha->req_first;
2379         nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2380         /* priority: 0-highest,..,0xff-lowest */
2381         while (nscp && (unchar)nscp->SCp.this_residual <= priority) {
2382             pscp = nscp;
2383             nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2384         }
2385         pscp->SCp.ptr = (char *)scp;
2386         scp->SCp.ptr  = (char *)nscp;
2387     }
2388     spin_unlock_irqrestore(&ha->smp_lock, flags);
2389
2390 #ifdef GDTH_STATISTICS
2391     flags = 0;
2392     for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2393         ++flags;
2394     if (max_rq < flags) {
2395         max_rq = flags;
2396         TRACE3(("GDT: max_rq = %d\n",(ushort)max_rq));
2397     }
2398 #endif
2399 }
2400
2401 static void gdth_next(int hanum)
2402 {
2403     register gdth_ha_str *ha;
2404     register Scsi_Cmnd *pscp;
2405     register Scsi_Cmnd *nscp;
2406     unchar b, t, l, firsttime;
2407     unchar this_cmd, next_cmd;
2408     ulong flags = 0;
2409     int cmd_index;
2410
2411     TRACE(("gdth_next() hanum %d\n",hanum));
2412     ha = HADATA(gdth_ctr_tab[hanum]);
2413     if (!gdth_polling)
2414         spin_lock_irqsave(&ha->smp_lock, flags);
2415
2416     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2417     this_cmd = firsttime = TRUE;
2418     next_cmd = gdth_polling ? FALSE:TRUE;
2419     cmd_index = 0;
2420
2421     for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2422         if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2423             pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2424         if (!IS_GDTH_INTERNAL_CMD(nscp)) {
2425             b = virt_ctr ?
2426                 NUMDATA(nscp->device->host)->busnum : nscp->device->channel;
2427             t = nscp->device->id;
2428             l = nscp->device->lun;
2429             if (nscp->SCp.this_residual >= DEFAULT_PRI) {
2430                 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2431                     (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2432                     continue;
2433             }
2434         } else
2435             b = t = l = 0;
2436
2437         if (firsttime) {
2438             if (gdth_test_busy(hanum)) {        /* controller busy ? */
2439                 TRACE(("gdth_next() controller %d busy !\n",hanum));
2440                 if (!gdth_polling) {
2441                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2442                     return;
2443                 }
2444                 while (gdth_test_busy(hanum))
2445                     gdth_delay(1);
2446             }
2447             firsttime = FALSE;
2448         }
2449
2450         if (!IS_GDTH_INTERNAL_CMD(nscp)) {
2451         if (nscp->SCp.phase == -1) {
2452             nscp->SCp.phase = CACHESERVICE;           /* default: cache svc. */
2453             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2454                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2455                         b, t, l));
2456                 /* TEST_UNIT_READY -> set scan mode */
2457                 if ((ha->scan_mode & 0x0f) == 0) {
2458                     if (b == 0 && t == 0 && l == 0) {
2459                         ha->scan_mode |= 1;
2460                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2461                     }
2462                 } else if ((ha->scan_mode & 0x0f) == 1) {
2463                     if (b == 0 && ((t == 0 && l == 1) ||
2464                          (t == 1 && l == 0))) {
2465                         nscp->SCp.sent_command = GDT_SCAN_START;
2466                         nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2467                             | SCSIRAWSERVICE;
2468                         ha->scan_mode = 0x12;
2469                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2470                                 ha->scan_mode));
2471                     } else {
2472                         ha->scan_mode &= 0x10;
2473                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2474                     }
2475                 } else if (ha->scan_mode == 0x12) {
2476                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2477                         nscp->SCp.phase = SCSIRAWSERVICE;
2478                         nscp->SCp.sent_command = GDT_SCAN_END;
2479                         ha->scan_mode &= 0x10;
2480                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2481                                 ha->scan_mode));
2482                     }
2483                 }
2484             }
2485             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2486                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2487                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2488                 /* always GDT_CLUST_INFO! */
2489                 nscp->SCp.sent_command = GDT_CLUST_INFO;
2490             }
2491         }
2492         }
2493
2494         if (nscp->SCp.sent_command != -1) {
2495             if ((nscp->SCp.phase & 0xff) == CACHESERVICE) {
2496                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2497                     this_cmd = FALSE;
2498                 next_cmd = FALSE;
2499             } else if ((nscp->SCp.phase & 0xff) == SCSIRAWSERVICE) {
2500                 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2501                     this_cmd = FALSE;
2502                 next_cmd = FALSE;
2503             } else {
2504                 memset((char*)nscp->sense_buffer,0,16);
2505                 nscp->sense_buffer[0] = 0x70;
2506                 nscp->sense_buffer[2] = NOT_READY;
2507                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2508                 if (!nscp->SCp.have_data_in)
2509                     nscp->SCp.have_data_in++;
2510                 else
2511                     nscp->scsi_done(nscp);
2512             }
2513         } else if (IS_GDTH_INTERNAL_CMD(nscp)) {
2514             if (!(cmd_index=gdth_special_cmd(hanum,nscp)))
2515                 this_cmd = FALSE;
2516             next_cmd = FALSE;
2517         } else if (b != ha->virt_bus) {
2518             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2519                 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2520                 this_cmd = FALSE;
2521             else
2522                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2523         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2524             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2525                     nscp->cmnd[0], b, t, l));
2526             nscp->result = DID_BAD_TARGET << 16;
2527             if (!nscp->SCp.have_data_in)
2528                 nscp->SCp.have_data_in++;
2529             else
2530                 nscp->scsi_done(nscp);
2531         } else {
2532             switch (nscp->cmnd[0]) {
2533               case TEST_UNIT_READY:
2534               case INQUIRY:
2535               case REQUEST_SENSE:
2536               case READ_CAPACITY:
2537               case VERIFY:
2538               case START_STOP:
2539               case MODE_SENSE:
2540               case SERVICE_ACTION_IN:
2541                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2542                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2543                        nscp->cmnd[4],nscp->cmnd[5]));
2544                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2545                     /* return UNIT_ATTENTION */
2546                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2547                              nscp->cmnd[0], t));
2548                     ha->hdr[t].media_changed = FALSE;
2549                     memset((char*)nscp->sense_buffer,0,16);
2550                     nscp->sense_buffer[0] = 0x70;
2551                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2552                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2553                     if (!nscp->SCp.have_data_in)
2554                         nscp->SCp.have_data_in++;
2555                     else
2556                         nscp->scsi_done(nscp);
2557                 } else if (gdth_internal_cache_cmd(hanum,nscp))
2558                     nscp->scsi_done(nscp);
2559                 break;
2560
2561               case ALLOW_MEDIUM_REMOVAL:
2562                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2563                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2564                        nscp->cmnd[4],nscp->cmnd[5]));
2565                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2566                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2567                     nscp->result = DID_OK << 16;
2568                     nscp->sense_buffer[0] = 0;
2569                     if (!nscp->SCp.have_data_in)
2570                         nscp->SCp.have_data_in++;
2571                     else
2572                         nscp->scsi_done(nscp);
2573                 } else {
2574                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2575                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2576                            nscp->cmnd[4],nscp->cmnd[3]));
2577                     if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2578                         this_cmd = FALSE;
2579                 }
2580                 break;
2581
2582               case RESERVE:
2583               case RELEASE:
2584                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2585                         "RESERVE" : "RELEASE"));
2586                 if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2587                     this_cmd = FALSE;
2588                 break;
2589
2590               case READ_6:
2591               case WRITE_6:
2592               case READ_10:
2593               case WRITE_10:
2594               case READ_16:
2595               case WRITE_16:
2596                 if (ha->hdr[t].media_changed) {
2597                     /* return UNIT_ATTENTION */
2598                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2599                              nscp->cmnd[0], t));
2600                     ha->hdr[t].media_changed = FALSE;
2601                     memset((char*)nscp->sense_buffer,0,16);
2602                     nscp->sense_buffer[0] = 0x70;
2603                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2604                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2605                     if (!nscp->SCp.have_data_in)
2606                         nscp->SCp.have_data_in++;
2607                     else
2608                         nscp->scsi_done(nscp);
2609                 } else if (!(cmd_index=gdth_fill_cache_cmd(hanum,nscp,t)))
2610                     this_cmd = FALSE;
2611                 break;
2612
2613               default:
2614                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2615                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2616                         nscp->cmnd[4],nscp->cmnd[5]));
2617                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2618                        hanum, nscp->cmnd[0]);
2619                 nscp->result = DID_ABORT << 16;
2620                 if (!nscp->SCp.have_data_in)
2621                     nscp->SCp.have_data_in++;
2622                 else
2623                     nscp->scsi_done(nscp);
2624                 break;
2625             }
2626         }
2627
2628         if (!this_cmd)
2629             break;
2630         if (nscp == ha->req_first)
2631             ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2632         else
2633             pscp->SCp.ptr = nscp->SCp.ptr;
2634         if (!next_cmd)
2635             break;
2636     }
2637
2638     if (ha->cmd_cnt > 0) {
2639         gdth_release_event(hanum);
2640     }
2641
2642     if (!gdth_polling)
2643         spin_unlock_irqrestore(&ha->smp_lock, flags);
2644
2645     if (gdth_polling && ha->cmd_cnt > 0) {
2646         if (!gdth_wait(hanum,cmd_index,POLL_TIMEOUT))
2647             printk("GDT-HA %d: Command %d timed out !\n",
2648                    hanum,cmd_index);
2649     }
2650 }
2651
2652 static void gdth_copy_internal_data(int hanum,Scsi_Cmnd *scp,
2653                                     char *buffer,ushort count)
2654 {
2655     ushort cpcount,i;
2656     ushort cpsum,cpnow;
2657     struct scatterlist *sl;
2658     gdth_ha_str *ha;
2659     char *address;
2660
2661     cpcount = count<=(ushort)scp->request_bufflen ? count:(ushort)scp->request_bufflen;
2662     ha = HADATA(gdth_ctr_tab[hanum]);
2663
2664     if (scp->use_sg) {
2665         sl = (struct scatterlist *)scp->request_buffer;
2666         for (i=0,cpsum=0; i<scp->use_sg; ++i,++sl) {
2667             unsigned long flags;
2668             cpnow = (ushort)sl->length;
2669             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2670                           cpnow,cpsum,cpcount,(ushort)scp->bufflen));
2671             if (cpsum+cpnow > cpcount)
2672                 cpnow = cpcount - cpsum;
2673             cpsum += cpnow;
2674             if (!sl->page) {
2675                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2676                        hanum);
2677                 return;
2678             }
2679             local_irq_save(flags);
2680 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
2681             address = kmap_atomic(sl->page, KM_BIO_SRC_IRQ) + sl->offset;
2682             memcpy(address,buffer,cpnow);
2683             flush_dcache_page(sl->page);
2684             kunmap_atomic(address, KM_BIO_SRC_IRQ);
2685 #else
2686             address = kmap_atomic(sl->page, KM_BH_IRQ) + sl->offset;
2687             memcpy(address,buffer,cpnow);
2688             flush_dcache_page(sl->page);
2689             kunmap_atomic(address, KM_BH_IRQ);
2690 #endif
2691             local_irq_restore(flags);
2692             if (cpsum == cpcount)
2693                 break;
2694             buffer += cpnow;
2695         }
2696     } else {
2697         TRACE(("copy_internal() count %d\n",cpcount));
2698         memcpy((char*)scp->request_buffer,buffer,cpcount);
2699     }
2700 }
2701
2702 static int gdth_internal_cache_cmd(int hanum,Scsi_Cmnd *scp)
2703 {
2704     register gdth_ha_str *ha;
2705     unchar t;
2706     gdth_inq_data inq;
2707     gdth_rdcap_data rdc;
2708     gdth_sense_data sd;
2709     gdth_modep_data mpd;
2710
2711     ha = HADATA(gdth_ctr_tab[hanum]);
2712     t  = scp->device->id;
2713     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2714            scp->cmnd[0],t));
2715
2716     scp->result = DID_OK << 16;
2717     scp->sense_buffer[0] = 0;
2718
2719     switch (scp->cmnd[0]) {
2720       case TEST_UNIT_READY:
2721       case VERIFY:
2722       case START_STOP:
2723         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2724         break;
2725
2726       case INQUIRY:
2727         TRACE2(("Inquiry hdrive %d devtype %d\n",
2728                 t,ha->hdr[t].devtype));
2729         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2730         /* you can here set all disks to removable, if you want to do
2731            a flush using the ALLOW_MEDIUM_REMOVAL command */
2732         inq.modif_rmb = 0x00;
2733         if ((ha->hdr[t].devtype & 1) ||
2734             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2735             inq.modif_rmb = 0x80;
2736         inq.version   = 2;
2737         inq.resp_aenc = 2;
2738         inq.add_length= 32;
2739         strcpy(inq.vendor,ha->oem_name);
2740         sprintf(inq.product,"Host Drive  #%02d",t);
2741         strcpy(inq.revision,"   ");
2742         gdth_copy_internal_data(hanum,scp,(char*)&inq,sizeof(gdth_inq_data));
2743         break;
2744
2745       case REQUEST_SENSE:
2746         TRACE2(("Request sense hdrive %d\n",t));
2747         sd.errorcode = 0x70;
2748         sd.segno     = 0x00;
2749         sd.key       = NO_SENSE;
2750         sd.info      = 0;
2751         sd.add_length= 0;
2752         gdth_copy_internal_data(hanum,scp,(char*)&sd,sizeof(gdth_sense_data));
2753         break;
2754
2755       case MODE_SENSE:
2756         TRACE2(("Mode sense hdrive %d\n",t));
2757         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2758         mpd.hd.data_length = sizeof(gdth_modep_data);
2759         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2760         mpd.hd.bd_length   = sizeof(mpd.bd);
2761         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2762         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2763         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2764         gdth_copy_internal_data(hanum,scp,(char*)&mpd,sizeof(gdth_modep_data));
2765         break;
2766
2767       case READ_CAPACITY:
2768         TRACE2(("Read capacity hdrive %d\n",t));
2769         if (ha->hdr[t].size > (ulong64)0xffffffff)
2770             rdc.last_block_no = 0xffffffff;
2771         else
2772             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2773         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2774         gdth_copy_internal_data(hanum,scp,(char*)&rdc,sizeof(gdth_rdcap_data));
2775         break;
2776
2777       case SERVICE_ACTION_IN:
2778         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2779             (ha->cache_feat & GDT_64BIT)) {
2780             gdth_rdcap16_data rdc16;
2781
2782             TRACE2(("Read capacity (16) hdrive %d\n",t));
2783             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2784             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2785             gdth_copy_internal_data(hanum,scp,(char*)&rdc16,sizeof(gdth_rdcap16_data));
2786         } else {
2787             scp->result = DID_ABORT << 16;
2788         }
2789         break;
2790
2791       default:
2792         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2793         break;
2794     }
2795
2796     if (!scp->SCp.have_data_in)
2797         scp->SCp.have_data_in++;
2798     else
2799         return 1;
2800
2801     return 0;
2802 }
2803
2804 static int gdth_fill_cache_cmd(int hanum,Scsi_Cmnd *scp,ushort hdrive)
2805 {
2806     register gdth_ha_str *ha;
2807     register gdth_cmd_str *cmdp;
2808     struct scatterlist *sl;
2809     ulong32 cnt, blockcnt;
2810     ulong64 no, blockno;
2811     dma_addr_t phys_addr;
2812     int i, cmd_index, read_write, sgcnt, mode64;
2813     struct page *page;
2814     ulong offset;
2815
2816     ha = HADATA(gdth_ctr_tab[hanum]);
2817     cmdp = ha->pccb;
2818     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2819                  scp->cmnd[0],scp->cmd_len,hdrive));
2820
2821     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2822         return 0;
2823
2824     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2825     /* test for READ_16, WRITE_16 if !mode64 ? ---
2826        not required, should not occur due to error return on
2827        READ_CAPACITY_16 */
2828
2829     cmdp->Service = CACHESERVICE;
2830     cmdp->RequestBuffer = scp;
2831     /* search free command index */
2832     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
2833         TRACE(("GDT: No free command index found\n"));
2834         return 0;
2835     }
2836     /* if it's the first command, set command semaphore */
2837     if (ha->cmd_cnt == 0)
2838         gdth_set_sema0(hanum);
2839
2840     /* fill command */
2841     read_write = 0;
2842     if (scp->SCp.sent_command != -1)
2843         cmdp->OpCode = scp->SCp.sent_command;   /* special cache cmd. */
2844     else if (scp->cmnd[0] == RESERVE)
2845         cmdp->OpCode = GDT_RESERVE_DRV;
2846     else if (scp->cmnd[0] == RELEASE)
2847         cmdp->OpCode = GDT_RELEASE_DRV;
2848     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2849         if (scp->cmnd[4] & 1)                   /* prevent ? */
2850             cmdp->OpCode = GDT_MOUNT;
2851         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2852             cmdp->OpCode = GDT_UNMOUNT;
2853         else
2854             cmdp->OpCode = GDT_FLUSH;
2855     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2856                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2857     ) {
2858         read_write = 1;
2859         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2860                                    (ha->cache_feat & GDT_WR_THROUGH)))
2861             cmdp->OpCode = GDT_WRITE_THR;
2862         else
2863             cmdp->OpCode = GDT_WRITE;
2864     } else {
2865         read_write = 2;
2866         cmdp->OpCode = GDT_READ;
2867     }
2868
2869     cmdp->BoardNode = LOCALBOARD;
2870     if (mode64) {
2871         cmdp->u.cache64.DeviceNo = hdrive;
2872         cmdp->u.cache64.BlockNo  = 1;
2873         cmdp->u.cache64.sg_canz  = 0;
2874     } else {
2875         cmdp->u.cache.DeviceNo = hdrive;
2876         cmdp->u.cache.BlockNo  = 1;
2877         cmdp->u.cache.sg_canz  = 0;
2878     }
2879
2880     if (read_write) {
2881         if (scp->cmd_len == 16) {
2882             memcpy(&no, &scp->cmnd[2], sizeof(ulong64));
2883             blockno = be64_to_cpu(no);
2884             memcpy(&cnt, &scp->cmnd[10], sizeof(ulong32));
2885             blockcnt = be32_to_cpu(cnt);
2886         } else if (scp->cmd_len == 10) {
2887             memcpy(&no, &scp->cmnd[2], sizeof(ulong32));
2888             blockno = be32_to_cpu(no);
2889             memcpy(&cnt, &scp->cmnd[7], sizeof(ushort));
2890             blockcnt = be16_to_cpu(cnt);
2891         } else {
2892             memcpy(&no, &scp->cmnd[0], sizeof(ulong32));
2893             blockno = be32_to_cpu(no) & 0x001fffffUL;
2894             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2895         }
2896         if (mode64) {
2897             cmdp->u.cache64.BlockNo = blockno;
2898             cmdp->u.cache64.BlockCnt = blockcnt;
2899         } else {
2900             cmdp->u.cache.BlockNo = (ulong32)blockno;
2901             cmdp->u.cache.BlockCnt = blockcnt;
2902         }
2903
2904         if (scp->use_sg) {
2905             sl = (struct scatterlist *)scp->request_buffer;
2906             sgcnt = scp->use_sg;
2907             scp->SCp.Status = GDTH_MAP_SG;
2908             scp->SCp.Message = (read_write == 1 ?
2909                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2910             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2911             if (mode64) {
2912                 cmdp->u.cache64.DestAddr= (ulong64)-1;
2913                 cmdp->u.cache64.sg_canz = sgcnt;
2914                 for (i=0; i<sgcnt; ++i,++sl) {
2915                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2916 #ifdef GDTH_DMA_STATISTICS
2917                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
2918                         ha->dma64_cnt++;
2919                     else
2920                         ha->dma32_cnt++;
2921 #endif
2922                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2923                 }
2924             } else {
2925                 cmdp->u.cache.DestAddr= 0xffffffff;
2926                 cmdp->u.cache.sg_canz = sgcnt;
2927                 for (i=0; i<sgcnt; ++i,++sl) {
2928                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2929 #ifdef GDTH_DMA_STATISTICS
2930                     ha->dma32_cnt++;
2931 #endif
2932                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2933                 }
2934             }
2935
2936 #ifdef GDTH_STATISTICS
2937             if (max_sg < (ulong32)sgcnt) {
2938                 max_sg = (ulong32)sgcnt;
2939                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2940             }
2941 #endif
2942
2943         } else if (scp->request_bufflen) {
2944             scp->SCp.Status = GDTH_MAP_SINGLE;
2945             scp->SCp.Message = (read_write == 1 ?
2946                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2947             page = virt_to_page(scp->request_buffer);
2948             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
2949             phys_addr = pci_map_page(ha->pdev,page,offset,
2950                                      scp->request_bufflen,scp->SCp.Message);
2951             scp->SCp.dma_handle = phys_addr;
2952             if (mode64) {
2953                 if (ha->cache_feat & SCATTER_GATHER) {
2954                     cmdp->u.cache64.DestAddr = (ulong64)-1;
2955                     cmdp->u.cache64.sg_canz = 1;
2956                     cmdp->u.cache64.sg_lst[0].sg_ptr = phys_addr;
2957                     cmdp->u.cache64.sg_lst[0].sg_len = scp->request_bufflen;
2958                     cmdp->u.cache64.sg_lst[1].sg_len = 0;
2959                 } else {
2960                     cmdp->u.cache64.DestAddr  = phys_addr;
2961                     cmdp->u.cache64.sg_canz= 0;
2962                 }
2963             } else {
2964                 if (ha->cache_feat & SCATTER_GATHER) {
2965                     cmdp->u.cache.DestAddr = 0xffffffff;
2966                     cmdp->u.cache.sg_canz = 1;
2967                     cmdp->u.cache.sg_lst[0].sg_ptr = phys_addr;
2968                     cmdp->u.cache.sg_lst[0].sg_len = scp->request_bufflen;
2969                     cmdp->u.cache.sg_lst[1].sg_len = 0;
2970                 } else {
2971                     cmdp->u.cache.DestAddr  = phys_addr;
2972                     cmdp->u.cache.sg_canz= 0;
2973                 }
2974             }
2975         }
2976     }
2977     /* evaluate command size, check space */
2978     if (mode64) {
2979         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2980                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2981                cmdp->u.cache64.sg_lst[0].sg_ptr,
2982                cmdp->u.cache64.sg_lst[0].sg_len));
2983         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2984                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2985         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2986             (ushort)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2987     } else {
2988         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2989                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2990                cmdp->u.cache.sg_lst[0].sg_ptr,
2991                cmdp->u.cache.sg_lst[0].sg_len));
2992         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2993                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2994         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2995             (ushort)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2996     }
2997     if (ha->cmd_len & 3)
2998         ha->cmd_len += (4 - (ha->cmd_len & 3));
2999
3000     if (ha->cmd_cnt > 0) {
3001         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3002             ha->ic_all_size) {
3003             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
3004             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3005             return 0;
3006         }
3007     }
3008
3009     /* copy command */
3010     gdth_copy_command(hanum);
3011     return cmd_index;
3012 }
3013
3014 static int gdth_fill_raw_cmd(int hanum,Scsi_Cmnd *scp,unchar b)
3015 {
3016     register gdth_ha_str *ha;
3017     register gdth_cmd_str *cmdp;
3018     struct scatterlist *sl;
3019     ushort i;
3020     dma_addr_t phys_addr, sense_paddr;
3021     int cmd_index, sgcnt, mode64;
3022     unchar t,l;
3023     struct page *page;
3024     ulong offset;
3025
3026     ha = HADATA(gdth_ctr_tab[hanum]);
3027     t = scp->device->id;
3028     l = scp->device->lun;
3029     cmdp = ha->pccb;
3030     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
3031            scp->cmnd[0],b,t,l));
3032
3033     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3034         return 0;
3035
3036     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
3037
3038     cmdp->Service = SCSIRAWSERVICE;
3039     cmdp->RequestBuffer = scp;
3040     /* search free command index */
3041     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
3042         TRACE(("GDT: No free command index found\n"));
3043         return 0;
3044     }
3045     /* if it's the first command, set command semaphore */
3046     if (ha->cmd_cnt == 0)
3047         gdth_set_sema0(hanum);
3048
3049     /* fill command */
3050     if (scp->SCp.sent_command != -1) {
3051         cmdp->OpCode           = scp->SCp.sent_command; /* special raw cmd. */
3052         cmdp->BoardNode        = LOCALBOARD;
3053         if (mode64) {
3054             cmdp->u.raw64.direction = (scp->SCp.phase >> 8);
3055             TRACE2(("special raw cmd 0x%x param 0x%x\n",
3056                     cmdp->OpCode, cmdp->u.raw64.direction));
3057             /* evaluate command size */
3058             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
3059         } else {
3060             cmdp->u.raw.direction  = (scp->SCp.phase >> 8);
3061             TRACE2(("special raw cmd 0x%x param 0x%x\n",
3062                     cmdp->OpCode, cmdp->u.raw.direction));
3063             /* evaluate command size */
3064             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
3065         }
3066
3067     } else {
3068         page = virt_to_page(scp->sense_buffer);
3069         offset = (ulong)scp->sense_buffer & ~PAGE_MASK;
3070         sense_paddr = pci_map_page(ha->pdev,page,offset,
3071                                    16,PCI_DMA_FROMDEVICE);
3072         *(ulong32 *)&scp->SCp.buffer = (ulong32)sense_paddr;
3073         /* high part, if 64bit */
3074         *(ulong32 *)&scp->host_scribble = (ulong32)((ulong64)sense_paddr >> 32);
3075         cmdp->OpCode           = GDT_WRITE;             /* always */
3076         cmdp->BoardNode        = LOCALBOARD;
3077         if (mode64) {
3078             cmdp->u.raw64.reserved   = 0;
3079             cmdp->u.raw64.mdisc_time = 0;
3080             cmdp->u.raw64.mcon_time  = 0;
3081             cmdp->u.raw64.clen       = scp->cmd_len;
3082             cmdp->u.raw64.target     = t;
3083             cmdp->u.raw64.lun        = l;
3084             cmdp->u.raw64.bus        = b;
3085             cmdp->u.raw64.priority   = 0;
3086             cmdp->u.raw64.sdlen      = scp->request_bufflen;
3087             cmdp->u.raw64.sense_len  = 16;
3088             cmdp->u.raw64.sense_data = sense_paddr;
3089             cmdp->u.raw64.direction  =
3090                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
3091             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
3092             cmdp->u.raw64.sg_ranz    = 0;
3093         } else {
3094             cmdp->u.raw.reserved   = 0;
3095             cmdp->u.raw.mdisc_time = 0;
3096             cmdp->u.raw.mcon_time  = 0;
3097             cmdp->u.raw.clen       = scp->cmd_len;
3098             cmdp->u.raw.target     = t;
3099             cmdp->u.raw.lun        = l;
3100             cmdp->u.raw.bus        = b;
3101             cmdp->u.raw.priority   = 0;
3102             cmdp->u.raw.link_p     = 0;
3103             cmdp->u.raw.sdlen      = scp->request_bufflen;
3104             cmdp->u.raw.sense_len  = 16;
3105             cmdp->u.raw.sense_data = sense_paddr;
3106             cmdp->u.raw.direction  =
3107                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
3108             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
3109             cmdp->u.raw.sg_ranz    = 0;
3110         }
3111
3112         if (scp->use_sg) {
3113             sl = (struct scatterlist *)scp->request_buffer;
3114             sgcnt = scp->use_sg;
3115             scp->SCp.Status = GDTH_MAP_SG;
3116             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
3117             sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
3118             if (mode64) {
3119                 cmdp->u.raw64.sdata = (ulong64)-1;
3120                 cmdp->u.raw64.sg_ranz = sgcnt;
3121                 for (i=0; i<sgcnt; ++i,++sl) {
3122                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
3123 #ifdef GDTH_DMA_STATISTICS
3124                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (ulong64)0xffffffff)
3125                         ha->dma64_cnt++;
3126                     else
3127                         ha->dma32_cnt++;
3128 #endif
3129                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
3130                 }
3131             } else {
3132                 cmdp->u.raw.sdata = 0xffffffff;
3133                 cmdp->u.raw.sg_ranz = sgcnt;
3134                 for (i=0; i<sgcnt; ++i,++sl) {
3135                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
3136 #ifdef GDTH_DMA_STATISTICS
3137                     ha->dma32_cnt++;
3138 #endif
3139                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
3140                 }
3141             }
3142
3143 #ifdef GDTH_STATISTICS
3144             if (max_sg < sgcnt) {
3145                 max_sg = sgcnt;
3146                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
3147             }
3148 #endif
3149
3150         } else if (scp->request_bufflen) {
3151             scp->SCp.Status = GDTH_MAP_SINGLE;
3152             scp->SCp.Message = PCI_DMA_BIDIRECTIONAL;
3153             page = virt_to_page(scp->request_buffer);
3154             offset = (ulong)scp->request_buffer & ~PAGE_MASK;
3155             phys_addr = pci_map_page(ha->pdev,page,offset,
3156                                      scp->request_bufflen,scp->SCp.Message);
3157             scp->SCp.dma_handle = phys_addr;
3158
3159             if (mode64) {
3160                 if (ha->raw_feat & SCATTER_GATHER) {
3161                     cmdp->u.raw64.sdata  = (ulong64)-1;
3162                     cmdp->u.raw64.sg_ranz= 1;
3163                     cmdp->u.raw64.sg_lst[0].sg_ptr = phys_addr;
3164                     cmdp->u.raw64.sg_lst[0].sg_len = scp->request_bufflen;
3165                     cmdp->u.raw64.sg_lst[1].sg_len = 0;
3166                 } else {
3167                     cmdp->u.raw64.sdata  = phys_addr;
3168                     cmdp->u.raw64.sg_ranz= 0;
3169                 }
3170             } else {
3171                 if (ha->raw_feat & SCATTER_GATHER) {
3172                     cmdp->u.raw.sdata  = 0xffffffff;
3173                     cmdp->u.raw.sg_ranz= 1;
3174                     cmdp->u.raw.sg_lst[0].sg_ptr = phys_addr;
3175                     cmdp->u.raw.sg_lst[0].sg_len = scp->request_bufflen;
3176                     cmdp->u.raw.sg_lst[1].sg_len = 0;
3177                 } else {
3178                     cmdp->u.raw.sdata  = phys_addr;
3179                     cmdp->u.raw.sg_ranz= 0;
3180                 }
3181             }
3182         }
3183         if (mode64) {
3184             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3185                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
3186                    cmdp->u.raw64.sg_lst[0].sg_ptr,
3187                    cmdp->u.raw64.sg_lst[0].sg_len));
3188             /* evaluate command size */
3189             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
3190                 (ushort)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
3191         } else {
3192             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
3193                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
3194                    cmdp->u.raw.sg_lst[0].sg_ptr,
3195                    cmdp->u.raw.sg_lst[0].sg_len));
3196             /* evaluate command size */
3197             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
3198                 (ushort)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
3199         }
3200     }
3201     /* check space */
3202     if (ha->cmd_len & 3)
3203         ha->cmd_len += (4 - (ha->cmd_len & 3));
3204
3205     if (ha->cmd_cnt > 0) {
3206         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3207             ha->ic_all_size) {
3208             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
3209             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3210             return 0;
3211         }
3212     }
3213
3214     /* copy command */
3215     gdth_copy_command(hanum);
3216     return cmd_index;
3217 }
3218
3219 static int gdth_special_cmd(int hanum,Scsi_Cmnd *scp)
3220 {
3221     register gdth_ha_str *ha;
3222     register gdth_cmd_str *cmdp;
3223     int cmd_index;
3224
3225     ha  = HADATA(gdth_ctr_tab[hanum]);
3226     cmdp= ha->pccb;
3227     TRACE2(("gdth_special_cmd(): "));
3228
3229     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3230         return 0;
3231
3232     memcpy( cmdp, scp->request_buffer, sizeof(gdth_cmd_str));
3233     cmdp->RequestBuffer = scp;
3234
3235     /* search free command index */
3236     if (!(cmd_index=gdth_get_cmd_index(hanum))) {
3237         TRACE(("GDT: No free command index found\n"));
3238         return 0;
3239     }
3240
3241     /* if it's the first command, set command semaphore */
3242     if (ha->cmd_cnt == 0)
3243        gdth_set_sema0(hanum);
3244
3245     /* evaluate command size, check space */
3246     if (cmdp->OpCode == GDT_IOCTL) {
3247         TRACE2(("IOCTL\n"));
3248         ha->cmd_len =
3249             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(ulong64);
3250     } else if (cmdp->Service == CACHESERVICE) {
3251         TRACE2(("cache command %d\n",cmdp->OpCode));
3252         if (ha->cache_feat & GDT_64BIT)
3253             ha->cmd_len =
3254                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
3255         else
3256             ha->cmd_len =
3257                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
3258     } else if (cmdp->Service == SCSIRAWSERVICE) {
3259         TRACE2(("raw command %d\n",cmdp->OpCode));
3260         if (ha->raw_feat & GDT_64BIT)
3261             ha->cmd_len =
3262                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
3263         else
3264             ha->cmd_len =
3265                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
3266     }
3267
3268     if (ha->cmd_len & 3)
3269         ha->cmd_len += (4 - (ha->cmd_len & 3));
3270
3271     if (ha->cmd_cnt > 0) {
3272         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3273             ha->ic_all_size) {
3274             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
3275             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3276             return 0;
3277         }
3278     }
3279
3280     /* copy command */
3281     gdth_copy_command(hanum);
3282     return cmd_index;
3283 }
3284
3285
3286 /* Controller event handling functions */
3287 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
3288                                       ushort idx, gdth_evt_data *evt)
3289 {
3290     gdth_evt_str *e;
3291     struct timeval tv;
3292
3293     /* no GDTH_LOCK_HA() ! */
3294     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
3295     if (source == 0)                        /* no source -> no event */
3296         return NULL;
3297
3298     if (ebuffer[elastidx].event_source == source &&
3299         ebuffer[elastidx].event_idx == idx &&
3300         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
3301             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
3302             (char *)&evt->eu, evt->size)) ||
3303         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
3304             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
3305             (char *)&evt->event_string)))) {
3306         e = &ebuffer[elastidx];
3307         do_gettimeofday(&tv);
3308         e->last_stamp = tv.tv_sec;
3309         ++e->same_count;
3310     } else {
3311         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
3312             ++elastidx;
3313             if (elastidx == MAX_EVENTS)
3314                 elastidx = 0;
3315             if (elastidx == eoldidx) {              /* reached mark ? */
3316                 ++eoldidx;
3317                 if (eoldidx == MAX_EVENTS)
3318                     eoldidx = 0;
3319             }
3320         }
3321         e = &ebuffer[elastidx];
3322         e->event_source = source;
3323         e->event_idx = idx;
3324         do_gettimeofday(&tv);
3325         e->first_stamp = e->last_stamp = tv.tv_sec;
3326         e->same_count = 1;
3327         e->event_data = *evt;
3328         e->application = 0;
3329     }
3330     return e;
3331 }
3332
3333 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
3334 {
3335     gdth_evt_str *e;
3336     int eindex;
3337     ulong flags;
3338
3339     TRACE2(("gdth_read_event() handle %d\n", handle));
3340     spin_lock_irqsave(&ha->smp_lock, flags);
3341     if (handle == -1)
3342         eindex = eoldidx;
3343     else
3344         eindex = handle;
3345     estr->event_source = 0;
3346
3347     if (eindex >= MAX_EVENTS) {
3348         spin_unlock_irqrestore(&ha->smp_lock, flags);
3349         return eindex;
3350     }
3351     e = &ebuffer[eindex];
3352     if (e->event_source != 0) {
3353         if (eindex != elastidx) {
3354             if (++eindex == MAX_EVENTS)
3355                 eindex = 0;
3356         } else {
3357             eindex = -1;
3358         }
3359         memcpy(estr, e, sizeof(gdth_evt_str));
3360     }
3361     spin_unlock_irqrestore(&ha->smp_lock, flags);
3362     return eindex;
3363 }
3364
3365 static void gdth_readapp_event(gdth_ha_str *ha,
3366                                unchar application, gdth_evt_str *estr)
3367 {
3368     gdth_evt_str *e;
3369     int eindex;
3370     ulong flags;
3371     unchar found = FALSE;
3372
3373     TRACE2(("gdth_readapp_event() app. %d\n", application));
3374     spin_lock_irqsave(&ha->smp_lock, flags);
3375     eindex = eoldidx;
3376     for (;;) {
3377         e = &ebuffer[eindex];
3378         if (e->event_source == 0)
3379             break;
3380         if ((e->application & application) == 0) {
3381             e->application |= application;
3382             found = TRUE;
3383             break;
3384         }
3385         if (eindex == elastidx)
3386             break;
3387         if (++eindex == MAX_EVENTS)
3388             eindex = 0;
3389     }
3390     if (found)
3391         memcpy(estr, e, sizeof(gdth_evt_str));
3392     else
3393         estr->event_source = 0;
3394     spin_unlock_irqrestore(&ha->smp_lock, flags);
3395 }
3396
3397 static void gdth_clear_events(void)
3398 {
3399     TRACE(("gdth_clear_events()"));
3400
3401     eoldidx = elastidx = 0;
3402     ebuffer[0].event_source = 0;
3403 }
3404
3405
3406 /* SCSI interface functions */
3407
3408 static irqreturn_t gdth_interrupt(int irq,void *dev_id)
3409 {
3410     gdth_ha_str *ha2 = (gdth_ha_str *)dev_id;
3411     register gdth_ha_str *ha;
3412     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
3413     gdt6_dpram_str __iomem *dp6_ptr;
3414     gdt2_dpram_str __iomem *dp2_ptr;
3415     Scsi_Cmnd *scp;
3416     int hanum, rval, i;
3417     unchar IStatus;
3418     ushort Service;
3419     ulong flags = 0;
3420 #ifdef INT_COAL
3421     int coalesced = FALSE;
3422     int next = FALSE;
3423     gdth_coal_status *pcs = NULL;
3424     int act_int_coal = 0;
3425 #endif
3426
3427     TRACE(("gdth_interrupt() IRQ %d\n",irq));
3428
3429     /* if polling and not from gdth_wait() -> return */
3430     if (gdth_polling) {
3431         if (!gdth_from_wait) {
3432             return IRQ_HANDLED;
3433         }
3434     }
3435
3436     if (!gdth_polling)
3437         spin_lock_irqsave(&ha2->smp_lock, flags);
3438     wait_index = 0;
3439
3440     /* search controller */
3441     if ((hanum = gdth_get_status(&IStatus,irq)) == -1) {
3442         /* spurious interrupt */
3443         if (!gdth_polling)
3444             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3445             return IRQ_HANDLED;
3446     }
3447     ha = HADATA(gdth_ctr_tab[hanum]);
3448
3449 #ifdef GDTH_STATISTICS
3450     ++act_ints;
3451 #endif
3452
3453 #ifdef INT_COAL
3454     /* See if the fw is returning coalesced status */
3455     if (IStatus == COALINDEX) {
3456         /* Coalesced status.  Setup the initial status
3457            buffer pointer and flags */
3458         pcs = ha->coal_stat;
3459         coalesced = TRUE;
3460         next = TRUE;
3461     }
3462
3463     do {
3464         if (coalesced) {
3465             /* For coalesced requests all status
3466                information is found in the status buffer */
3467             IStatus = (unchar)(pcs->status & 0xff);
3468         }
3469 #endif
3470
3471         if (ha->type == GDT_EISA) {
3472             if (IStatus & 0x80) {                       /* error flag */
3473                 IStatus &= ~0x80;
3474                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3475                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3476             } else                                      /* no error */
3477                 ha->status = S_OK;
3478             ha->info = inl(ha->bmic + MAILBOXREG+12);
3479             ha->service = inw(ha->bmic + MAILBOXREG+10);
3480             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3481
3482             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3483             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3484         } else if (ha->type == GDT_ISA) {
3485             dp2_ptr = ha->brd;
3486             if (IStatus & 0x80) {                       /* error flag */
3487                 IStatus &= ~0x80;
3488                 ha->status = gdth_readw(&dp2_ptr->u.ic.Status);
3489                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3490             } else                                      /* no error */
3491                 ha->status = S_OK;
3492             ha->info = gdth_readl(&dp2_ptr->u.ic.Info[0]);
3493             ha->service = gdth_readw(&dp2_ptr->u.ic.Service);
3494             ha->info2 = gdth_readl(&dp2_ptr->u.ic.Info[1]);
3495
3496             gdth_writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3497             gdth_writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3498             gdth_writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3499         } else if (ha->type == GDT_PCI) {
3500             dp6_ptr = ha->brd;
3501             if (IStatus & 0x80) {                       /* error flag */
3502                 IStatus &= ~0x80;
3503                 ha->status = gdth_readw(&dp6_ptr->u.ic.Status);
3504                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3505             } else                                      /* no error */
3506                 ha->status = S_OK;
3507             ha->info = gdth_readl(&dp6_ptr->u.ic.Info[0]);
3508             ha->service = gdth_readw(&dp6_ptr->u.ic.Service);
3509             ha->info2 = gdth_readl(&dp6_ptr->u.ic.Info[1]);
3510
3511             gdth_writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3512             gdth_writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3513             gdth_writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3514         } else if (ha->type == GDT_PCINEW) {
3515             if (IStatus & 0x80) {                       /* error flag */
3516                 IStatus &= ~0x80;
3517                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3518                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3519             } else
3520                 ha->status = S_OK;
3521             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3522             ha->service = inw(PTR2USHORT(&ha->plx->service));
3523             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3524
3525             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3526             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3527         } else if (ha->type == GDT_PCIMPR) {
3528             dp6m_ptr = ha->brd;
3529             if (IStatus & 0x80) {                       /* error flag */
3530                 IStatus &= ~0x80;
3531 #ifdef INT_COAL
3532                 if (coalesced)
3533                     ha->status = pcs->ext_status & 0xffff;
3534                 else
3535 #endif
3536                     ha->status = gdth_readw(&dp6m_ptr->i960r.status);
3537                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3538             } else                                      /* no error */
3539                 ha->status = S_OK;
3540 #ifdef INT_COAL
3541             /* get information */
3542             if (coalesced) {
3543                 ha->info = pcs->info0;
3544                 ha->info2 = pcs->info1;
3545                 ha->service = (pcs->ext_status >> 16) & 0xffff;
3546             } else
3547 #endif
3548             {
3549                 ha->info = gdth_readl(&dp6m_ptr->i960r.info[0]);
3550                 ha->service = gdth_readw(&dp6m_ptr->i960r.service);
3551                 ha->info2 = gdth_readl(&dp6m_ptr->i960r.info[1]);
3552             }
3553             /* event string */
3554             if (IStatus == ASYNCINDEX) {
3555                 if (ha->service != SCREENSERVICE &&
3556                     (ha->fw_vers & 0xff) >= 0x1a) {
3557                     ha->dvr.severity = gdth_readb
3558                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3559                     for (i = 0; i < 256; ++i) {
3560                         ha->dvr.event_string[i] = gdth_readb
3561                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3562                         if (ha->dvr.event_string[i] == 0)
3563                             break;
3564                     }
3565                 }
3566             }
3567 #ifdef INT_COAL
3568             /* Make sure that non coalesced interrupts get cleared
3569                before being handled by gdth_async_event/gdth_sync_event */
3570             if (!coalesced)
3571 #endif
3572             {
3573                 gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3574                 gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3575             }
3576         } else {
3577             TRACE2(("gdth_interrupt() unknown controller type\n"));
3578             if (!gdth_polling)
3579                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3580             return IRQ_HANDLED;
3581         }
3582
3583         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3584                IStatus,ha->status,ha->info));
3585
3586         if (gdth_from_wait) {
3587             wait_hanum = hanum;
3588             wait_index = (int)IStatus;
3589         }
3590
3591         if (IStatus == ASYNCINDEX) {
3592             TRACE2(("gdth_interrupt() async. event\n"));
3593             gdth_async_event(hanum);
3594             if (!gdth_polling)
3595                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3596             gdth_next(hanum);
3597             return IRQ_HANDLED;
3598         }
3599
3600         if (IStatus == SPEZINDEX) {
3601             TRACE2(("Service unknown or not initialized !\n"));
3602             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3603             ha->dvr.eu.driver.ionode = hanum;
3604             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3605             if (!gdth_polling)
3606                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3607             return IRQ_HANDLED;
3608         }
3609         scp     = ha->cmd_tab[IStatus-2].cmnd;
3610         Service = ha->cmd_tab[IStatus-2].service;
3611         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3612         if (scp == UNUSED_CMND) {
3613             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3614             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3615             ha->dvr.eu.driver.ionode = hanum;
3616             ha->dvr.eu.driver.index = IStatus;
3617             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3618             if (!gdth_polling)
3619                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3620             return IRQ_HANDLED;
3621         }
3622         if (scp == INTERNAL_CMND) {
3623             TRACE(("gdth_interrupt() answer to internal command\n"));
3624             if (!gdth_polling)
3625                 spin_unlock_irqrestore(&ha2->smp_lock, flags);
3626             return IRQ_HANDLED;
3627         }
3628
3629         TRACE(("gdth_interrupt() sync. status\n"));
3630         rval = gdth_sync_event(hanum,Service,IStatus,scp);
3631         if (!gdth_polling)
3632             spin_unlock_irqrestore(&ha2->smp_lock, flags);
3633         if (rval == 2) {
3634             gdth_putq(hanum,scp,scp->SCp.this_residual);
3635         } else if (rval == 1) {
3636             scp->scsi_done(scp);
3637         }
3638
3639 #ifdef INT_COAL
3640         if (coalesced) {
3641             /* go to the next status in the status buffer */
3642             ++pcs;
3643 #ifdef GDTH_STATISTICS
3644             ++act_int_coal;
3645             if (act_int_coal > max_int_coal) {
3646                 max_int_coal = act_int_coal;
3647                 printk("GDT: max_int_coal = %d\n",(ushort)max_int_coal);
3648             }
3649 #endif
3650             /* see if there is another status */
3651             if (pcs->status == 0)
3652                 /* Stop the coalesce loop */
3653                 next = FALSE;
3654         }
3655     } while (next);
3656
3657     /* coalescing only for new GDT_PCIMPR controllers available */
3658     if (ha->type == GDT_PCIMPR && coalesced) {
3659         gdth_writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3660         gdth_writeb(0, &dp6m_ptr->i960r.sema1_reg);
3661     }
3662 #endif
3663
3664     gdth_next(hanum);
3665     return IRQ_HANDLED;
3666 }
3667
3668 static int gdth_sync_event(int hanum,int service,unchar index,Scsi_Cmnd *scp)
3669 {
3670     register gdth_ha_str *ha;
3671     gdth_msg_str *msg;
3672     gdth_cmd_str *cmdp;
3673     unchar b, t;
3674
3675     ha   = HADATA(gdth_ctr_tab[hanum]);
3676     cmdp = ha->pccb;
3677     TRACE(("gdth_sync_event() serv %d status %d\n",
3678            service,ha->status));
3679
3680     if (service == SCREENSERVICE) {
3681         msg  = ha->pmsg;
3682         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3683                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3684         if (msg->msg_len > MSGLEN+1)
3685             msg->msg_len = MSGLEN+1;
3686         if (msg->msg_len)
3687             if (!(msg->msg_answer && msg->msg_ext)) {
3688                 msg->msg_text[msg->msg_len] = '\0';
3689                 printk("%s",msg->msg_text);
3690             }
3691
3692         if (msg->msg_ext && !msg->msg_answer) {
3693             while (gdth_test_busy(hanum))
3694                 gdth_delay(0);
3695             cmdp->Service       = SCREENSERVICE;
3696             cmdp->RequestBuffer = SCREEN_CMND;
3697             gdth_get_cmd_index(hanum);
3698             gdth_set_sema0(hanum);
3699             cmdp->OpCode        = GDT_READ;
3700             cmdp->BoardNode     = LOCALBOARD;
3701             cmdp->u.screen.reserved  = 0;
3702             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3703             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3704             ha->cmd_offs_dpmem = 0;
3705             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3706                 + sizeof(ulong64);
3707             ha->cmd_cnt = 0;
3708             gdth_copy_command(hanum);
3709             gdth_release_event(hanum);
3710             return 0;
3711         }
3712
3713         if (msg->msg_answer && msg->msg_alen) {
3714             /* default answers (getchar() not possible) */
3715             if (msg->msg_alen == 1) {
3716                 msg->msg_alen = 0;
3717                 msg->msg_len = 1;
3718                 msg->msg_text[0] = 0;
3719             } else {
3720                 msg->msg_alen -= 2;
3721                 msg->msg_len = 2;
3722                 msg->msg_text[0] = 1;
3723                 msg->msg_text[1] = 0;
3724             }
3725             msg->msg_ext    = 0;
3726             msg->msg_answer = 0;
3727             while (gdth_test_busy(hanum))
3728                 gdth_delay(0);
3729             cmdp->Service       = SCREENSERVICE;
3730             cmdp->RequestBuffer = SCREEN_CMND;
3731             gdth_get_cmd_index(hanum);
3732             gdth_set_sema0(hanum);
3733             cmdp->OpCode        = GDT_WRITE;
3734             cmdp->BoardNode     = LOCALBOARD;
3735             cmdp->u.screen.reserved  = 0;
3736             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3737             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3738             ha->cmd_offs_dpmem = 0;
3739             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3740                 + sizeof(ulong64);
3741             ha->cmd_cnt = 0;
3742             gdth_copy_command(hanum);
3743             gdth_release_event(hanum);
3744             return 0;
3745         }
3746         printk("\n");
3747
3748     } else {
3749         b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
3750         t = scp->device->id;
3751         if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3752             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3753         }
3754         /* cache or raw service */
3755         if (ha->status == S_BSY) {
3756             TRACE2(("Controller busy -> retry !\n"));
3757             if (scp->SCp.sent_command == GDT_MOUNT)
3758                 scp->SCp.sent_command = GDT_CLUST_INFO;
3759             /* retry */
3760             return 2;
3761         }
3762         if (scp->SCp.Status == GDTH_MAP_SG)
3763             pci_unmap_sg(ha->pdev,scp->request_buffer,
3764                          scp->use_sg,scp->SCp.Message);
3765         else if (scp->SCp.Status == GDTH_MAP_SINGLE)
3766             pci_unmap_page(ha->pdev,scp->SCp.dma_handle,
3767                            scp->request_bufflen,scp->SCp.Message);
3768         if (scp->SCp.buffer) {
3769             dma_addr_t addr;
3770             addr = (dma_addr_t)*(ulong32 *)&scp->SCp.buffer;
3771             if (scp->host_scribble)
3772                 addr += (dma_addr_t)
3773                     ((ulong64)(*(ulong32 *)&scp->host_scribble) << 32);
3774             pci_unmap_page(ha->pdev,addr,16,PCI_DMA_FROMDEVICE);
3775         }
3776
3777         if (ha->status == S_OK) {
3778             scp->SCp.Status = S_OK;
3779             scp->SCp.Message = ha->info;
3780             if (scp->SCp.sent_command != -1) {
3781                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3782                         scp->SCp.sent_command));
3783                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3784                 if (scp->SCp.sent_command == GDT_CLUST_INFO) {
3785                     ha->hdr[t].cluster_type = (unchar)ha->info;
3786                     if (!(ha->hdr[t].cluster_type &
3787                         CLUSTER_MOUNTED)) {
3788                         /* NOT MOUNTED -> MOUNT */
3789                         scp->SCp.sent_command = GDT_MOUNT;
3790                         if (ha->hdr[t].cluster_type &
3791                             CLUSTER_RESERVED) {
3792                             /* cluster drive RESERVED (on the other node) */
3793                             scp->SCp.phase = -2;      /* reservation conflict */
3794                         }
3795                     } else {
3796                         scp->SCp.sent_command = -1;
3797                     }
3798                 } else {
3799                     if (scp->SCp.sent_command == GDT_MOUNT) {
3800                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3801                         ha->hdr[t].media_changed = TRUE;
3802                     } else if (scp->SCp.sent_command == GDT_UNMOUNT) {
3803                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3804                         ha->hdr[t].media_changed = TRUE;
3805                     }
3806                     scp->SCp.sent_command = -1;
3807                 }
3808                 /* retry */
3809                 scp->SCp.this_residual = HIGH_PRI;
3810                 return 2;
3811             } else {
3812                 /* RESERVE/RELEASE ? */
3813                 if (scp->cmnd[0] == RESERVE) {
3814                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3815                 } else if (scp->cmnd[0] == RELEASE) {
3816                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3817                 }
3818                 scp->result = DID_OK << 16;
3819                 scp->sense_buffer[0] = 0;
3820             }
3821         } else {
3822             scp->SCp.Status = ha->status;
3823             scp->SCp.Message = ha->info;
3824
3825             if (scp->SCp.sent_command != -1) {
3826                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3827                         scp->SCp.sent_command, ha->status));
3828                 if (scp->SCp.sent_command == GDT_SCAN_START ||
3829                     scp->SCp.sent_command == GDT_SCAN_END) {
3830                     scp->SCp.sent_command = -1;
3831                     /* retry */
3832                     scp->SCp.this_residual = HIGH_PRI;
3833                     return 2;
3834                 }
3835                 memset((char*)scp->sense_buffer,0,16);
3836                 scp->sense_buffer[0] = 0x70;
3837                 scp->sense_buffer[2] = NOT_READY;
3838                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3839             } else if (service == CACHESERVICE) {
3840                 if (ha->status == S_CACHE_UNKNOWN &&
3841                     (ha->hdr[t].cluster_type &
3842                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3843                     /* bus reset -> force GDT_CLUST_INFO */
3844                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3845                 }
3846                 memset((char*)scp->sense_buffer,0,16);
3847                 if (ha->status == (ushort)S_CACHE_RESERV) {
3848                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3849                 } else {
3850                     scp->sense_buffer[0] = 0x70;
3851                     scp->sense_buffer[2] = NOT_READY;
3852                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3853                 }
3854                 if (!IS_GDTH_INTERNAL_CMD(scp)) {
3855                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3856                     ha->dvr.eu.sync.ionode  = hanum;
3857                     ha->dvr.eu.sync.service = service;
3858                     ha->dvr.eu.sync.status  = ha->status;
3859                     ha->dvr.eu.sync.info    = ha->info;
3860                     ha->dvr.eu.sync.hostdrive = t;
3861                     if (ha->status >= 0x8000)
3862                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3863                     else
3864                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3865                 }
3866             } else {
3867                 /* sense buffer filled from controller firmware (DMA) */
3868                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3869                     scp->result = DID_BAD_TARGET << 16;
3870                 } else {
3871                     scp->result = (DID_OK << 16) | ha->info;
3872                 }
3873             }
3874         }
3875         if (!scp->SCp.have_data_in)
3876             scp->SCp.have_data_in++;
3877         else
3878             return 1;
3879     }
3880
3881     return 0;
3882 }
3883
3884 static char *async_cache_tab[] = {
3885 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3886         "GDT HA %u, service %u, async. status %u/%lu unknown",
3887 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3888         "GDT HA %u, service %u, async. status %u/%lu unknown",
3889 /* 2*/  "\005\000\002\006\004"
3890         "GDT HA %u, Host Drive %lu not ready",
3891 /* 3*/  "\005\000\002\006\004"
3892         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3893 /* 4*/  "\005\000\002\006\004"
3894         "GDT HA %u, mirror update on Host Drive %lu failed",
3895 /* 5*/  "\005\000\002\006\004"
3896         "GDT HA %u, Mirror Drive %lu failed",
3897 /* 6*/  "\005\000\002\006\004"
3898         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3899 /* 7*/  "\005\000\002\006\004"
3900         "GDT HA %u, Host Drive %lu write protected",
3901 /* 8*/  "\005\000\002\006\004"
3902         "GDT HA %u, media changed in Host Drive %lu",
3903 /* 9*/  "\005\000\002\006\004"
3904         "GDT HA %u, Host Drive %lu is offline",
3905 /*10*/  "\005\000\002\006\004"
3906         "GDT HA %u, media change of Mirror Drive %lu",
3907 /*11*/  "\005\000\002\006\004"
3908         "GDT HA %u, Mirror Drive %lu is write protected",
3909 /*12*/  "\005\000\002\006\004"
3910         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3911 /*13*/  "\007\000\002\006\002\010\002"
3912         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3913 /*14*/  "\005\000\002\006\002"
3914         "GDT HA %u, Array Drive %u: FAIL state entered",
3915 /*15*/  "\005\000\002\006\002"
3916         "GDT HA %u, Array Drive %u: error",
3917 /*16*/  "\007\000\002\006\002\010\002"
3918         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3919 /*17*/  "\005\000\002\006\002"
3920         "GDT HA %u, Array Drive %u: parity build failed",
3921 /*18*/  "\005\000\002\006\002"
3922         "GDT HA %u, Array Drive %u: drive rebuild failed",
3923 /*19*/  "\005\000\002\010\002"
3924         "GDT HA %u, Test of Hot Fix %u failed",
3925 /*20*/  "\005\000\002\006\002"
3926         "GDT HA %u, Array Drive %u: drive build finished successfully",
3927 /*21*/  "\005\000\002\006\002"
3928         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3929 /*22*/  "\007\000\002\006\002\010\002"
3930         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3931 /*23*/  "\005\000\002\006\002"
3932         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3933 /*24*/  "\005\000\002\010\002"
3934         "GDT HA %u, mirror update on Cache Drive %u completed",
3935 /*25*/  "\005\000\002\010\002"
3936         "GDT HA %u, mirror update on Cache Drive %lu failed",
3937 /*26*/  "\005\000\002\006\002"
3938         "GDT HA %u, Array Drive %u: drive rebuild started",
3939 /*27*/  "\005\000\002\012\001"
3940         "GDT HA %u, Fault bus %u: SHELF OK detected",
3941 /*28*/  "\005\000\002\012\001"
3942         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3943 /*29*/  "\007\000\002\012\001\013\001"
3944         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3945 /*30*/  "\007\000\002\012\001\013\001"
3946         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3947 /*31*/  "\007\000\002\012\001\013\001"
3948         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3949 /*32*/  "\007\000\002\012\001\013\001"
3950         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3951 /*33*/  "\007\000\002\012\001\013\001"
3952         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3953 /*34*/  "\011\000\002\012\001\013\001\006\004"
3954         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3955 /*35*/  "\007\000\002\012\001\013\001"
3956         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3957 /*36*/  "\007\000\002\012\001\013\001"
3958         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3959 /*37*/  "\007\000\002\012\001\006\004"
3960         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3961 /*38*/  "\007\000\002\012\001\013\001"
3962         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3963 /*39*/  "\007\000\002\012\001\013\001"
3964         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3965 /*40*/  "\007\000\002\012\001\013\001"
3966         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3967 /*41*/  "\007\000\002\012\001\013\001"
3968         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3969 /*42*/  "\005\000\002\006\002"
3970         "GDT HA %u, Array Drive %u: drive build started",
3971 /*43*/  "\003\000\002"
3972         "GDT HA %u, DRAM parity error detected",
3973 /*44*/  "\005\000\002\006\002"
3974         "GDT HA %u, Mirror Drive %u: update started",
3975 /*45*/  "\007\000\002\006\002\010\002"
3976         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3977 /*46*/  "\005\000\002\006\002"
3978         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3979 /*47*/  "\005\000\002\006\002"
3980         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3981 /*48*/  "\005\000\002\006\002"
3982         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3983 /*49*/  "\005\000\002\006\002"
3984         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3985 /*50*/  "\007\000\002\012\001\013\001"
3986         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3987 /*51*/  "\005\000\002\006\002"
3988         "GDT HA %u, Array Drive %u: expand started",
3989 /*52*/  "\005\000\002\006\002"
3990         "GDT HA %u, Array Drive %u: expand finished successfully",
3991 /*53*/  "\005\000\002\006\002"
3992         "GDT HA %u, Array Drive %u: expand failed",
3993 /*54*/  "\003\000\002"
3994         "GDT HA %u, CPU temperature critical",
3995 /*55*/  "\003\000\002"
3996         "GDT HA %u, CPU temperature OK",
3997 /*56*/  "\005\000\002\006\004"
3998         "GDT HA %u, Host drive %lu created",
3999 /*57*/  "\005\000\002\006\002"
4000         "GDT HA %u, Array Drive %u: expand restarted",
4001 /*58*/  "\005\000\002\006\002"
4002         "GDT HA %u, Array Drive %u: expand stopped",
4003 /*59*/  "\005\000\002\010\002"
4004         "GDT HA %u, Mirror Drive %u: drive build quited",
4005 /*60*/  "\005\000\002\006\002"
4006         "GDT HA %u, Array Drive %u: parity build quited",
4007 /*61*/  "\005\000\002\006\002"
4008         "GDT HA %u, Array Drive %u: drive rebuild quited",
4009 /*62*/  "\005\000\002\006\002"
4010         "GDT HA %u, Array Drive %u: parity verify started",
4011 /*63*/  "\005\000\002\006\002"
4012         "GDT HA %u, Array Drive %u: parity verify done",
4013 /*64*/  "\005\000\002\006\002"
4014         "GDT HA %u, Array Drive %u: parity verify failed",
4015 /*65*/  "\005\000\002\006\002"
4016         "GDT HA %u, Array Drive %u: parity error detected",
4017 /*66*/  "\005\000\002\006\002"
4018         "GDT HA %u, Array Drive %u: parity verify quited",
4019 /*67*/  "\005\000\002\006\002"
4020         "GDT HA %u, Host Drive %u reserved",
4021 /*68*/  "\005\000\002\006\002"
4022         "GDT HA %u, Host Drive %u mounted and released",
4023 /*69*/  "\005\000\002\006\002"
4024         "GDT HA %u, Host Drive %u released",
4025 /*70*/  "\003\000\002"
4026         "GDT HA %u, DRAM error detected and corrected with ECC",
4027 /*71*/  "\003\000\002"
4028         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
4029 /*72*/  "\011\000\002\012\001\013\001\014\001"
4030         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
4031 /*73*/  "\005\000\002\006\002"
4032         "GDT HA %u, Host drive %u resetted locally",
4033 /*74*/  "\005\000\002\006\002"
4034         "GDT HA %u, Host drive %u resetted remotely",
4035 /*75*/  "\003\000\002"
4036         "GDT HA %u, async. status 75 unknown",
4037 };
4038
4039
4040 static int gdth_async_event(int hanum)
4041 {
4042     gdth_ha_str *ha;
4043     gdth_cmd_str *cmdp;
4044     int cmd_index;
4045
4046     ha  = HADATA(gdth_ctr_tab[hanum]);
4047     cmdp= ha->pccb;
4048     TRACE2(("gdth_async_event() ha %d serv %d\n",
4049             hanum,ha->service));
4050
4051     if (ha->service == SCREENSERVICE) {
4052         if (ha->status == MSG_REQUEST) {
4053             while (gdth_test_busy(hanum))
4054                 gdth_delay(0);
4055             cmdp->Service       = SCREENSERVICE;
4056             cmdp->RequestBuffer = SCREEN_CMND;
4057             cmd_index = gdth_get_cmd_index(hanum);
4058             gdth_set_sema0(hanum);
4059             cmdp->OpCode        = GDT_READ;
4060             cmdp->BoardNode     = LOCALBOARD;
4061             cmdp->u.screen.reserved  = 0;
4062             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
4063             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
4064             ha->cmd_offs_dpmem = 0;
4065             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
4066                 + sizeof(ulong64);
4067             ha->cmd_cnt = 0;
4068             gdth_copy_command(hanum);
4069             if (ha->type == GDT_EISA)
4070                 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
4071             else if (ha->type == GDT_ISA)
4072                 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
4073             else
4074                 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
4075                        (ushort)((ha->brd_phys>>3)&0x1f));
4076             gdth_release_event(hanum);
4077         }
4078
4079     } else {
4080         if (ha->type == GDT_PCIMPR &&
4081             (ha->fw_vers & 0xff) >= 0x1a) {
4082             ha->dvr.size = 0;
4083             ha->dvr.eu.async.ionode = hanum;
4084             ha->dvr.eu.async.status  = ha->status;
4085             /* severity and event_string already set! */
4086         } else {
4087             ha->dvr.size = sizeof(ha->dvr.eu.async);
4088             ha->dvr.eu.async.ionode   = hanum;
4089             ha->dvr.eu.async.service = ha->service;
4090             ha->dvr.eu.async.status  = ha->status;
4091             ha->dvr.eu.async.info    = ha->info;
4092             *(ulong32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
4093         }
4094         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
4095         gdth_log_event( &ha->dvr, NULL );
4096
4097         /* new host drive from expand? */
4098         if (ha->service == CACHESERVICE && ha->status == 56) {
4099             TRACE2(("gdth_async_event(): new host drive %d created\n",
4100                     (ushort)ha->info));
4101             /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
4102         }
4103     }
4104     return 1;
4105 }
4106
4107 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
4108 {
4109     gdth_stackframe stack;
4110     char *f = NULL;
4111     int i,j;
4112
4113     TRACE2(("gdth_log_event()\n"));
4114     if (dvr->size == 0) {
4115         if (buffer == NULL) {
4116             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
4117         } else {
4118             sprintf(buffer,"Adapter %d: %s\n",
4119                 dvr->eu.async.ionode,dvr->event_string);
4120         }
4121     } else if (dvr->eu.async.service == CACHESERVICE &&
4122         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
4123         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
4124                 dvr->eu.async.status));
4125
4126         f = async_cache_tab[dvr->eu.async.status];
4127
4128         /* i: parameter to push, j: stack element to fill */
4129         for (j=0,i=1; i < f[0]; i+=2) {
4130             switch (f[i+1]) {
4131               case 4:
4132                 stack.b[j++] = *(ulong32*)&dvr->eu.stream[(int)f[i]];
4133                 break;
4134               case 2:
4135                 stack.b[j++] = *(ushort*)&dvr->eu.stream[(int)f[i]];
4136                 break;
4137               case 1:
4138                 stack.b[j++] = *(unchar*)&dvr->eu.stream[(int)f[i]];
4139                 break;
4140               default:
4141                 break;
4142             }
4143         }
4144
4145         if (buffer == NULL) {
4146             printk(&f[(int)f[0]],stack);
4147             printk("\n");
4148         } else {
4149             sprintf(buffer,&f[(int)f[0]],stack);
4150         }
4151
4152     } else {
4153         if (buffer == NULL) {
4154             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
4155                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4156         } else {
4157             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
4158                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
4159         }
4160     }
4161 }
4162
4163 #ifdef GDTH_STATISTICS
4164 static void gdth_timeout(ulong data)
4165 {
4166     ulong32 i;
4167     Scsi_Cmnd *nscp;
4168     gdth_ha_str *ha;
4169     ulong flags;
4170     int hanum = 0;
4171
4172     ha = HADATA(gdth_ctr_tab[hanum]);
4173     spin_lock_irqsave(&ha->smp_lock, flags);
4174
4175     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
4176         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
4177             ++act_stats;
4178
4179     for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
4180         ++act_rq;
4181
4182     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
4183             act_ints, act_ios, act_stats, act_rq));
4184     act_ints = act_ios = 0;
4185
4186     gdth_timer.expires = jiffies + 30 * HZ;
4187     add_timer(&gdth_timer);
4188     spin_unlock_irqrestore(&ha->smp_lock, flags);
4189 }
4190 #endif
4191
4192 static void __init internal_setup(char *str,int *ints)
4193 {
4194     int i, argc;
4195     char *cur_str, *argv;
4196
4197     TRACE2(("internal_setup() str %s ints[0] %d\n",
4198             str ? str:"NULL", ints ? ints[0]:0));
4199
4200     /* read irq[] from ints[] */
4201     if (ints) {
4202         argc = ints[0];
4203         if (argc > 0) {
4204             if (argc > MAXHA)
4205                 argc = MAXHA;
4206             for (i = 0; i < argc; ++i)
4207                 irq[i] = ints[i+1];
4208         }
4209     }
4210
4211     /* analyse string */
4212     argv = str;
4213     while (argv && (cur_str = strchr(argv, ':'))) {
4214         int val = 0, c = *++cur_str;
4215
4216         if (c == 'n' || c == 'N')
4217             val = 0;
4218         else if (c == 'y' || c == 'Y')
4219             val = 1;
4220         else
4221             val = (int)simple_strtoul(cur_str, NULL, 0);
4222
4223         if (!strncmp(argv, "disable:", 8))
4224             disable = val;
4225         else if (!strncmp(argv, "reserve_mode:", 13))
4226             reserve_mode = val;
4227         else if (!strncmp(argv, "reverse_scan:", 13))
4228             reverse_scan = val;
4229         else if (!strncmp(argv, "hdr_channel:", 12))
4230             hdr_channel = val;
4231         else if (!strncmp(argv, "max_ids:", 8))
4232             max_ids = val;
4233         else if (!strncmp(argv, "rescan:", 7))
4234             rescan = val;
4235         else if (!strncmp(argv, "virt_ctr:", 9))
4236             virt_ctr = val;
4237         else if (!strncmp(argv, "shared_access:", 14))
4238             shared_access = val;
4239         else if (!strncmp(argv, "probe_eisa_isa:", 15))
4240             probe_eisa_isa = val;
4241         else if (!strncmp(argv, "reserve_list:", 13)) {
4242             reserve_list[0] = val;
4243             for (i = 1; i < MAX_RES_ARGS; i++) {
4244                 cur_str = strchr(cur_str, ',');
4245                 if (!cur_str)
4246                     break;
4247                 if (!isdigit((int)*++cur_str)) {
4248                     --cur_str;
4249                     break;
4250                 }
4251                 reserve_list[i] =
4252                     (int)simple_strtoul(cur_str, NULL, 0);
4253             }
4254             if (!cur_str)
4255                 break;
4256             argv = ++cur_str;
4257             continue;
4258         }
4259
4260         if ((argv = strchr(argv, ',')))
4261             ++argv;
4262     }
4263 }
4264
4265 int __init option_setup(char *str)
4266 {
4267     int ints[MAXHA];
4268     char *cur = str;
4269     int i = 1;
4270
4271     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
4272
4273     while (cur && isdigit(*cur) && i <= MAXHA) {
4274         ints[i++] = simple_strtoul(cur, NULL, 0);
4275         if ((cur = strchr(cur, ',')) != NULL) cur++;
4276     }
4277
4278     ints[0] = i - 1;
4279     internal_setup(cur, ints);
4280     return 1;
4281 }
4282
4283 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4284 static int __init gdth_detect(struct scsi_host_template *shtp)
4285 #else
4286 static int __init gdth_detect(Scsi_Host_Template *shtp)
4287 #endif
4288 {
4289     struct Scsi_Host *shp;
4290     gdth_pci_str pcistr[MAXHA];
4291     gdth_ha_str *ha;
4292     ulong32 isa_bios;
4293     ushort eisa_slot;
4294     int i,hanum,cnt,ctr,err;
4295     unchar b;
4296
4297
4298 #ifdef DEBUG_GDTH
4299     printk("GDT: This driver contains debugging information !! Trace level = %d\n",
4300         DebugState);
4301     printk("     Destination of debugging information: ");
4302 #ifdef __SERIAL__
4303 #ifdef __COM2__
4304     printk("Serial port COM2\n");
4305 #else
4306     printk("Serial port COM1\n");
4307 #endif
4308 #else
4309     printk("Console\n");
4310 #endif
4311     gdth_delay(3000);
4312 #endif
4313
4314     TRACE(("gdth_detect()\n"));
4315
4316     if (disable) {
4317         printk("GDT-HA: Controller driver disabled from command line !\n");
4318         return 0;
4319     }
4320
4321     printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",GDTH_VERSION_STR);
4322     /* initializations */
4323     gdth_polling = TRUE; b = 0;
4324     gdth_clear_events();
4325
4326     /* As default we do not probe for EISA or ISA controllers */
4327     if (probe_eisa_isa) {
4328         /* scanning for controllers, at first: ISA controller */
4329         for (isa_bios=0xc8000UL; isa_bios<=0xd8000UL; isa_bios+=0x8000UL) {
4330             dma_addr_t scratch_dma_handle;
4331             scratch_dma_handle = 0;
4332
4333             if (gdth_ctr_count >= MAXHA)
4334                 break;
4335             if (gdth_search_isa(isa_bios)) {        /* controller found */
4336                 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4337                 if (shp == NULL)
4338                     continue;
4339
4340                 ha = HADATA(shp);
4341                 if (!gdth_init_isa(isa_bios,ha)) {
4342                     scsi_unregister(shp);
4343                     continue;
4344                 }
4345 #ifdef __ia64__
4346                 break;
4347 #else
4348                 /* controller found and initialized */
4349                 printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4350                        isa_bios,ha->irq,ha->drq);
4351
4352                 if (request_irq(ha->irq,gdth_interrupt,IRQF_DISABLED,"gdth",ha)) {
4353                     printk("GDT-ISA: Unable to allocate IRQ\n");
4354                     scsi_unregister(shp);
4355                     continue;
4356                 }
4357                 if (request_dma(ha->drq,"gdth")) {
4358                     printk("GDT-ISA: Unable to allocate DMA channel\n");
4359                     free_irq(ha->irq,ha);
4360                     scsi_unregister(shp);
4361                     continue;
4362                 }
4363                 set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4364                 enable_dma(ha->drq);
4365                 shp->unchecked_isa_dma = 1;
4366                 shp->irq = ha->irq;
4367                 shp->dma_channel = ha->drq;
4368                 hanum = gdth_ctr_count;
4369                 gdth_ctr_tab[gdth_ctr_count++] = shp;
4370                 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4371
4372                 NUMDATA(shp)->hanum = (ushort)hanum;
4373                 NUMDATA(shp)->busnum= 0;
4374
4375                 ha->pccb = CMDDATA(shp);
4376                 ha->ccb_phys = 0L;
4377                 ha->pdev = NULL;
4378                 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4379                                                     &scratch_dma_handle);
4380                 ha->scratch_phys = scratch_dma_handle;
4381                 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4382                                                 &scratch_dma_handle);
4383                 ha->msg_phys = scratch_dma_handle;
4384 #ifdef INT_COAL
4385                 ha->coal_stat = (gdth_coal_status *)
4386                     pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4387                         MAXOFFSETS, &scratch_dma_handle);
4388                 ha->coal_stat_phys = scratch_dma_handle;
4389 #endif
4390
4391                 ha->scratch_busy = FALSE;
4392                 ha->req_first = NULL;
4393                 ha->tid_cnt = MAX_HDRIVES;
4394                 if (max_ids > 0 && max_ids < ha->tid_cnt)
4395                     ha->tid_cnt = max_ids;
4396                 for (i=0; i<GDTH_MAXCMDS; ++i)
4397                     ha->cmd_tab[i].cmnd = UNUSED_CMND;
4398                 ha->scan_mode = rescan ? 0x10 : 0;
4399
4400                 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4401                     !gdth_search_drives(hanum)) {
4402                     printk("GDT-ISA: Error during device scan\n");
4403                     --gdth_ctr_count;
4404                     --gdth_ctr_vcount;
4405
4406 #ifdef INT_COAL
4407                     if (ha->coal_stat)
4408                         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4409                                             MAXOFFSETS, ha->coal_stat,
4410                                             ha->coal_stat_phys);
4411 #endif
4412                     if (ha->pscratch)
4413                         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4414                                             ha->pscratch, ha->scratch_phys);
4415                     if (ha->pmsg)
4416                         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4417                                             ha->pmsg, ha->msg_phys);
4418
4419                     free_irq(ha->irq,ha);
4420                     scsi_unregister(shp);
4421                     continue;
4422                 }
4423                 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4424                     hdr_channel = ha->bus_cnt;
4425                 ha->virt_bus = hdr_channel;
4426
4427 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) && \
4428     LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4429                 shp->highmem_io  = 0;
4430 #endif
4431                 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4432                     shp->max_cmd_len = 16;
4433
4434                 shp->max_id      = ha->tid_cnt;
4435                 shp->max_lun     = MAXLUN;
4436                 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4437                 if (virt_ctr) {
4438                     virt_ctr = 1;
4439                     /* register addit. SCSI channels as virtual controllers */
4440                     for (b = 1; b < ha->bus_cnt + 1; ++b) {
4441                         shp = scsi_register(shtp,sizeof(gdth_num_str));
4442                         shp->unchecked_isa_dma = 1;
4443                         shp->irq = ha->irq;
4444                         shp->dma_channel = ha->drq;
4445                         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4446                         NUMDATA(shp)->hanum = (ushort)hanum;
4447                         NUMDATA(shp)->busnum = b;
4448                     }
4449                 }
4450
4451                 spin_lock_init(&ha->smp_lock);
4452                 gdth_enable_int(hanum);
4453 #endif /* !__ia64__ */
4454             }
4455         }
4456
4457         /* scanning for EISA controllers */
4458         for (eisa_slot=0x1000; eisa_slot<=0x8000; eisa_slot+=0x1000) {
4459             dma_addr_t scratch_dma_handle;
4460             scratch_dma_handle = 0;
4461
4462             if (gdth_ctr_count >= MAXHA)
4463                 break;
4464             if (gdth_search_eisa(eisa_slot)) {      /* controller found */
4465                 shp = scsi_register(shtp,sizeof(gdth_ext_str));
4466                 if (shp == NULL)
4467                     continue;
4468
4469                 ha = HADATA(shp);
4470                 if (!gdth_init_eisa(eisa_slot,ha)) {
4471                     scsi_unregister(shp);
4472                     continue;
4473                 }
4474                 /* controller found and initialized */
4475                 printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4476                        eisa_slot>>12,ha->irq);
4477
4478                 if (request_irq(ha->irq,gdth_interrupt,IRQF_DISABLED,"gdth",ha)) {
4479                     printk("GDT-EISA: Unable to allocate IRQ\n");
4480                     scsi_unregister(shp);
4481                     continue;
4482                 }
4483                 shp->unchecked_isa_dma = 0;
4484                 shp->irq = ha->irq;
4485                 shp->dma_channel = 0xff;
4486                 hanum = gdth_ctr_count;
4487                 gdth_ctr_tab[gdth_ctr_count++] = shp;
4488                 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4489
4490                 NUMDATA(shp)->hanum = (ushort)hanum;
4491                 NUMDATA(shp)->busnum= 0;
4492                 TRACE2(("EISA detect Bus 0: hanum %d\n",
4493                         NUMDATA(shp)->hanum));
4494
4495                 ha->pccb = CMDDATA(shp);
4496                 ha->ccb_phys = 0L;
4497
4498                 ha->pdev = NULL;
4499                 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4500                                                     &scratch_dma_handle);
4501                 ha->scratch_phys = scratch_dma_handle;
4502                 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4503                                                 &scratch_dma_handle);
4504                 ha->msg_phys = scratch_dma_handle;
4505 #ifdef INT_COAL
4506                 ha->coal_stat = (gdth_coal_status *)
4507                     pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4508                                          MAXOFFSETS, &scratch_dma_handle);
4509                 ha->coal_stat_phys = scratch_dma_handle;
4510 #endif
4511                 ha->ccb_phys =
4512                     pci_map_single(ha->pdev,ha->pccb,
4513                                    sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4514                 ha->scratch_busy = FALSE;
4515                 ha->req_first = NULL;
4516                 ha->tid_cnt = MAX_HDRIVES;
4517                 if (max_ids > 0 && max_ids < ha->tid_cnt)
4518                     ha->tid_cnt = max_ids;
4519                 for (i=0; i<GDTH_MAXCMDS; ++i)
4520                     ha->cmd_tab[i].cmnd = UNUSED_CMND;
4521                 ha->scan_mode = rescan ? 0x10 : 0;
4522
4523                 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4524                     !gdth_search_drives(hanum)) {
4525                     printk("GDT-EISA: Error during device scan\n");
4526                     --gdth_ctr_count;
4527                     --gdth_ctr_vcount;
4528 #ifdef INT_COAL
4529                     if (ha->coal_stat)
4530                         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4531                                             MAXOFFSETS, ha->coal_stat,
4532                                             ha->coal_stat_phys);
4533 #endif
4534                     if (ha->pscratch)
4535                         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4536                                             ha->pscratch, ha->scratch_phys);
4537                     if (ha->pmsg)
4538                         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4539                                             ha->pmsg, ha->msg_phys);
4540                     if (ha->ccb_phys)
4541                         pci_unmap_single(ha->pdev,ha->ccb_phys,
4542                                         sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4543                     free_irq(ha->irq,ha);
4544                     scsi_unregister(shp);
4545                     continue;
4546                 }
4547                 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4548                     hdr_channel = ha->bus_cnt;
4549                 ha->virt_bus = hdr_channel;
4550
4551 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) && \
4552     LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4553                 shp->highmem_io  = 0;
4554 #endif
4555                 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4556                     shp->max_cmd_len = 16;
4557
4558                 shp->max_id      = ha->tid_cnt;
4559                 shp->max_lun     = MAXLUN;
4560                 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4561                 if (virt_ctr) {
4562                     virt_ctr = 1;
4563                     /* register addit. SCSI channels as virtual controllers */
4564                     for (b = 1; b < ha->bus_cnt + 1; ++b) {
4565                         shp = scsi_register(shtp,sizeof(gdth_num_str));
4566                         shp->unchecked_isa_dma = 0;
4567                         shp->irq = ha->irq;
4568                         shp->dma_channel = 0xff;
4569                         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4570                         NUMDATA(shp)->hanum = (ushort)hanum;
4571                         NUMDATA(shp)->busnum = b;
4572                     }
4573                 }
4574
4575                 spin_lock_init(&ha->smp_lock);
4576                 gdth_enable_int(hanum);
4577             }
4578         }
4579     }
4580
4581     /* scanning for PCI controllers */
4582     cnt = gdth_search_pci(pcistr);
4583     printk("GDT-HA: Found %d PCI Storage RAID Controllers\n",cnt);
4584     gdth_sort_pci(pcistr,cnt);
4585     for (ctr = 0; ctr < cnt; ++ctr) {
4586         dma_addr_t scratch_dma_handle;
4587         scratch_dma_handle = 0;
4588
4589         if (gdth_ctr_count >= MAXHA)
4590             break;
4591         shp = scsi_register(shtp,sizeof(gdth_ext_str));
4592         if (shp == NULL)
4593             continue;
4594
4595         ha = HADATA(shp);
4596         if (!gdth_init_pci(&pcistr[ctr],ha)) {
4597             scsi_unregister(shp);
4598             continue;
4599         }
4600         /* controller found and initialized */
4601         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4602                pcistr[ctr].pdev->bus->number,
4603                PCI_SLOT(pcistr[ctr].pdev->devfn), ha->irq);
4604
4605         if (request_irq(ha->irq, gdth_interrupt,
4606                         IRQF_DISABLED|IRQF_SHARED, "gdth", ha))
4607         {
4608             printk("GDT-PCI: Unable to allocate IRQ\n");
4609             scsi_unregister(shp);
4610             continue;
4611         }
4612         shp->unchecked_isa_dma = 0;
4613         shp->irq = ha->irq;
4614         shp->dma_channel = 0xff;
4615         hanum = gdth_ctr_count;
4616         gdth_ctr_tab[gdth_ctr_count++] = shp;
4617         gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4618
4619         NUMDATA(shp)->hanum = (ushort)hanum;
4620         NUMDATA(shp)->busnum= 0;
4621
4622         ha->pccb = CMDDATA(shp);
4623         ha->ccb_phys = 0L;
4624
4625         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4626                                             &scratch_dma_handle);
4627         ha->scratch_phys = scratch_dma_handle;
4628         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4629                                         &scratch_dma_handle);
4630         ha->msg_phys = scratch_dma_handle;
4631 #ifdef INT_COAL
4632         ha->coal_stat = (gdth_coal_status *)
4633             pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4634                                  MAXOFFSETS, &scratch_dma_handle);
4635         ha->coal_stat_phys = scratch_dma_handle;
4636 #endif
4637         ha->scratch_busy = FALSE;
4638         ha->req_first = NULL;
4639         ha->tid_cnt = pcistr[ctr].pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
4640         if (max_ids > 0 && max_ids < ha->tid_cnt)
4641             ha->tid_cnt = max_ids;
4642         for (i=0; i<GDTH_MAXCMDS; ++i)
4643             ha->cmd_tab[i].cmnd = UNUSED_CMND;
4644         ha->scan_mode = rescan ? 0x10 : 0;
4645
4646         err = FALSE;
4647         if (ha->pscratch == NULL || ha->pmsg == NULL ||
4648             !gdth_search_drives(hanum)) {
4649             err = TRUE;
4650         } else {
4651             if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4652                 hdr_channel = ha->bus_cnt;
4653             ha->virt_bus = hdr_channel;
4654
4655
4656 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
4657             scsi_set_pci_device(shp, pcistr[ctr].pdev);
4658 #endif
4659             if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat &GDT_64BIT)||
4660                 /* 64-bit DMA only supported from FW >= x.43 */
4661                 (!ha->dma64_support)) {
4662                 if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
4663                     printk(KERN_WARNING "GDT-PCI %d: Unable to set 32-bit DMA\n", hanum);
4664                     err = TRUE;
4665                 }
4666             } else {
4667                 shp->max_cmd_len = 16;
4668                 if (!pci_set_dma_mask(pcistr[ctr].pdev, DMA_64BIT_MASK)) {
4669                     printk("GDT-PCI %d: 64-bit DMA enabled\n", hanum);
4670                 } else if (pci_set_dma_mask(pcistr[ctr].pdev, DMA_32BIT_MASK)) {
4671                     printk(KERN_WARNING "GDT-PCI %d: Unable to set 64/32-bit DMA\n", hanum);
4672                     err = TRUE;
4673                 }
4674             }
4675         }
4676
4677         if (err) {
4678             printk("GDT-PCI %d: Error during device scan\n", hanum);
4679             --gdth_ctr_count;
4680             --gdth_ctr_vcount;
4681 #ifdef INT_COAL
4682             if (ha->coal_stat)
4683                 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4684                                     MAXOFFSETS, ha->coal_stat,
4685                                     ha->coal_stat_phys);
4686 #endif
4687             if (ha->pscratch)
4688                 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4689                                     ha->pscratch, ha->scratch_phys);
4690             if (ha->pmsg)
4691                 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4692                                     ha->pmsg, ha->msg_phys);
4693             free_irq(ha->irq,ha);
4694             scsi_unregister(shp);
4695             continue;
4696         }
4697
4698         shp->max_id      = ha->tid_cnt;
4699         shp->max_lun     = MAXLUN;
4700         shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4701         if (virt_ctr) {
4702             virt_ctr = 1;
4703             /* register addit. SCSI channels as virtual controllers */
4704             for (b = 1; b < ha->bus_cnt + 1; ++b) {
4705                 shp = scsi_register(shtp,sizeof(gdth_num_str));
4706                 shp->unchecked_isa_dma = 0;
4707                 shp->irq = ha->irq;
4708                 shp->dma_channel = 0xff;
4709                 gdth_ctr_vtab[gdth_ctr_vcount++] = shp;
4710                 NUMDATA(shp)->hanum = (ushort)hanum;
4711                 NUMDATA(shp)->busnum = b;
4712             }
4713         }
4714
4715         spin_lock_init(&ha->smp_lock);
4716         gdth_enable_int(hanum);
4717     }
4718
4719     TRACE2(("gdth_detect() %d controller detected\n",gdth_ctr_count));
4720     if (gdth_ctr_count > 0) {
4721 #ifdef GDTH_STATISTICS
4722         TRACE2(("gdth_detect(): Initializing timer !\n"));
4723         init_timer(&gdth_timer);
4724         gdth_timer.expires = jiffies + HZ;
4725         gdth_timer.data = 0L;
4726         gdth_timer.function = gdth_timeout;
4727         add_timer(&gdth_timer);
4728 #endif
4729         major = register_chrdev(0,"gdth",&gdth_fops);
4730         notifier_disabled = 0;
4731         register_reboot_notifier(&gdth_notifier);
4732     }
4733     gdth_polling = FALSE;
4734     return gdth_ctr_vcount;
4735 }
4736
4737 static int gdth_release(struct Scsi_Host *shp)
4738 {
4739     int hanum;
4740     gdth_ha_str *ha;
4741
4742     TRACE2(("gdth_release()\n"));
4743     if (NUMDATA(shp)->busnum == 0) {
4744         hanum = NUMDATA(shp)->hanum;
4745         ha    = HADATA(gdth_ctr_tab[hanum]);
4746         if (ha->sdev) {
4747             scsi_free_host_dev(ha->sdev);
4748             ha->sdev = NULL;
4749         }
4750         gdth_flush(hanum);
4751
4752         if (shp->irq) {
4753             free_irq(shp->irq,ha);
4754         }
4755 #ifndef __ia64__
4756         if (shp->dma_channel != 0xff) {
4757             free_dma(shp->dma_channel);
4758         }
4759 #endif
4760 #ifdef INT_COAL
4761         if (ha->coal_stat)
4762             pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4763                                 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
4764 #endif
4765         if (ha->pscratch)
4766             pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4767                                 ha->pscratch, ha->scratch_phys);
4768         if (ha->pmsg)
4769             pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4770                                 ha->pmsg, ha->msg_phys);
4771         if (ha->ccb_phys)
4772             pci_unmap_single(ha->pdev,ha->ccb_phys,
4773                              sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
4774         gdth_ctr_released++;
4775         TRACE2(("gdth_release(): HA %d of %d\n",
4776                 gdth_ctr_released, gdth_ctr_count));
4777
4778         if (gdth_ctr_released == gdth_ctr_count) {
4779 #ifdef GDTH_STATISTICS
4780             del_timer(&gdth_timer);
4781 #endif
4782             unregister_chrdev(major,"gdth");
4783             unregister_reboot_notifier(&gdth_notifier);
4784         }
4785     }
4786
4787     scsi_unregister(shp);
4788     return 0;
4789 }
4790
4791
4792 static const char *gdth_ctr_name(int hanum)
4793 {
4794     gdth_ha_str *ha;
4795
4796     TRACE2(("gdth_ctr_name()\n"));
4797
4798     ha    = HADATA(gdth_ctr_tab[hanum]);
4799
4800     if (ha->type == GDT_EISA) {
4801         switch (ha->stype) {
4802           case GDT3_ID:
4803             return("GDT3000/3020");
4804           case GDT3A_ID:
4805             return("GDT3000A/3020A/3050A");
4806           case GDT3B_ID:
4807             return("GDT3000B/3010A");
4808         }
4809     } else if (ha->type == GDT_ISA) {
4810         return("GDT2000/2020");
4811     } else if (ha->type == GDT_PCI) {
4812         switch (ha->pdev->device) {
4813           case PCI_DEVICE_ID_VORTEX_GDT60x0:
4814             return("GDT6000/6020/6050");
4815           case PCI_DEVICE_ID_VORTEX_GDT6000B:
4816             return("GDT6000B/6010");
4817         }
4818     }
4819     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
4820
4821     return("");
4822 }
4823
4824 static const char *gdth_info(struct Scsi_Host *shp)
4825 {
4826     int hanum;
4827     gdth_ha_str *ha;
4828
4829     TRACE2(("gdth_info()\n"));
4830     hanum = NUMDATA(shp)->hanum;
4831     ha    = HADATA(gdth_ctr_tab[hanum]);
4832
4833     return ((const char *)ha->binfo.type_string);
4834 }
4835
4836 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
4837 {
4838     int i, hanum;
4839     gdth_ha_str *ha;
4840     ulong flags;
4841     Scsi_Cmnd *cmnd;
4842     unchar b;
4843
4844     TRACE2(("gdth_eh_bus_reset()\n"));
4845
4846     hanum = NUMDATA(scp->device->host)->hanum;
4847     b = virt_ctr ? NUMDATA(scp->device->host)->busnum : scp->device->channel;
4848     ha    = HADATA(gdth_ctr_tab[hanum]);
4849
4850     /* clear command tab */
4851     spin_lock_irqsave(&ha->smp_lock, flags);
4852     for (i = 0; i < GDTH_MAXCMDS; ++i) {
4853         cmnd = ha->cmd_tab[i].cmnd;
4854         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
4855             ha->cmd_tab[i].cmnd = UNUSED_CMND;
4856     }
4857     spin_unlock_irqrestore(&ha->smp_lock, flags);
4858
4859     if (b == ha->virt_bus) {
4860         /* host drives */
4861         for (i = 0; i < MAX_HDRIVES; ++i) {
4862             if (ha->hdr[i].present) {
4863                 spin_lock_irqsave(&ha->smp_lock, flags);
4864                 gdth_polling = TRUE;
4865                 while (gdth_test_busy(hanum))
4866                     gdth_delay(0);
4867                 if (gdth_internal_cmd(hanum, CACHESERVICE,
4868                                       GDT_CLUST_RESET, i, 0, 0))
4869                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4870                 gdth_polling = FALSE;
4871                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4872             }
4873         }
4874     } else {
4875         /* raw devices */
4876         spin_lock_irqsave(&ha->smp_lock, flags);
4877         for (i = 0; i < MAXID; ++i)
4878             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4879         gdth_polling = TRUE;
4880         while (gdth_test_busy(hanum))
4881             gdth_delay(0);
4882         gdth_internal_cmd(hanum, SCSIRAWSERVICE, GDT_RESET_BUS,
4883                           BUS_L2P(ha,b), 0, 0);
4884         gdth_polling = FALSE;
4885         spin_unlock_irqrestore(&ha->smp_lock, flags);
4886     }
4887     return SUCCESS;
4888 }
4889
4890 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4891 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
4892 #else
4893 static int gdth_bios_param(Disk *disk,kdev_t dev,int *ip)
4894 #endif
4895 {
4896     unchar b, t;
4897     int hanum;
4898     gdth_ha_str *ha;
4899     struct scsi_device *sd;
4900     unsigned capacity;
4901
4902 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
4903     sd = sdev;
4904     capacity = cap;
4905 #else
4906     sd = disk->device;
4907     capacity = disk->capacity;
4908 #endif
4909     hanum = NUMDATA(sd->host)->hanum;
4910     b = virt_ctr ? NUMDATA(sd->host)->busnum : sd->channel;
4911     t = sd->id;
4912     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4913     ha = HADATA(gdth_ctr_tab[hanum]);
4914
4915     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4916         /* raw device or host drive without mapping information */
4917         TRACE2(("Evaluate mapping\n"));
4918         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
4919     } else {
4920         ip[0] = ha->hdr[t].heads;
4921         ip[1] = ha->hdr[t].secs;
4922         ip[2] = capacity / ip[0] / ip[1];
4923     }
4924
4925     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4926             ip[0],ip[1],ip[2]));
4927     return 0;
4928 }
4929
4930
4931 static int gdth_queuecommand(Scsi_Cmnd *scp,void (*done)(Scsi_Cmnd *))
4932 {
4933     int hanum;
4934     int priority;
4935
4936     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4937
4938     scp->scsi_done = (void *)done;
4939     scp->SCp.have_data_in = 1;
4940     scp->SCp.phase = -1;
4941     scp->SCp.sent_command = -1;
4942     scp->SCp.Status = GDTH_MAP_NONE;
4943     scp->SCp.buffer = (struct scatterlist *)NULL;
4944
4945     hanum = NUMDATA(scp->device->host)->hanum;
4946 #ifdef GDTH_STATISTICS
4947     ++act_ios;
4948 #endif
4949
4950     priority = DEFAULT_PRI;
4951     if (IS_GDTH_INTERNAL_CMD(scp))
4952         priority = scp->SCp.this_residual;
4953     else
4954         gdth_update_timeout(hanum, scp, scp->timeout_per_command * 6);
4955
4956     gdth_putq( hanum, scp, priority );
4957     gdth_next( hanum );
4958     return 0;
4959 }
4960
4961
4962 static int gdth_open(struct inode *inode, struct file *filep)
4963 {
4964     gdth_ha_str *ha;
4965     int i;
4966
4967     for (i = 0; i < gdth_ctr_count; i++) {
4968         ha = HADATA(gdth_ctr_tab[i]);
4969         if (!ha->sdev)
4970             ha->sdev = scsi_get_host_dev(gdth_ctr_tab[i]);
4971     }
4972
4973     TRACE(("gdth_open()\n"));
4974     return 0;
4975 }
4976
4977 static int gdth_close(struct inode *inode, struct file *filep)
4978 {
4979     TRACE(("gdth_close()\n"));
4980     return 0;
4981 }
4982
4983 static int ioc_event(void __user *arg)
4984 {
4985     gdth_ioctl_event evt;
4986     gdth_ha_str *ha;
4987     ulong flags;
4988
4989     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)) ||
4990         evt.ionode >= gdth_ctr_count)
4991         return -EFAULT;
4992     ha = HADATA(gdth_ctr_tab[evt.ionode]);
4993
4994     if (evt.erase == 0xff) {
4995         if (evt.event.event_source == ES_TEST)
4996             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4997         else if (evt.event.event_source == ES_DRIVER)
4998             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4999         else if (evt.event.event_source == ES_SYNC)
5000             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
5001         else
5002             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
5003         spin_lock_irqsave(&ha->smp_lock, flags);
5004         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
5005                          &evt.event.event_data);
5006         spin_unlock_irqrestore(&ha->smp_lock, flags);
5007     } else if (evt.erase == 0xfe) {
5008         gdth_clear_events();
5009     } else if (evt.erase == 0) {
5010         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
5011     } else {
5012         gdth_readapp_event(ha, evt.erase, &evt.event);
5013     }
5014     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
5015         return -EFAULT;
5016     return 0;
5017 }
5018
5019 static int ioc_lockdrv(void __user *arg)
5020 {
5021     gdth_ioctl_lockdrv ldrv;
5022     unchar i, j;
5023     ulong flags;
5024     gdth_ha_str *ha;
5025
5026     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)) ||
5027         ldrv.ionode >= gdth_ctr_count)
5028         return -EFAULT;
5029     ha = HADATA(gdth_ctr_tab[ldrv.ionode]);
5030
5031     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
5032         j = ldrv.drives[i];
5033         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
5034             continue;
5035         if (ldrv.lock) {
5036             spin_lock_irqsave(&ha->smp_lock, flags);
5037             ha->hdr[j].lock = 1;
5038             spin_unlock_irqrestore(&ha->smp_lock, flags);
5039             gdth_wait_completion(ldrv.ionode, ha->bus_cnt, j);
5040             gdth_stop_timeout(ldrv.ionode, ha->bus_cnt, j);
5041         } else {
5042             spin_lock_irqsave(&ha->smp_lock, flags);
5043             ha->hdr[j].lock = 0;
5044             spin_unlock_irqrestore(&ha->smp_lock, flags);
5045             gdth_start_timeout(ldrv.ionode, ha->bus_cnt, j);
5046             gdth_next(ldrv.ionode);
5047         }
5048     }
5049     return 0;
5050 }
5051
5052 static int ioc_resetdrv(void __user *arg, char *cmnd)
5053 {
5054     gdth_ioctl_reset res;
5055     gdth_cmd_str cmd;
5056     int hanum;
5057     gdth_ha_str *ha;
5058     int rval;
5059
5060     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
5061         res.ionode >= gdth_ctr_count || res.number >= MAX_HDRIVES)
5062         return -EFAULT;
5063     hanum = res.ionode;
5064     ha = HADATA(gdth_ctr_tab[hanum]);
5065
5066     if (!ha->hdr[res.number].present)
5067         return 0;
5068     memset(&cmd, 0, sizeof(gdth_cmd_str));
5069     cmd.Service = CACHESERVICE;
5070     cmd.OpCode = GDT_CLUST_RESET;
5071     if (ha->cache_feat & GDT_64BIT)
5072         cmd.u.cache64.DeviceNo = res.number;
5073     else
5074         cmd.u.cache.DeviceNo = res.number;
5075
5076     rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
5077     if (rval < 0)
5078         return rval;
5079     res.status = rval;
5080
5081     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
5082         return -EFAULT;
5083     return 0;
5084 }
5085
5086 static int ioc_general(void __user *arg, char *cmnd)
5087 {
5088     gdth_ioctl_general gen;
5089     char *buf = NULL;
5090     ulong64 paddr;
5091     int hanum;
5092     gdth_ha_str *ha;
5093     int rval;
5094
5095     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)) ||
5096         gen.ionode >= gdth_ctr_count)
5097         return -EFAULT;
5098     hanum = gen.ionode;
5099     ha = HADATA(gdth_ctr_tab[hanum]);
5100     if (gen.data_len + gen.sense_len != 0) {
5101         if (!(buf = gdth_ioctl_alloc(hanum, gen.data_len + gen.sense_len,
5102                                      FALSE, &paddr)))
5103             return -EFAULT;
5104         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
5105                            gen.data_len + gen.sense_len)) {
5106             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5107             return -EFAULT;
5108         }
5109
5110         if (gen.command.OpCode == GDT_IOCTL) {
5111             gen.command.u.ioctl.p_param = paddr;
5112         } else if (gen.command.Service == CACHESERVICE) {
5113             if (ha->cache_feat & GDT_64BIT) {
5114                 /* copy elements from 32-bit IOCTL structure */
5115                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
5116                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
5117                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
5118                 /* addresses */
5119                 if (ha->cache_feat & SCATTER_GATHER) {
5120                     gen.command.u.cache64.DestAddr = (ulong64)-1;
5121                     gen.command.u.cache64.sg_canz = 1;
5122                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
5123                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
5124                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
5125                 } else {
5126                     gen.command.u.cache64.DestAddr = paddr;
5127                     gen.command.u.cache64.sg_canz = 0;
5128                 }
5129             } else {
5130                 if (ha->cache_feat & SCATTER_GATHER) {
5131                     gen.command.u.cache.DestAddr = 0xffffffff;
5132                     gen.command.u.cache.sg_canz = 1;
5133                     gen.command.u.cache.sg_lst[0].sg_ptr = (ulong32)paddr;
5134                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
5135                     gen.command.u.cache.sg_lst[1].sg_len = 0;
5136                 } else {
5137                     gen.command.u.cache.DestAddr = paddr;
5138                     gen.command.u.cache.sg_canz = 0;
5139                 }
5140             }
5141         } else if (gen.command.Service == SCSIRAWSERVICE) {
5142             if (ha->raw_feat & GDT_64BIT) {
5143                 /* copy elements from 32-bit IOCTL structure */
5144                 char cmd[16];
5145                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
5146                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
5147                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
5148                 gen.command.u.raw64.target = gen.command.u.raw.target;
5149                 memcpy(cmd, gen.command.u.raw.cmd, 16);
5150                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
5151                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
5152                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
5153                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
5154                 /* addresses */
5155                 if (ha->raw_feat & SCATTER_GATHER) {
5156                     gen.command.u.raw64.sdata = (ulong64)-1;
5157                     gen.command.u.raw64.sg_ranz = 1;
5158                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
5159                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
5160                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
5161                 } else {
5162                     gen.command.u.raw64.sdata = paddr;
5163                     gen.command.u.raw64.sg_ranz = 0;
5164                 }
5165                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
5166             } else {
5167                 if (ha->raw_feat & SCATTER_GATHER) {
5168                     gen.command.u.raw.sdata = 0xffffffff;
5169                     gen.command.u.raw.sg_ranz = 1;
5170                     gen.command.u.raw.sg_lst[0].sg_ptr = (ulong32)paddr;
5171                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
5172                     gen.command.u.raw.sg_lst[1].sg_len = 0;
5173                 } else {
5174                     gen.command.u.raw.sdata = paddr;
5175                     gen.command.u.raw.sg_ranz = 0;
5176                 }
5177                 gen.command.u.raw.sense_data = (ulong32)paddr + gen.data_len;
5178             }
5179         } else {
5180             gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5181             return -EFAULT;
5182         }
5183     }
5184
5185     rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
5186     if (rval < 0)
5187         return rval;
5188     gen.status = rval;
5189
5190     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
5191                      gen.data_len + gen.sense_len)) {
5192         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5193         return -EFAULT;
5194     }
5195     if (copy_to_user(arg, &gen,
5196         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
5197         gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5198         return -EFAULT;
5199     }
5200     gdth_ioctl_free(hanum, gen.data_len+gen.sense_len, buf, paddr);
5201     return 0;
5202 }
5203
5204 static int ioc_hdrlist(void __user *arg, char *cmnd)
5205 {
5206     gdth_ioctl_rescan *rsc;
5207     gdth_cmd_str *cmd;
5208     gdth_ha_str *ha;
5209     unchar i;
5210     int hanum, rc = -ENOMEM;
5211     u32 cluster_type = 0;
5212
5213     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
5214     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
5215     if (!rsc || !cmd)
5216         goto free_fail;
5217
5218     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
5219         rsc->ionode >= gdth_ctr_count) {
5220         rc = -EFAULT;
5221         goto free_fail;
5222     }
5223     hanum = rsc->ionode;
5224     ha = HADATA(gdth_ctr_tab[hanum]);
5225     memset(cmd, 0, sizeof(gdth_cmd_str));
5226
5227     for (i = 0; i < MAX_HDRIVES; ++i) {
5228         if (!ha->hdr[i].present) {
5229             rsc->hdr_list[i].bus = 0xff;
5230             continue;
5231         }
5232         rsc->hdr_list[i].bus = ha->virt_bus;
5233         rsc->hdr_list[i].target = i;
5234         rsc->hdr_list[i].lun = 0;
5235         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5236         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
5237             cmd->Service = CACHESERVICE;
5238             cmd->OpCode = GDT_CLUST_INFO;
5239             if (ha->cache_feat & GDT_64BIT)
5240                 cmd->u.cache64.DeviceNo = i;
5241             else
5242                 cmd->u.cache.DeviceNo = i;
5243             if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
5244                 rsc->hdr_list[i].cluster_type = cluster_type;
5245         }
5246     }
5247
5248     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
5249         rc = -EFAULT;
5250     else
5251         rc = 0;
5252
5253 free_fail:
5254     kfree(rsc);
5255     kfree(cmd);
5256     return rc;
5257 }
5258
5259 static int ioc_rescan(void __user *arg, char *cmnd)
5260 {
5261     gdth_ioctl_rescan *rsc;
5262     gdth_cmd_str *cmd;
5263     ushort i, status, hdr_cnt;
5264     ulong32 info;
5265     int hanum, cyls, hds, secs;
5266     int rc = -ENOMEM;
5267     ulong flags;
5268     gdth_ha_str *ha;
5269
5270     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
5271     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
5272     if (!cmd || !rsc)
5273         goto free_fail;
5274
5275     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
5276         rsc->ionode >= gdth_ctr_count) {
5277         rc = -EFAULT;
5278         goto free_fail;
5279     }
5280     hanum = rsc->ionode;
5281     ha = HADATA(gdth_ctr_tab[hanum]);
5282     memset(cmd, 0, sizeof(gdth_cmd_str));
5283
5284     if (rsc->flag == 0) {
5285         /* old method: re-init. cache service */
5286         cmd->Service = CACHESERVICE;
5287         if (ha->cache_feat & GDT_64BIT) {
5288             cmd->OpCode = GDT_X_INIT_HOST;
5289             cmd->u.cache64.DeviceNo = LINUX_OS;
5290         } else {
5291             cmd->OpCode = GDT_INIT;
5292             cmd->u.cache.DeviceNo = LINUX_OS;
5293         }
5294
5295         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5296         i = 0;
5297         hdr_cnt = (status == S_OK ? (ushort)info : 0);
5298     } else {
5299         i = rsc->hdr_no;
5300         hdr_cnt = i + 1;
5301     }
5302
5303     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
5304         cmd->Service = CACHESERVICE;
5305         cmd->OpCode = GDT_INFO;
5306         if (ha->cache_feat & GDT_64BIT)
5307             cmd->u.cache64.DeviceNo = i;
5308         else
5309             cmd->u.cache.DeviceNo = i;
5310
5311         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5312
5313         spin_lock_irqsave(&ha->smp_lock, flags);
5314         rsc->hdr_list[i].bus = ha->virt_bus;
5315         rsc->hdr_list[i].target = i;
5316         rsc->hdr_list[i].lun = 0;
5317         if (status != S_OK) {
5318             ha->hdr[i].present = FALSE;
5319         } else {
5320             ha->hdr[i].present = TRUE;
5321             ha->hdr[i].size = info;
5322             /* evaluate mapping */
5323             ha->hdr[i].size &= ~SECS32;
5324             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
5325             ha->hdr[i].heads = hds;
5326             ha->hdr[i].secs = secs;
5327             /* round size */
5328             ha->hdr[i].size = cyls * hds * secs;
5329         }
5330         spin_unlock_irqrestore(&ha->smp_lock, flags);
5331         if (status != S_OK)
5332             continue;
5333
5334         /* extended info, if GDT_64BIT, for drives > 2 TB */
5335         /* but we need ha->info2, not yet stored in scp->SCp */
5336
5337         /* devtype, cluster info, R/W attribs */
5338         cmd->Service = CACHESERVICE;
5339         cmd->OpCode = GDT_DEVTYPE;
5340         if (ha->cache_feat & GDT_64BIT)
5341             cmd->u.cache64.DeviceNo = i;
5342         else
5343             cmd->u.cache.DeviceNo = i;
5344
5345         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5346
5347         spin_lock_irqsave(&ha->smp_lock, flags);
5348         ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
5349         spin_unlock_irqrestore(&ha->smp_lock, flags);
5350
5351         cmd->Service = CACHESERVICE;
5352         cmd->OpCode = GDT_CLUST_INFO;
5353         if (ha->cache_feat & GDT_64BIT)
5354             cmd->u.cache64.DeviceNo = i;
5355         else
5356             cmd->u.cache.DeviceNo = i;
5357
5358         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5359
5360         spin_lock_irqsave(&ha->smp_lock, flags);
5361         ha->hdr[i].cluster_type =
5362             ((status == S_OK && !shared_access) ? (ushort)info : 0);
5363         spin_unlock_irqrestore(&ha->smp_lock, flags);
5364         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5365
5366         cmd->Service = CACHESERVICE;
5367         cmd->OpCode = GDT_RW_ATTRIBS;
5368         if (ha->cache_feat & GDT_64BIT)
5369             cmd->u.cache64.DeviceNo = i;
5370         else
5371             cmd->u.cache.DeviceNo = i;
5372
5373         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5374
5375         spin_lock_irqsave(&ha->smp_lock, flags);
5376         ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
5377         spin_unlock_irqrestore(&ha->smp_lock, flags);
5378     }
5379
5380     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
5381         rc = -EFAULT;
5382     else
5383         rc = 0;
5384
5385 free_fail:
5386     kfree(rsc);
5387     kfree(cmd);
5388     return rc;
5389 }
5390
5391 static int gdth_ioctl(struct inode *inode, struct file *filep,
5392                       unsigned int cmd, unsigned long arg)
5393 {
5394     gdth_ha_str *ha;
5395     Scsi_Cmnd *scp;
5396     ulong flags;
5397     char cmnd[MAX_COMMAND_SIZE];
5398     void __user *argp = (void __user *)arg;
5399
5400     memset(cmnd, 0xff, 12);
5401
5402     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
5403
5404     switch (cmd) {
5405       case GDTIOCTL_CTRCNT:
5406       {
5407         int cnt = gdth_ctr_count;
5408         if (put_user(cnt, (int __user *)argp))
5409                 return -EFAULT;
5410         break;
5411       }
5412
5413       case GDTIOCTL_DRVERS:
5414       {
5415         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
5416         if (put_user(ver, (int __user *)argp))
5417                 return -EFAULT;
5418         break;
5419       }
5420
5421       case GDTIOCTL_OSVERS:
5422       {
5423         gdth_ioctl_osvers osv;
5424
5425         osv.version = (unchar)(LINUX_VERSION_CODE >> 16);
5426         osv.subversion = (unchar)(LINUX_VERSION_CODE >> 8);
5427         osv.revision = (ushort)(LINUX_VERSION_CODE & 0xff);
5428         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
5429                 return -EFAULT;
5430         break;
5431       }
5432
5433       case GDTIOCTL_CTRTYPE:
5434       {
5435         gdth_ioctl_ctrtype ctrt;
5436
5437         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
5438             ctrt.ionode >= gdth_ctr_count)
5439             return -EFAULT;
5440         ha = HADATA(gdth_ctr_tab[ctrt.ionode]);
5441         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
5442             ctrt.type = (unchar)((ha->stype>>20) - 0x10);
5443         } else {
5444             if (ha->type != GDT_PCIMPR) {
5445                 ctrt.type = (unchar)((ha->stype<<4) + 6);
5446             } else {
5447                 ctrt.type =
5448                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
5449                 if (ha->stype >= 0x300)
5450                     ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
5451                 else
5452                     ctrt.ext_type = 0x6000 | ha->stype;
5453             }
5454             ctrt.device_id = ha->pdev->device;
5455             ctrt.sub_device_id = ha->pdev->subsystem_device;
5456         }
5457         ctrt.info = ha->brd_phys;
5458         ctrt.oem_id = ha->oem_id;
5459         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
5460             return -EFAULT;
5461         break;
5462       }
5463
5464       case GDTIOCTL_GENERAL:
5465         return ioc_general(argp, cmnd);
5466
5467       case GDTIOCTL_EVENT:
5468         return ioc_event(argp);
5469
5470       case GDTIOCTL_LOCKDRV:
5471         return ioc_lockdrv(argp);
5472
5473       case GDTIOCTL_LOCKCHN:
5474       {
5475         gdth_ioctl_lockchn lchn;
5476         unchar i, j;
5477
5478         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
5479             lchn.ionode >= gdth_ctr_count)
5480             return -EFAULT;
5481         ha = HADATA(gdth_ctr_tab[lchn.ionode]);
5482
5483         i = lchn.channel;
5484         if (i < ha->bus_cnt) {
5485             if (lchn.lock) {
5486                 spin_lock_irqsave(&ha->smp_lock, flags);
5487                 ha->raw[i].lock = 1;
5488                 spin_unlock_irqrestore(&ha->smp_lock, flags);
5489                 for (j = 0; j < ha->tid_cnt; ++j) {
5490                     gdth_wait_completion(lchn.ionode, i, j);
5491                     gdth_stop_timeout(lchn.ionode, i, j);
5492                 }
5493             } else {
5494                 spin_lock_irqsave(&ha->smp_lock, flags);
5495                 ha->raw[i].lock = 0;
5496                 spin_unlock_irqrestore(&ha->smp_lock, flags);
5497                 for (j = 0; j < ha->tid_cnt; ++j) {
5498                     gdth_start_timeout(lchn.ionode, i, j);
5499                     gdth_next(lchn.ionode);
5500                 }
5501             }
5502         }
5503         break;
5504       }
5505
5506       case GDTIOCTL_RESCAN:
5507         return ioc_rescan(argp, cmnd);
5508
5509       case GDTIOCTL_HDRLIST:
5510         return ioc_hdrlist(argp, cmnd);
5511
5512       case GDTIOCTL_RESET_BUS:
5513       {
5514         gdth_ioctl_reset res;
5515         int hanum, rval;
5516
5517         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
5518             res.ionode >= gdth_ctr_count)
5519             return -EFAULT;
5520         hanum = res.ionode;
5521         ha = HADATA(gdth_ctr_tab[hanum]);
5522
5523 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5524         scp  = kzalloc(sizeof(*scp), GFP_KERNEL);
5525         if (!scp)
5526             return -ENOMEM;
5527         scp->device = ha->sdev;
5528         scp->cmd_len = 12;
5529         scp->use_sg = 0;
5530         scp->device->channel = virt_ctr ? 0 : res.number;
5531         rval = gdth_eh_bus_reset(scp);
5532         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
5533         kfree(scp);
5534 #else
5535         scp  = scsi_allocate_device(ha->sdev, 1, FALSE);
5536         if (!scp)
5537             return -ENOMEM;
5538         scp->cmd_len = 12;
5539         scp->use_sg = 0;
5540         scp->channel = virt_ctr ? 0 : res.number;
5541         rval = gdth_eh_bus_reset(scp);
5542         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
5543         scsi_release_command(scp);
5544 #endif
5545         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
5546             return -EFAULT;
5547         break;
5548       }
5549
5550       case GDTIOCTL_RESET_DRV:
5551         return ioc_resetdrv(argp, cmnd);
5552
5553       default:
5554         break;
5555     }
5556     return 0;
5557 }
5558
5559
5560 /* flush routine */
5561 static void gdth_flush(int hanum)
5562 {
5563     int             i;
5564     gdth_ha_str     *ha;
5565     gdth_cmd_str    gdtcmd;
5566     char            cmnd[MAX_COMMAND_SIZE];
5567     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5568
5569     TRACE2(("gdth_flush() hanum %d\n",hanum));
5570     ha = HADATA(gdth_ctr_tab[hanum]);
5571
5572     for (i = 0; i < MAX_HDRIVES; ++i) {
5573         if (ha->hdr[i].present) {
5574             gdtcmd.BoardNode = LOCALBOARD;
5575             gdtcmd.Service = CACHESERVICE;
5576             gdtcmd.OpCode = GDT_FLUSH;
5577             if (ha->cache_feat & GDT_64BIT) {
5578                 gdtcmd.u.cache64.DeviceNo = i;
5579                 gdtcmd.u.cache64.BlockNo = 1;
5580                 gdtcmd.u.cache64.sg_canz = 0;
5581             } else {
5582                 gdtcmd.u.cache.DeviceNo = i;
5583                 gdtcmd.u.cache.BlockNo = 1;
5584                 gdtcmd.u.cache.sg_canz = 0;
5585             }
5586             TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));
5587
5588             gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 30, NULL);
5589         }
5590     }
5591 }
5592
5593 /* shutdown routine */
5594 static int gdth_halt(struct notifier_block *nb, ulong event, void *buf)
5595 {
5596     int             hanum;
5597 #ifndef __alpha__
5598     gdth_cmd_str    gdtcmd;
5599     char            cmnd[MAX_COMMAND_SIZE];
5600 #endif
5601
5602     if (notifier_disabled)
5603         return NOTIFY_OK;
5604
5605     TRACE2(("gdth_halt() event %d\n",(int)event));
5606     if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5607         return NOTIFY_DONE;
5608
5609     notifier_disabled = 1;
5610     printk("GDT-HA: Flushing all host drives .. ");
5611     for (hanum = 0; hanum < gdth_ctr_count; ++hanum) {
5612         gdth_flush(hanum);
5613
5614 #ifndef __alpha__
5615         /* controller reset */
5616         memset(cmnd, 0xff, MAX_COMMAND_SIZE);
5617         gdtcmd.BoardNode = LOCALBOARD;
5618         gdtcmd.Service = CACHESERVICE;
5619         gdtcmd.OpCode = GDT_RESET;
5620         TRACE2(("gdth_halt(): reset controller %d\n", hanum));
5621         gdth_execute(gdth_ctr_tab[hanum], &gdtcmd, cmnd, 10, NULL);
5622 #endif
5623     }
5624     printk("Done.\n");
5625
5626 #ifdef GDTH_STATISTICS
5627     del_timer(&gdth_timer);
5628 #endif
5629     return NOTIFY_OK;
5630 }
5631
5632 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5633 /* configure lun */
5634 static int gdth_slave_configure(struct scsi_device *sdev)
5635 {
5636     scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
5637     sdev->skip_ms_page_3f = 1;
5638     sdev->skip_ms_page_8 = 1;
5639     return 0;
5640 }
5641 #endif
5642
5643 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5644 static struct scsi_host_template driver_template = {
5645 #else
5646 static Scsi_Host_Template driver_template = {
5647 #endif
5648         .proc_name              = "gdth",
5649         .proc_info              = gdth_proc_info,
5650         .name                   = "GDT SCSI Disk Array Controller",
5651         .detect                 = gdth_detect,
5652         .release                = gdth_release,
5653         .info                   = gdth_info,
5654         .queuecommand           = gdth_queuecommand,
5655         .eh_bus_reset_handler   = gdth_eh_bus_reset,
5656         .bios_param             = gdth_bios_param,
5657         .can_queue              = GDTH_MAXCMDS,
5658 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
5659         .slave_configure        = gdth_slave_configure,
5660 #endif
5661         .this_id                = -1,
5662         .sg_tablesize           = GDTH_MAXSG,
5663         .cmd_per_lun            = GDTH_MAXC_P_L,
5664         .unchecked_isa_dma      = 1,
5665         .use_clustering         = ENABLE_CLUSTERING,
5666 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
5667         .use_new_eh_code        = 1,
5668 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)
5669         .highmem_io             = 1,
5670 #endif
5671 #endif
5672 };
5673
5674 #include "scsi_module.c"
5675 #ifndef MODULE
5676 __setup("gdth=", option_setup);
5677 #endif