2 * drivers/pci/setup-res.c
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
9 * Support routines for initializing a PCI subsystem.
12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
15 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/pci.h>
22 #include <linux/errno.h>
23 #include <linux/ioport.h>
24 #include <linux/cache.h>
25 #include <linux/slab.h>
29 void pci_update_resource(struct pci_dev *dev, int resno)
31 struct pci_bus_region region;
34 enum pci_bar_type type;
35 struct resource *res = dev->resource + resno;
38 * Ignore resources for unimplemented BARs and unused resource slots
45 * Ignore non-moveable resources. This might be legacy resources for
46 * which no functional BAR register exists or another important
47 * system resource we shouldn't move around.
49 if (res->flags & IORESOURCE_PCI_FIXED)
52 pcibios_resource_to_bus(dev, ®ion, res);
54 dev_dbg(&dev->dev, "BAR %d: got %pRf (bus addr [%#llx-%#llx])\n",
55 resno, res, (unsigned long long)region.start,
56 (unsigned long long)region.end);
58 new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
59 if (res->flags & IORESOURCE_IO)
60 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
62 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
64 reg = pci_resource_bar(dev, resno, &type);
67 if (type != pci_bar_unknown) {
68 if (!(res->flags & IORESOURCE_ROM_ENABLE))
70 new |= PCI_ROM_ADDRESS_ENABLE;
73 pci_write_config_dword(dev, reg, new);
74 pci_read_config_dword(dev, reg, &check);
76 if ((new ^ check) & mask) {
77 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
81 if ((new & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) ==
82 (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64)) {
83 new = region.start >> 16 >> 16;
84 pci_write_config_dword(dev, reg + 4, new);
85 pci_read_config_dword(dev, reg + 4, &check);
87 dev_err(&dev->dev, "BAR %d: error updating "
88 "(high %#08x != %#08x)\n", resno, new, check);
91 res->flags &= ~IORESOURCE_UNSET;
92 dev_dbg(&dev->dev, "BAR %d: moved to bus addr [%#llx-%#llx]\n",
93 resno, (unsigned long long)region.start,
94 (unsigned long long)region.end);
97 int pci_claim_resource(struct pci_dev *dev, int resource)
99 struct resource *res = &dev->resource[resource];
100 struct resource *root;
103 root = pci_find_parent_resource(dev, res);
107 err = request_resource(root, res);
110 const char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge";
111 dev_err(&dev->dev, "BAR %d: %s %s %pRt\n",
113 root ? "address space collision on" :
114 "no parent found for",
120 EXPORT_SYMBOL(pci_claim_resource);
122 #ifdef CONFIG_PCI_QUIRKS
123 void pci_disable_bridge_window(struct pci_dev *dev)
125 dev_dbg(&dev->dev, "Disabling bridge window.\n");
127 /* MMIO Base/Limit */
128 pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
130 /* Prefetchable MMIO Base/Limit */
131 pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
132 pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
133 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
135 #endif /* CONFIG_PCI_QUIRKS */
137 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
140 struct resource *res = dev->resource + resno;
141 resource_size_t size, min, align;
144 size = resource_size(res);
145 min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
146 align = pci_resource_alignment(dev, res);
148 /* First, try exact prefetching match.. */
149 ret = pci_bus_alloc_resource(bus, res, size, align, min,
151 pcibios_align_resource, dev);
153 if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
157 * But a prefetching area can handle a non-prefetching
158 * window (it will just not perform as well).
160 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
161 pcibios_align_resource, dev);
165 res->flags &= ~IORESOURCE_STARTALIGN;
166 if (resno < PCI_BRIDGE_RESOURCES)
167 pci_update_resource(dev, resno);
173 int pci_assign_resource(struct pci_dev *dev, int resno)
175 struct resource *res = dev->resource + resno;
176 resource_size_t align;
180 align = pci_resource_alignment(dev, res);
182 dev_info(&dev->dev, "BAR %d: can't allocate %pRf "
183 "(bogus alignment)\n", resno, res);
188 while ((ret = __pci_assign_resource(bus, dev, resno))) {
189 if (bus->parent && bus->self->transparent)
199 dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n",
205 /* Sort resources by alignment */
206 void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
210 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
212 struct resource_list *list, *tmp;
213 resource_size_t r_align;
215 r = &dev->resource[i];
217 if (r->flags & IORESOURCE_PCI_FIXED)
220 if (!(r->flags) || r->parent)
223 r_align = pci_resource_alignment(dev, r);
225 dev_warn(&dev->dev, "BAR %d: bogus alignment %pRf\n",
229 for (list = head; ; list = list->next) {
230 resource_size_t align = 0;
231 struct resource_list *ln = list->next;
234 align = pci_resource_alignment(ln->dev, ln->res);
236 if (r_align > align) {
237 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
239 panic("pdev_sort_resources(): "
240 "kmalloc() failed!\n");
251 int pci_enable_resources(struct pci_dev *dev, int mask)
257 pci_read_config_word(dev, PCI_COMMAND, &cmd);
260 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
261 if (!(mask & (1 << i)))
264 r = &dev->resource[i];
266 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
268 if ((i == PCI_ROM_RESOURCE) &&
269 (!(r->flags & IORESOURCE_ROM_ENABLE)))
273 dev_err(&dev->dev, "device not available because of "
274 "BAR %d %pR collisions\n", i, r);
278 if (r->flags & IORESOURCE_IO)
279 cmd |= PCI_COMMAND_IO;
280 if (r->flags & IORESOURCE_MEM)
281 cmd |= PCI_COMMAND_MEMORY;
284 if (cmd != old_cmd) {
285 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
287 pci_write_config_word(dev, PCI_COMMAND, cmd);