4 #include <linux/workqueue.h>
6 #define PCI_CFG_SPACE_SIZE 256
7 #define PCI_CFG_SPACE_EXP_SIZE 4096
9 /* Functions internal to the PCI core code */
11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
14 extern void pci_cleanup_rom(struct pci_dev *dev);
16 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
17 struct vm_area_struct *vma);
19 int pci_probe_reset_function(struct pci_dev *dev);
22 * struct pci_platform_pm_ops - Firmware PM callbacks
24 * @is_manageable: returns 'true' if given device is power manageable by the
27 * @set_state: invokes the platform firmware to set the device's power state
29 * @choose_state: returns PCI power state of given device preferred by the
30 * platform; to be used during system-wide transitions from a
31 * sleeping state to the working state and vice versa
33 * @can_wakeup: returns 'true' if given device is capable of waking up the
34 * system from a sleeping state
36 * @sleep_wake: enables/disables the system wake up capability of given device
38 * If given platform is generally capable of power managing PCI devices, all of
39 * these callbacks are mandatory.
41 struct pci_platform_pm_ops {
42 bool (*is_manageable)(struct pci_dev *dev);
43 int (*set_state)(struct pci_dev *dev, pci_power_t state);
44 pci_power_t (*choose_state)(struct pci_dev *dev);
45 bool (*can_wakeup)(struct pci_dev *dev);
46 int (*sleep_wake)(struct pci_dev *dev, bool enable);
49 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
50 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
51 extern void pci_disable_enabled_device(struct pci_dev *dev);
52 extern void pci_pm_init(struct pci_dev *dev);
53 extern void platform_pci_wakeup_init(struct pci_dev *dev);
54 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
56 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
58 return !!(pci_dev->subordinate);
61 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
62 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
63 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
64 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
65 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
66 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
69 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
70 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
71 void (*release)(struct pci_dev *dev);
76 const struct pci_vpd_ops *ops;
77 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
80 extern int pci_vpd_pci22_init(struct pci_dev *dev);
81 static inline void pci_vpd_release(struct pci_dev *dev)
84 dev->vpd->ops->release(dev);
87 /* PCI /proc functions */
89 extern int pci_proc_attach_device(struct pci_dev *dev);
90 extern int pci_proc_detach_device(struct pci_dev *dev);
91 extern int pci_proc_detach_bus(struct pci_bus *bus);
93 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
94 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
95 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
98 /* Functions for PCI Hotplug drivers to use */
99 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
101 #ifdef HAVE_PCI_LEGACY
102 extern void pci_create_legacy_files(struct pci_bus *bus);
103 extern void pci_remove_legacy_files(struct pci_bus *bus);
105 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
106 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
109 /* Lock for read/write access to pci device and bus lists */
110 extern struct rw_semaphore pci_bus_sem;
112 extern unsigned int pci_pm_d3_delay;
114 #ifdef CONFIG_PCI_MSI
115 void pci_no_msi(void);
116 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
118 static inline void pci_no_msi(void) { }
119 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
122 #ifdef CONFIG_PCIEAER
123 void pci_no_aer(void);
125 static inline void pci_no_aer(void) { }
128 static inline int pci_no_d1d2(struct pci_dev *dev)
130 unsigned int parent_dstates = 0;
133 parent_dstates = dev->bus->self->no_d1d2;
134 return (dev->no_d1d2 || parent_dstates);
137 extern int pcie_mch_quirk;
138 extern struct device_attribute pci_dev_attrs[];
139 extern struct device_attribute dev_attr_cpuaffinity;
140 extern struct device_attribute dev_attr_cpulistaffinity;
141 #ifdef CONFIG_HOTPLUG
142 extern struct bus_attribute pci_bus_attrs[];
144 #define pci_bus_attrs NULL
149 * pci_match_one_device - Tell if a PCI device structure has a matching
150 * PCI device id structure
151 * @id: single PCI device id structure to match
152 * @dev: the PCI device structure to match against
154 * Returns the matching pci_device_id structure or %NULL if there is no match.
156 static inline const struct pci_device_id *
157 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
159 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
160 (id->device == PCI_ANY_ID || id->device == dev->device) &&
161 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
162 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
163 !((id->class ^ dev->class) & id->class_mask))
168 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
170 /* PCI slot sysfs helper code */
171 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
173 extern struct kset *pci_slots_kset;
175 struct pci_slot_attribute {
176 struct attribute attr;
177 ssize_t (*show)(struct pci_slot *, char *);
178 ssize_t (*store)(struct pci_slot *, const char *, size_t);
180 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
183 pci_bar_unknown, /* Standard PCI BAR probe */
184 pci_bar_io, /* An io port BAR */
185 pci_bar_mem32, /* A 32-bit memory BAR */
186 pci_bar_mem64, /* A 64-bit memory BAR */
189 extern int pci_setup_device(struct pci_dev *dev);
190 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
191 struct resource *res, unsigned int reg);
192 extern int pci_resource_bar(struct pci_dev *dev, int resno,
193 enum pci_bar_type *type);
194 extern int pci_bus_add_child(struct pci_bus *bus);
195 extern void pci_enable_ari(struct pci_dev *dev);
197 * pci_ari_enabled - query ARI forwarding status
200 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
202 static inline int pci_ari_enabled(struct pci_bus *bus)
204 return bus->self && bus->self->ari_enabled;
207 #ifdef CONFIG_PCI_QUIRKS
208 extern int pci_is_reassigndev(struct pci_dev *dev);
209 resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
210 extern void pci_disable_bridge_window(struct pci_dev *dev);
213 /* Single Root I/O Virtualization */
215 int pos; /* capability position */
216 int nres; /* number of resources */
217 u32 cap; /* SR-IOV Capabilities */
218 u16 ctrl; /* SR-IOV Control */
219 u16 total; /* total VFs associated with the PF */
220 u16 initial; /* initial VFs associated with the PF */
221 u16 nr_virtfn; /* number of VFs available */
222 u16 offset; /* first VF Routing ID offset */
223 u16 stride; /* following VF stride */
224 u32 pgsz; /* page size for BAR alignment */
225 u8 link; /* Function Dependency Link */
226 struct pci_dev *dev; /* lowest numbered PF */
227 struct pci_dev *self; /* this PF */
228 struct mutex lock; /* lock for VF bus */
229 struct work_struct mtask; /* VF Migration task */
230 u8 __iomem *mstate; /* VF Migration State Array */
233 /* Address Translation Service */
235 int pos; /* capability position */
236 int stu; /* Smallest Translation Unit */
237 int qdep; /* Invalidate Queue Depth */
238 int ref_cnt; /* Physical Function reference count */
239 int is_enabled:1; /* Enable bit is set */
242 #ifdef CONFIG_PCI_IOV
243 extern int pci_iov_init(struct pci_dev *dev);
244 extern void pci_iov_release(struct pci_dev *dev);
245 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
246 enum pci_bar_type *type);
247 extern int pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
248 extern void pci_restore_iov_state(struct pci_dev *dev);
249 extern int pci_iov_bus_range(struct pci_bus *bus);
251 extern int pci_enable_ats(struct pci_dev *dev, int ps);
252 extern void pci_disable_ats(struct pci_dev *dev);
253 extern int pci_ats_queue_depth(struct pci_dev *dev);
255 * pci_ats_enabled - query the ATS status
256 * @dev: the PCI device
258 * Returns 1 if ATS capability is enabled, or 0 if not.
260 static inline int pci_ats_enabled(struct pci_dev *dev)
262 return dev->ats && dev->ats->is_enabled;
265 static inline int pci_iov_init(struct pci_dev *dev)
269 static inline void pci_iov_release(struct pci_dev *dev)
273 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
274 enum pci_bar_type *type)
278 static inline void pci_restore_iov_state(struct pci_dev *dev)
281 static inline int pci_iov_bus_range(struct pci_bus *bus)
286 static inline int pci_enable_ats(struct pci_dev *dev, int ps)
290 static inline void pci_disable_ats(struct pci_dev *dev)
293 static inline int pci_ats_queue_depth(struct pci_dev *dev)
297 static inline int pci_ats_enabled(struct pci_dev *dev)
301 #endif /* CONFIG_PCI_IOV */
303 static inline int pci_resource_alignment(struct pci_dev *dev,
304 struct resource *res)
306 #ifdef CONFIG_PCI_IOV
307 int resno = res - dev->resource;
309 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
310 return pci_sriov_resource_alignment(dev, resno);
312 return resource_alignment(res);
315 #endif /* DRIVERS_PCI_H */