3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
11 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
18 #include <linux/msi.h>
20 #include <asm/errno.h>
27 static DEFINE_SPINLOCK(msi_lock);
28 static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
29 static struct kmem_cache* msi_cachep;
31 static int pci_msi_enable = 1;
33 static int msi_cache_init(void)
35 msi_cachep = kmem_cache_create("msi_cache", sizeof(struct msi_desc),
36 0, SLAB_HWCACHE_ALIGN, NULL, NULL);
43 static void msi_set_mask_bit(unsigned int irq, int flag)
45 struct msi_desc *entry;
47 entry = msi_desc[irq];
48 BUG_ON(!entry || !entry->dev);
49 switch (entry->msi_attrib.type) {
51 if (entry->msi_attrib.maskbit) {
55 pos = (long)entry->mask_base;
56 pci_read_config_dword(entry->dev, pos, &mask_bits);
59 pci_write_config_dword(entry->dev, pos, mask_bits);
64 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
65 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
66 writel(flag, entry->mask_base + offset);
75 void read_msi_msg(unsigned int irq, struct msi_msg *msg)
77 struct msi_desc *entry = get_irq_data(irq);
78 switch(entry->msi_attrib.type) {
81 struct pci_dev *dev = entry->dev;
82 int pos = entry->msi_attrib.pos;
85 pci_read_config_dword(dev, msi_lower_address_reg(pos),
87 if (entry->msi_attrib.is_64) {
88 pci_read_config_dword(dev, msi_upper_address_reg(pos),
90 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
93 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
101 base = entry->mask_base +
102 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
104 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
105 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
106 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
114 void write_msi_msg(unsigned int irq, struct msi_msg *msg)
116 struct msi_desc *entry = get_irq_data(irq);
117 switch (entry->msi_attrib.type) {
120 struct pci_dev *dev = entry->dev;
121 int pos = entry->msi_attrib.pos;
123 pci_write_config_dword(dev, msi_lower_address_reg(pos),
125 if (entry->msi_attrib.is_64) {
126 pci_write_config_dword(dev, msi_upper_address_reg(pos),
128 pci_write_config_word(dev, msi_data_reg(pos, 1),
131 pci_write_config_word(dev, msi_data_reg(pos, 0),
136 case PCI_CAP_ID_MSIX:
139 base = entry->mask_base +
140 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
142 writel(msg->address_lo,
143 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
144 writel(msg->address_hi,
145 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
146 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
154 void mask_msi_irq(unsigned int irq)
156 msi_set_mask_bit(irq, 1);
159 void unmask_msi_irq(unsigned int irq)
161 msi_set_mask_bit(irq, 0);
164 static int msi_free_irq(struct pci_dev* dev, int irq);
166 static int msi_init(void)
168 static int status = -ENOMEM;
175 printk(KERN_WARNING "PCI: MSI quirk detected. MSI disabled.\n");
180 status = msi_cache_init();
183 printk(KERN_WARNING "PCI: MSI cache init failed\n");
190 static struct msi_desc* alloc_msi_entry(void)
192 struct msi_desc *entry;
194 entry = kmem_cache_zalloc(msi_cachep, GFP_KERNEL);
198 entry->link.tail = entry->link.head = 0; /* single message */
204 static void attach_msi_entry(struct msi_desc *entry, int irq)
208 spin_lock_irqsave(&msi_lock, flags);
209 msi_desc[irq] = entry;
210 spin_unlock_irqrestore(&msi_lock, flags);
213 static int create_msi_irq(void)
215 struct msi_desc *entry;
218 entry = alloc_msi_entry();
224 kmem_cache_free(msi_cachep, entry);
228 set_irq_data(irq, entry);
233 static void destroy_msi_irq(unsigned int irq)
235 struct msi_desc *entry;
237 entry = get_irq_data(irq);
238 set_irq_chip(irq, NULL);
239 set_irq_data(irq, NULL);
241 kmem_cache_free(msi_cachep, entry);
244 static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
248 pci_read_config_word(dev, msi_control_reg(pos), &control);
249 if (type == PCI_CAP_ID_MSI) {
250 /* Set enabled bits to single MSI & enable MSI_enable bit */
251 msi_enable(control, 1);
252 pci_write_config_word(dev, msi_control_reg(pos), control);
253 dev->msi_enabled = 1;
255 msix_enable(control);
256 pci_write_config_word(dev, msi_control_reg(pos), control);
257 dev->msix_enabled = 1;
260 pci_intx(dev, 0); /* disable intx */
263 void disable_msi_mode(struct pci_dev *dev, int pos, int type)
267 pci_read_config_word(dev, msi_control_reg(pos), &control);
268 if (type == PCI_CAP_ID_MSI) {
269 /* Set enabled bits to single MSI & enable MSI_enable bit */
270 msi_disable(control);
271 pci_write_config_word(dev, msi_control_reg(pos), control);
272 dev->msi_enabled = 0;
274 msix_disable(control);
275 pci_write_config_word(dev, msi_control_reg(pos), control);
276 dev->msix_enabled = 0;
279 pci_intx(dev, 1); /* enable intx */
282 static int msi_lookup_irq(struct pci_dev *dev, int type)
287 spin_lock_irqsave(&msi_lock, flags);
288 for (irq = 0; irq < NR_IRQS; irq++) {
289 if (!msi_desc[irq] || msi_desc[irq]->dev != dev ||
290 msi_desc[irq]->msi_attrib.type != type ||
291 msi_desc[irq]->msi_attrib.default_irq != dev->irq)
293 spin_unlock_irqrestore(&msi_lock, flags);
294 /* This pre-assigned MSI irq for this device
295 already exists. Override dev->irq with this irq */
299 spin_unlock_irqrestore(&msi_lock, flags);
304 void pci_scan_msi_device(struct pci_dev *dev)
311 int pci_save_msi_state(struct pci_dev *dev)
315 struct pci_cap_saved_state *save_state;
318 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
319 if (pos <= 0 || dev->no_msi)
322 pci_read_config_word(dev, msi_control_reg(pos), &control);
323 if (!(control & PCI_MSI_FLAGS_ENABLE))
326 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
329 printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
332 cap = &save_state->data[0];
334 pci_read_config_dword(dev, pos, &cap[i++]);
335 control = cap[0] >> 16;
336 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
337 if (control & PCI_MSI_FLAGS_64BIT) {
338 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
339 pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
341 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
342 if (control & PCI_MSI_FLAGS_MASKBIT)
343 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
344 save_state->cap_nr = PCI_CAP_ID_MSI;
345 pci_add_saved_cap(dev, save_state);
349 void pci_restore_msi_state(struct pci_dev *dev)
353 struct pci_cap_saved_state *save_state;
356 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
357 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
358 if (!save_state || pos <= 0)
360 cap = &save_state->data[0];
362 control = cap[i++] >> 16;
363 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
364 if (control & PCI_MSI_FLAGS_64BIT) {
365 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
366 pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
368 pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
369 if (control & PCI_MSI_FLAGS_MASKBIT)
370 pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
371 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
372 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
373 pci_remove_saved_cap(save_state);
377 int pci_save_msix_state(struct pci_dev *dev)
381 int irq, head, tail = 0;
383 struct pci_cap_saved_state *save_state;
385 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
386 if (pos <= 0 || dev->no_msi)
389 /* save the capability */
390 pci_read_config_word(dev, msi_control_reg(pos), &control);
391 if (!(control & PCI_MSIX_FLAGS_ENABLE))
393 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
396 printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
399 *((u16 *)&save_state->data[0]) = control;
403 if (msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
408 irq = head = dev->irq;
409 while (head != tail) {
410 struct msi_desc *entry;
412 entry = msi_desc[irq];
413 read_msi_msg(irq, &entry->msg_save);
415 tail = msi_desc[irq]->link.tail;
420 save_state->cap_nr = PCI_CAP_ID_MSIX;
421 pci_add_saved_cap(dev, save_state);
425 void pci_restore_msix_state(struct pci_dev *dev)
429 int irq, head, tail = 0;
430 struct msi_desc *entry;
432 struct pci_cap_saved_state *save_state;
434 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
437 save = *((u16 *)&save_state->data[0]);
438 pci_remove_saved_cap(save_state);
441 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
445 /* route the table */
447 if (msi_lookup_irq(dev, PCI_CAP_ID_MSIX))
449 irq = head = dev->irq;
450 while (head != tail) {
451 entry = msi_desc[irq];
452 write_msi_msg(irq, &entry->msg_save);
454 tail = msi_desc[irq]->link.tail;
459 pci_write_config_word(dev, msi_control_reg(pos), save);
460 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
462 #endif /* CONFIG_PM */
465 * msi_capability_init - configure device's MSI capability structure
466 * @dev: pointer to the pci_dev data structure of MSI device function
468 * Setup the MSI capability structure of device function with a single
469 * MSI irq, regardless of device function is capable of handling
470 * multiple messages. A return of zero indicates the successful setup
471 * of an entry zero with the new MSI irq or non-zero for otherwise.
473 static int msi_capability_init(struct pci_dev *dev)
476 struct msi_desc *entry;
480 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
481 pci_read_config_word(dev, msi_control_reg(pos), &control);
482 /* MSI Entry Initialization */
483 irq = create_msi_irq();
487 entry = get_irq_data(irq);
488 entry->link.head = irq;
489 entry->link.tail = irq;
490 entry->msi_attrib.type = PCI_CAP_ID_MSI;
491 entry->msi_attrib.is_64 = is_64bit_address(control);
492 entry->msi_attrib.entry_nr = 0;
493 entry->msi_attrib.maskbit = is_mask_bit_support(control);
494 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
495 entry->msi_attrib.pos = pos;
496 if (is_mask_bit_support(control)) {
497 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
498 is_64bit_address(control));
501 if (entry->msi_attrib.maskbit) {
502 unsigned int maskbits, temp;
503 /* All MSIs are unmasked by default, Mask them all */
504 pci_read_config_dword(dev,
505 msi_mask_bits_reg(pos, is_64bit_address(control)),
507 temp = (1 << multi_msi_capable(control));
508 temp = ((temp - 1) & ~temp);
510 pci_write_config_dword(dev,
511 msi_mask_bits_reg(pos, is_64bit_address(control)),
514 /* Configure MSI capability structure */
515 status = arch_setup_msi_irq(irq, dev);
517 destroy_msi_irq(irq);
521 attach_msi_entry(entry, irq);
522 /* Set MSI enabled bits */
523 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
530 * msix_capability_init - configure device's MSI-X capability
531 * @dev: pointer to the pci_dev data structure of MSI-X device function
532 * @entries: pointer to an array of struct msix_entry entries
533 * @nvec: number of @entries
535 * Setup the MSI-X capability structure of device function with a
536 * single MSI-X irq. A return of zero indicates the successful setup of
537 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
539 static int msix_capability_init(struct pci_dev *dev,
540 struct msix_entry *entries, int nvec)
542 struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
544 int irq, pos, i, j, nr_entries, temp = 0;
545 unsigned long phys_addr;
551 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
552 /* Request & Map MSI-X table region */
553 pci_read_config_word(dev, msi_control_reg(pos), &control);
554 nr_entries = multi_msix_capable(control);
556 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
557 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
558 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
559 phys_addr = pci_resource_start (dev, bir) + table_offset;
560 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
564 /* MSI-X Table Initialization */
565 for (i = 0; i < nvec; i++) {
566 irq = create_msi_irq();
570 entry = get_irq_data(irq);
571 j = entries[i].entry;
572 entries[i].vector = irq;
573 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
574 entry->msi_attrib.is_64 = 1;
575 entry->msi_attrib.entry_nr = j;
576 entry->msi_attrib.maskbit = 1;
577 entry->msi_attrib.default_irq = dev->irq;
578 entry->msi_attrib.pos = pos;
580 entry->mask_base = base;
582 entry->link.head = irq;
583 entry->link.tail = irq;
586 entry->link.head = temp;
587 entry->link.tail = tail->link.tail;
588 tail->link.tail = irq;
589 head->link.head = irq;
593 /* Configure MSI-X capability structure */
594 status = arch_setup_msi_irq(irq, dev);
596 destroy_msi_irq(irq);
600 attach_msi_entry(entry, irq);
605 for (; i >= 0; i--) {
606 irq = (entries + i)->vector;
607 msi_free_irq(dev, irq);
608 (entries + i)->vector = 0;
610 /* If we had some success report the number of irqs
611 * we succeeded in setting up.
617 /* Set MSI-X enabled bits */
618 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
624 * pci_msi_supported - check whether MSI may be enabled on device
625 * @dev: pointer to the pci_dev data structure of MSI device function
627 * Look at global flags, the device itself, and its parent busses
628 * to return 0 if MSI are supported for the device.
631 int pci_msi_supported(struct pci_dev * dev)
635 /* MSI must be globally enabled and supported by the device */
636 if (!pci_msi_enable || !dev || dev->no_msi)
639 /* Any bridge which does NOT route MSI transactions from it's
640 * secondary bus to it's primary bus must set NO_MSI flag on
641 * the secondary pci_bus.
642 * We expect only arch-specific PCI host bus controller driver
643 * or quirks for specific PCI bridges to be setting NO_MSI.
645 for (bus = dev->bus; bus; bus = bus->parent)
646 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
653 * pci_enable_msi - configure device's MSI capability structure
654 * @dev: pointer to the pci_dev data structure of MSI device function
656 * Setup the MSI capability structure of device function with
657 * a single MSI irq upon its software driver call to request for
658 * MSI mode enabled on its hardware device function. A return of zero
659 * indicates the successful setup of an entry zero with the new MSI
660 * irq or non-zero for otherwise.
662 int pci_enable_msi(struct pci_dev* dev)
664 int pos, temp, status;
666 if (pci_msi_supported(dev) < 0)
675 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
679 WARN_ON(!msi_lookup_irq(dev, PCI_CAP_ID_MSI));
681 /* Check whether driver already requested for MSI-X irqs */
682 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
683 if (pos > 0 && !msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
684 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
685 "Device already has MSI-X irq assigned\n",
690 status = msi_capability_init(dev);
694 void pci_disable_msi(struct pci_dev* dev)
696 struct msi_desc *entry;
697 int pos, default_irq;
706 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
710 pci_read_config_word(dev, msi_control_reg(pos), &control);
711 if (!(control & PCI_MSI_FLAGS_ENABLE))
714 disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
716 spin_lock_irqsave(&msi_lock, flags);
717 entry = msi_desc[dev->irq];
718 if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
719 spin_unlock_irqrestore(&msi_lock, flags);
722 if (irq_has_action(dev->irq)) {
723 spin_unlock_irqrestore(&msi_lock, flags);
724 printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without "
725 "free_irq() on MSI irq %d\n",
726 pci_name(dev), dev->irq);
727 BUG_ON(irq_has_action(dev->irq));
729 default_irq = entry->msi_attrib.default_irq;
730 spin_unlock_irqrestore(&msi_lock, flags);
731 msi_free_irq(dev, dev->irq);
733 /* Restore dev->irq to its default pin-assertion irq */
734 dev->irq = default_irq;
738 static int msi_free_irq(struct pci_dev* dev, int irq)
740 struct msi_desc *entry;
741 int head, entry_nr, type;
745 arch_teardown_msi_irq(irq);
747 spin_lock_irqsave(&msi_lock, flags);
748 entry = msi_desc[irq];
749 if (!entry || entry->dev != dev) {
750 spin_unlock_irqrestore(&msi_lock, flags);
753 type = entry->msi_attrib.type;
754 entry_nr = entry->msi_attrib.entry_nr;
755 head = entry->link.head;
756 base = entry->mask_base;
757 msi_desc[entry->link.head]->link.tail = entry->link.tail;
758 msi_desc[entry->link.tail]->link.head = entry->link.head;
760 msi_desc[irq] = NULL;
761 spin_unlock_irqrestore(&msi_lock, flags);
763 destroy_msi_irq(irq);
765 if (type == PCI_CAP_ID_MSIX) {
766 writel(1, base + entry_nr * PCI_MSIX_ENTRY_SIZE +
767 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
777 * pci_enable_msix - configure device's MSI-X capability structure
778 * @dev: pointer to the pci_dev data structure of MSI-X device function
779 * @entries: pointer to an array of MSI-X entries
780 * @nvec: number of MSI-X irqs requested for allocation by device driver
782 * Setup the MSI-X capability structure of device function with the number
783 * of requested irqs upon its software driver call to request for
784 * MSI-X mode enabled on its hardware device function. A return of zero
785 * indicates the successful configuration of MSI-X capability structure
786 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
787 * Or a return of > 0 indicates that driver request is exceeding the number
788 * of irqs available. Driver should use the returned value to re-send
791 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
793 int status, pos, nr_entries;
797 if (!entries || pci_msi_supported(dev) < 0)
804 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
808 pci_read_config_word(dev, msi_control_reg(pos), &control);
809 nr_entries = multi_msix_capable(control);
810 if (nvec > nr_entries)
813 /* Check for any invalid entries */
814 for (i = 0; i < nvec; i++) {
815 if (entries[i].entry >= nr_entries)
816 return -EINVAL; /* invalid entry */
817 for (j = i + 1; j < nvec; j++) {
818 if (entries[i].entry == entries[j].entry)
819 return -EINVAL; /* duplicate entry */
823 WARN_ON(!msi_lookup_irq(dev, PCI_CAP_ID_MSIX));
825 /* Check whether driver already requested for MSI irq */
826 if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0 &&
827 !msi_lookup_irq(dev, PCI_CAP_ID_MSI)) {
828 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
829 "Device already has an MSI irq assigned\n",
834 status = msix_capability_init(dev, entries, nvec);
838 void pci_disable_msix(struct pci_dev* dev)
848 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
852 pci_read_config_word(dev, msi_control_reg(pos), &control);
853 if (!(control & PCI_MSIX_FLAGS_ENABLE))
856 disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
859 if (!msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
860 int irq, head, tail = 0, warning = 0;
863 irq = head = dev->irq;
864 dev->irq = temp; /* Restore pin IRQ */
865 while (head != tail) {
866 spin_lock_irqsave(&msi_lock, flags);
867 tail = msi_desc[irq]->link.tail;
868 spin_unlock_irqrestore(&msi_lock, flags);
869 if (irq_has_action(irq))
871 else if (irq != head) /* Release MSI-X irq */
872 msi_free_irq(dev, irq);
875 msi_free_irq(dev, irq);
877 printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without "
878 "free_irq() on all MSI-X irqs\n",
886 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
887 * @dev: pointer to the pci_dev data structure of MSI(X) device function
889 * Being called during hotplug remove, from which the device function
890 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
891 * allocated for this device function, are reclaimed to unused state,
892 * which may be used later on.
894 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
899 if (!pci_msi_enable || !dev)
902 temp = dev->irq; /* Save IOAPIC IRQ */
903 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
904 if (pos > 0 && !msi_lookup_irq(dev, PCI_CAP_ID_MSI)) {
905 if (irq_has_action(dev->irq)) {
906 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
907 "called without free_irq() on MSI irq %d\n",
908 pci_name(dev), dev->irq);
909 BUG_ON(irq_has_action(dev->irq));
910 } else /* Release MSI irq assigned to this device */
911 msi_free_irq(dev, dev->irq);
912 dev->irq = temp; /* Restore IOAPIC IRQ */
914 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
915 if (pos > 0 && !msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
916 int irq, head, tail = 0, warning = 0;
917 void __iomem *base = NULL;
919 irq = head = dev->irq;
920 while (head != tail) {
921 spin_lock_irqsave(&msi_lock, flags);
922 tail = msi_desc[irq]->link.tail;
923 base = msi_desc[irq]->mask_base;
924 spin_unlock_irqrestore(&msi_lock, flags);
925 if (irq_has_action(irq))
927 else if (irq != head) /* Release MSI-X irq */
928 msi_free_irq(dev, irq);
931 msi_free_irq(dev, irq);
934 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
935 "called without free_irq() on all MSI-X irqs\n",
939 dev->irq = temp; /* Restore IOAPIC IRQ */
943 void pci_no_msi(void)
948 EXPORT_SYMBOL(pci_enable_msi);
949 EXPORT_SYMBOL(pci_disable_msi);
950 EXPORT_SYMBOL(pci_enable_msix);
951 EXPORT_SYMBOL(pci_disable_msix);