SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8180.h"
  26 #include "rtl8180_rtl8225.h"
  27 #include "rtl8180_sa2400.h"
  28 #include "rtl8180_max2820.h"
  29 #include "rtl8180_grf5101.h"
  30
  31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  34 MODULE_LICENSE("GPL");
  35
  36 static struct pci_device_id rtl8180_table[] __devinitdata = {
  37         /* rtl8185 */
  38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  41
  42         /* rtl8180 */
  43         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  44         { PCI_DEVICE(0x1799, 0x6001) },
  45         { PCI_DEVICE(0x1799, 0x6020) },
  46         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  47         { }
  48 };
  49
  50 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  51
  52 static const struct ieee80211_rate rtl818x_rates[] = {
  53         { .bitrate = 10, .hw_value = 0, },
  54         { .bitrate = 20, .hw_value = 1, },
  55         { .bitrate = 55, .hw_value = 2, },
  56         { .bitrate = 110, .hw_value = 3, },
  57         { .bitrate = 60, .hw_value = 4, },
  58         { .bitrate = 90, .hw_value = 5, },
  59         { .bitrate = 120, .hw_value = 6, },
  60         { .bitrate = 180, .hw_value = 7, },
  61         { .bitrate = 240, .hw_value = 8, },
  62         { .bitrate = 360, .hw_value = 9, },
  63         { .bitrate = 480, .hw_value = 10, },
  64         { .bitrate = 540, .hw_value = 11, },
  65 };
  66
  67 static const struct ieee80211_channel rtl818x_channels[] = {
  68         { .center_freq = 2412 },
  69         { .center_freq = 2417 },
  70         { .center_freq = 2422 },
  71         { .center_freq = 2427 },
  72         { .center_freq = 2432 },
  73         { .center_freq = 2437 },
  74         { .center_freq = 2442 },
  75         { .center_freq = 2447 },
  76         { .center_freq = 2452 },
  77         { .center_freq = 2457 },
  78         { .center_freq = 2462 },
  79         { .center_freq = 2467 },
  80         { .center_freq = 2472 },
  81         { .center_freq = 2484 },
  82 };
  83
  84
  85
  86
  87 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  88 {
  89         struct rtl8180_priv *priv = dev->priv;
  90         int i = 10;
  91         u32 buf;
  92
  93         buf = (data << 8) | addr;
  94
  95         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  96         while (i--) {
  97                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  98                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  99                         return;
 100         }
 101 }
 102
 103 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
 104 {
 105         struct rtl8180_priv *priv = dev->priv;
 106         unsigned int count = 32;
 107
 108         while (count--) {
 109                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
 110                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
 111                 u32 flags = le32_to_cpu(entry->flags);
 112
 113                 if (flags & RTL8180_RX_DESC_FLAG_OWN)
 114                         return;
 115
 116                 if (unlikely(flags & (RTL8180_RX_DESC_FLAG_DMA_FAIL |
 117                                       RTL8180_RX_DESC_FLAG_FOF |
 118                                       RTL8180_RX_DESC_FLAG_RX_ERR)))
 119                         goto done;
 120                 else {
 121                         u32 flags2 = le32_to_cpu(entry->flags2);
 122                         struct ieee80211_rx_status rx_status = {0};
 123                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
 124
 125                         if (unlikely(!new_skb))
 126                                 goto done;
 127
 128                         pci_unmap_single(priv->pdev,
 129                                          *((dma_addr_t *)skb->cb),
 130                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 131                         skb_put(skb, flags & 0xFFF);
 132
 133                         rx_status.antenna = (flags2 >> 15) & 1;
 134                         /* TODO: improve signal/rssi reporting */
 135                         rx_status.signal = flags2 & 0xFF;
 136                         rx_status.ssi = (flags2 >> 8) & 0x7F;
 137                         /* XXX: is this correct? */
 138                         rx_status.rate_idx = (flags >> 20) & 0xF;
 139                         rx_status.freq = dev->conf.channel->center_freq;
 140                         rx_status.band = dev->conf.channel->band;
 141                         rx_status.mactime = le64_to_cpu(entry->tsft);
 142                         rx_status.flag |= RX_FLAG_TSFT;
 143                         if (flags & RTL8180_RX_DESC_FLAG_CRC32_ERR)
 144                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 145
 146                         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 147
 148                         skb = new_skb;
 149                         priv->rx_buf[priv->rx_idx] = skb;
 150                         *((dma_addr_t *) skb->cb) =
 151                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 152                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 153                 }
 154
 155         done:
 156                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 157                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 158                                            MAX_RX_SIZE);
 159                 if (priv->rx_idx == 31)
 160                         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 161                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 162         }
 163 }
 164
 165 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 166 {
 167         struct rtl8180_priv *priv = dev->priv;
 168         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 169
 170         while (skb_queue_len(&ring->queue)) {
 171                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 172                 struct sk_buff *skb;
 173                 struct ieee80211_tx_status status;
 174                 struct ieee80211_tx_control *control;
 175                 u32 flags = le32_to_cpu(entry->flags);
 176
 177                 if (flags & RTL8180_TX_DESC_FLAG_OWN)
 178                         return;
 179
 180                 memset(&status, 0, sizeof(status));
 181
 182                 ring->idx = (ring->idx + 1) % ring->entries;
 183                 skb = __skb_dequeue(&ring->queue);
 184                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 185                                  skb->len, PCI_DMA_TODEVICE);
 186
 187                 control = *((struct ieee80211_tx_control **)skb->cb);
 188                 if (control)
 189                         memcpy(&status.control, control, sizeof(*control));
 190                 kfree(control);
 191
 192                 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
 193                         if (flags & RTL8180_TX_DESC_FLAG_TX_OK)
 194                                 status.flags = IEEE80211_TX_STATUS_ACK;
 195                         else
 196                                 status.excessive_retries = 1;
 197                 }
 198                 status.retry_count = flags & 0xFF;
 199
 200                 ieee80211_tx_status_irqsafe(dev, skb, &status);
 201                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 202                         ieee80211_wake_queue(dev, prio);
 203         }
 204 }
 205
 206 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 207 {
 208         struct ieee80211_hw *dev = dev_id;
 209         struct rtl8180_priv *priv = dev->priv;
 210         u16 reg;
 211
 212         spin_lock(&priv->lock);
 213         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 214         if (unlikely(reg == 0xFFFF)) {
 215                 spin_unlock(&priv->lock);
 216                 return IRQ_HANDLED;
 217         }
 218
 219         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 220
 221         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 222                 rtl8180_handle_tx(dev, 3);
 223
 224         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 225                 rtl8180_handle_tx(dev, 2);
 226
 227         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 228                 rtl8180_handle_tx(dev, 1);
 229
 230         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 231                 rtl8180_handle_tx(dev, 0);
 232
 233         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 234                 rtl8180_handle_rx(dev);
 235
 236         spin_unlock(&priv->lock);
 237
 238         return IRQ_HANDLED;
 239 }
 240
 241 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 242                       struct ieee80211_tx_control *control)
 243 {
 244         struct rtl8180_priv *priv = dev->priv;
 245         struct rtl8180_tx_ring *ring;
 246         struct rtl8180_tx_desc *entry;
 247         unsigned long flags;
 248         unsigned int idx, prio;
 249         dma_addr_t mapping;
 250         u32 tx_flags;
 251         u16 plcp_len = 0;
 252         __le16 rts_duration = 0;
 253
 254         prio = control->queue;
 255         ring = &priv->tx_ring[prio];
 256
 257         mapping = pci_map_single(priv->pdev, skb->data,
 258                                  skb->len, PCI_DMA_TODEVICE);
 259
 260         tx_flags = RTL8180_TX_DESC_FLAG_OWN | RTL8180_TX_DESC_FLAG_FS |
 261                    RTL8180_TX_DESC_FLAG_LS |
 262                    (control->tx_rate->hw_value << 24) |
 263                    (control->rts_cts_rate->hw_value << 19) | skb->len;
 264
 265         if (priv->r8185)
 266                 tx_flags |= RTL8180_TX_DESC_FLAG_DMA |
 267                             RTL8180_TX_DESC_FLAG_NO_ENC;
 268
 269         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 270                 tx_flags |= RTL8180_TX_DESC_FLAG_RTS;
 271         else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
 272                 tx_flags |= RTL8180_TX_DESC_FLAG_CTS;
 273
 274         *((struct ieee80211_tx_control **) skb->cb) =
 275                 kmemdup(control, sizeof(*control), GFP_ATOMIC);
 276
 277         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 278                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 279                                                       control);
 280
 281         if (!priv->r8185) {
 282                 unsigned int remainder;
 283
 284                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 285                                         (control->tx_rate->bitrate * 2) / 10);
 286                 remainder = (16 * (skb->len + 4)) %
 287                             ((control->tx_rate->bitrate * 2) / 10);
 288                 if (remainder > 0 && remainder <= 6)
 289                         plcp_len |= 1 << 15;
 290         }
 291
 292         spin_lock_irqsave(&priv->lock, flags);
 293         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 294         entry = &ring->desc[idx];
 295
 296         entry->rts_duration = rts_duration;
 297         entry->plcp_len = cpu_to_le16(plcp_len);
 298         entry->tx_buf = cpu_to_le32(mapping);
 299         entry->frame_len = cpu_to_le32(skb->len);
 300         entry->flags2 = control->alt_retry_rate != NULL ?
 301                         control->alt_retry_rate->bitrate << 4 : 0;
 302         entry->retry_limit = control->retry_limit;
 303         entry->flags = cpu_to_le32(tx_flags);
 304         __skb_queue_tail(&ring->queue, skb);
 305         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 306                 ieee80211_stop_queue(dev, control->queue);
 307         spin_unlock_irqrestore(&priv->lock, flags);
 308
 309         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 310
 311         return 0;
 312 }
 313
 314 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 315 {
 316         u8 reg;
 317
 318         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 319         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 320         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 321                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 322         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 323         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 324                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 325         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 326 }
 327
 328 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 329 {
 330         struct rtl8180_priv *priv = dev->priv;
 331         u16 reg;
 332
 333         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 334         rtl818x_ioread8(priv, &priv->map->CMD);
 335         msleep(10);
 336
 337         /* reset */
 338         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 339         rtl818x_ioread8(priv, &priv->map->CMD);
 340
 341         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 342         reg &= (1 << 1);
 343         reg |= RTL818X_CMD_RESET;
 344         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 345         rtl818x_ioread8(priv, &priv->map->CMD);
 346         msleep(200);
 347
 348         /* check success of reset */
 349         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 350                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 351                 return -ETIMEDOUT;
 352         }
 353
 354         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 355         rtl818x_ioread8(priv, &priv->map->CMD);
 356         msleep(200);
 357
 358         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 359                 /* For cardbus */
 360                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 361                 reg |= 1 << 1;
 362                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 363                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 364                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 365                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 366         }
 367
 368         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 369
 370         if (!priv->r8185)
 371                 rtl8180_set_anaparam(priv, priv->anaparam);
 372
 373         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 374         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 375         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 376         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 377         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 378
 379         /* TODO: necessary? specs indicate not */
 380         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 381         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 382         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 383         if (priv->r8185) {
 384                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 385                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 386         }
 387         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 388
 389         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 390
 391         /* TODO: turn off hw wep on rtl8180 */
 392
 393         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 394
 395         if (priv->r8185) {
 396                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 397                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 398                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 399
 400                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 401
 402                 /* TODO: set ClkRun enable? necessary? */
 403                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 404                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 405                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 406                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 407                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 408                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 409         } else {
 410                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 411                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 412
 413                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 414                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 415         }
 416
 417         priv->rf->init(dev);
 418         if (priv->r8185)
 419                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 420         return 0;
 421 }
 422
 423 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 424 {
 425         struct rtl8180_priv *priv = dev->priv;
 426         struct rtl8180_rx_desc *entry;
 427         int i;
 428
 429         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 430                                              sizeof(*priv->rx_ring) * 32,
 431                                              &priv->rx_ring_dma);
 432
 433         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 434                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 435                        wiphy_name(dev->wiphy));
 436                 return -ENOMEM;
 437         }
 438
 439         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 440         priv->rx_idx = 0;
 441
 442         for (i = 0; i < 32; i++) {
 443                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 444                 dma_addr_t *mapping;
 445                 entry = &priv->rx_ring[i];
 446                 if (!skb)
 447                         return 0;
 448
 449                 priv->rx_buf[i] = skb;
 450                 mapping = (dma_addr_t *)skb->cb;
 451                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 452                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 453                 entry->rx_buf = cpu_to_le32(*mapping);
 454                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 455                                            MAX_RX_SIZE);
 456         }
 457         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 458         return 0;
 459 }
 460
 461 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 462 {
 463         struct rtl8180_priv *priv = dev->priv;
 464         int i;
 465
 466         for (i = 0; i < 32; i++) {
 467                 struct sk_buff *skb = priv->rx_buf[i];
 468                 if (!skb)
 469                         continue;
 470
 471                 pci_unmap_single(priv->pdev,
 472                                  *((dma_addr_t *)skb->cb),
 473                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 474                 kfree_skb(skb);
 475         }
 476
 477         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 478                             priv->rx_ring, priv->rx_ring_dma);
 479         priv->rx_ring = NULL;
 480 }
 481
 482 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 483                                 unsigned int prio, unsigned int entries)
 484 {
 485         struct rtl8180_priv *priv = dev->priv;
 486         struct rtl8180_tx_desc *ring;
 487         dma_addr_t dma;
 488         int i;
 489
 490         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 491         if (!ring || (unsigned long)ring & 0xFF) {
 492                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 493                        wiphy_name(dev->wiphy), prio);
 494                 return -ENOMEM;
 495         }
 496
 497         memset(ring, 0, sizeof(*ring)*entries);
 498         priv->tx_ring[prio].desc = ring;
 499         priv->tx_ring[prio].dma = dma;
 500         priv->tx_ring[prio].idx = 0;
 501         priv->tx_ring[prio].entries = entries;
 502         skb_queue_head_init(&priv->tx_ring[prio].queue);
 503
 504         for (i = 0; i < entries; i++)
 505                 ring[i].next_tx_desc =
 506                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 507
 508         return 0;
 509 }
 510
 511 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 512 {
 513         struct rtl8180_priv *priv = dev->priv;
 514         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 515
 516         while (skb_queue_len(&ring->queue)) {
 517                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 518                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 519
 520                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 521                                  skb->len, PCI_DMA_TODEVICE);
 522                 kfree(*((struct ieee80211_tx_control **) skb->cb));
 523                 kfree_skb(skb);
 524                 ring->idx = (ring->idx + 1) % ring->entries;
 525         }
 526
 527         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 528                             ring->desc, ring->dma);
 529         ring->desc = NULL;
 530 }
 531
 532 static int rtl8180_start(struct ieee80211_hw *dev)
 533 {
 534         struct rtl8180_priv *priv = dev->priv;
 535         int ret, i;
 536         u32 reg;
 537
 538         ret = rtl8180_init_rx_ring(dev);
 539         if (ret)
 540                 return ret;
 541
 542         for (i = 0; i < 4; i++)
 543                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 544                         goto err_free_rings;
 545
 546         ret = rtl8180_init_hw(dev);
 547         if (ret)
 548                 goto err_free_rings;
 549
 550         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 551         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 552         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 553         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 554         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 555
 556         ret = request_irq(priv->pdev->irq, &rtl8180_interrupt,
 557                           IRQF_SHARED, KBUILD_MODNAME, dev);
 558         if (ret) {
 559                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 560                        wiphy_name(dev->wiphy));
 561                 goto err_free_rings;
 562         }
 563
 564         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 565
 566         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 567         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 568
 569         reg = RTL818X_RX_CONF_ONLYERLPKT |
 570               RTL818X_RX_CONF_RX_AUTORESETPHY |
 571               RTL818X_RX_CONF_MGMT |
 572               RTL818X_RX_CONF_DATA |
 573               (7 << 8 /* MAX RX DMA */) |
 574               RTL818X_RX_CONF_BROADCAST |
 575               RTL818X_RX_CONF_NICMAC;
 576
 577         if (priv->r8185)
 578                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 579         else {
 580                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 581                         ? RTL818X_RX_CONF_CSDM1 : 0;
 582                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 583                         ? RTL818X_RX_CONF_CSDM2 : 0;
 584         }
 585
 586         priv->rx_conf = reg;
 587         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 588
 589         if (priv->r8185) {
 590                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 591                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 592                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 593                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 594
 595                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 596                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 597                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 598                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 599                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 600
 601                 /* disable early TX */
 602                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 603         }
 604
 605         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 606         reg |= (6 << 21 /* MAX TX DMA */) |
 607                RTL818X_TX_CONF_NO_ICV;
 608
 609         if (priv->r8185)
 610                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 611         else
 612                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 613
 614         /* different meaning, same value on both rtl8185 and rtl8180 */
 615         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 616
 617         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 618
 619         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 620         reg |= RTL818X_CMD_RX_ENABLE;
 621         reg |= RTL818X_CMD_TX_ENABLE;
 622         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 623
 624         priv->mode = IEEE80211_IF_TYPE_MNTR;
 625         return 0;
 626
 627  err_free_rings:
 628         rtl8180_free_rx_ring(dev);
 629         for (i = 0; i < 4; i++)
 630                 if (priv->tx_ring[i].desc)
 631                         rtl8180_free_tx_ring(dev, i);
 632
 633         return ret;
 634 }
 635
 636 static void rtl8180_stop(struct ieee80211_hw *dev)
 637 {
 638         struct rtl8180_priv *priv = dev->priv;
 639         u8 reg;
 640         int i;
 641
 642         priv->mode = IEEE80211_IF_TYPE_INVALID;
 643
 644         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 645
 646         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 647         reg &= ~RTL818X_CMD_TX_ENABLE;
 648         reg &= ~RTL818X_CMD_RX_ENABLE;
 649         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 650
 651         priv->rf->stop(dev);
 652
 653         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 654         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 655         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 656         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 657
 658         free_irq(priv->pdev->irq, dev);
 659
 660         rtl8180_free_rx_ring(dev);
 661         for (i = 0; i < 4; i++)
 662                 rtl8180_free_tx_ring(dev, i);
 663 }
 664
 665 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 666                                  struct ieee80211_if_init_conf *conf)
 667 {
 668         struct rtl8180_priv *priv = dev->priv;
 669
 670         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 671                 return -EOPNOTSUPP;
 672
 673         switch (conf->type) {
 674         case IEEE80211_IF_TYPE_STA:
 675                 priv->mode = conf->type;
 676                 break;
 677         default:
 678                 return -EOPNOTSUPP;
 679         }
 680
 681         priv->vif = conf->vif;
 682
 683         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 684         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 685                           cpu_to_le32(*(u32 *)conf->mac_addr));
 686         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 687                           cpu_to_le16(*(u16 *)(conf->mac_addr + 4)));
 688         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 689
 690         return 0;
 691 }
 692
 693 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 694                                      struct ieee80211_if_init_conf *conf)
 695 {
 696         struct rtl8180_priv *priv = dev->priv;
 697         priv->mode = IEEE80211_IF_TYPE_MNTR;
 698         priv->vif = NULL;
 699 }
 700
 701 static int rtl8180_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 702 {
 703         struct rtl8180_priv *priv = dev->priv;
 704
 705         priv->rf->set_chan(dev, conf);
 706
 707         return 0;
 708 }
 709
 710 static int rtl8180_config_interface(struct ieee80211_hw *dev,
 711                                     struct ieee80211_vif *vif,
 712                                     struct ieee80211_if_conf *conf)
 713 {
 714         struct rtl8180_priv *priv = dev->priv;
 715         int i;
 716
 717         for (i = 0; i < ETH_ALEN; i++)
 718                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 719
 720         if (is_valid_ether_addr(conf->bssid))
 721                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
 722         else
 723                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
 724
 725         return 0;
 726 }
 727
 728 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 729                                      unsigned int changed_flags,
 730                                      unsigned int *total_flags,
 731                                      int mc_count, struct dev_addr_list *mclist)
 732 {
 733         struct rtl8180_priv *priv = dev->priv;
 734
 735         if (changed_flags & FIF_FCSFAIL)
 736                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 737         if (changed_flags & FIF_CONTROL)
 738                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 739         if (changed_flags & FIF_OTHER_BSS)
 740                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 741         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 742                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 743         else
 744                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 745
 746         *total_flags = 0;
 747
 748         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 749                 *total_flags |= FIF_FCSFAIL;
 750         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 751                 *total_flags |= FIF_CONTROL;
 752         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 753                 *total_flags |= FIF_OTHER_BSS;
 754         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 755                 *total_flags |= FIF_ALLMULTI;
 756
 757         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 758 }
 759
 760 static const struct ieee80211_ops rtl8180_ops = {
 761         .tx                     = rtl8180_tx,
 762         .start                  = rtl8180_start,
 763         .stop                   = rtl8180_stop,
 764         .add_interface          = rtl8180_add_interface,
 765         .remove_interface       = rtl8180_remove_interface,
 766         .config                 = rtl8180_config,
 767         .config_interface       = rtl8180_config_interface,
 768         .configure_filter       = rtl8180_configure_filter,
 769 };
 770
 771 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 772 {
 773         struct ieee80211_hw *dev = eeprom->data;
 774         struct rtl8180_priv *priv = dev->priv;
 775         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 776
 777         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 778         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 779         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 780         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 781 }
 782
 783 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 784 {
 785         struct ieee80211_hw *dev = eeprom->data;
 786         struct rtl8180_priv *priv = dev->priv;
 787         u8 reg = 2 << 6;
 788
 789         if (eeprom->reg_data_in)
 790                 reg |= RTL818X_EEPROM_CMD_WRITE;
 791         if (eeprom->reg_data_out)
 792                 reg |= RTL818X_EEPROM_CMD_READ;
 793         if (eeprom->reg_data_clock)
 794                 reg |= RTL818X_EEPROM_CMD_CK;
 795         if (eeprom->reg_chip_select)
 796                 reg |= RTL818X_EEPROM_CMD_CS;
 797
 798         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 799         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 800         udelay(10);
 801 }
 802
 803 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 804                                    const struct pci_device_id *id)
 805 {
 806         struct ieee80211_hw *dev;
 807         struct rtl8180_priv *priv;
 808         unsigned long mem_addr, mem_len;
 809         unsigned int io_addr, io_len;
 810         int err, i;
 811         struct eeprom_93cx6 eeprom;
 812         const char *chip_name, *rf_name = NULL;
 813         u32 reg;
 814         u16 eeprom_val;
 815         DECLARE_MAC_BUF(mac);
 816
 817         err = pci_enable_device(pdev);
 818         if (err) {
 819                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 820                        pci_name(pdev));
 821                 return err;
 822         }
 823
 824         err = pci_request_regions(pdev, KBUILD_MODNAME);
 825         if (err) {
 826                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 827                        pci_name(pdev));
 828                 return err;
 829         }
 830
 831         io_addr = pci_resource_start(pdev, 0);
 832         io_len = pci_resource_len(pdev, 0);
 833         mem_addr = pci_resource_start(pdev, 1);
 834         mem_len = pci_resource_len(pdev, 1);
 835
 836         if (mem_len < sizeof(struct rtl818x_csr) ||
 837             io_len < sizeof(struct rtl818x_csr)) {
 838                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 839                        pci_name(pdev));
 840                 err = -ENOMEM;
 841                 goto err_free_reg;
 842         }
 843
 844         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 845             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 846                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 847                        pci_name(pdev));
 848                 goto err_free_reg;
 849         }
 850
 851         pci_set_master(pdev);
 852
 853         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 854         if (!dev) {
 855                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 856                        pci_name(pdev));
 857                 err = -ENOMEM;
 858                 goto err_free_reg;
 859         }
 860
 861         priv = dev->priv;
 862         priv->pdev = pdev;
 863
 864         SET_IEEE80211_DEV(dev, &pdev->dev);
 865         pci_set_drvdata(pdev, dev);
 866
 867         priv->map = pci_iomap(pdev, 1, mem_len);
 868         if (!priv->map)
 869                 priv->map = pci_iomap(pdev, 0, io_len);
 870
 871         if (!priv->map) {
 872                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 873                        pci_name(pdev));
 874                 goto err_free_dev;
 875         }
 876
 877         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
 878         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
 879
 880         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 881         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 882
 883         priv->band.band = IEEE80211_BAND_2GHZ;
 884         priv->band.channels = priv->channels;
 885         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
 886         priv->band.bitrates = priv->rates;
 887         priv->band.n_bitrates = 4;
 888         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
 889
 890         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 891                      IEEE80211_HW_RX_INCLUDES_FCS;
 892         dev->queues = 1;
 893         dev->max_rssi = 65;
 894
 895         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 896         reg &= RTL818X_TX_CONF_HWVER_MASK;
 897         switch (reg) {
 898         case RTL818X_TX_CONF_R8180_ABCD:
 899                 chip_name = "RTL8180";
 900                 break;
 901         case RTL818X_TX_CONF_R8180_F:
 902                 chip_name = "RTL8180vF";
 903                 break;
 904         case RTL818X_TX_CONF_R8185_ABC:
 905                 chip_name = "RTL8185";
 906                 break;
 907         case RTL818X_TX_CONF_R8185_D:
 908                 chip_name = "RTL8185vD";
 909                 break;
 910         default:
 911                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
 912                        pci_name(pdev), reg >> 25);
 913                 goto err_iounmap;
 914         }
 915
 916         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
 917         if (priv->r8185) {
 918                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
 919                 pci_try_set_mwi(pdev);
 920         }
 921
 922         eeprom.data = dev;
 923         eeprom.register_read = rtl8180_eeprom_register_read;
 924         eeprom.register_write = rtl8180_eeprom_register_write;
 925         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 926                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 927         else
 928                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 929
 930         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
 931         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 932         udelay(10);
 933
 934         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
 935         eeprom_val &= 0xFF;
 936         switch (eeprom_val) {
 937         case 1: rf_name = "Intersil";
 938                 break;
 939         case 2: rf_name = "RFMD";
 940                 break;
 941         case 3: priv->rf = &sa2400_rf_ops;
 942                 break;
 943         case 4: priv->rf = &max2820_rf_ops;
 944                 break;
 945         case 5: priv->rf = &grf5101_rf_ops;
 946                 break;
 947         case 9: priv->rf = rtl8180_detect_rf(dev);
 948                 break;
 949         case 10:
 950                 rf_name = "RTL8255";
 951                 break;
 952         default:
 953                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
 954                        pci_name(pdev), eeprom_val);
 955                 goto err_iounmap;
 956         }
 957
 958         if (!priv->rf) {
 959                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
 960                        pci_name(pdev), rf_name);
 961                 goto err_iounmap;
 962         }
 963
 964         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
 965         priv->csthreshold = eeprom_val >> 8;
 966         if (!priv->r8185) {
 967                 __le32 anaparam;
 968                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
 969                 priv->anaparam = le32_to_cpu(anaparam);
 970                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
 971         }
 972
 973         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
 974         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 975                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
 976                        " randomly generated MAC addr\n", pci_name(pdev));
 977                 random_ether_addr(dev->wiphy->perm_addr);
 978         }
 979
 980         /* CCK TX power */
 981         for (i = 0; i < 14; i += 2) {
 982                 u16 txpwr;
 983                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
 984                 priv->channels[i].hw_value = txpwr & 0xFF;
 985                 priv->channels[i + 1].hw_value = txpwr >> 8;
 986         }
 987
 988         /* OFDM TX power */
 989         if (priv->r8185) {
 990                 for (i = 0; i < 14; i += 2) {
 991                         u16 txpwr;
 992                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
 993                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
 994                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
 995                 }
 996         }
 997
 998         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 999
1000         spin_lock_init(&priv->lock);
1001
1002         err = ieee80211_register_hw(dev);
1003         if (err) {
1004                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1005                        pci_name(pdev));
1006                 goto err_iounmap;
1007         }
1008
1009         printk(KERN_INFO "%s: hwaddr %s, %s + %s\n",
1010                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1011                chip_name, priv->rf->name);
1012
1013         return 0;
1014
1015  err_iounmap:
1016         iounmap(priv->map);
1017
1018  err_free_dev:
1019         pci_set_drvdata(pdev, NULL);
1020         ieee80211_free_hw(dev);
1021
1022  err_free_reg:
1023         pci_release_regions(pdev);
1024         pci_disable_device(pdev);
1025         return err;
1026 }
1027
1028 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1029 {
1030         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1031         struct rtl8180_priv *priv;
1032
1033         if (!dev)
1034                 return;
1035
1036         ieee80211_unregister_hw(dev);
1037
1038         priv = dev->priv;
1039
1040         pci_iounmap(pdev, priv->map);
1041         pci_release_regions(pdev);
1042         pci_disable_device(pdev);
1043         ieee80211_free_hw(dev);
1044 }
1045
1046 #ifdef CONFIG_PM
1047 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1048 {
1049         pci_save_state(pdev);
1050         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1051         return 0;
1052 }
1053
1054 static int rtl8180_resume(struct pci_dev *pdev)
1055 {
1056         pci_set_power_state(pdev, PCI_D0);
1057         pci_restore_state(pdev);
1058         return 0;
1059 }
1060
1061 #endif /* CONFIG_PM */
1062
1063 static struct pci_driver rtl8180_driver = {
1064         .name           = KBUILD_MODNAME,
1065         .id_table       = rtl8180_table,
1066         .probe          = rtl8180_probe,
1067         .remove         = __devexit_p(rtl8180_remove),
1068 #ifdef CONFIG_PM
1069         .suspend        = rtl8180_suspend,
1070         .resume         = rtl8180_resume,
1071 #endif /* CONFIG_PM */
1072 };
1073
1074 static int __init rtl8180_init(void)
1075 {
1076         return pci_register_driver(&rtl8180_driver);
1077 }
1078
1079 static void __exit rtl8180_exit(void)
1080 {
1081         pci_unregister_driver(&rtl8180_driver);
1082 }
1083
1084 module_init(rtl8180_init);
1085 module_exit(rtl8180_exit);