SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 /*
  28  * Set enviroment defines for rt2x00.h
  29  */
  30 #define DRV_NAME "rt73usb"
  31
  32 #include <linux/delay.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/init.h>
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/usb.h>
  38
  39 #include "rt2x00.h"
  40 #include "rt2x00usb.h"
  41 #include "rt73usb.h"
  42
  43 /*
  44  * Register access.
  45  * All access to the CSR registers will go through the methods
  46  * rt73usb_register_read and rt73usb_register_write.
  47  * BBP and RF register require indirect register access,
  48  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  49  * These indirect registers work with busy bits,
  50  * and we will try maximal REGISTER_BUSY_COUNT times to access
  51  * the register while taking a REGISTER_BUSY_DELAY us delay
  52  * between each attampt. When the busy bit is still set at that time,
  53  * the access attempt is considered to have failed,
  54  * and we will print an error.
  55  */
  56 static inline void rt73usb_register_read(const struct rt2x00_dev *rt2x00dev,
  57                                          const unsigned int offset, u32 *value)
  58 {
  59         __le32 reg;
  60         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  61                                       USB_VENDOR_REQUEST_IN, offset,
  62                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  63         *value = le32_to_cpu(reg);
  64 }
  65
  66 static inline void rt73usb_register_multiread(const struct rt2x00_dev
  67                                               *rt2x00dev,
  68                                               const unsigned int offset,
  69                                               void *value, const u32 length)
  70 {
  71         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  72         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  73                                       USB_VENDOR_REQUEST_IN, offset,
  74                                       value, length, timeout);
  75 }
  76
  77 static inline void rt73usb_register_write(const struct rt2x00_dev *rt2x00dev,
  78                                           const unsigned int offset, u32 value)
  79 {
  80         __le32 reg = cpu_to_le32(value);
  81         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  82                                       USB_VENDOR_REQUEST_OUT, offset,
  83                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  84 }
  85
  86 static inline void rt73usb_register_multiwrite(const struct rt2x00_dev
  87                                                *rt2x00dev,
  88                                                const unsigned int offset,
  89                                                void *value, const u32 length)
  90 {
  91         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  92         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  93                                       USB_VENDOR_REQUEST_OUT, offset,
  94                                       value, length, timeout);
  95 }
  96
  97 static u32 rt73usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
  98 {
  99         u32 reg;
 100         unsigned int i;
 101
 102         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 103                 rt73usb_register_read(rt2x00dev, PHY_CSR3, &reg);
 104                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 105                         break;
 106                 udelay(REGISTER_BUSY_DELAY);
 107         }
 108
 109         return reg;
 110 }
 111
 112 static void rt73usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
 113                               const unsigned int word, const u8 value)
 114 {
 115         u32 reg;
 116
 117         /*
 118          * Wait until the BBP becomes ready.
 119          */
 120         reg = rt73usb_bbp_check(rt2x00dev);
 121         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 122                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 123                 return;
 124         }
 125
 126         /*
 127          * Write the data into the BBP.
 128          */
 129         reg = 0;
 130         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 131         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 132         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 133         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 134
 135         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 136 }
 137
 138 static void rt73usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
 139                              const unsigned int word, u8 *value)
 140 {
 141         u32 reg;
 142
 143         /*
 144          * Wait until the BBP becomes ready.
 145          */
 146         reg = rt73usb_bbp_check(rt2x00dev);
 147         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 148                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 149                 return;
 150         }
 151
 152         /*
 153          * Write the request into the BBP.
 154          */
 155         reg = 0;
 156         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 157         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 158         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 159
 160         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 161
 162         /*
 163          * Wait until the BBP becomes ready.
 164          */
 165         reg = rt73usb_bbp_check(rt2x00dev);
 166         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 167                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 168                 *value = 0xff;
 169                 return;
 170         }
 171
 172         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 173 }
 174
 175 static void rt73usb_rf_write(const struct rt2x00_dev *rt2x00dev,
 176                              const unsigned int word, const u32 value)
 177 {
 178         u32 reg;
 179         unsigned int i;
 180
 181         if (!word)
 182                 return;
 183
 184         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 185                 rt73usb_register_read(rt2x00dev, PHY_CSR4, &reg);
 186                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 187                         goto rf_write;
 188                 udelay(REGISTER_BUSY_DELAY);
 189         }
 190
 191         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 192         return;
 193
 194 rf_write:
 195         reg = 0;
 196         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 197
 198         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 199             rt2x00_rf(&rt2x00dev->chip, RF2527))
 200                 rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS, 21);
 201         else
 202                 rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS, 20);
 203
 204         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 205         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 206
 207         rt73usb_register_write(rt2x00dev, PHY_CSR4, reg);
 208         rt2x00_rf_write(rt2x00dev, word, value);
 209 }
 210
 211 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 212 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 213
 214 static void rt73usb_read_csr(const struct rt2x00_dev *rt2x00dev,
 215                              const unsigned int word, u32 *data)
 216 {
 217         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 218 }
 219
 220 static void rt73usb_write_csr(const struct rt2x00_dev *rt2x00dev,
 221                               const unsigned int word, u32 data)
 222 {
 223         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 224 }
 225
 226 static const struct rt2x00debug rt73usb_rt2x00debug = {
 227         .owner  = THIS_MODULE,
 228         .csr    = {
 229                 .read           = rt73usb_read_csr,
 230                 .write          = rt73usb_write_csr,
 231                 .word_size      = sizeof(u32),
 232                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 233         },
 234         .eeprom = {
 235                 .read           = rt2x00_eeprom_read,
 236                 .write          = rt2x00_eeprom_write,
 237                 .word_size      = sizeof(u16),
 238                 .word_count     = EEPROM_SIZE / sizeof(u16),
 239         },
 240         .bbp    = {
 241                 .read           = rt73usb_bbp_read,
 242                 .write          = rt73usb_bbp_write,
 243                 .word_size      = sizeof(u8),
 244                 .word_count     = BBP_SIZE / sizeof(u8),
 245         },
 246         .rf     = {
 247                 .read           = rt2x00_rf_read,
 248                 .write          = rt73usb_rf_write,
 249                 .word_size      = sizeof(u32),
 250                 .word_count     = RF_SIZE / sizeof(u32),
 251         },
 252 };
 253 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 254
 255 /*
 256  * Configuration handlers.
 257  */
 258 static void rt73usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, __le32 *mac)
 259 {
 260         u32 tmp;
 261
 262         tmp = le32_to_cpu(mac[1]);
 263         rt2x00_set_field32(&tmp, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 264         mac[1] = cpu_to_le32(tmp);
 265
 266         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
 267                                     (2 * sizeof(__le32)));
 268 }
 269
 270 static void rt73usb_config_bssid(struct rt2x00_dev *rt2x00dev, __le32 *bssid)
 271 {
 272         u32 tmp;
 273
 274         tmp = le32_to_cpu(bssid[1]);
 275         rt2x00_set_field32(&tmp, MAC_CSR5_BSS_ID_MASK, 3);
 276         bssid[1] = cpu_to_le32(tmp);
 277
 278         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4, bssid,
 279                                     (2 * sizeof(__le32)));
 280 }
 281
 282 static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
 283                                 const int tsf_sync)
 284 {
 285         u32 reg;
 286
 287         /*
 288          * Clear current synchronisation setup.
 289          * For the Beacon base registers we only need to clear
 290          * the first byte since that byte contains the VALID and OWNER
 291          * bits which (when set to 0) will invalidate the entire beacon.
 292          */
 293         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 294         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
 295         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
 296         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
 297         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
 298
 299         /*
 300          * Enable synchronisation.
 301          */
 302         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 303         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 304         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 305         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 306         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, tsf_sync);
 307         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 308 }
 309
 310 static void rt73usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
 311 {
 312         struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
 313         u32 reg;
 314         u32 value;
 315         u32 preamble;
 316
 317         if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
 318                 preamble = SHORT_PREAMBLE;
 319         else
 320                 preamble = PREAMBLE;
 321
 322         reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK;
 323
 324         rt73usb_register_write(rt2x00dev, TXRX_CSR5, reg);
 325
 326         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 327         value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
 328                  SHORT_DIFS : DIFS) +
 329             PLCP + preamble + get_duration(ACK_SIZE, 10);
 330         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, value);
 331         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 332
 333         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 334         if (preamble == SHORT_PREAMBLE)
 335                 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 1);
 336         else
 337                 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 0);
 338         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 339 }
 340
 341 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 342                                    const int phymode)
 343 {
 344         struct ieee80211_hw_mode *mode;
 345         struct ieee80211_rate *rate;
 346
 347         if (phymode == MODE_IEEE80211A)
 348                 rt2x00dev->curr_hwmode = HWMODE_A;
 349         else if (phymode == MODE_IEEE80211B)
 350                 rt2x00dev->curr_hwmode = HWMODE_B;
 351         else
 352                 rt2x00dev->curr_hwmode = HWMODE_G;
 353
 354         mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
 355         rate = &mode->rates[mode->num_rates - 1];
 356
 357         rt73usb_config_rate(rt2x00dev, rate->val2);
 358 }
 359
 360 static void rt73usb_config_lock_channel(struct rt2x00_dev *rt2x00dev,
 361                                         struct rf_channel *rf,
 362                                         const int txpower)
 363 {
 364         u8 r3;
 365         u8 r94;
 366         u8 smart;
 367
 368         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 369         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 370
 371         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 372                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 373
 374         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 375         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 376         rt73usb_bbp_write(rt2x00dev, 3, r3);
 377
 378         r94 = 6;
 379         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 380                 r94 += txpower - MAX_TXPOWER;
 381         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 382                 r94 += txpower;
 383         rt73usb_bbp_write(rt2x00dev, 94, r94);
 384
 385         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 386         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 387         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 388         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 389
 390         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 391         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 392         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 393         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 394
 395         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 396         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 397         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 398         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 399
 400         udelay(10);
 401 }
 402
 403 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 404                                    const int index, const int channel,
 405                                    const int txpower)
 406 {
 407         struct rf_channel rf;
 408
 409         /*
 410          * Fill rf_reg structure.
 411          */
 412         memcpy(&rf, &rt2x00dev->spec.channels[index], sizeof(rf));
 413
 414         rt73usb_config_lock_channel(rt2x00dev, &rf, txpower);
 415 }
 416
 417 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 418                                    const int txpower)
 419 {
 420         struct rf_channel rf;
 421
 422         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 423         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 424         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 425         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 426
 427         rt73usb_config_lock_channel(rt2x00dev, &rf, txpower);
 428 }
 429
 430 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 431                                       const int antenna_tx,
 432                                       const int antenna_rx)
 433 {
 434         u8 r3;
 435         u8 r4;
 436         u8 r77;
 437
 438         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 439         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 440         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 441
 442         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 443
 444         switch (antenna_rx) {
 445         case ANTENNA_SW_DIVERSITY:
 446         case ANTENNA_HW_DIVERSITY:
 447                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 448                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 449                                   !!(rt2x00dev->curr_hwmode != HWMODE_A));
 450                 break;
 451         case ANTENNA_A:
 452                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 453                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 454
 455                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 456                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 457                 else
 458                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 459                 break;
 460         case ANTENNA_B:
 461                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 462                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 463
 464                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 465                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 466                 else
 467                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 468                 break;
 469         }
 470
 471         rt73usb_bbp_write(rt2x00dev, 77, r77);
 472         rt73usb_bbp_write(rt2x00dev, 3, r3);
 473         rt73usb_bbp_write(rt2x00dev, 4, r4);
 474 }
 475
 476 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 477                                       const int antenna_tx,
 478                                       const int antenna_rx)
 479 {
 480         u8 r3;
 481         u8 r4;
 482         u8 r77;
 483
 484         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 485         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 486         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 487
 488         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 489         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 490                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 491
 492         switch (antenna_rx) {
 493         case ANTENNA_SW_DIVERSITY:
 494         case ANTENNA_HW_DIVERSITY:
 495                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 496                 break;
 497         case ANTENNA_A:
 498                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 499                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 500                 break;
 501         case ANTENNA_B:
 502                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 503                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 504                 break;
 505         }
 506
 507         rt73usb_bbp_write(rt2x00dev, 77, r77);
 508         rt73usb_bbp_write(rt2x00dev, 3, r3);
 509         rt73usb_bbp_write(rt2x00dev, 4, r4);
 510 }
 511
 512 struct antenna_sel {
 513         u8 word;
 514         /*
 515          * value[0] -> non-LNA
 516          * value[1] -> LNA
 517          */
 518         u8 value[2];
 519 };
 520
 521 static const struct antenna_sel antenna_sel_a[] = {
 522         { 96,  { 0x58, 0x78 } },
 523         { 104, { 0x38, 0x48 } },
 524         { 75,  { 0xfe, 0x80 } },
 525         { 86,  { 0xfe, 0x80 } },
 526         { 88,  { 0xfe, 0x80 } },
 527         { 35,  { 0x60, 0x60 } },
 528         { 97,  { 0x58, 0x58 } },
 529         { 98,  { 0x58, 0x58 } },
 530 };
 531
 532 static const struct antenna_sel antenna_sel_bg[] = {
 533         { 96,  { 0x48, 0x68 } },
 534         { 104, { 0x2c, 0x3c } },
 535         { 75,  { 0xfe, 0x80 } },
 536         { 86,  { 0xfe, 0x80 } },
 537         { 88,  { 0xfe, 0x80 } },
 538         { 35,  { 0x50, 0x50 } },
 539         { 97,  { 0x48, 0x48 } },
 540         { 98,  { 0x48, 0x48 } },
 541 };
 542
 543 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 544                                    const int antenna_tx, const int antenna_rx)
 545 {
 546         const struct antenna_sel *sel;
 547         unsigned int lna;
 548         unsigned int i;
 549         u32 reg;
 550
 551         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 552
 553         if (rt2x00dev->curr_hwmode == HWMODE_A) {
 554                 sel = antenna_sel_a;
 555                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 556
 557                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 0);
 558                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 1);
 559         } else {
 560                 sel = antenna_sel_bg;
 561                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 562
 563                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 1);
 564                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 0);
 565         }
 566
 567         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 568                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 569
 570         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 571
 572         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 573             rt2x00_rf(&rt2x00dev->chip, RF5225))
 574                 rt73usb_config_antenna_5x(rt2x00dev, antenna_tx, antenna_rx);
 575         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 576                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 577                 rt73usb_config_antenna_2x(rt2x00dev, antenna_tx, antenna_rx);
 578 }
 579
 580 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 581                                     const int short_slot_time,
 582                                     const int beacon_int)
 583 {
 584         u32 reg;
 585
 586         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 587         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME,
 588                            short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
 589         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 590
 591         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 592         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, SIFS);
 593         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 594         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, EIFS);
 595         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 596
 597         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 598         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 599         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 600
 601         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 602         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 603         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 604
 605         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 606         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL, beacon_int * 16);
 607         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 608 }
 609
 610 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 611                            const unsigned int flags,
 612                            struct ieee80211_conf *conf)
 613 {
 614         int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
 615
 616         if (flags & CONFIG_UPDATE_PHYMODE)
 617                 rt73usb_config_phymode(rt2x00dev, conf->phymode);
 618         if (flags & CONFIG_UPDATE_CHANNEL)
 619                 rt73usb_config_channel(rt2x00dev, conf->channel_val,
 620                                        conf->channel, conf->power_level);
 621         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 622                 rt73usb_config_txpower(rt2x00dev, conf->power_level);
 623         if (flags & CONFIG_UPDATE_ANTENNA)
 624                 rt73usb_config_antenna(rt2x00dev, conf->antenna_sel_tx,
 625                                        conf->antenna_sel_rx);
 626         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 627                 rt73usb_config_duration(rt2x00dev, short_slot_time,
 628                                         conf->beacon_int);
 629 }
 630
 631 /*
 632  * LED functions.
 633  */
 634 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 635 {
 636         u32 reg;
 637
 638         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 639         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 640         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 641         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 642
 643         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 644         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A)
 645                 rt2x00_set_field16(&rt2x00dev->led_reg,
 646                                    MCU_LEDCS_LINK_A_STATUS, 1);
 647         else
 648                 rt2x00_set_field16(&rt2x00dev->led_reg,
 649                                    MCU_LEDCS_LINK_BG_STATUS, 1);
 650
 651         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 652                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 653 }
 654
 655 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 656 {
 657         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 658         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 659         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 660
 661         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 662                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 663 }
 664
 665 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, int rssi)
 666 {
 667         u32 led;
 668
 669         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 670                 return;
 671
 672         /*
 673          * Led handling requires a positive value for the rssi,
 674          * to do that correctly we need to add the correction.
 675          */
 676         rssi += rt2x00dev->rssi_offset;
 677
 678         if (rssi <= 30)
 679                 led = 0;
 680         else if (rssi <= 39)
 681                 led = 1;
 682         else if (rssi <= 49)
 683                 led = 2;
 684         else if (rssi <= 53)
 685                 led = 3;
 686         else if (rssi <= 63)
 687                 led = 4;
 688         else
 689                 led = 5;
 690
 691         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, led,
 692                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 693 }
 694
 695 /*
 696  * Link tuning
 697  */
 698 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev)
 699 {
 700         u32 reg;
 701
 702         /*
 703          * Update FCS error count from register.
 704          */
 705         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 706         rt2x00dev->link.rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 707
 708         /*
 709          * Update False CCA count from register.
 710          */
 711         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 712         reg = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 713         rt2x00dev->link.false_cca =
 714             rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 715 }
 716
 717 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 718 {
 719         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 720         rt2x00dev->link.vgc_level = 0x20;
 721 }
 722
 723 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 724 {
 725         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 726         u8 r17;
 727         u8 up_bound;
 728         u8 low_bound;
 729
 730         /*
 731          * Update Led strength
 732          */
 733         rt73usb_activity_led(rt2x00dev, rssi);
 734
 735         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 736
 737         /*
 738          * Determine r17 bounds.
 739          */
 740         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
 741                 low_bound = 0x28;
 742                 up_bound = 0x48;
 743
 744                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 745                         low_bound += 0x10;
 746                         up_bound += 0x10;
 747                 }
 748         } else {
 749                 if (rssi > -82) {
 750                         low_bound = 0x1c;
 751                         up_bound = 0x40;
 752                 } else if (rssi > -84) {
 753                         low_bound = 0x1c;
 754                         up_bound = 0x20;
 755                 } else {
 756                         low_bound = 0x1c;
 757                         up_bound = 0x1c;
 758                 }
 759
 760                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 761                         low_bound += 0x14;
 762                         up_bound += 0x10;
 763                 }
 764         }
 765
 766         /*
 767          * Special big-R17 for very short distance
 768          */
 769         if (rssi > -35) {
 770                 if (r17 != 0x60)
 771                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 772                 return;
 773         }
 774
 775         /*
 776          * Special big-R17 for short distance
 777          */
 778         if (rssi >= -58) {
 779                 if (r17 != up_bound)
 780                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 781                 return;
 782         }
 783
 784         /*
 785          * Special big-R17 for middle-short distance
 786          */
 787         if (rssi >= -66) {
 788                 low_bound += 0x10;
 789                 if (r17 != low_bound)
 790                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 791                 return;
 792         }
 793
 794         /*
 795          * Special mid-R17 for middle distance
 796          */
 797         if (rssi >= -74) {
 798                 if (r17 != (low_bound + 0x10))
 799                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 800                 return;
 801         }
 802
 803         /*
 804          * Special case: Change up_bound based on the rssi.
 805          * Lower up_bound when rssi is weaker then -74 dBm.
 806          */
 807         up_bound -= 2 * (-74 - rssi);
 808         if (low_bound > up_bound)
 809                 up_bound = low_bound;
 810
 811         if (r17 > up_bound) {
 812                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 813                 return;
 814         }
 815
 816         /*
 817          * r17 does not yet exceed upper limit, continue and base
 818          * the r17 tuning on the false CCA count.
 819          */
 820         if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) {
 821                 r17 += 4;
 822                 if (r17 > up_bound)
 823                         r17 = up_bound;
 824                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 825         } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) {
 826                 r17 -= 4;
 827                 if (r17 < low_bound)
 828                         r17 = low_bound;
 829                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 830         }
 831 }
 832
 833 /*
 834  * Firmware name function.
 835  */
 836 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 837 {
 838         return FIRMWARE_RT2571;
 839 }
 840
 841 /*
 842  * Initialization functions.
 843  */
 844 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 845                                  const size_t len)
 846 {
 847         unsigned int i;
 848         int status;
 849         u32 reg;
 850         char *ptr = data;
 851         char *cache;
 852         int buflen;
 853         int timeout;
 854
 855         /*
 856          * Wait for stable hardware.
 857          */
 858         for (i = 0; i < 100; i++) {
 859                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 860                 if (reg)
 861                         break;
 862                 msleep(1);
 863         }
 864
 865         if (!reg) {
 866                 ERROR(rt2x00dev, "Unstable hardware.\n");
 867                 return -EBUSY;
 868         }
 869
 870         /*
 871          * Write firmware to device.
 872          * We setup a seperate cache for this action,
 873          * since we are going to write larger chunks of data
 874          * then normally used cache size.
 875          */
 876         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 877         if (!cache) {
 878                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 879                 return -ENOMEM;
 880         }
 881
 882         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 883                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 884                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 885
 886                 memcpy(cache, ptr, buflen);
 887
 888                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 889                                          USB_VENDOR_REQUEST_OUT,
 890                                          FIRMWARE_IMAGE_BASE + i, 0x0000,
 891                                          cache, buflen, timeout);
 892
 893                 ptr += buflen;
 894         }
 895
 896         kfree(cache);
 897
 898         /*
 899          * Send firmware request to device to load firmware,
 900          * we need to specify a long timeout time.
 901          */
 902         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 903                                              0x0000, USB_MODE_FIRMWARE,
 904                                              REGISTER_TIMEOUT_FIRMWARE);
 905         if (status < 0) {
 906                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 907                 return status;
 908         }
 909
 910         rt73usb_disable_led(rt2x00dev);
 911
 912         return 0;
 913 }
 914
 915 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 916 {
 917         u32 reg;
 918
 919         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 920         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 921         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 922         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 923         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 924
 925         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 926         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 927         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 928         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 929         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 930         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 931         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 932         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 933         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 934         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 935
 936         /*
 937          * CCK TXD BBP registers
 938          */
 939         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 940         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 941         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 942         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 943         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 944         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 945         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 946         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 947         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 948         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 949
 950         /*
 951          * OFDM TXD BBP registers
 952          */
 953         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 954         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 955         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 956         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 957         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 958         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 959         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 960         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 961
 962         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 963         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 964         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 965         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 966         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 967         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 968
 969         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 970         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 971         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 972         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 973         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 974         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 975
 976         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 977
 978         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 979         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
 980         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
 981
 982         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
 983
 984         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
 985                 return -EBUSY;
 986
 987         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
 988
 989         /*
 990          * Invalidate all Shared Keys (SEC_CSR0),
 991          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
 992          */
 993         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
 994         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
 995         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
 996
 997         reg = 0x000023b0;
 998         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 999             rt2x00_rf(&rt2x00dev->chip, RF2527))
1000                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1001         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1002
1003         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1004         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1005         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1006
1007         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1008         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1009         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1010         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1011
1012         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1013         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1014         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1015         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1016
1017         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1018         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1019         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1020
1021         /*
1022          * We must clear the error counters.
1023          * These registers are cleared on read,
1024          * so we may pass a useless variable to store the value.
1025          */
1026         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1027         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1028         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1029
1030         /*
1031          * Reset MAC and BBP registers.
1032          */
1033         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1034         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1035         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1036         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1037
1038         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1039         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1040         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1041         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1042
1043         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1044         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1045         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1046
1047         return 0;
1048 }
1049
1050 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1051 {
1052         unsigned int i;
1053         u16 eeprom;
1054         u8 reg_id;
1055         u8 value;
1056
1057         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1058                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1059                 if ((value != 0xff) && (value != 0x00))
1060                         goto continue_csr_init;
1061                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1062                 udelay(REGISTER_BUSY_DELAY);
1063         }
1064
1065         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1066         return -EACCES;
1067
1068 continue_csr_init:
1069         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1070         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1071         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1072         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1073         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1074         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1075         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1076         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1077         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1078         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1079         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1080         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1081         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1082         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1083         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1084         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1085         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1086         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1087         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1088         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1089         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1090         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1091         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1092         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1093         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1094
1095         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1096         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1097                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1098
1099                 if (eeprom != 0xffff && eeprom != 0x0000) {
1100                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1101                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1102                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1103                               reg_id, value);
1104                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1105                 }
1106         }
1107         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1108
1109         return 0;
1110 }
1111
1112 /*
1113  * Device state switch handlers.
1114  */
1115 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1116                               enum dev_state state)
1117 {
1118         u32 reg;
1119
1120         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1121         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1122                            state == STATE_RADIO_RX_OFF);
1123         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1124 }
1125
1126 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1127 {
1128         /*
1129          * Initialize all registers.
1130          */
1131         if (rt73usb_init_registers(rt2x00dev) ||
1132             rt73usb_init_bbp(rt2x00dev)) {
1133                 ERROR(rt2x00dev, "Register initialization failed.\n");
1134                 return -EIO;
1135         }
1136
1137         rt2x00usb_enable_radio(rt2x00dev);
1138
1139         /*
1140          * Enable LED
1141          */
1142         rt73usb_enable_led(rt2x00dev);
1143
1144         return 0;
1145 }
1146
1147 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1148 {
1149         /*
1150          * Disable LED
1151          */
1152         rt73usb_disable_led(rt2x00dev);
1153
1154         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1155
1156         /*
1157          * Disable synchronisation.
1158          */
1159         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1160
1161         rt2x00usb_disable_radio(rt2x00dev);
1162 }
1163
1164 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1165 {
1166         u32 reg;
1167         unsigned int i;
1168         char put_to_sleep;
1169         char current_state;
1170
1171         put_to_sleep = (state != STATE_AWAKE);
1172
1173         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1174         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1175         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1176         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1177
1178         /*
1179          * Device is not guaranteed to be in the requested state yet.
1180          * We must wait until the register indicates that the
1181          * device has entered the correct state.
1182          */
1183         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1184                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1185                 current_state =
1186                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1187                 if (current_state == !put_to_sleep)
1188                         return 0;
1189                 msleep(10);
1190         }
1191
1192         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1193                "current device state %d.\n", !put_to_sleep, current_state);
1194
1195         return -EBUSY;
1196 }
1197
1198 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1199                                     enum dev_state state)
1200 {
1201         int retval = 0;
1202
1203         switch (state) {
1204         case STATE_RADIO_ON:
1205                 retval = rt73usb_enable_radio(rt2x00dev);
1206                 break;
1207         case STATE_RADIO_OFF:
1208                 rt73usb_disable_radio(rt2x00dev);
1209                 break;
1210         case STATE_RADIO_RX_ON:
1211         case STATE_RADIO_RX_OFF:
1212                 rt73usb_toggle_rx(rt2x00dev, state);
1213                 break;
1214         case STATE_DEEP_SLEEP:
1215         case STATE_SLEEP:
1216         case STATE_STANDBY:
1217         case STATE_AWAKE:
1218                 retval = rt73usb_set_state(rt2x00dev, state);
1219                 break;
1220         default:
1221                 retval = -ENOTSUPP;
1222                 break;
1223         }
1224
1225         return retval;
1226 }
1227
1228 /*
1229  * TX descriptor initialization
1230  */
1231 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1232                                   struct data_desc *txd,
1233                                   struct txdata_entry_desc *desc,
1234                                   struct ieee80211_hdr *ieee80211hdr,
1235                                   unsigned int length,
1236                                   struct ieee80211_tx_control *control)
1237 {
1238         u32 word;
1239
1240         /*
1241          * Start writing the descriptor words.
1242          */
1243         rt2x00_desc_read(txd, 1, &word);
1244         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue);
1245         rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs);
1246         rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1247         rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1248         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1249         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1250         rt2x00_desc_write(txd, 1, word);
1251
1252         rt2x00_desc_read(txd, 2, &word);
1253         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1254         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1255         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1256         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1257         rt2x00_desc_write(txd, 2, word);
1258
1259         rt2x00_desc_read(txd, 5, &word);
1260         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1261                            TXPOWER_TO_DEV(control->power_level));
1262         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1263         rt2x00_desc_write(txd, 5, word);
1264
1265         rt2x00_desc_read(txd, 0, &word);
1266         rt2x00_set_field32(&word, TXD_W0_BURST,
1267                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1268         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1269         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1270                            test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1271         rt2x00_set_field32(&word, TXD_W0_ACK,
1272                            !(control->flags & IEEE80211_TXCTL_NO_ACK));
1273         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1274                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1275         rt2x00_set_field32(&word, TXD_W0_OFDM,
1276                            test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1277         rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1278         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1279                            !!(control->flags &
1280                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1281         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1282         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1283         rt2x00_set_field32(&word, TXD_W0_BURST2,
1284                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1285         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1286         rt2x00_desc_write(txd, 0, word);
1287 }
1288
1289 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1290                                    int maxpacket, struct sk_buff *skb)
1291 {
1292         int length;
1293
1294         /*
1295          * The length _must_ be a multiple of 4,
1296          * but it must _not_ be a multiple of the USB packet size.
1297          */
1298         length = roundup(skb->len, 4);
1299         length += (4 * !(length % maxpacket));
1300
1301         return length;
1302 }
1303
1304 /*
1305  * TX data initialization
1306  */
1307 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1308                                   unsigned int queue)
1309 {
1310         u32 reg;
1311
1312         if (queue != IEEE80211_TX_QUEUE_BEACON)
1313                 return;
1314
1315         /*
1316          * For Wi-Fi faily generated beacons between participating stations.
1317          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1318          */
1319         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1320
1321         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1322         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1323                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1324                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1325         }
1326 }
1327
1328 /*
1329  * RX control handlers
1330  */
1331 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1332 {
1333         u16 eeprom;
1334         u8 offset;
1335         u8 lna;
1336
1337         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1338         switch (lna) {
1339         case 3:
1340                 offset = 90;
1341                 break;
1342         case 2:
1343                 offset = 74;
1344                 break;
1345         case 1:
1346                 offset = 64;
1347                 break;
1348         default:
1349                 return 0;
1350         }
1351
1352         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
1353                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1354                         if (lna == 3 || lna == 2)
1355                                 offset += 10;
1356                 } else {
1357                         if (lna == 3)
1358                                 offset += 6;
1359                         else if (lna == 2)
1360                                 offset += 8;
1361                 }
1362
1363                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1364                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1365         } else {
1366                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1367                         offset += 14;
1368
1369                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1370                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1371         }
1372
1373         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1374 }
1375
1376 static void rt73usb_fill_rxdone(struct data_entry *entry,
1377                                 struct rxdata_entry_desc *desc)
1378 {
1379         struct data_desc *rxd = (struct data_desc *)entry->skb->data;
1380         u32 word0;
1381         u32 word1;
1382
1383         rt2x00_desc_read(rxd, 0, &word0);
1384         rt2x00_desc_read(rxd, 1, &word1);
1385
1386         desc->flags = 0;
1387         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1388                 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1389
1390         /*
1391          * Obtain the status about this packet.
1392          */
1393         desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1394         desc->rssi = rt73usb_agc_to_rssi(entry->ring->rt2x00dev, word1);
1395         desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1396         desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1397
1398         /*
1399          * Pull the skb to clear the descriptor area.
1400          */
1401         skb_pull(entry->skb, entry->ring->desc_size);
1402
1403         return;
1404 }
1405
1406 /*
1407  * Device probe functions.
1408  */
1409 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1410 {
1411         u16 word;
1412         u8 *mac;
1413         s8 value;
1414
1415         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1416
1417         /*
1418          * Start validation of the data that has been read.
1419          */
1420         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1421         if (!is_valid_ether_addr(mac)) {
1422                 DECLARE_MAC_BUF(macbuf);
1423
1424                 random_ether_addr(mac);
1425                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1426         }
1427
1428         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1429         if (word == 0xffff) {
1430                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1431                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 2);
1432                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 2);
1433                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1434                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1435                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1436                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1437                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1438                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1439         }
1440
1441         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1442         if (word == 0xffff) {
1443                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1444                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1445                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1446         }
1447
1448         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1449         if (word == 0xffff) {
1450                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1451                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1452                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1453                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1454                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1455                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1456                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1457                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1458                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1459                                    LED_MODE_DEFAULT);
1460                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1461                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1462         }
1463
1464         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1465         if (word == 0xffff) {
1466                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1467                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1468                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1469                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1470         }
1471
1472         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1473         if (word == 0xffff) {
1474                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1475                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1476                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1477                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1478         } else {
1479                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1480                 if (value < -10 || value > 10)
1481                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1482                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1483                 if (value < -10 || value > 10)
1484                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1485                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1486         }
1487
1488         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1489         if (word == 0xffff) {
1490                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1491                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1492                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1493                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1494         } else {
1495                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1496                 if (value < -10 || value > 10)
1497                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1498                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1499                 if (value < -10 || value > 10)
1500                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1501                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1502         }
1503
1504         return 0;
1505 }
1506
1507 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1508 {
1509         u32 reg;
1510         u16 value;
1511         u16 eeprom;
1512
1513         /*
1514          * Read EEPROM word for configuration.
1515          */
1516         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1517
1518         /*
1519          * Identify RF chipset.
1520          */
1521         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1522         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1523         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1524
1525         if (!rt2x00_rev(&rt2x00dev->chip, 0x25730)) {
1526                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1527                 return -ENODEV;
1528         }
1529
1530         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1531             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1532             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1533             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1534                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1535                 return -ENODEV;
1536         }
1537
1538         /*
1539          * Identify default antenna configuration.
1540          */
1541         rt2x00dev->hw->conf.antenna_sel_tx =
1542             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1543         rt2x00dev->hw->conf.antenna_sel_rx =
1544             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1545
1546         /*
1547          * Read the Frame type.
1548          */
1549         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1550                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1551
1552         /*
1553          * Read frequency offset.
1554          */
1555         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1556         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1557
1558         /*
1559          * Read external LNA informations.
1560          */
1561         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1562
1563         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1564                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1565                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1566         }
1567
1568         /*
1569          * Store led settings, for correct led behaviour.
1570          */
1571         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1572
1573         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1574                            rt2x00dev->led_mode);
1575         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1576                            rt2x00_get_field16(eeprom,
1577                                               EEPROM_LED_POLARITY_GPIO_0));
1578         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1579                            rt2x00_get_field16(eeprom,
1580                                               EEPROM_LED_POLARITY_GPIO_1));
1581         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1582                            rt2x00_get_field16(eeprom,
1583                                               EEPROM_LED_POLARITY_GPIO_2));
1584         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1585                            rt2x00_get_field16(eeprom,
1586                                               EEPROM_LED_POLARITY_GPIO_3));
1587         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1588                            rt2x00_get_field16(eeprom,
1589                                               EEPROM_LED_POLARITY_GPIO_4));
1590         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1591                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1592         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1593                            rt2x00_get_field16(eeprom,
1594                                               EEPROM_LED_POLARITY_RDY_G));
1595         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1596                            rt2x00_get_field16(eeprom,
1597                                               EEPROM_LED_POLARITY_RDY_A));
1598
1599         return 0;
1600 }
1601
1602 /*
1603  * RF value list for RF2528
1604  * Supports: 2.4 GHz
1605  */
1606 static const struct rf_channel rf_vals_bg_2528[] = {
1607         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1608         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1609         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1610         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1611         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1612         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1613         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1614         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1615         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1616         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1617         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1618         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1619         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1620         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1621 };
1622
1623 /*
1624  * RF value list for RF5226
1625  * Supports: 2.4 GHz & 5.2 GHz
1626  */
1627 static const struct rf_channel rf_vals_5226[] = {
1628         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1629         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1630         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1631         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1632         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1633         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1634         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1635         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1636         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1637         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1638         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1639         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1640         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1641         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1642
1643         /* 802.11 UNI / HyperLan 2 */
1644         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1645         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1646         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1647         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1648         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1649         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1650         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1651         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1652
1653         /* 802.11 HyperLan 2 */
1654         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1655         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1656         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1657         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1658         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1659         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1660         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1661         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1662         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1663         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1664
1665         /* 802.11 UNII */
1666         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1667         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1668         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1669         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1670         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1671         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1672
1673         /* MMAC(Japan)J52 ch 34,38,42,46 */
1674         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1675         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1676         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1677         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1678 };
1679
1680 /*
1681  * RF value list for RF5225 & RF2527
1682  * Supports: 2.4 GHz & 5.2 GHz
1683  */
1684 static const struct rf_channel rf_vals_5225_2527[] = {
1685         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1686         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1687         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1688         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1689         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1690         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1691         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1692         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1693         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1694         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1695         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1696         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1697         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1698         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1699
1700         /* 802.11 UNI / HyperLan 2 */
1701         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1702         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1703         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1704         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1705         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1706         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1707         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1708         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1709
1710         /* 802.11 HyperLan 2 */
1711         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1712         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1713         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1714         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1715         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1716         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1717         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1718         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1719         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1720         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1721
1722         /* 802.11 UNII */
1723         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1724         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1725         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1726         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1727         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1728         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1729
1730         /* MMAC(Japan)J52 ch 34,38,42,46 */
1731         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1732         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1733         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1734         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1735 };
1736
1737
1738 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1739 {
1740         struct hw_mode_spec *spec = &rt2x00dev->spec;
1741         u8 *txpower;
1742         unsigned int i;
1743
1744         /*
1745          * Initialize all hw fields.
1746          */
1747         rt2x00dev->hw->flags =
1748             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1749             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1750         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1751         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1752         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1753         rt2x00dev->hw->queues = 5;
1754
1755         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1756         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1757                                 rt2x00_eeprom_addr(rt2x00dev,
1758                                                    EEPROM_MAC_ADDR_0));
1759
1760         /*
1761          * Convert tx_power array in eeprom.
1762          */
1763         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1764         for (i = 0; i < 14; i++)
1765                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1766
1767         /*
1768          * Initialize hw_mode information.
1769          */
1770         spec->num_modes = 2;
1771         spec->num_rates = 12;
1772         spec->tx_power_a = NULL;
1773         spec->tx_power_bg = txpower;
1774         spec->tx_power_default = DEFAULT_TXPOWER;
1775
1776         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1777                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1778                 spec->channels = rf_vals_bg_2528;
1779         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1780                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1781                 spec->channels = rf_vals_5226;
1782         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1783                 spec->num_channels = 14;
1784                 spec->channels = rf_vals_5225_2527;
1785         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1786                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1787                 spec->channels = rf_vals_5225_2527;
1788         }
1789
1790         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1791             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1792                 spec->num_modes = 3;
1793
1794                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1795                 for (i = 0; i < 14; i++)
1796                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1797
1798                 spec->tx_power_a = txpower;
1799         }
1800 }
1801
1802 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1803 {
1804         int retval;
1805
1806         /*
1807          * Allocate eeprom data.
1808          */
1809         retval = rt73usb_validate_eeprom(rt2x00dev);
1810         if (retval)
1811                 return retval;
1812
1813         retval = rt73usb_init_eeprom(rt2x00dev);
1814         if (retval)
1815                 return retval;
1816
1817         /*
1818          * Initialize hw specifications.
1819          */
1820         rt73usb_probe_hw_mode(rt2x00dev);
1821
1822         /*
1823          * This device requires firmware
1824          */
1825         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1826
1827         /*
1828          * Set the rssi offset.
1829          */
1830         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1831
1832         return 0;
1833 }
1834
1835 /*
1836  * IEEE80211 stack callback functions.
1837  */
1838 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1839                                      unsigned int changed_flags,
1840                                      unsigned int *total_flags,
1841                                      int mc_count,
1842                                      struct dev_addr_list *mc_list)
1843 {
1844         struct rt2x00_dev *rt2x00dev = hw->priv;
1845         struct interface *intf = &rt2x00dev->interface;
1846         u32 reg;
1847
1848         /*
1849          * Mask off any flags we are going to ignore from
1850          * the total_flags field.
1851          */
1852         *total_flags &=
1853             FIF_ALLMULTI |
1854             FIF_FCSFAIL |
1855             FIF_PLCPFAIL |
1856             FIF_CONTROL |
1857             FIF_OTHER_BSS |
1858             FIF_PROMISC_IN_BSS;
1859
1860         /*
1861          * Apply some rules to the filters:
1862          * - Some filters imply different filters to be set.
1863          * - Some things we can't filter out at all.
1864          * - Some filters are set based on interface type.
1865          */
1866         if (mc_count)
1867                 *total_flags |= FIF_ALLMULTI;
1868         if (*total_flags & FIF_OTHER_BSS ||
1869             *total_flags & FIF_PROMISC_IN_BSS)
1870                 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1871         if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1872                 *total_flags |= FIF_PROMISC_IN_BSS;
1873
1874         /*
1875          * Check if there is any work left for us.
1876          */
1877         if (intf->filter == *total_flags)
1878                 return;
1879         intf->filter = *total_flags;
1880
1881         /*
1882          * When in atomic context, reschedule and let rt2x00lib
1883          * call this function again.
1884          */
1885         if (in_atomic()) {
1886                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1887                 return;
1888         }
1889
1890         /*
1891          * Start configuration steps.
1892          * Note that the version error will always be dropped
1893          * and broadcast frames will always be accepted since
1894          * there is no filter for it at this time.
1895          */
1896         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1897         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
1898                            !(*total_flags & FIF_FCSFAIL));
1899         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
1900                            !(*total_flags & FIF_PLCPFAIL));
1901         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
1902                            !(*total_flags & FIF_CONTROL));
1903         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
1904                            !(*total_flags & FIF_PROMISC_IN_BSS));
1905         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
1906                            !(*total_flags & FIF_PROMISC_IN_BSS));
1907         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1908         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
1909                            !(*total_flags & FIF_ALLMULTI));
1910         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
1911         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS, 1);
1912         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1913 }
1914
1915 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1916                                    u32 short_retry, u32 long_retry)
1917 {
1918         struct rt2x00_dev *rt2x00dev = hw->priv;
1919         u32 reg;
1920
1921         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1922         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1923         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1924         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1925
1926         return 0;
1927 }
1928
1929 #if 0
1930 /*
1931  * Mac80211 demands get_tsf must be atomic.
1932  * This is not possible for rt73usb since all register access
1933  * functions require sleeping. Untill mac80211 no longer needs
1934  * get_tsf to be atomic, this function should be disabled.
1935  */
1936 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1937 {
1938         struct rt2x00_dev *rt2x00dev = hw->priv;
1939         u64 tsf;
1940         u32 reg;
1941
1942         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1943         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1944         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1945         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1946
1947         return tsf;
1948 }
1949 #endif
1950
1951 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1952 {
1953         struct rt2x00_dev *rt2x00dev = hw->priv;
1954
1955         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
1956         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
1957 }
1958
1959 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1960                           struct ieee80211_tx_control *control)
1961 {
1962         struct rt2x00_dev *rt2x00dev = hw->priv;
1963         int timeout;
1964
1965         /*
1966          * Just in case the ieee80211 doesn't set this,
1967          * but we need this queue set for the descriptor
1968          * initialization.
1969          */
1970         control->queue = IEEE80211_TX_QUEUE_BEACON;
1971
1972         /*
1973          * First we create the beacon.
1974          */
1975         skb_push(skb, TXD_DESC_SIZE);
1976         rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1977                                 (struct ieee80211_hdr *)(skb->data +
1978                                                          TXD_DESC_SIZE),
1979                                 skb->len - TXD_DESC_SIZE, control);
1980
1981         /*
1982          * Write entire beacon with descriptor to register,
1983          * and kick the beacon generator.
1984          */
1985         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
1986         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
1987                                  USB_VENDOR_REQUEST_OUT,
1988                                  HW_BEACON_BASE0, 0x0000,
1989                                  skb->data, skb->len, timeout);
1990         rt73usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1991
1992         return 0;
1993 }
1994
1995 static const struct ieee80211_ops rt73usb_mac80211_ops = {
1996         .tx                     = rt2x00mac_tx,
1997         .start                  = rt2x00mac_start,
1998         .stop                   = rt2x00mac_stop,
1999         .add_interface          = rt2x00mac_add_interface,
2000         .remove_interface       = rt2x00mac_remove_interface,
2001         .config                 = rt2x00mac_config,
2002         .config_interface       = rt2x00mac_config_interface,
2003         .configure_filter       = rt73usb_configure_filter,
2004         .get_stats              = rt2x00mac_get_stats,
2005         .set_retry_limit        = rt73usb_set_retry_limit,
2006         .conf_tx                = rt2x00mac_conf_tx,
2007         .get_tx_stats           = rt2x00mac_get_tx_stats,
2008 #if 0
2009 /*
2010  * See comment at the rt73usb_get_tsf function.
2011  */
2012         .get_tsf                = rt73usb_get_tsf,
2013 #endif
2014         .reset_tsf              = rt73usb_reset_tsf,
2015         .beacon_update          = rt73usb_beacon_update,
2016 };
2017
2018 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2019         .probe_hw               = rt73usb_probe_hw,
2020         .get_firmware_name      = rt73usb_get_firmware_name,
2021         .load_firmware          = rt73usb_load_firmware,
2022         .initialize             = rt2x00usb_initialize,
2023         .uninitialize           = rt2x00usb_uninitialize,
2024         .set_device_state       = rt73usb_set_device_state,
2025         .link_stats             = rt73usb_link_stats,
2026         .reset_tuner            = rt73usb_reset_tuner,
2027         .link_tuner             = rt73usb_link_tuner,
2028         .write_tx_desc          = rt73usb_write_tx_desc,
2029         .write_tx_data          = rt2x00usb_write_tx_data,
2030         .get_tx_data_len        = rt73usb_get_tx_data_len,
2031         .kick_tx_queue          = rt73usb_kick_tx_queue,
2032         .fill_rxdone            = rt73usb_fill_rxdone,
2033         .config_mac_addr        = rt73usb_config_mac_addr,
2034         .config_bssid           = rt73usb_config_bssid,
2035         .config_type            = rt73usb_config_type,
2036         .config                 = rt73usb_config,
2037 };
2038
2039 static const struct rt2x00_ops rt73usb_ops = {
2040         .name           = DRV_NAME,
2041         .rxd_size       = RXD_DESC_SIZE,
2042         .txd_size       = TXD_DESC_SIZE,
2043         .eeprom_size    = EEPROM_SIZE,
2044         .rf_size        = RF_SIZE,
2045         .lib            = &rt73usb_rt2x00_ops,
2046         .hw             = &rt73usb_mac80211_ops,
2047 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2048         .debugfs        = &rt73usb_rt2x00debug,
2049 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2050 };
2051
2052 /*
2053  * rt73usb module information.
2054  */
2055 static struct usb_device_id rt73usb_device_table[] = {
2056         /* AboCom */
2057         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2058         /* Askey */
2059         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2060         /* ASUS */
2061         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2062         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2063         /* Belkin */
2064         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2065         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2066         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2067         /* Billionton */
2068         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2069         /* Buffalo */
2070         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2071         /* CNet */
2072         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2073         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2074         /* Conceptronic */
2075         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2076         /* D-Link */
2077         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2078         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2079         /* Gemtek */
2080         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2081         /* Gigabyte */
2082         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2083         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2084         /* Huawei-3Com */
2085         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2086         /* Hercules */
2087         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2088         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2089         /* Linksys */
2090         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2091         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2092         /* MSI */
2093         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2094         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2095         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2096         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2097         /* Ralink */
2098         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2099         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2100         /* Qcom */
2101         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2102         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2103         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2104         /* Senao */
2105         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2106         /* Sitecom */
2107         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2108         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2109         /* Surecom */
2110         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2111         /* Planex */
2112         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2113         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2114         { 0, }
2115 };
2116
2117 MODULE_AUTHOR(DRV_PROJECT);
2118 MODULE_VERSION(DRV_VERSION);
2119 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2120 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2121 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2122 MODULE_FIRMWARE(FIRMWARE_RT2571);
2123 MODULE_LICENSE("GPL");
2124
2125 static struct usb_driver rt73usb_driver = {
2126         .name           = DRV_NAME,
2127         .id_table       = rt73usb_device_table,
2128         .probe          = rt2x00usb_probe,
2129         .disconnect     = rt2x00usb_disconnect,
2130         .suspend        = rt2x00usb_suspend,
2131         .resume         = rt2x00usb_resume,
2132 };
2133
2134 static int __init rt73usb_init(void)
2135 {
2136         return usb_register(&rt73usb_driver);
2137 }
2138
2139 static void __exit rt73usb_exit(void)
2140 {
2141         usb_deregister(&rt73usb_driver);
2142 }
2143
2144 module_init(rt73usb_init);
2145 module_exit(rt73usb_exit);