SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 #include <linux/delay.h>
  28 #include <linux/etherdevice.h>
  29 #include <linux/init.h>
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/usb.h>
  33
  34 #include "rt2x00.h"
  35 #include "rt2x00usb.h"
  36 #include "rt73usb.h"
  37
  38 /*
  39  * Register access.
  40  * All access to the CSR registers will go through the methods
  41  * rt73usb_register_read and rt73usb_register_write.
  42  * BBP and RF register require indirect register access,
  43  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  44  * These indirect registers work with busy bits,
  45  * and we will try maximal REGISTER_BUSY_COUNT times to access
  46  * the register while taking a REGISTER_BUSY_DELAY us delay
  47  * between each attampt. When the busy bit is still set at that time,
  48  * the access attempt is considered to have failed,
  49  * and we will print an error.
  50  * The _lock versions must be used if you already hold the usb_cache_mutex
  51  */
  52 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  53                                          const unsigned int offset, u32 *value)
  54 {
  55         __le32 reg;
  56         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  57                                       USB_VENDOR_REQUEST_IN, offset,
  58                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  59         *value = le32_to_cpu(reg);
  60 }
  61
  62 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  63                                               const unsigned int offset, u32 *value)
  64 {
  65         __le32 reg;
  66         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  67                                        USB_VENDOR_REQUEST_IN, offset,
  68                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  69         *value = le32_to_cpu(reg);
  70 }
  71
  72 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  73                                               const unsigned int offset,
  74                                               void *value, const u32 length)
  75 {
  76         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  77         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  78                                       USB_VENDOR_REQUEST_IN, offset,
  79                                       value, length, timeout);
  80 }
  81
  82 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  83                                           const unsigned int offset, u32 value)
  84 {
  85         __le32 reg = cpu_to_le32(value);
  86         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  87                                       USB_VENDOR_REQUEST_OUT, offset,
  88                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  89 }
  90
  91 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  92                                                const unsigned int offset, u32 value)
  93 {
  94         __le32 reg = cpu_to_le32(value);
  95         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  96                                        USB_VENDOR_REQUEST_OUT, offset,
  97                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  98 }
  99
 100 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 101                                                const unsigned int offset,
 102                                                void *value, const u32 length)
 103 {
 104         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
 105         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 106                                       USB_VENDOR_REQUEST_OUT, offset,
 107                                       value, length, timeout);
 108 }
 109
 110 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 111 {
 112         u32 reg;
 113         unsigned int i;
 114
 115         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 116                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 117                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 118                         break;
 119                 udelay(REGISTER_BUSY_DELAY);
 120         }
 121
 122         return reg;
 123 }
 124
 125 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 126                               const unsigned int word, const u8 value)
 127 {
 128         u32 reg;
 129
 130         mutex_lock(&rt2x00dev->usb_cache_mutex);
 131
 132         /*
 133          * Wait until the BBP becomes ready.
 134          */
 135         reg = rt73usb_bbp_check(rt2x00dev);
 136         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 137                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 138                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 139                 return;
 140         }
 141
 142         /*
 143          * Write the data into the BBP.
 144          */
 145         reg = 0;
 146         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 147         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 148         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 149         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 150
 151         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 152         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 153 }
 154
 155 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 156                              const unsigned int word, u8 *value)
 157 {
 158         u32 reg;
 159
 160         mutex_lock(&rt2x00dev->usb_cache_mutex);
 161
 162         /*
 163          * Wait until the BBP becomes ready.
 164          */
 165         reg = rt73usb_bbp_check(rt2x00dev);
 166         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 167                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 168                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 169                 return;
 170         }
 171
 172         /*
 173          * Write the request into the BBP.
 174          */
 175         reg = 0;
 176         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 177         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 178         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 179
 180         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 181
 182         /*
 183          * Wait until the BBP becomes ready.
 184          */
 185         reg = rt73usb_bbp_check(rt2x00dev);
 186         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 187                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 188                 *value = 0xff;
 189                 return;
 190         }
 191
 192         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 193         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 194 }
 195
 196 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 197                              const unsigned int word, const u32 value)
 198 {
 199         u32 reg;
 200         unsigned int i;
 201
 202         if (!word)
 203                 return;
 204
 205         mutex_lock(&rt2x00dev->usb_cache_mutex);
 206
 207         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 208                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 209                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 210                         goto rf_write;
 211                 udelay(REGISTER_BUSY_DELAY);
 212         }
 213
 214         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 215         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 216         return;
 217
 218 rf_write:
 219         reg = 0;
 220         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 221
 222         /*
 223          * RF5225 and RF2527 contain 21 bits per RF register value,
 224          * all others contain 20 bits.
 225          */
 226         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 227                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 228                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 229         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 230         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 231
 232         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 233         rt2x00_rf_write(rt2x00dev, word, value);
 234         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 235 }
 236
 237 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 238 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 239
 240 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 241                              const unsigned int word, u32 *data)
 242 {
 243         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 244 }
 245
 246 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 247                               const unsigned int word, u32 data)
 248 {
 249         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 250 }
 251
 252 static const struct rt2x00debug rt73usb_rt2x00debug = {
 253         .owner  = THIS_MODULE,
 254         .csr    = {
 255                 .read           = rt73usb_read_csr,
 256                 .write          = rt73usb_write_csr,
 257                 .word_size      = sizeof(u32),
 258                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 259         },
 260         .eeprom = {
 261                 .read           = rt2x00_eeprom_read,
 262                 .write          = rt2x00_eeprom_write,
 263                 .word_size      = sizeof(u16),
 264                 .word_count     = EEPROM_SIZE / sizeof(u16),
 265         },
 266         .bbp    = {
 267                 .read           = rt73usb_bbp_read,
 268                 .write          = rt73usb_bbp_write,
 269                 .word_size      = sizeof(u8),
 270                 .word_count     = BBP_SIZE / sizeof(u8),
 271         },
 272         .rf     = {
 273                 .read           = rt2x00_rf_read,
 274                 .write          = rt73usb_rf_write,
 275                 .word_size      = sizeof(u32),
 276                 .word_count     = RF_SIZE / sizeof(u32),
 277         },
 278 };
 279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 280
 281 /*
 282  * Configuration handlers.
 283  */
 284 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
 285                                 struct rt2x00_intf *intf,
 286                                 struct rt2x00intf_conf *conf,
 287                                 const unsigned int flags)
 288 {
 289         unsigned int beacon_base;
 290         u32 reg;
 291
 292         if (flags & CONFIG_UPDATE_TYPE) {
 293                 /*
 294                  * Clear current synchronisation setup.
 295                  * For the Beacon base registers we only need to clear
 296                  * the first byte since that byte contains the VALID and OWNER
 297                  * bits which (when set to 0) will invalidate the entire beacon.
 298                  */
 299                 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
 300                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 301                 rt73usb_register_write(rt2x00dev, beacon_base, 0);
 302
 303                 /*
 304                  * Enable synchronisation.
 305                  */
 306                 rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 307                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 308                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE,
 309                                   (conf->sync == TSF_SYNC_BEACON));
 310                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 311                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, conf->sync);
 312                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 313         }
 314
 315         if (flags & CONFIG_UPDATE_MAC) {
 316                 reg = le32_to_cpu(conf->mac[1]);
 317                 rt2x00_set_field32(&reg, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 318                 conf->mac[1] = cpu_to_le32(reg);
 319
 320                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
 321                                             conf->mac, sizeof(conf->mac));
 322         }
 323
 324         if (flags & CONFIG_UPDATE_BSSID) {
 325                 reg = le32_to_cpu(conf->bssid[1]);
 326                 rt2x00_set_field32(&reg, MAC_CSR5_BSS_ID_MASK, 3);
 327                 conf->bssid[1] = cpu_to_le32(reg);
 328
 329                 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
 330                                             conf->bssid, sizeof(conf->bssid));
 331         }
 332 }
 333
 334 static int rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
 335                                    const int short_preamble,
 336                                    const int ack_timeout,
 337                                    const int ack_consume_time)
 338 {
 339         u32 reg;
 340
 341         /*
 342          * When in atomic context, we should let rt2x00lib
 343          * try this configuration again later.
 344          */
 345         if (in_atomic())
 346                 return -EAGAIN;
 347
 348         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 349         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
 350         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 351
 352         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 353         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 354                            !!short_preamble);
 355         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 356
 357         return 0;
 358 }
 359
 360 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 361                                    const int basic_rate_mask)
 362 {
 363         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 364 }
 365
 366 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 367                                    struct rf_channel *rf, const int txpower)
 368 {
 369         u8 r3;
 370         u8 r94;
 371         u8 smart;
 372
 373         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 374         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 375
 376         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 377                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 378
 379         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 380         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 381         rt73usb_bbp_write(rt2x00dev, 3, r3);
 382
 383         r94 = 6;
 384         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 385                 r94 += txpower - MAX_TXPOWER;
 386         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 387                 r94 += txpower;
 388         rt73usb_bbp_write(rt2x00dev, 94, r94);
 389
 390         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 391         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 392         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 393         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 394
 395         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 396         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 397         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 398         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 399
 400         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 401         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 402         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 403         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 404
 405         udelay(10);
 406 }
 407
 408 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 409                                    const int txpower)
 410 {
 411         struct rf_channel rf;
 412
 413         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 414         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 415         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 416         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 417
 418         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 419 }
 420
 421 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 422                                       struct antenna_setup *ant)
 423 {
 424         u8 r3;
 425         u8 r4;
 426         u8 r77;
 427         u8 temp;
 428
 429         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 430         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 431         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 432
 433         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 434
 435         /*
 436          * Configure the RX antenna.
 437          */
 438         switch (ant->rx) {
 439         case ANTENNA_HW_DIVERSITY:
 440                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 441                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 442                        && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
 443                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 444                 break;
 445         case ANTENNA_A:
 446                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 447                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 448                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 449                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 450                 else
 451                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 452                 break;
 453         case ANTENNA_SW_DIVERSITY:
 454                 /*
 455                  * NOTE: We should never come here because rt2x00lib is
 456                  * supposed to catch this and send us the correct antenna
 457                  * explicitely. However we are nog going to bug about this.
 458                  * Instead, just default to antenna B.
 459                  */
 460         case ANTENNA_B:
 461                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 462                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 463                 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
 464                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 465                 else
 466                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 467                 break;
 468         }
 469
 470         rt73usb_bbp_write(rt2x00dev, 77, r77);
 471         rt73usb_bbp_write(rt2x00dev, 3, r3);
 472         rt73usb_bbp_write(rt2x00dev, 4, r4);
 473 }
 474
 475 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 476                                       struct antenna_setup *ant)
 477 {
 478         u8 r3;
 479         u8 r4;
 480         u8 r77;
 481
 482         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 483         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 484         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 485
 486         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 487         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 488                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 489
 490         /*
 491          * Configure the RX antenna.
 492          */
 493         switch (ant->rx) {
 494         case ANTENNA_HW_DIVERSITY:
 495                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 496                 break;
 497         case ANTENNA_A:
 498                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 499                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 500                 break;
 501         case ANTENNA_SW_DIVERSITY:
 502                 /*
 503                  * NOTE: We should never come here because rt2x00lib is
 504                  * supposed to catch this and send us the correct antenna
 505                  * explicitely. However we are nog going to bug about this.
 506                  * Instead, just default to antenna B.
 507                  */
 508         case ANTENNA_B:
 509                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 510                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 511                 break;
 512         }
 513
 514         rt73usb_bbp_write(rt2x00dev, 77, r77);
 515         rt73usb_bbp_write(rt2x00dev, 3, r3);
 516         rt73usb_bbp_write(rt2x00dev, 4, r4);
 517 }
 518
 519 struct antenna_sel {
 520         u8 word;
 521         /*
 522          * value[0] -> non-LNA
 523          * value[1] -> LNA
 524          */
 525         u8 value[2];
 526 };
 527
 528 static const struct antenna_sel antenna_sel_a[] = {
 529         { 96,  { 0x58, 0x78 } },
 530         { 104, { 0x38, 0x48 } },
 531         { 75,  { 0xfe, 0x80 } },
 532         { 86,  { 0xfe, 0x80 } },
 533         { 88,  { 0xfe, 0x80 } },
 534         { 35,  { 0x60, 0x60 } },
 535         { 97,  { 0x58, 0x58 } },
 536         { 98,  { 0x58, 0x58 } },
 537 };
 538
 539 static const struct antenna_sel antenna_sel_bg[] = {
 540         { 96,  { 0x48, 0x68 } },
 541         { 104, { 0x2c, 0x3c } },
 542         { 75,  { 0xfe, 0x80 } },
 543         { 86,  { 0xfe, 0x80 } },
 544         { 88,  { 0xfe, 0x80 } },
 545         { 35,  { 0x50, 0x50 } },
 546         { 97,  { 0x48, 0x48 } },
 547         { 98,  { 0x48, 0x48 } },
 548 };
 549
 550 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 551                                    struct antenna_setup *ant)
 552 {
 553         const struct antenna_sel *sel;
 554         unsigned int lna;
 555         unsigned int i;
 556         u32 reg;
 557
 558         if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
 559                 sel = antenna_sel_a;
 560                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 561         } else {
 562                 sel = antenna_sel_bg;
 563                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 564         }
 565
 566         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 567                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 568
 569         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 570
 571         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 572                            (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
 573         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 574                            (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
 575
 576         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 577
 578         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 579             rt2x00_rf(&rt2x00dev->chip, RF5225))
 580                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 581         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 582                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 583                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 584 }
 585
 586 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 587                                     struct rt2x00lib_conf *libconf)
 588 {
 589         u32 reg;
 590
 591         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 592         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 593         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 594
 595         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 596         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 597         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 598         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 599         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 600
 601         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 602         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 603         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 604
 605         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 606         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 607         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 608
 609         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 610         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 611                            libconf->conf->beacon_int * 16);
 612         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 613 }
 614
 615 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 616                            struct rt2x00lib_conf *libconf,
 617                            const unsigned int flags)
 618 {
 619         if (flags & CONFIG_UPDATE_PHYMODE)
 620                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 621         if (flags & CONFIG_UPDATE_CHANNEL)
 622                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 623                                        libconf->conf->power_level);
 624         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 625                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 626         if (flags & CONFIG_UPDATE_ANTENNA)
 627                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 628         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 629                 rt73usb_config_duration(rt2x00dev, libconf);
 630 }
 631
 632 /*
 633  * LED functions.
 634  */
 635 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 636 {
 637         u32 reg;
 638
 639         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 640         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 641         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 642         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 643
 644         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 645         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS,
 646                            (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ));
 647         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS,
 648                            (rt2x00dev->rx_status.band != IEEE80211_BAND_5GHZ));
 649
 650         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 651                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 652 }
 653
 654 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 655 {
 656         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 657         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 658         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 659
 660         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 661                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 662 }
 663
 664 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, int rssi)
 665 {
 666         u32 led;
 667
 668         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 669                 return;
 670
 671         /*
 672          * Led handling requires a positive value for the rssi,
 673          * to do that correctly we need to add the correction.
 674          */
 675         rssi += rt2x00dev->rssi_offset;
 676
 677         if (rssi <= 30)
 678                 led = 0;
 679         else if (rssi <= 39)
 680                 led = 1;
 681         else if (rssi <= 49)
 682                 led = 2;
 683         else if (rssi <= 53)
 684                 led = 3;
 685         else if (rssi <= 63)
 686                 led = 4;
 687         else
 688                 led = 5;
 689
 690         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, led,
 691                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 692 }
 693
 694 /*
 695  * Link tuning
 696  */
 697 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 698                                struct link_qual *qual)
 699 {
 700         u32 reg;
 701
 702         /*
 703          * Update FCS error count from register.
 704          */
 705         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 706         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 707
 708         /*
 709          * Update False CCA count from register.
 710          */
 711         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 712         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 713 }
 714
 715 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 716 {
 717         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 718         rt2x00dev->link.vgc_level = 0x20;
 719 }
 720
 721 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 722 {
 723         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 724         u8 r17;
 725         u8 up_bound;
 726         u8 low_bound;
 727
 728         /*
 729          * Update Led strength
 730          */
 731         rt73usb_activity_led(rt2x00dev, rssi);
 732
 733         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 734
 735         /*
 736          * Determine r17 bounds.
 737          */
 738         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
 739                 low_bound = 0x28;
 740                 up_bound = 0x48;
 741
 742                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 743                         low_bound += 0x10;
 744                         up_bound += 0x10;
 745                 }
 746         } else {
 747                 if (rssi > -82) {
 748                         low_bound = 0x1c;
 749                         up_bound = 0x40;
 750                 } else if (rssi > -84) {
 751                         low_bound = 0x1c;
 752                         up_bound = 0x20;
 753                 } else {
 754                         low_bound = 0x1c;
 755                         up_bound = 0x1c;
 756                 }
 757
 758                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 759                         low_bound += 0x14;
 760                         up_bound += 0x10;
 761                 }
 762         }
 763
 764         /*
 765          * If we are not associated, we should go straight to the
 766          * dynamic CCA tuning.
 767          */
 768         if (!rt2x00dev->intf_associated)
 769                 goto dynamic_cca_tune;
 770
 771         /*
 772          * Special big-R17 for very short distance
 773          */
 774         if (rssi > -35) {
 775                 if (r17 != 0x60)
 776                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 777                 return;
 778         }
 779
 780         /*
 781          * Special big-R17 for short distance
 782          */
 783         if (rssi >= -58) {
 784                 if (r17 != up_bound)
 785                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 786                 return;
 787         }
 788
 789         /*
 790          * Special big-R17 for middle-short distance
 791          */
 792         if (rssi >= -66) {
 793                 low_bound += 0x10;
 794                 if (r17 != low_bound)
 795                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 796                 return;
 797         }
 798
 799         /*
 800          * Special mid-R17 for middle distance
 801          */
 802         if (rssi >= -74) {
 803                 if (r17 != (low_bound + 0x10))
 804                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 805                 return;
 806         }
 807
 808         /*
 809          * Special case: Change up_bound based on the rssi.
 810          * Lower up_bound when rssi is weaker then -74 dBm.
 811          */
 812         up_bound -= 2 * (-74 - rssi);
 813         if (low_bound > up_bound)
 814                 up_bound = low_bound;
 815
 816         if (r17 > up_bound) {
 817                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 818                 return;
 819         }
 820
 821 dynamic_cca_tune:
 822
 823         /*
 824          * r17 does not yet exceed upper limit, continue and base
 825          * the r17 tuning on the false CCA count.
 826          */
 827         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 828                 r17 += 4;
 829                 if (r17 > up_bound)
 830                         r17 = up_bound;
 831                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 832         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 833                 r17 -= 4;
 834                 if (r17 < low_bound)
 835                         r17 = low_bound;
 836                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 837         }
 838 }
 839
 840 /*
 841  * Firmware name function.
 842  */
 843 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 844 {
 845         return FIRMWARE_RT2571;
 846 }
 847
 848 /*
 849  * Initialization functions.
 850  */
 851 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 852                                  const size_t len)
 853 {
 854         unsigned int i;
 855         int status;
 856         u32 reg;
 857         char *ptr = data;
 858         char *cache;
 859         int buflen;
 860         int timeout;
 861
 862         /*
 863          * Wait for stable hardware.
 864          */
 865         for (i = 0; i < 100; i++) {
 866                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 867                 if (reg)
 868                         break;
 869                 msleep(1);
 870         }
 871
 872         if (!reg) {
 873                 ERROR(rt2x00dev, "Unstable hardware.\n");
 874                 return -EBUSY;
 875         }
 876
 877         /*
 878          * Write firmware to device.
 879          * We setup a seperate cache for this action,
 880          * since we are going to write larger chunks of data
 881          * then normally used cache size.
 882          */
 883         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 884         if (!cache) {
 885                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 886                 return -ENOMEM;
 887         }
 888
 889         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 890                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 891                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 892
 893                 memcpy(cache, ptr, buflen);
 894
 895                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 896                                          USB_VENDOR_REQUEST_OUT,
 897                                          FIRMWARE_IMAGE_BASE + i, 0x0000,
 898                                          cache, buflen, timeout);
 899
 900                 ptr += buflen;
 901         }
 902
 903         kfree(cache);
 904
 905         /*
 906          * Send firmware request to device to load firmware,
 907          * we need to specify a long timeout time.
 908          */
 909         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 910                                              0x0000, USB_MODE_FIRMWARE,
 911                                              REGISTER_TIMEOUT_FIRMWARE);
 912         if (status < 0) {
 913                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 914                 return status;
 915         }
 916
 917         rt73usb_disable_led(rt2x00dev);
 918
 919         return 0;
 920 }
 921
 922 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 923 {
 924         u32 reg;
 925
 926         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 927         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 928         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 929         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 930         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 931
 932         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 933         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 934         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 935         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 936         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 937         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 938         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 939         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 940         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 941         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 942
 943         /*
 944          * CCK TXD BBP registers
 945          */
 946         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 947         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 948         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 949         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 950         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 951         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 952         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 953         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 954         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 955         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 956
 957         /*
 958          * OFDM TXD BBP registers
 959          */
 960         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 961         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 962         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 963         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 964         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 965         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 966         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 967         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 968
 969         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 970         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 971         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 972         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 973         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 974         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 975
 976         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 977         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 978         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 979         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 980         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 981         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 982
 983         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 984
 985         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 986         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
 987         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
 988
 989         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
 990
 991         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
 992                 return -EBUSY;
 993
 994         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
 995
 996         /*
 997          * Invalidate all Shared Keys (SEC_CSR0),
 998          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
 999          */
1000         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1001         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1002         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1003
1004         reg = 0x000023b0;
1005         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1006             rt2x00_rf(&rt2x00dev->chip, RF2527))
1007                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1008         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1009
1010         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1011         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1012         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1013
1014         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1015         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1016         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1017         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1018
1019         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1020         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1021         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1022         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1023
1024         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1025         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1026         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1027
1028         /*
1029          * Clear all beacons
1030          * For the Beacon base registers we only need to clear
1031          * the first byte since that byte contains the VALID and OWNER
1032          * bits which (when set to 0) will invalidate the entire beacon.
1033          */
1034         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1035         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1036         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1037         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1038
1039         /*
1040          * We must clear the error counters.
1041          * These registers are cleared on read,
1042          * so we may pass a useless variable to store the value.
1043          */
1044         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1045         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1046         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1047
1048         /*
1049          * Reset MAC and BBP registers.
1050          */
1051         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1052         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1053         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1054         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1055
1056         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1057         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1058         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1059         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1060
1061         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1062         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1063         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1064
1065         return 0;
1066 }
1067
1068 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1069 {
1070         unsigned int i;
1071         u16 eeprom;
1072         u8 reg_id;
1073         u8 value;
1074
1075         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1076                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1077                 if ((value != 0xff) && (value != 0x00))
1078                         goto continue_csr_init;
1079                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1080                 udelay(REGISTER_BUSY_DELAY);
1081         }
1082
1083         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1084         return -EACCES;
1085
1086 continue_csr_init:
1087         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1088         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1089         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1090         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1091         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1092         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1093         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1094         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1095         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1096         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1097         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1098         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1099         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1100         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1101         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1102         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1103         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1104         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1105         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1106         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1107         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1108         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1109         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1110         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1111         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1112
1113         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1114         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1115                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1116
1117                 if (eeprom != 0xffff && eeprom != 0x0000) {
1118                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1119                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1120                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1121                               reg_id, value);
1122                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1123                 }
1124         }
1125         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1126
1127         return 0;
1128 }
1129
1130 /*
1131  * Device state switch handlers.
1132  */
1133 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1134                               enum dev_state state)
1135 {
1136         u32 reg;
1137
1138         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1139         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1140                            state == STATE_RADIO_RX_OFF);
1141         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1142 }
1143
1144 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1145 {
1146         /*
1147          * Initialize all registers.
1148          */
1149         if (rt73usb_init_registers(rt2x00dev) ||
1150             rt73usb_init_bbp(rt2x00dev)) {
1151                 ERROR(rt2x00dev, "Register initialization failed.\n");
1152                 return -EIO;
1153         }
1154
1155         /*
1156          * Enable LED
1157          */
1158         rt73usb_enable_led(rt2x00dev);
1159
1160         return 0;
1161 }
1162
1163 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1164 {
1165         /*
1166          * Disable LED
1167          */
1168         rt73usb_disable_led(rt2x00dev);
1169
1170         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1171
1172         /*
1173          * Disable synchronisation.
1174          */
1175         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1176
1177         rt2x00usb_disable_radio(rt2x00dev);
1178 }
1179
1180 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1181 {
1182         u32 reg;
1183         unsigned int i;
1184         char put_to_sleep;
1185         char current_state;
1186
1187         put_to_sleep = (state != STATE_AWAKE);
1188
1189         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1190         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1191         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1192         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1193
1194         /*
1195          * Device is not guaranteed to be in the requested state yet.
1196          * We must wait until the register indicates that the
1197          * device has entered the correct state.
1198          */
1199         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1200                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1201                 current_state =
1202                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1203                 if (current_state == !put_to_sleep)
1204                         return 0;
1205                 msleep(10);
1206         }
1207
1208         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1209                "current device state %d.\n", !put_to_sleep, current_state);
1210
1211         return -EBUSY;
1212 }
1213
1214 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1215                                     enum dev_state state)
1216 {
1217         int retval = 0;
1218
1219         switch (state) {
1220         case STATE_RADIO_ON:
1221                 retval = rt73usb_enable_radio(rt2x00dev);
1222                 break;
1223         case STATE_RADIO_OFF:
1224                 rt73usb_disable_radio(rt2x00dev);
1225                 break;
1226         case STATE_RADIO_RX_ON:
1227         case STATE_RADIO_RX_ON_LINK:
1228                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
1229                 break;
1230         case STATE_RADIO_RX_OFF:
1231         case STATE_RADIO_RX_OFF_LINK:
1232                 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
1233                 break;
1234         case STATE_DEEP_SLEEP:
1235         case STATE_SLEEP:
1236         case STATE_STANDBY:
1237         case STATE_AWAKE:
1238                 retval = rt73usb_set_state(rt2x00dev, state);
1239                 break;
1240         default:
1241                 retval = -ENOTSUPP;
1242                 break;
1243         }
1244
1245         return retval;
1246 }
1247
1248 /*
1249  * TX descriptor initialization
1250  */
1251 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1252                                     struct sk_buff *skb,
1253                                     struct txentry_desc *txdesc,
1254                                     struct ieee80211_tx_control *control)
1255 {
1256         struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1257         __le32 *txd = skbdesc->desc;
1258         u32 word;
1259
1260         /*
1261          * Start writing the descriptor words.
1262          */
1263         rt2x00_desc_read(txd, 1, &word);
1264         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1265         rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1266         rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1267         rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1268         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1269         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1270         rt2x00_desc_write(txd, 1, word);
1271
1272         rt2x00_desc_read(txd, 2, &word);
1273         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1274         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1275         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1276         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1277         rt2x00_desc_write(txd, 2, word);
1278
1279         rt2x00_desc_read(txd, 5, &word);
1280 /* XXX: removed for now
1281         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1282                            TXPOWER_TO_DEV(control->power_level));
1283  */
1284         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1285         rt2x00_desc_write(txd, 5, word);
1286
1287         rt2x00_desc_read(txd, 0, &word);
1288         rt2x00_set_field32(&word, TXD_W0_BURST,
1289                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1290         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1291         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1292                            test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1293         rt2x00_set_field32(&word, TXD_W0_ACK,
1294                            test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1295         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1296                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1297         rt2x00_set_field32(&word, TXD_W0_OFDM,
1298                            test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1299         rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1300         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1301                            !!(control->flags &
1302                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1303         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1304         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
1305         rt2x00_set_field32(&word, TXD_W0_BURST2,
1306                            test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1307         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1308         rt2x00_desc_write(txd, 0, word);
1309 }
1310
1311 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1312                                    struct sk_buff *skb)
1313 {
1314         int length;
1315
1316         /*
1317          * The length _must_ be a multiple of 4,
1318          * but it must _not_ be a multiple of the USB packet size.
1319          */
1320         length = roundup(skb->len, 4);
1321         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1322
1323         return length;
1324 }
1325
1326 /*
1327  * TX data initialization
1328  */
1329 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1330                                   const unsigned int queue)
1331 {
1332         u32 reg;
1333
1334         if (queue != RT2X00_BCN_QUEUE_BEACON)
1335                 return;
1336
1337         /*
1338          * For Wi-Fi faily generated beacons between participating stations.
1339          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1340          */
1341         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1342
1343         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1344         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1345                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1346                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1347         }
1348 }
1349
1350 /*
1351  * RX control handlers
1352  */
1353 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1354 {
1355         u16 eeprom;
1356         u8 offset;
1357         u8 lna;
1358
1359         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1360         switch (lna) {
1361         case 3:
1362                 offset = 90;
1363                 break;
1364         case 2:
1365                 offset = 74;
1366                 break;
1367         case 1:
1368                 offset = 64;
1369                 break;
1370         default:
1371                 return 0;
1372         }
1373
1374         if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1375                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1376                         if (lna == 3 || lna == 2)
1377                                 offset += 10;
1378                 } else {
1379                         if (lna == 3)
1380                                 offset += 6;
1381                         else if (lna == 2)
1382                                 offset += 8;
1383                 }
1384
1385                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1386                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1387         } else {
1388                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1389                         offset += 14;
1390
1391                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1392                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1393         }
1394
1395         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1396 }
1397
1398 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1399                                 struct rxdone_entry_desc *rxdesc)
1400 {
1401         struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1402         __le32 *rxd = (__le32 *)entry->skb->data;
1403         struct ieee80211_hdr *hdr =
1404             (struct ieee80211_hdr *)entry->skb->data + entry->queue->desc_size;
1405         int header_size = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
1406         u32 word0;
1407         u32 word1;
1408
1409         rt2x00_desc_read(rxd, 0, &word0);
1410         rt2x00_desc_read(rxd, 1, &word1);
1411
1412         rxdesc->flags = 0;
1413         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1414                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1415
1416         /*
1417          * Obtain the status about this packet.
1418          */
1419         rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1420         rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1421         rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1422         rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1423         rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS);
1424
1425         /*
1426          * The data behind the ieee80211 header must be
1427          * aligned on a 4 byte boundary.
1428          */
1429         if (header_size % 4 == 0) {
1430                 skb_push(entry->skb, 2);
1431                 memmove(entry->skb->data, entry->skb->data + 2,
1432                         entry->skb->len - 2);
1433         }
1434
1435         /*
1436          * Set descriptor and data pointer.
1437          */
1438         skbdesc->data = entry->skb->data + entry->queue->desc_size;
1439         skbdesc->data_len = entry->queue->data_size;
1440         skbdesc->desc = entry->skb->data;
1441         skbdesc->desc_len = entry->queue->desc_size;
1442
1443         /*
1444          * Remove descriptor from skb buffer and trim the whole thing
1445          * down to only contain data.
1446          */
1447         skb_pull(entry->skb, skbdesc->desc_len);
1448         skb_trim(entry->skb, rxdesc->size);
1449 }
1450
1451 /*
1452  * Device probe functions.
1453  */
1454 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1455 {
1456         u16 word;
1457         u8 *mac;
1458         s8 value;
1459
1460         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1461
1462         /*
1463          * Start validation of the data that has been read.
1464          */
1465         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1466         if (!is_valid_ether_addr(mac)) {
1467                 DECLARE_MAC_BUF(macbuf);
1468
1469                 random_ether_addr(mac);
1470                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1471         }
1472
1473         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1474         if (word == 0xffff) {
1475                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1476                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1477                                    ANTENNA_B);
1478                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1479                                    ANTENNA_B);
1480                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1481                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1482                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1483                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1484                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1485                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1486         }
1487
1488         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1489         if (word == 0xffff) {
1490                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1491                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1492                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1493         }
1494
1495         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1496         if (word == 0xffff) {
1497                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1498                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1499                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1500                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1501                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1502                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1503                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1504                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1505                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1506                                    LED_MODE_DEFAULT);
1507                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1508                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1509         }
1510
1511         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1512         if (word == 0xffff) {
1513                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1514                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1515                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1516                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1517         }
1518
1519         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1520         if (word == 0xffff) {
1521                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1522                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1523                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1524                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1525         } else {
1526                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1527                 if (value < -10 || value > 10)
1528                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1529                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1530                 if (value < -10 || value > 10)
1531                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1532                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1533         }
1534
1535         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1536         if (word == 0xffff) {
1537                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1538                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1539                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1540                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1541         } else {
1542                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1543                 if (value < -10 || value > 10)
1544                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1545                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1546                 if (value < -10 || value > 10)
1547                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1548                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1549         }
1550
1551         return 0;
1552 }
1553
1554 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1555 {
1556         u32 reg;
1557         u16 value;
1558         u16 eeprom;
1559
1560         /*
1561          * Read EEPROM word for configuration.
1562          */
1563         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1564
1565         /*
1566          * Identify RF chipset.
1567          */
1568         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1569         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1570         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1571
1572         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1573                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1574                 return -ENODEV;
1575         }
1576
1577         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1578             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1579             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1580             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1581                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1582                 return -ENODEV;
1583         }
1584
1585         /*
1586          * Identify default antenna configuration.
1587          */
1588         rt2x00dev->default_ant.tx =
1589             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1590         rt2x00dev->default_ant.rx =
1591             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1592
1593         /*
1594          * Read the Frame type.
1595          */
1596         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1597                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1598
1599         /*
1600          * Read frequency offset.
1601          */
1602         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1603         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1604
1605         /*
1606          * Read external LNA informations.
1607          */
1608         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1609
1610         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1611                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1612                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1613         }
1614
1615         /*
1616          * Store led settings, for correct led behaviour.
1617          */
1618         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1619
1620         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1621                            rt2x00dev->led_mode);
1622         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1623                            rt2x00_get_field16(eeprom,
1624                                               EEPROM_LED_POLARITY_GPIO_0));
1625         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1626                            rt2x00_get_field16(eeprom,
1627                                               EEPROM_LED_POLARITY_GPIO_1));
1628         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1629                            rt2x00_get_field16(eeprom,
1630                                               EEPROM_LED_POLARITY_GPIO_2));
1631         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1632                            rt2x00_get_field16(eeprom,
1633                                               EEPROM_LED_POLARITY_GPIO_3));
1634         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1635                            rt2x00_get_field16(eeprom,
1636                                               EEPROM_LED_POLARITY_GPIO_4));
1637         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1638                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1639         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1640                            rt2x00_get_field16(eeprom,
1641                                               EEPROM_LED_POLARITY_RDY_G));
1642         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1643                            rt2x00_get_field16(eeprom,
1644                                               EEPROM_LED_POLARITY_RDY_A));
1645
1646         return 0;
1647 }
1648
1649 /*
1650  * RF value list for RF2528
1651  * Supports: 2.4 GHz
1652  */
1653 static const struct rf_channel rf_vals_bg_2528[] = {
1654         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1655         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1656         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1657         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1658         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1659         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1660         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1661         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1662         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1663         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1664         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1665         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1666         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1667         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1668 };
1669
1670 /*
1671  * RF value list for RF5226
1672  * Supports: 2.4 GHz & 5.2 GHz
1673  */
1674 static const struct rf_channel rf_vals_5226[] = {
1675         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1676         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1677         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1678         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1679         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1680         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1681         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1682         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1683         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1684         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1685         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1686         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1687         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1688         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1689
1690         /* 802.11 UNI / HyperLan 2 */
1691         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1692         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1693         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1694         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1695         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1696         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1697         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1698         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1699
1700         /* 802.11 HyperLan 2 */
1701         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1702         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1703         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1704         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1705         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1706         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1707         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1708         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1709         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1710         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1711
1712         /* 802.11 UNII */
1713         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1714         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1715         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1716         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1717         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1718         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1719
1720         /* MMAC(Japan)J52 ch 34,38,42,46 */
1721         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1722         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1723         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1724         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1725 };
1726
1727 /*
1728  * RF value list for RF5225 & RF2527
1729  * Supports: 2.4 GHz & 5.2 GHz
1730  */
1731 static const struct rf_channel rf_vals_5225_2527[] = {
1732         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1733         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1734         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1735         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1736         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1737         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1738         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1739         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1740         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1741         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1742         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1743         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1744         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1745         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1746
1747         /* 802.11 UNI / HyperLan 2 */
1748         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1749         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1750         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1751         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1752         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1753         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1754         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1755         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1756
1757         /* 802.11 HyperLan 2 */
1758         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1759         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1760         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1761         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1762         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1763         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1764         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1765         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1766         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1767         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1768
1769         /* 802.11 UNII */
1770         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1771         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1772         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1773         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1774         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1775         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1776
1777         /* MMAC(Japan)J52 ch 34,38,42,46 */
1778         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1779         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1780         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1781         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1782 };
1783
1784
1785 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1786 {
1787         struct hw_mode_spec *spec = &rt2x00dev->spec;
1788         u8 *txpower;
1789         unsigned int i;
1790
1791         /*
1792          * Initialize all hw fields.
1793          */
1794         rt2x00dev->hw->flags =
1795             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1796             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1797         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1798         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1799         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1800         rt2x00dev->hw->queues = 4;
1801
1802         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1803         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1804                                 rt2x00_eeprom_addr(rt2x00dev,
1805                                                    EEPROM_MAC_ADDR_0));
1806
1807         /*
1808          * Convert tx_power array in eeprom.
1809          */
1810         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1811         for (i = 0; i < 14; i++)
1812                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1813
1814         /*
1815          * Initialize hw_mode information.
1816          */
1817         spec->num_modes = 2;
1818         spec->num_rates = 12;
1819         spec->tx_power_a = NULL;
1820         spec->tx_power_bg = txpower;
1821         spec->tx_power_default = DEFAULT_TXPOWER;
1822
1823         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1824                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1825                 spec->channels = rf_vals_bg_2528;
1826         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1827                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1828                 spec->channels = rf_vals_5226;
1829         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1830                 spec->num_channels = 14;
1831                 spec->channels = rf_vals_5225_2527;
1832         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1833                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1834                 spec->channels = rf_vals_5225_2527;
1835         }
1836
1837         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1838             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1839                 spec->num_modes = 3;
1840
1841                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1842                 for (i = 0; i < 14; i++)
1843                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1844
1845                 spec->tx_power_a = txpower;
1846         }
1847 }
1848
1849 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1850 {
1851         int retval;
1852
1853         /*
1854          * Allocate eeprom data.
1855          */
1856         retval = rt73usb_validate_eeprom(rt2x00dev);
1857         if (retval)
1858                 return retval;
1859
1860         retval = rt73usb_init_eeprom(rt2x00dev);
1861         if (retval)
1862                 return retval;
1863
1864         /*
1865          * Initialize hw specifications.
1866          */
1867         rt73usb_probe_hw_mode(rt2x00dev);
1868
1869         /*
1870          * This device requires firmware.
1871          */
1872         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1873         __set_bit(DRIVER_REQUIRE_FIRMWARE_CRC_ITU_T, &rt2x00dev->flags);
1874
1875         /*
1876          * Set the rssi offset.
1877          */
1878         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1879
1880         return 0;
1881 }
1882
1883 /*
1884  * IEEE80211 stack callback functions.
1885  */
1886 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1887                                      unsigned int changed_flags,
1888                                      unsigned int *total_flags,
1889                                      int mc_count,
1890                                      struct dev_addr_list *mc_list)
1891 {
1892         struct rt2x00_dev *rt2x00dev = hw->priv;
1893         u32 reg;
1894
1895         /*
1896          * Mask off any flags we are going to ignore from
1897          * the total_flags field.
1898          */
1899         *total_flags &=
1900             FIF_ALLMULTI |
1901             FIF_FCSFAIL |
1902             FIF_PLCPFAIL |
1903             FIF_CONTROL |
1904             FIF_OTHER_BSS |
1905             FIF_PROMISC_IN_BSS;
1906
1907         /*
1908          * Apply some rules to the filters:
1909          * - Some filters imply different filters to be set.
1910          * - Some things we can't filter out at all.
1911          */
1912         if (mc_count)
1913                 *total_flags |= FIF_ALLMULTI;
1914         if (*total_flags & FIF_OTHER_BSS ||
1915             *total_flags & FIF_PROMISC_IN_BSS)
1916                 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1917
1918         /*
1919          * Check if there is any work left for us.
1920          */
1921         if (rt2x00dev->packet_filter == *total_flags)
1922                 return;
1923         rt2x00dev->packet_filter = *total_flags;
1924
1925         /*
1926          * When in atomic context, reschedule and let rt2x00lib
1927          * call this function again.
1928          */
1929         if (in_atomic()) {
1930                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1931                 return;
1932         }
1933
1934         /*
1935          * Start configuration steps.
1936          * Note that the version error will always be dropped
1937          * and broadcast frames will always be accepted since
1938          * there is no filter for it at this time.
1939          */
1940         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1941         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
1942                            !(*total_flags & FIF_FCSFAIL));
1943         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
1944                            !(*total_flags & FIF_PLCPFAIL));
1945         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
1946                            !(*total_flags & FIF_CONTROL));
1947         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
1948                            !(*total_flags & FIF_PROMISC_IN_BSS));
1949         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
1950                            !(*total_flags & FIF_PROMISC_IN_BSS));
1951         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1952         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
1953                            !(*total_flags & FIF_ALLMULTI));
1954         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
1955         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS, 1);
1956         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1957 }
1958
1959 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1960                                    u32 short_retry, u32 long_retry)
1961 {
1962         struct rt2x00_dev *rt2x00dev = hw->priv;
1963         u32 reg;
1964
1965         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1966         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1967         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1968         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1969
1970         return 0;
1971 }
1972
1973 #if 0
1974 /*
1975  * Mac80211 demands get_tsf must be atomic.
1976  * This is not possible for rt73usb since all register access
1977  * functions require sleeping. Untill mac80211 no longer needs
1978  * get_tsf to be atomic, this function should be disabled.
1979  */
1980 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1981 {
1982         struct rt2x00_dev *rt2x00dev = hw->priv;
1983         u64 tsf;
1984         u32 reg;
1985
1986         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1987         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1988         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1989         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1990
1991         return tsf;
1992 }
1993 #else
1994 #define rt73usb_get_tsf NULL
1995 #endif
1996
1997 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1998 {
1999         struct rt2x00_dev *rt2x00dev = hw->priv;
2000
2001         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
2002         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
2003 }
2004
2005 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
2006                                  struct ieee80211_tx_control *control)
2007 {
2008         struct rt2x00_dev *rt2x00dev = hw->priv;
2009         struct rt2x00_intf *intf = vif_to_intf(control->vif);
2010         struct skb_frame_desc *skbdesc;
2011         unsigned int beacon_base;
2012         unsigned int timeout;
2013
2014         if (unlikely(!intf->beacon))
2015                 return -ENOBUFS;
2016
2017         /*
2018          * Add the descriptor in front of the skb.
2019          */
2020         skb_push(skb, intf->beacon->queue->desc_size);
2021         memset(skb->data, 0, intf->beacon->queue->desc_size);
2022
2023         /*
2024          * Fill in skb descriptor
2025          */
2026         skbdesc = get_skb_frame_desc(skb);
2027         memset(skbdesc, 0, sizeof(*skbdesc));
2028         skbdesc->data = skb->data + intf->beacon->queue->desc_size;
2029         skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
2030         skbdesc->desc = skb->data;
2031         skbdesc->desc_len = intf->beacon->queue->desc_size;
2032         skbdesc->entry = intf->beacon;
2033
2034         /*
2035          * mac80211 doesn't provide the control->queue variable
2036          * for beacons. Set our own queue identification so
2037          * it can be used during descriptor initialization.
2038          */
2039         control->queue = RT2X00_BCN_QUEUE_BEACON;
2040         rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
2041
2042         /*
2043          * Write entire beacon with descriptor to register,
2044          * and kick the beacon generator.
2045          */
2046         beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
2047         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
2048         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
2049                                  USB_VENDOR_REQUEST_OUT, beacon_base, 0,
2050                                  skb->data, skb->len, timeout);
2051         rt73usb_kick_tx_queue(rt2x00dev, control->queue);
2052
2053         return 0;
2054 }
2055
2056 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2057         .tx                     = rt2x00mac_tx,
2058         .start                  = rt2x00mac_start,
2059         .stop                   = rt2x00mac_stop,
2060         .add_interface          = rt2x00mac_add_interface,
2061         .remove_interface       = rt2x00mac_remove_interface,
2062         .config                 = rt2x00mac_config,
2063         .config_interface       = rt2x00mac_config_interface,
2064         .configure_filter       = rt73usb_configure_filter,
2065         .get_stats              = rt2x00mac_get_stats,
2066         .set_retry_limit        = rt73usb_set_retry_limit,
2067         .bss_info_changed       = rt2x00mac_bss_info_changed,
2068         .conf_tx                = rt2x00mac_conf_tx,
2069         .get_tx_stats           = rt2x00mac_get_tx_stats,
2070         .get_tsf                = rt73usb_get_tsf,
2071         .reset_tsf              = rt73usb_reset_tsf,
2072         .beacon_update          = rt73usb_beacon_update,
2073 };
2074
2075 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2076         .probe_hw               = rt73usb_probe_hw,
2077         .get_firmware_name      = rt73usb_get_firmware_name,
2078         .load_firmware          = rt73usb_load_firmware,
2079         .initialize             = rt2x00usb_initialize,
2080         .uninitialize           = rt2x00usb_uninitialize,
2081         .init_rxentry           = rt2x00usb_init_rxentry,
2082         .init_txentry           = rt2x00usb_init_txentry,
2083         .set_device_state       = rt73usb_set_device_state,
2084         .link_stats             = rt73usb_link_stats,
2085         .reset_tuner            = rt73usb_reset_tuner,
2086         .link_tuner             = rt73usb_link_tuner,
2087         .write_tx_desc          = rt73usb_write_tx_desc,
2088         .write_tx_data          = rt2x00usb_write_tx_data,
2089         .get_tx_data_len        = rt73usb_get_tx_data_len,
2090         .kick_tx_queue          = rt73usb_kick_tx_queue,
2091         .fill_rxdone            = rt73usb_fill_rxdone,
2092         .config_intf            = rt73usb_config_intf,
2093         .config_preamble        = rt73usb_config_preamble,
2094         .config                 = rt73usb_config,
2095 };
2096
2097 static const struct data_queue_desc rt73usb_queue_rx = {
2098         .entry_num              = RX_ENTRIES,
2099         .data_size              = DATA_FRAME_SIZE,
2100         .desc_size              = RXD_DESC_SIZE,
2101         .priv_size              = sizeof(struct queue_entry_priv_usb_rx),
2102 };
2103
2104 static const struct data_queue_desc rt73usb_queue_tx = {
2105         .entry_num              = TX_ENTRIES,
2106         .data_size              = DATA_FRAME_SIZE,
2107         .desc_size              = TXD_DESC_SIZE,
2108         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2109 };
2110
2111 static const struct data_queue_desc rt73usb_queue_bcn = {
2112         .entry_num              = 4 * BEACON_ENTRIES,
2113         .data_size              = MGMT_FRAME_SIZE,
2114         .desc_size              = TXINFO_SIZE,
2115         .priv_size              = sizeof(struct queue_entry_priv_usb_tx),
2116 };
2117
2118 static const struct rt2x00_ops rt73usb_ops = {
2119         .name           = KBUILD_MODNAME,
2120         .max_sta_intf   = 1,
2121         .max_ap_intf    = 4,
2122         .eeprom_size    = EEPROM_SIZE,
2123         .rf_size        = RF_SIZE,
2124         .rx             = &rt73usb_queue_rx,
2125         .tx             = &rt73usb_queue_tx,
2126         .bcn            = &rt73usb_queue_bcn,
2127         .lib            = &rt73usb_rt2x00_ops,
2128         .hw             = &rt73usb_mac80211_ops,
2129 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2130         .debugfs        = &rt73usb_rt2x00debug,
2131 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2132 };
2133
2134 /*
2135  * rt73usb module information.
2136  */
2137 static struct usb_device_id rt73usb_device_table[] = {
2138         /* AboCom */
2139         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2140         /* Askey */
2141         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2142         /* ASUS */
2143         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2144         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2145         /* Belkin */
2146         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2147         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2148         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2149         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2150         /* Billionton */
2151         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2152         /* Buffalo */
2153         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2154         /* CNet */
2155         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2156         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2157         /* Conceptronic */
2158         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2159         /* D-Link */
2160         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2161         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2162         /* Gemtek */
2163         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2164         /* Gigabyte */
2165         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2166         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2167         /* Huawei-3Com */
2168         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2169         /* Hercules */
2170         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2171         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2172         /* Linksys */
2173         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2174         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2175         /* MSI */
2176         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2177         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2178         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2179         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2180         /* Ralink */
2181         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2182         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2183         /* Qcom */
2184         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2185         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2186         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2187         /* Senao */
2188         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2189         /* Sitecom */
2190         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2191         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2192         /* Surecom */
2193         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2194         /* Planex */
2195         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2196         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2197         { 0, }
2198 };
2199
2200 MODULE_AUTHOR(DRV_PROJECT);
2201 MODULE_VERSION(DRV_VERSION);
2202 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2203 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2204 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2205 MODULE_FIRMWARE(FIRMWARE_RT2571);
2206 MODULE_LICENSE("GPL");
2207
2208 static struct usb_driver rt73usb_driver = {
2209         .name           = KBUILD_MODNAME,
2210         .id_table       = rt73usb_device_table,
2211         .probe          = rt2x00usb_probe,
2212         .disconnect     = rt2x00usb_disconnect,
2213         .suspend        = rt2x00usb_suspend,
2214         .resume         = rt2x00usb_resume,
2215 };
2216
2217 static int __init rt73usb_init(void)
2218 {
2219         return usb_register(&rt73usb_driver);
2220 }
2221
2222 static void __exit rt73usb_exit(void)
2223 {
2224         usb_deregister(&rt73usb_driver);
2225 }
2226
2227 module_init(rt73usb_init);
2228 module_exit(rt73usb_exit);