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   1 /*
   2         Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 /*
  28  * Set enviroment defines for rt2x00.h
  29  */
  30 #define DRV_NAME "rt73usb"
  31
  32 #include <linux/delay.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/init.h>
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/usb.h>
  38
  39 #include "rt2x00.h"
  40 #include "rt2x00usb.h"
  41 #include "rt73usb.h"
  42
  43 /*
  44  * Register access.
  45  * All access to the CSR registers will go through the methods
  46  * rt73usb_register_read and rt73usb_register_write.
  47  * BBP and RF register require indirect register access,
  48  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  49  * These indirect registers work with busy bits,
  50  * and we will try maximal REGISTER_BUSY_COUNT times to access
  51  * the register while taking a REGISTER_BUSY_DELAY us delay
  52  * between each attampt. When the busy bit is still set at that time,
  53  * the access attempt is considered to have failed,
  54  * and we will print an error.
  55  * The _lock versions must be used if you already hold the usb_cache_mutex
  56  */
  57 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  58                                          const unsigned int offset, u32 *value)
  59 {
  60         __le32 reg;
  61         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  62                                       USB_VENDOR_REQUEST_IN, offset,
  63                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  64         *value = le32_to_cpu(reg);
  65 }
  66
  67 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  68                                               const unsigned int offset, u32 *value)
  69 {
  70         __le32 reg;
  71         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  72                                        USB_VENDOR_REQUEST_IN, offset,
  73                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  74         *value = le32_to_cpu(reg);
  75 }
  76
  77 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  78                                               const unsigned int offset,
  79                                               void *value, const u32 length)
  80 {
  81         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  82         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  83                                       USB_VENDOR_REQUEST_IN, offset,
  84                                       value, length, timeout);
  85 }
  86
  87 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  88                                           const unsigned int offset, u32 value)
  89 {
  90         __le32 reg = cpu_to_le32(value);
  91         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  92                                       USB_VENDOR_REQUEST_OUT, offset,
  93                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  94 }
  95
  96 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  97                                                const unsigned int offset, u32 value)
  98 {
  99         __le32 reg = cpu_to_le32(value);
 100         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
 101                                        USB_VENDOR_REQUEST_OUT, offset,
 102                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
 103 }
 104
 105 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 106                                                const unsigned int offset,
 107                                                void *value, const u32 length)
 108 {
 109         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
 110         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 111                                       USB_VENDOR_REQUEST_OUT, offset,
 112                                       value, length, timeout);
 113 }
 114
 115 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 116 {
 117         u32 reg;
 118         unsigned int i;
 119
 120         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 121                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 122                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 123                         break;
 124                 udelay(REGISTER_BUSY_DELAY);
 125         }
 126
 127         return reg;
 128 }
 129
 130 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 131                               const unsigned int word, const u8 value)
 132 {
 133         u32 reg;
 134
 135         mutex_lock(&rt2x00dev->usb_cache_mutex);
 136
 137         /*
 138          * Wait until the BBP becomes ready.
 139          */
 140         reg = rt73usb_bbp_check(rt2x00dev);
 141         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 142                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 143                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 144                 return;
 145         }
 146
 147         /*
 148          * Write the data into the BBP.
 149          */
 150         reg = 0;
 151         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 152         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 153         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 154         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 155
 156         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 157         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 158 }
 159
 160 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 161                              const unsigned int word, u8 *value)
 162 {
 163         u32 reg;
 164
 165         mutex_lock(&rt2x00dev->usb_cache_mutex);
 166
 167         /*
 168          * Wait until the BBP becomes ready.
 169          */
 170         reg = rt73usb_bbp_check(rt2x00dev);
 171         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 172                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 173                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 174                 return;
 175         }
 176
 177         /*
 178          * Write the request into the BBP.
 179          */
 180         reg = 0;
 181         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 182         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 183         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 184
 185         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 186
 187         /*
 188          * Wait until the BBP becomes ready.
 189          */
 190         reg = rt73usb_bbp_check(rt2x00dev);
 191         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 192                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 193                 *value = 0xff;
 194                 return;
 195         }
 196
 197         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 198         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 199 }
 200
 201 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 202                              const unsigned int word, const u32 value)
 203 {
 204         u32 reg;
 205         unsigned int i;
 206
 207         if (!word)
 208                 return;
 209
 210         mutex_lock(&rt2x00dev->usb_cache_mutex);
 211
 212         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 213                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 214                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 215                         goto rf_write;
 216                 udelay(REGISTER_BUSY_DELAY);
 217         }
 218
 219         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 220         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 221         return;
 222
 223 rf_write:
 224         reg = 0;
 225         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 226
 227         /*
 228          * RF5225 and RF2527 contain 21 bits per RF register value,
 229          * all others contain 20 bits.
 230          */
 231         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 232                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 233                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 234         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 235         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 236
 237         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 238         rt2x00_rf_write(rt2x00dev, word, value);
 239         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 240 }
 241
 242 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 243 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 244
 245 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 246                              const unsigned int word, u32 *data)
 247 {
 248         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 249 }
 250
 251 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 252                               const unsigned int word, u32 data)
 253 {
 254         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 255 }
 256
 257 static const struct rt2x00debug rt73usb_rt2x00debug = {
 258         .owner  = THIS_MODULE,
 259         .csr    = {
 260                 .read           = rt73usb_read_csr,
 261                 .write          = rt73usb_write_csr,
 262                 .word_size      = sizeof(u32),
 263                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 264         },
 265         .eeprom = {
 266                 .read           = rt2x00_eeprom_read,
 267                 .write          = rt2x00_eeprom_write,
 268                 .word_size      = sizeof(u16),
 269                 .word_count     = EEPROM_SIZE / sizeof(u16),
 270         },
 271         .bbp    = {
 272                 .read           = rt73usb_bbp_read,
 273                 .write          = rt73usb_bbp_write,
 274                 .word_size      = sizeof(u8),
 275                 .word_count     = BBP_SIZE / sizeof(u8),
 276         },
 277         .rf     = {
 278                 .read           = rt2x00_rf_read,
 279                 .write          = rt73usb_rf_write,
 280                 .word_size      = sizeof(u32),
 281                 .word_count     = RF_SIZE / sizeof(u32),
 282         },
 283 };
 284 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 285
 286 /*
 287  * Configuration handlers.
 288  */
 289 static void rt73usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, __le32 *mac)
 290 {
 291         u32 tmp;
 292
 293         tmp = le32_to_cpu(mac[1]);
 294         rt2x00_set_field32(&tmp, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 295         mac[1] = cpu_to_le32(tmp);
 296
 297         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
 298                                     (2 * sizeof(__le32)));
 299 }
 300
 301 static void rt73usb_config_bssid(struct rt2x00_dev *rt2x00dev, __le32 *bssid)
 302 {
 303         u32 tmp;
 304
 305         tmp = le32_to_cpu(bssid[1]);
 306         rt2x00_set_field32(&tmp, MAC_CSR5_BSS_ID_MASK, 3);
 307         bssid[1] = cpu_to_le32(tmp);
 308
 309         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4, bssid,
 310                                     (2 * sizeof(__le32)));
 311 }
 312
 313 static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
 314                                 const int tsf_sync)
 315 {
 316         u32 reg;
 317
 318         /*
 319          * Clear current synchronisation setup.
 320          * For the Beacon base registers we only need to clear
 321          * the first byte since that byte contains the VALID and OWNER
 322          * bits which (when set to 0) will invalidate the entire beacon.
 323          */
 324         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 325         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
 326         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
 327         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
 328         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
 329
 330         /*
 331          * Enable synchronisation.
 332          */
 333         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 334         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 335         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 336         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 337         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, tsf_sync);
 338         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 339 }
 340
 341 static void rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
 342                                       const int short_preamble,
 343                                       const int ack_timeout,
 344                                       const int ack_consume_time)
 345 {
 346         u32 reg;
 347
 348         /*
 349          * When in atomic context, reschedule and let rt2x00lib
 350          * call this function again.
 351          */
 352         if (in_atomic()) {
 353                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
 354                 return;
 355         }
 356
 357         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 358         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
 359         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 360
 361         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 362         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 363                            !!short_preamble);
 364         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 365 }
 366
 367 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 368                                    const int basic_rate_mask)
 369 {
 370         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 371 }
 372
 373 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 374                                    struct rf_channel *rf, const int txpower)
 375 {
 376         u8 r3;
 377         u8 r94;
 378         u8 smart;
 379
 380         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 381         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 382
 383         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 384                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 385
 386         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 387         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 388         rt73usb_bbp_write(rt2x00dev, 3, r3);
 389
 390         r94 = 6;
 391         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 392                 r94 += txpower - MAX_TXPOWER;
 393         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 394                 r94 += txpower;
 395         rt73usb_bbp_write(rt2x00dev, 94, r94);
 396
 397         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 398         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 399         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 400         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 401
 402         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 403         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 404         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 405         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 406
 407         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 408         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 409         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 410         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 411
 412         udelay(10);
 413 }
 414
 415 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 416                                    const int txpower)
 417 {
 418         struct rf_channel rf;
 419
 420         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 421         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 422         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 423         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 424
 425         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 426 }
 427
 428 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 429                                       struct antenna_setup *ant)
 430 {
 431         u8 r3;
 432         u8 r4;
 433         u8 r77;
 434         u8 temp;
 435
 436         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 437         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 438         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 439
 440         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 441
 442         /*
 443          * Configure the RX antenna.
 444          */
 445         switch (ant->rx) {
 446         case ANTENNA_HW_DIVERSITY:
 447                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 448                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 449                        && (rt2x00dev->curr_hwmode != HWMODE_A);
 450                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 451                 break;
 452         case ANTENNA_A:
 453                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 454                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 455                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 456                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 457                 else
 458                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 459                 break;
 460         case ANTENNA_SW_DIVERSITY:
 461                 /*
 462                  * NOTE: We should never come here because rt2x00lib is
 463                  * supposed to catch this and send us the correct antenna
 464                  * explicitely. However we are nog going to bug about this.
 465                  * Instead, just default to antenna B.
 466                  */
 467         case ANTENNA_B:
 468                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 469                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 470                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 471                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 472                 else
 473                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 474                 break;
 475         }
 476
 477         rt73usb_bbp_write(rt2x00dev, 77, r77);
 478         rt73usb_bbp_write(rt2x00dev, 3, r3);
 479         rt73usb_bbp_write(rt2x00dev, 4, r4);
 480 }
 481
 482 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 483                                       struct antenna_setup *ant)
 484 {
 485         u8 r3;
 486         u8 r4;
 487         u8 r77;
 488
 489         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 490         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 491         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 492
 493         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 494         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 495                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 496
 497         /*
 498          * Configure the RX antenna.
 499          */
 500         switch (ant->rx) {
 501         case ANTENNA_HW_DIVERSITY:
 502                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 503                 break;
 504         case ANTENNA_A:
 505                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 506                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 507                 break;
 508         case ANTENNA_SW_DIVERSITY:
 509                 /*
 510                  * NOTE: We should never come here because rt2x00lib is
 511                  * supposed to catch this and send us the correct antenna
 512                  * explicitely. However we are nog going to bug about this.
 513                  * Instead, just default to antenna B.
 514                  */
 515         case ANTENNA_B:
 516                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 517                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 518                 break;
 519         }
 520
 521         rt73usb_bbp_write(rt2x00dev, 77, r77);
 522         rt73usb_bbp_write(rt2x00dev, 3, r3);
 523         rt73usb_bbp_write(rt2x00dev, 4, r4);
 524 }
 525
 526 struct antenna_sel {
 527         u8 word;
 528         /*
 529          * value[0] -> non-LNA
 530          * value[1] -> LNA
 531          */
 532         u8 value[2];
 533 };
 534
 535 static const struct antenna_sel antenna_sel_a[] = {
 536         { 96,  { 0x58, 0x78 } },
 537         { 104, { 0x38, 0x48 } },
 538         { 75,  { 0xfe, 0x80 } },
 539         { 86,  { 0xfe, 0x80 } },
 540         { 88,  { 0xfe, 0x80 } },
 541         { 35,  { 0x60, 0x60 } },
 542         { 97,  { 0x58, 0x58 } },
 543         { 98,  { 0x58, 0x58 } },
 544 };
 545
 546 static const struct antenna_sel antenna_sel_bg[] = {
 547         { 96,  { 0x48, 0x68 } },
 548         { 104, { 0x2c, 0x3c } },
 549         { 75,  { 0xfe, 0x80 } },
 550         { 86,  { 0xfe, 0x80 } },
 551         { 88,  { 0xfe, 0x80 } },
 552         { 35,  { 0x50, 0x50 } },
 553         { 97,  { 0x48, 0x48 } },
 554         { 98,  { 0x48, 0x48 } },
 555 };
 556
 557 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 558                                    struct antenna_setup *ant)
 559 {
 560         const struct antenna_sel *sel;
 561         unsigned int lna;
 562         unsigned int i;
 563         u32 reg;
 564
 565         if (rt2x00dev->curr_hwmode == HWMODE_A) {
 566                 sel = antenna_sel_a;
 567                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 568         } else {
 569                 sel = antenna_sel_bg;
 570                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 571         }
 572
 573         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 574                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 575
 576         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 577
 578         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 579                            (rt2x00dev->curr_hwmode == HWMODE_B ||
 580                             rt2x00dev->curr_hwmode == HWMODE_G));
 581         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 582                            (rt2x00dev->curr_hwmode == HWMODE_A));
 583
 584         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 585
 586         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 587             rt2x00_rf(&rt2x00dev->chip, RF5225))
 588                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 589         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 590                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 591                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 592 }
 593
 594 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 595                                     struct rt2x00lib_conf *libconf)
 596 {
 597         u32 reg;
 598
 599         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 600         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 601         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 602
 603         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 604         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 605         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 606         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 607         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 608
 609         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 610         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 611         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 612
 613         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 614         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 615         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 616
 617         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 618         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 619                            libconf->conf->beacon_int * 16);
 620         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 621 }
 622
 623 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 624                            const unsigned int flags,
 625                            struct rt2x00lib_conf *libconf)
 626 {
 627         if (flags & CONFIG_UPDATE_PHYMODE)
 628                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 629         if (flags & CONFIG_UPDATE_CHANNEL)
 630                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 631                                        libconf->conf->power_level);
 632         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 633                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 634         if (flags & CONFIG_UPDATE_ANTENNA)
 635                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 636         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 637                 rt73usb_config_duration(rt2x00dev, libconf);
 638 }
 639
 640 /*
 641  * LED functions.
 642  */
 643 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 644 {
 645         u32 reg;
 646
 647         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 648         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 649         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 650         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 651
 652         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 653         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS,
 654                            (rt2x00dev->rx_status.phymode == MODE_IEEE80211A));
 655         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS,
 656                            (rt2x00dev->rx_status.phymode != MODE_IEEE80211A));
 657
 658         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 659                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 660 }
 661
 662 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 663 {
 664         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 665         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 666         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 667
 668         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 669                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 670 }
 671
 672 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, int rssi)
 673 {
 674         u32 led;
 675
 676         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 677                 return;
 678
 679         /*
 680          * Led handling requires a positive value for the rssi,
 681          * to do that correctly we need to add the correction.
 682          */
 683         rssi += rt2x00dev->rssi_offset;
 684
 685         if (rssi <= 30)
 686                 led = 0;
 687         else if (rssi <= 39)
 688                 led = 1;
 689         else if (rssi <= 49)
 690                 led = 2;
 691         else if (rssi <= 53)
 692                 led = 3;
 693         else if (rssi <= 63)
 694                 led = 4;
 695         else
 696                 led = 5;
 697
 698         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, led,
 699                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 700 }
 701
 702 /*
 703  * Link tuning
 704  */
 705 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 706                                struct link_qual *qual)
 707 {
 708         u32 reg;
 709
 710         /*
 711          * Update FCS error count from register.
 712          */
 713         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 714         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 715
 716         /*
 717          * Update False CCA count from register.
 718          */
 719         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 720         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 721 }
 722
 723 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 724 {
 725         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 726         rt2x00dev->link.vgc_level = 0x20;
 727 }
 728
 729 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 730 {
 731         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 732         u8 r17;
 733         u8 up_bound;
 734         u8 low_bound;
 735
 736         /*
 737          * Update Led strength
 738          */
 739         rt73usb_activity_led(rt2x00dev, rssi);
 740
 741         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 742
 743         /*
 744          * Determine r17 bounds.
 745          */
 746         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
 747                 low_bound = 0x28;
 748                 up_bound = 0x48;
 749
 750                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 751                         low_bound += 0x10;
 752                         up_bound += 0x10;
 753                 }
 754         } else {
 755                 if (rssi > -82) {
 756                         low_bound = 0x1c;
 757                         up_bound = 0x40;
 758                 } else if (rssi > -84) {
 759                         low_bound = 0x1c;
 760                         up_bound = 0x20;
 761                 } else {
 762                         low_bound = 0x1c;
 763                         up_bound = 0x1c;
 764                 }
 765
 766                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 767                         low_bound += 0x14;
 768                         up_bound += 0x10;
 769                 }
 770         }
 771
 772         /*
 773          * Special big-R17 for very short distance
 774          */
 775         if (rssi > -35) {
 776                 if (r17 != 0x60)
 777                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 778                 return;
 779         }
 780
 781         /*
 782          * Special big-R17 for short distance
 783          */
 784         if (rssi >= -58) {
 785                 if (r17 != up_bound)
 786                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 787                 return;
 788         }
 789
 790         /*
 791          * Special big-R17 for middle-short distance
 792          */
 793         if (rssi >= -66) {
 794                 low_bound += 0x10;
 795                 if (r17 != low_bound)
 796                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 797                 return;
 798         }
 799
 800         /*
 801          * Special mid-R17 for middle distance
 802          */
 803         if (rssi >= -74) {
 804                 if (r17 != (low_bound + 0x10))
 805                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 806                 return;
 807         }
 808
 809         /*
 810          * Special case: Change up_bound based on the rssi.
 811          * Lower up_bound when rssi is weaker then -74 dBm.
 812          */
 813         up_bound -= 2 * (-74 - rssi);
 814         if (low_bound > up_bound)
 815                 up_bound = low_bound;
 816
 817         if (r17 > up_bound) {
 818                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 819                 return;
 820         }
 821
 822         /*
 823          * r17 does not yet exceed upper limit, continue and base
 824          * the r17 tuning on the false CCA count.
 825          */
 826         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 827                 r17 += 4;
 828                 if (r17 > up_bound)
 829                         r17 = up_bound;
 830                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 831         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 832                 r17 -= 4;
 833                 if (r17 < low_bound)
 834                         r17 = low_bound;
 835                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 836         }
 837 }
 838
 839 /*
 840  * Firmware name function.
 841  */
 842 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 843 {
 844         return FIRMWARE_RT2571;
 845 }
 846
 847 /*
 848  * Initialization functions.
 849  */
 850 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 851                                  const size_t len)
 852 {
 853         unsigned int i;
 854         int status;
 855         u32 reg;
 856         char *ptr = data;
 857         char *cache;
 858         int buflen;
 859         int timeout;
 860
 861         /*
 862          * Wait for stable hardware.
 863          */
 864         for (i = 0; i < 100; i++) {
 865                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 866                 if (reg)
 867                         break;
 868                 msleep(1);
 869         }
 870
 871         if (!reg) {
 872                 ERROR(rt2x00dev, "Unstable hardware.\n");
 873                 return -EBUSY;
 874         }
 875
 876         /*
 877          * Write firmware to device.
 878          * We setup a seperate cache for this action,
 879          * since we are going to write larger chunks of data
 880          * then normally used cache size.
 881          */
 882         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 883         if (!cache) {
 884                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 885                 return -ENOMEM;
 886         }
 887
 888         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 889                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 890                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 891
 892                 memcpy(cache, ptr, buflen);
 893
 894                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 895                                          USB_VENDOR_REQUEST_OUT,
 896                                          FIRMWARE_IMAGE_BASE + i, 0x0000,
 897                                          cache, buflen, timeout);
 898
 899                 ptr += buflen;
 900         }
 901
 902         kfree(cache);
 903
 904         /*
 905          * Send firmware request to device to load firmware,
 906          * we need to specify a long timeout time.
 907          */
 908         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 909                                              0x0000, USB_MODE_FIRMWARE,
 910                                              REGISTER_TIMEOUT_FIRMWARE);
 911         if (status < 0) {
 912                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 913                 return status;
 914         }
 915
 916         rt73usb_disable_led(rt2x00dev);
 917
 918         return 0;
 919 }
 920
 921 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 922 {
 923         u32 reg;
 924
 925         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 926         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 927         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 928         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 929         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 930
 931         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 932         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 933         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 934         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 935         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 936         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 937         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 938         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 939         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 940         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 941
 942         /*
 943          * CCK TXD BBP registers
 944          */
 945         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 946         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 947         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 948         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 949         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 950         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 951         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 952         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 953         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 954         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 955
 956         /*
 957          * OFDM TXD BBP registers
 958          */
 959         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 960         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 961         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 962         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 963         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 964         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 965         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 966         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 967
 968         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 969         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 970         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 971         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 972         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 973         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 974
 975         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 976         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 977         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 978         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 979         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 980         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 981
 982         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 983
 984         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 985         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
 986         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
 987
 988         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
 989
 990         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
 991                 return -EBUSY;
 992
 993         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
 994
 995         /*
 996          * Invalidate all Shared Keys (SEC_CSR0),
 997          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
 998          */
 999         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1000         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1001         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1002
1003         reg = 0x000023b0;
1004         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1005             rt2x00_rf(&rt2x00dev->chip, RF2527))
1006                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1007         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1008
1009         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1010         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1011         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1012
1013         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1014         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1015         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1016         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1017
1018         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1019         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1020         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1021         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1022
1023         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1024         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1025         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1026
1027         /*
1028          * We must clear the error counters.
1029          * These registers are cleared on read,
1030          * so we may pass a useless variable to store the value.
1031          */
1032         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1033         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1034         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1035
1036         /*
1037          * Reset MAC and BBP registers.
1038          */
1039         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1040         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1041         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1042         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1043
1044         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1045         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1046         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1047         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1048
1049         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1050         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1051         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1052
1053         return 0;
1054 }
1055
1056 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1057 {
1058         unsigned int i;
1059         u16 eeprom;
1060         u8 reg_id;
1061         u8 value;
1062
1063         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1064                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1065                 if ((value != 0xff) && (value != 0x00))
1066                         goto continue_csr_init;
1067                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1068                 udelay(REGISTER_BUSY_DELAY);
1069         }
1070
1071         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1072         return -EACCES;
1073
1074 continue_csr_init:
1075         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1076         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1077         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1078         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1079         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1080         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1081         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1082         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1083         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1084         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1085         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1086         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1087         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1088         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1089         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1090         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1091         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1092         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1093         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1094         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1095         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1096         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1097         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1098         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1099         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1100
1101         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1102         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1103                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1104
1105                 if (eeprom != 0xffff && eeprom != 0x0000) {
1106                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1107                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1108                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1109                               reg_id, value);
1110                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1111                 }
1112         }
1113         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1114
1115         return 0;
1116 }
1117
1118 /*
1119  * Device state switch handlers.
1120  */
1121 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1122                               enum dev_state state)
1123 {
1124         u32 reg;
1125
1126         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1127         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1128                            state == STATE_RADIO_RX_OFF);
1129         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1130 }
1131
1132 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1133 {
1134         /*
1135          * Initialize all registers.
1136          */
1137         if (rt73usb_init_registers(rt2x00dev) ||
1138             rt73usb_init_bbp(rt2x00dev)) {
1139                 ERROR(rt2x00dev, "Register initialization failed.\n");
1140                 return -EIO;
1141         }
1142
1143         rt2x00usb_enable_radio(rt2x00dev);
1144
1145         /*
1146          * Enable LED
1147          */
1148         rt73usb_enable_led(rt2x00dev);
1149
1150         return 0;
1151 }
1152
1153 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1154 {
1155         /*
1156          * Disable LED
1157          */
1158         rt73usb_disable_led(rt2x00dev);
1159
1160         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1161
1162         /*
1163          * Disable synchronisation.
1164          */
1165         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1166
1167         rt2x00usb_disable_radio(rt2x00dev);
1168 }
1169
1170 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1171 {
1172         u32 reg;
1173         unsigned int i;
1174         char put_to_sleep;
1175         char current_state;
1176
1177         put_to_sleep = (state != STATE_AWAKE);
1178
1179         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1180         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1181         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1182         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1183
1184         /*
1185          * Device is not guaranteed to be in the requested state yet.
1186          * We must wait until the register indicates that the
1187          * device has entered the correct state.
1188          */
1189         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1190                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1191                 current_state =
1192                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1193                 if (current_state == !put_to_sleep)
1194                         return 0;
1195                 msleep(10);
1196         }
1197
1198         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1199                "current device state %d.\n", !put_to_sleep, current_state);
1200
1201         return -EBUSY;
1202 }
1203
1204 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1205                                     enum dev_state state)
1206 {
1207         int retval = 0;
1208
1209         switch (state) {
1210         case STATE_RADIO_ON:
1211                 retval = rt73usb_enable_radio(rt2x00dev);
1212                 break;
1213         case STATE_RADIO_OFF:
1214                 rt73usb_disable_radio(rt2x00dev);
1215                 break;
1216         case STATE_RADIO_RX_ON:
1217         case STATE_RADIO_RX_OFF:
1218                 rt73usb_toggle_rx(rt2x00dev, state);
1219                 break;
1220         case STATE_DEEP_SLEEP:
1221         case STATE_SLEEP:
1222         case STATE_STANDBY:
1223         case STATE_AWAKE:
1224                 retval = rt73usb_set_state(rt2x00dev, state);
1225                 break;
1226         default:
1227                 retval = -ENOTSUPP;
1228                 break;
1229         }
1230
1231         return retval;
1232 }
1233
1234 /*
1235  * TX descriptor initialization
1236  */
1237 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1238                                   __le32 *txd,
1239                                   struct txdata_entry_desc *desc,
1240                                   struct ieee80211_hdr *ieee80211hdr,
1241                                   unsigned int length,
1242                                   struct ieee80211_tx_control *control)
1243 {
1244         u32 word;
1245
1246         /*
1247          * Start writing the descriptor words.
1248          */
1249         rt2x00_desc_read(txd, 1, &word);
1250         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue);
1251         rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs);
1252         rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1253         rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1254         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1255         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1256         rt2x00_desc_write(txd, 1, word);
1257
1258         rt2x00_desc_read(txd, 2, &word);
1259         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1260         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1261         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1262         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1263         rt2x00_desc_write(txd, 2, word);
1264
1265         rt2x00_desc_read(txd, 5, &word);
1266         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1267                            TXPOWER_TO_DEV(control->power_level));
1268         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1269         rt2x00_desc_write(txd, 5, word);
1270
1271         rt2x00_desc_read(txd, 0, &word);
1272         rt2x00_set_field32(&word, TXD_W0_BURST,
1273                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1274         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1275         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1276                            test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1277         rt2x00_set_field32(&word, TXD_W0_ACK,
1278                            !(control->flags & IEEE80211_TXCTL_NO_ACK));
1279         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1280                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1281         rt2x00_set_field32(&word, TXD_W0_OFDM,
1282                            test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1283         rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1284         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1285                            !!(control->flags &
1286                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1287         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1288         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1289         rt2x00_set_field32(&word, TXD_W0_BURST2,
1290                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1291         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1292         rt2x00_desc_write(txd, 0, word);
1293 }
1294
1295 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1296                                    struct sk_buff *skb)
1297 {
1298         int length;
1299
1300         /*
1301          * The length _must_ be a multiple of 4,
1302          * but it must _not_ be a multiple of the USB packet size.
1303          */
1304         length = roundup(skb->len, 4);
1305         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1306
1307         return length;
1308 }
1309
1310 /*
1311  * TX data initialization
1312  */
1313 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1314                                   unsigned int queue)
1315 {
1316         u32 reg;
1317
1318         if (queue != IEEE80211_TX_QUEUE_BEACON)
1319                 return;
1320
1321         /*
1322          * For Wi-Fi faily generated beacons between participating stations.
1323          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1324          */
1325         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1326
1327         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1328         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1329                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1330                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1331         }
1332 }
1333
1334 /*
1335  * RX control handlers
1336  */
1337 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1338 {
1339         u16 eeprom;
1340         u8 offset;
1341         u8 lna;
1342
1343         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1344         switch (lna) {
1345         case 3:
1346                 offset = 90;
1347                 break;
1348         case 2:
1349                 offset = 74;
1350                 break;
1351         case 1:
1352                 offset = 64;
1353                 break;
1354         default:
1355                 return 0;
1356         }
1357
1358         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
1359                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1360                         if (lna == 3 || lna == 2)
1361                                 offset += 10;
1362                 } else {
1363                         if (lna == 3)
1364                                 offset += 6;
1365                         else if (lna == 2)
1366                                 offset += 8;
1367                 }
1368
1369                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1370                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1371         } else {
1372                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1373                         offset += 14;
1374
1375                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1376                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1377         }
1378
1379         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1380 }
1381
1382 static void rt73usb_fill_rxdone(struct data_entry *entry,
1383                                 struct rxdata_entry_desc *desc)
1384 {
1385         __le32 *rxd = (__le32 *)entry->skb->data;
1386         u32 word0;
1387         u32 word1;
1388
1389         rt2x00_desc_read(rxd, 0, &word0);
1390         rt2x00_desc_read(rxd, 1, &word1);
1391
1392         desc->flags = 0;
1393         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1394                 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1395
1396         /*
1397          * Obtain the status about this packet.
1398          */
1399         desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1400         desc->rssi = rt73usb_agc_to_rssi(entry->ring->rt2x00dev, word1);
1401         desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1402         desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1403
1404         /*
1405          * Pull the skb to clear the descriptor area.
1406          */
1407         skb_pull(entry->skb, entry->ring->desc_size);
1408
1409         return;
1410 }
1411
1412 /*
1413  * Device probe functions.
1414  */
1415 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1416 {
1417         u16 word;
1418         u8 *mac;
1419         s8 value;
1420
1421         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1422
1423         /*
1424          * Start validation of the data that has been read.
1425          */
1426         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1427         if (!is_valid_ether_addr(mac)) {
1428                 DECLARE_MAC_BUF(macbuf);
1429
1430                 random_ether_addr(mac);
1431                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1432         }
1433
1434         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1435         if (word == 0xffff) {
1436                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1437                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1438                                    ANTENNA_B);
1439                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1440                                    ANTENNA_B);
1441                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1442                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1443                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1444                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1445                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1446                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1447         }
1448
1449         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1450         if (word == 0xffff) {
1451                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1452                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1453                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1454         }
1455
1456         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1457         if (word == 0xffff) {
1458                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1459                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1460                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1461                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1462                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1463                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1464                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1465                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1466                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1467                                    LED_MODE_DEFAULT);
1468                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1469                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1470         }
1471
1472         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1473         if (word == 0xffff) {
1474                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1475                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1476                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1477                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1478         }
1479
1480         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1481         if (word == 0xffff) {
1482                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1483                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1484                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1485                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1486         } else {
1487                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1488                 if (value < -10 || value > 10)
1489                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1490                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1491                 if (value < -10 || value > 10)
1492                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1493                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1494         }
1495
1496         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1497         if (word == 0xffff) {
1498                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1499                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1500                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1501                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1502         } else {
1503                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1504                 if (value < -10 || value > 10)
1505                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1506                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1507                 if (value < -10 || value > 10)
1508                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1509                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1510         }
1511
1512         return 0;
1513 }
1514
1515 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1516 {
1517         u32 reg;
1518         u16 value;
1519         u16 eeprom;
1520
1521         /*
1522          * Read EEPROM word for configuration.
1523          */
1524         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1525
1526         /*
1527          * Identify RF chipset.
1528          */
1529         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1530         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1531         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1532
1533         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1534                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1535                 return -ENODEV;
1536         }
1537
1538         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1539             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1540             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1541             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1542                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1543                 return -ENODEV;
1544         }
1545
1546         /*
1547          * Identify default antenna configuration.
1548          */
1549         rt2x00dev->default_ant.tx =
1550             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1551         rt2x00dev->default_ant.rx =
1552             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1553
1554         /*
1555          * Read the Frame type.
1556          */
1557         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1558                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1559
1560         /*
1561          * Read frequency offset.
1562          */
1563         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1564         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1565
1566         /*
1567          * Read external LNA informations.
1568          */
1569         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1570
1571         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1572                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1573                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1574         }
1575
1576         /*
1577          * Store led settings, for correct led behaviour.
1578          */
1579         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1580
1581         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1582                            rt2x00dev->led_mode);
1583         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1584                            rt2x00_get_field16(eeprom,
1585                                               EEPROM_LED_POLARITY_GPIO_0));
1586         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1587                            rt2x00_get_field16(eeprom,
1588                                               EEPROM_LED_POLARITY_GPIO_1));
1589         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1590                            rt2x00_get_field16(eeprom,
1591                                               EEPROM_LED_POLARITY_GPIO_2));
1592         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1593                            rt2x00_get_field16(eeprom,
1594                                               EEPROM_LED_POLARITY_GPIO_3));
1595         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1596                            rt2x00_get_field16(eeprom,
1597                                               EEPROM_LED_POLARITY_GPIO_4));
1598         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1599                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1600         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1601                            rt2x00_get_field16(eeprom,
1602                                               EEPROM_LED_POLARITY_RDY_G));
1603         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1604                            rt2x00_get_field16(eeprom,
1605                                               EEPROM_LED_POLARITY_RDY_A));
1606
1607         return 0;
1608 }
1609
1610 /*
1611  * RF value list for RF2528
1612  * Supports: 2.4 GHz
1613  */
1614 static const struct rf_channel rf_vals_bg_2528[] = {
1615         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1616         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1617         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1618         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1619         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1620         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1621         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1622         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1623         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1624         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1625         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1626         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1627         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1628         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1629 };
1630
1631 /*
1632  * RF value list for RF5226
1633  * Supports: 2.4 GHz & 5.2 GHz
1634  */
1635 static const struct rf_channel rf_vals_5226[] = {
1636         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1637         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1638         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1639         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1640         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1641         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1642         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1643         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1644         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1645         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1646         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1647         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1648         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1649         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1650
1651         /* 802.11 UNI / HyperLan 2 */
1652         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1653         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1654         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1655         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1656         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1657         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1658         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1659         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1660
1661         /* 802.11 HyperLan 2 */
1662         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1663         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1664         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1665         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1666         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1667         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1668         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1669         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1670         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1671         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1672
1673         /* 802.11 UNII */
1674         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1675         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1676         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1677         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1678         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1679         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1680
1681         /* MMAC(Japan)J52 ch 34,38,42,46 */
1682         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1683         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1684         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1685         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1686 };
1687
1688 /*
1689  * RF value list for RF5225 & RF2527
1690  * Supports: 2.4 GHz & 5.2 GHz
1691  */
1692 static const struct rf_channel rf_vals_5225_2527[] = {
1693         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1694         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1695         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1696         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1697         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1698         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1699         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1700         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1701         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1702         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1703         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1704         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1705         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1706         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1707
1708         /* 802.11 UNI / HyperLan 2 */
1709         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1710         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1711         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1712         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1713         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1714         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1715         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1716         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1717
1718         /* 802.11 HyperLan 2 */
1719         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1720         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1721         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1722         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1723         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1724         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1725         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1726         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1727         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1728         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1729
1730         /* 802.11 UNII */
1731         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1732         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1733         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1734         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1735         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1736         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1737
1738         /* MMAC(Japan)J52 ch 34,38,42,46 */
1739         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1740         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1741         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1742         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1743 };
1744
1745
1746 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1747 {
1748         struct hw_mode_spec *spec = &rt2x00dev->spec;
1749         u8 *txpower;
1750         unsigned int i;
1751
1752         /*
1753          * Initialize all hw fields.
1754          */
1755         rt2x00dev->hw->flags =
1756             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1757             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1758         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1759         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1760         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1761         rt2x00dev->hw->queues = 5;
1762
1763         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1764         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1765                                 rt2x00_eeprom_addr(rt2x00dev,
1766                                                    EEPROM_MAC_ADDR_0));
1767
1768         /*
1769          * Convert tx_power array in eeprom.
1770          */
1771         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1772         for (i = 0; i < 14; i++)
1773                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1774
1775         /*
1776          * Initialize hw_mode information.
1777          */
1778         spec->num_modes = 2;
1779         spec->num_rates = 12;
1780         spec->tx_power_a = NULL;
1781         spec->tx_power_bg = txpower;
1782         spec->tx_power_default = DEFAULT_TXPOWER;
1783
1784         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1785                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1786                 spec->channels = rf_vals_bg_2528;
1787         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1788                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1789                 spec->channels = rf_vals_5226;
1790         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1791                 spec->num_channels = 14;
1792                 spec->channels = rf_vals_5225_2527;
1793         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1794                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1795                 spec->channels = rf_vals_5225_2527;
1796         }
1797
1798         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1799             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1800                 spec->num_modes = 3;
1801
1802                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1803                 for (i = 0; i < 14; i++)
1804                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1805
1806                 spec->tx_power_a = txpower;
1807         }
1808 }
1809
1810 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1811 {
1812         int retval;
1813
1814         /*
1815          * Allocate eeprom data.
1816          */
1817         retval = rt73usb_validate_eeprom(rt2x00dev);
1818         if (retval)
1819                 return retval;
1820
1821         retval = rt73usb_init_eeprom(rt2x00dev);
1822         if (retval)
1823                 return retval;
1824
1825         /*
1826          * Initialize hw specifications.
1827          */
1828         rt73usb_probe_hw_mode(rt2x00dev);
1829
1830         /*
1831          * This device requires firmware
1832          */
1833         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1834
1835         /*
1836          * Set the rssi offset.
1837          */
1838         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1839
1840         return 0;
1841 }
1842
1843 /*
1844  * IEEE80211 stack callback functions.
1845  */
1846 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1847                                      unsigned int changed_flags,
1848                                      unsigned int *total_flags,
1849                                      int mc_count,
1850                                      struct dev_addr_list *mc_list)
1851 {
1852         struct rt2x00_dev *rt2x00dev = hw->priv;
1853         struct interface *intf = &rt2x00dev->interface;
1854         u32 reg;
1855
1856         /*
1857          * Mask off any flags we are going to ignore from
1858          * the total_flags field.
1859          */
1860         *total_flags &=
1861             FIF_ALLMULTI |
1862             FIF_FCSFAIL |
1863             FIF_PLCPFAIL |
1864             FIF_CONTROL |
1865             FIF_OTHER_BSS |
1866             FIF_PROMISC_IN_BSS;
1867
1868         /*
1869          * Apply some rules to the filters:
1870          * - Some filters imply different filters to be set.
1871          * - Some things we can't filter out at all.
1872          * - Some filters are set based on interface type.
1873          */
1874         if (mc_count)
1875                 *total_flags |= FIF_ALLMULTI;
1876         if (*total_flags & FIF_OTHER_BSS ||
1877             *total_flags & FIF_PROMISC_IN_BSS)
1878                 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1879         if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1880                 *total_flags |= FIF_PROMISC_IN_BSS;
1881
1882         /*
1883          * Check if there is any work left for us.
1884          */
1885         if (intf->filter == *total_flags)
1886                 return;
1887         intf->filter = *total_flags;
1888
1889         /*
1890          * When in atomic context, reschedule and let rt2x00lib
1891          * call this function again.
1892          */
1893         if (in_atomic()) {
1894                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1895                 return;
1896         }
1897
1898         /*
1899          * Start configuration steps.
1900          * Note that the version error will always be dropped
1901          * and broadcast frames will always be accepted since
1902          * there is no filter for it at this time.
1903          */
1904         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1905         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
1906                            !(*total_flags & FIF_FCSFAIL));
1907         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
1908                            !(*total_flags & FIF_PLCPFAIL));
1909         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
1910                            !(*total_flags & FIF_CONTROL));
1911         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
1912                            !(*total_flags & FIF_PROMISC_IN_BSS));
1913         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
1914                            !(*total_flags & FIF_PROMISC_IN_BSS));
1915         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1916         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
1917                            !(*total_flags & FIF_ALLMULTI));
1918         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
1919         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS, 1);
1920         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1921 }
1922
1923 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1924                                    u32 short_retry, u32 long_retry)
1925 {
1926         struct rt2x00_dev *rt2x00dev = hw->priv;
1927         u32 reg;
1928
1929         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1930         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1931         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1932         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1933
1934         return 0;
1935 }
1936
1937 #if 0
1938 /*
1939  * Mac80211 demands get_tsf must be atomic.
1940  * This is not possible for rt73usb since all register access
1941  * functions require sleeping. Untill mac80211 no longer needs
1942  * get_tsf to be atomic, this function should be disabled.
1943  */
1944 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1945 {
1946         struct rt2x00_dev *rt2x00dev = hw->priv;
1947         u64 tsf;
1948         u32 reg;
1949
1950         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1951         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1952         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1953         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1954
1955         return tsf;
1956 }
1957 #else
1958 #define rt73usb_get_tsf NULL
1959 #endif
1960
1961 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1962 {
1963         struct rt2x00_dev *rt2x00dev = hw->priv;
1964
1965         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
1966         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
1967 }
1968
1969 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1970                           struct ieee80211_tx_control *control)
1971 {
1972         struct rt2x00_dev *rt2x00dev = hw->priv;
1973         int timeout;
1974
1975         /*
1976          * Just in case the ieee80211 doesn't set this,
1977          * but we need this queue set for the descriptor
1978          * initialization.
1979          */
1980         control->queue = IEEE80211_TX_QUEUE_BEACON;
1981
1982         /*
1983          * First we create the beacon.
1984          */
1985         skb_push(skb, TXD_DESC_SIZE);
1986         memset(skb->data, 0, TXD_DESC_SIZE);
1987
1988         rt2x00lib_write_tx_desc(rt2x00dev, (__le32 *)skb->data,
1989                                 (struct ieee80211_hdr *)(skb->data +
1990                                                          TXD_DESC_SIZE),
1991                                 skb->len - TXD_DESC_SIZE, control);
1992
1993         /*
1994          * Write entire beacon with descriptor to register,
1995          * and kick the beacon generator.
1996          */
1997         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
1998         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
1999                                  USB_VENDOR_REQUEST_OUT,
2000                                  HW_BEACON_BASE0, 0x0000,
2001                                  skb->data, skb->len, timeout);
2002         rt73usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
2003
2004         return 0;
2005 }
2006
2007 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2008         .tx                     = rt2x00mac_tx,
2009         .start                  = rt2x00mac_start,
2010         .stop                   = rt2x00mac_stop,
2011         .add_interface          = rt2x00mac_add_interface,
2012         .remove_interface       = rt2x00mac_remove_interface,
2013         .config                 = rt2x00mac_config,
2014         .config_interface       = rt2x00mac_config_interface,
2015         .configure_filter       = rt73usb_configure_filter,
2016         .get_stats              = rt2x00mac_get_stats,
2017         .set_retry_limit        = rt73usb_set_retry_limit,
2018         .erp_ie_changed         = rt2x00mac_erp_ie_changed,
2019         .conf_tx                = rt2x00mac_conf_tx,
2020         .get_tx_stats           = rt2x00mac_get_tx_stats,
2021         .get_tsf                = rt73usb_get_tsf,
2022         .reset_tsf              = rt73usb_reset_tsf,
2023         .beacon_update          = rt73usb_beacon_update,
2024 };
2025
2026 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2027         .probe_hw               = rt73usb_probe_hw,
2028         .get_firmware_name      = rt73usb_get_firmware_name,
2029         .load_firmware          = rt73usb_load_firmware,
2030         .initialize             = rt2x00usb_initialize,
2031         .uninitialize           = rt2x00usb_uninitialize,
2032         .set_device_state       = rt73usb_set_device_state,
2033         .link_stats             = rt73usb_link_stats,
2034         .reset_tuner            = rt73usb_reset_tuner,
2035         .link_tuner             = rt73usb_link_tuner,
2036         .write_tx_desc          = rt73usb_write_tx_desc,
2037         .write_tx_data          = rt2x00usb_write_tx_data,
2038         .get_tx_data_len        = rt73usb_get_tx_data_len,
2039         .kick_tx_queue          = rt73usb_kick_tx_queue,
2040         .fill_rxdone            = rt73usb_fill_rxdone,
2041         .config_mac_addr        = rt73usb_config_mac_addr,
2042         .config_bssid           = rt73usb_config_bssid,
2043         .config_type            = rt73usb_config_type,
2044         .config_preamble        = rt73usb_config_preamble,
2045         .config                 = rt73usb_config,
2046 };
2047
2048 static const struct rt2x00_ops rt73usb_ops = {
2049         .name           = DRV_NAME,
2050         .rxd_size       = RXD_DESC_SIZE,
2051         .txd_size       = TXD_DESC_SIZE,
2052         .eeprom_size    = EEPROM_SIZE,
2053         .rf_size        = RF_SIZE,
2054         .lib            = &rt73usb_rt2x00_ops,
2055         .hw             = &rt73usb_mac80211_ops,
2056 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2057         .debugfs        = &rt73usb_rt2x00debug,
2058 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2059 };
2060
2061 /*
2062  * rt73usb module information.
2063  */
2064 static struct usb_device_id rt73usb_device_table[] = {
2065         /* AboCom */
2066         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2067         /* Askey */
2068         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2069         /* ASUS */
2070         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2071         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2072         /* Belkin */
2073         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2074         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2075         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2076         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2077         /* Billionton */
2078         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2079         /* Buffalo */
2080         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2081         /* CNet */
2082         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2083         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2084         /* Conceptronic */
2085         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2086         /* D-Link */
2087         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2088         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2089         /* Gemtek */
2090         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2091         /* Gigabyte */
2092         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2093         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2094         /* Huawei-3Com */
2095         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2096         /* Hercules */
2097         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2098         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2099         /* Linksys */
2100         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2101         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2102         /* MSI */
2103         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2104         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2105         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2106         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2107         /* Ralink */
2108         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2109         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2110         /* Qcom */
2111         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2112         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2113         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2114         /* Senao */
2115         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2116         /* Sitecom */
2117         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2118         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2119         /* Surecom */
2120         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2121         /* Planex */
2122         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2123         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2124         { 0, }
2125 };
2126
2127 MODULE_AUTHOR(DRV_PROJECT);
2128 MODULE_VERSION(DRV_VERSION);
2129 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2130 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2131 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2132 MODULE_FIRMWARE(FIRMWARE_RT2571);
2133 MODULE_LICENSE("GPL");
2134
2135 static struct usb_driver rt73usb_driver = {
2136         .name           = DRV_NAME,
2137         .id_table       = rt73usb_device_table,
2138         .probe          = rt2x00usb_probe,
2139         .disconnect     = rt2x00usb_disconnect,
2140         .suspend        = rt2x00usb_suspend,
2141         .resume         = rt2x00usb_resume,
2142 };
2143
2144 static int __init rt73usb_init(void)
2145 {
2146         return usb_register(&rt73usb_driver);
2147 }
2148
2149 static void __exit rt73usb_exit(void)
2150 {
2151         usb_deregister(&rt73usb_driver);
2152 }
2153
2154 module_init(rt73usb_init);
2155 module_exit(rt73usb_exit);