SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 /*
  28  * Set enviroment defines for rt2x00.h
  29  */
  30 #define DRV_NAME "rt73usb"
  31
  32 #include <linux/delay.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/init.h>
  35 #include <linux/kernel.h>
  36 #include <linux/module.h>
  37 #include <linux/usb.h>
  38
  39 #include "rt2x00.h"
  40 #include "rt2x00usb.h"
  41 #include "rt73usb.h"
  42
  43 /*
  44  * Register access.
  45  * All access to the CSR registers will go through the methods
  46  * rt73usb_register_read and rt73usb_register_write.
  47  * BBP and RF register require indirect register access,
  48  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  49  * These indirect registers work with busy bits,
  50  * and we will try maximal REGISTER_BUSY_COUNT times to access
  51  * the register while taking a REGISTER_BUSY_DELAY us delay
  52  * between each attampt. When the busy bit is still set at that time,
  53  * the access attempt is considered to have failed,
  54  * and we will print an error.
  55  */
  56 static inline void rt73usb_register_read(const struct rt2x00_dev *rt2x00dev,
  57                                          const unsigned int offset, u32 *value)
  58 {
  59         __le32 reg;
  60         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  61                                       USB_VENDOR_REQUEST_IN, offset,
  62                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  63         *value = le32_to_cpu(reg);
  64 }
  65
  66 static inline void rt73usb_register_multiread(const struct rt2x00_dev
  67                                               *rt2x00dev,
  68                                               const unsigned int offset,
  69                                               void *value, const u32 length)
  70 {
  71         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  72         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  73                                       USB_VENDOR_REQUEST_IN, offset,
  74                                       value, length, timeout);
  75 }
  76
  77 static inline void rt73usb_register_write(const struct rt2x00_dev *rt2x00dev,
  78                                           const unsigned int offset, u32 value)
  79 {
  80         __le32 reg = cpu_to_le32(value);
  81         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  82                                       USB_VENDOR_REQUEST_OUT, offset,
  83                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  84 }
  85
  86 static inline void rt73usb_register_multiwrite(const struct rt2x00_dev
  87                                                *rt2x00dev,
  88                                                const unsigned int offset,
  89                                                void *value, const u32 length)
  90 {
  91         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  92         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  93                                       USB_VENDOR_REQUEST_OUT, offset,
  94                                       value, length, timeout);
  95 }
  96
  97 static u32 rt73usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
  98 {
  99         u32 reg;
 100         unsigned int i;
 101
 102         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 103                 rt73usb_register_read(rt2x00dev, PHY_CSR3, &reg);
 104                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 105                         break;
 106                 udelay(REGISTER_BUSY_DELAY);
 107         }
 108
 109         return reg;
 110 }
 111
 112 static void rt73usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
 113                               const unsigned int word, const u8 value)
 114 {
 115         u32 reg;
 116
 117         /*
 118          * Wait until the BBP becomes ready.
 119          */
 120         reg = rt73usb_bbp_check(rt2x00dev);
 121         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 122                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 123                 return;
 124         }
 125
 126         /*
 127          * Write the data into the BBP.
 128          */
 129         reg = 0;
 130         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 131         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 132         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 133         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 134
 135         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 136 }
 137
 138 static void rt73usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
 139                              const unsigned int word, u8 *value)
 140 {
 141         u32 reg;
 142
 143         /*
 144          * Wait until the BBP becomes ready.
 145          */
 146         reg = rt73usb_bbp_check(rt2x00dev);
 147         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 148                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 149                 return;
 150         }
 151
 152         /*
 153          * Write the request into the BBP.
 154          */
 155         reg = 0;
 156         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 157         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 158         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 159
 160         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 161
 162         /*
 163          * Wait until the BBP becomes ready.
 164          */
 165         reg = rt73usb_bbp_check(rt2x00dev);
 166         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 167                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 168                 *value = 0xff;
 169                 return;
 170         }
 171
 172         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 173 }
 174
 175 static void rt73usb_rf_write(const struct rt2x00_dev *rt2x00dev,
 176                              const unsigned int word, const u32 value)
 177 {
 178         u32 reg;
 179         unsigned int i;
 180
 181         if (!word)
 182                 return;
 183
 184         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 185                 rt73usb_register_read(rt2x00dev, PHY_CSR4, &reg);
 186                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 187                         goto rf_write;
 188                 udelay(REGISTER_BUSY_DELAY);
 189         }
 190
 191         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 192         return;
 193
 194 rf_write:
 195         reg = 0;
 196         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 197
 198         /*
 199          * RF5225 and RF2527 contain 21 bits per RF register value,
 200          * all others contain 20 bits.
 201          */
 202         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 203                            20 + !!(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 204                                    rt2x00_rf(&rt2x00dev->chip, RF2527)));
 205         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 206         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 207
 208         rt73usb_register_write(rt2x00dev, PHY_CSR4, reg);
 209         rt2x00_rf_write(rt2x00dev, word, value);
 210 }
 211
 212 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 213 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 214
 215 static void rt73usb_read_csr(const struct rt2x00_dev *rt2x00dev,
 216                              const unsigned int word, u32 *data)
 217 {
 218         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 219 }
 220
 221 static void rt73usb_write_csr(const struct rt2x00_dev *rt2x00dev,
 222                               const unsigned int word, u32 data)
 223 {
 224         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 225 }
 226
 227 static const struct rt2x00debug rt73usb_rt2x00debug = {
 228         .owner  = THIS_MODULE,
 229         .csr    = {
 230                 .read           = rt73usb_read_csr,
 231                 .write          = rt73usb_write_csr,
 232                 .word_size      = sizeof(u32),
 233                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 234         },
 235         .eeprom = {
 236                 .read           = rt2x00_eeprom_read,
 237                 .write          = rt2x00_eeprom_write,
 238                 .word_size      = sizeof(u16),
 239                 .word_count     = EEPROM_SIZE / sizeof(u16),
 240         },
 241         .bbp    = {
 242                 .read           = rt73usb_bbp_read,
 243                 .write          = rt73usb_bbp_write,
 244                 .word_size      = sizeof(u8),
 245                 .word_count     = BBP_SIZE / sizeof(u8),
 246         },
 247         .rf     = {
 248                 .read           = rt2x00_rf_read,
 249                 .write          = rt73usb_rf_write,
 250                 .word_size      = sizeof(u32),
 251                 .word_count     = RF_SIZE / sizeof(u32),
 252         },
 253 };
 254 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 255
 256 /*
 257  * Configuration handlers.
 258  */
 259 static void rt73usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, __le32 *mac)
 260 {
 261         u32 tmp;
 262
 263         tmp = le32_to_cpu(mac[1]);
 264         rt2x00_set_field32(&tmp, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 265         mac[1] = cpu_to_le32(tmp);
 266
 267         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
 268                                     (2 * sizeof(__le32)));
 269 }
 270
 271 static void rt73usb_config_bssid(struct rt2x00_dev *rt2x00dev, __le32 *bssid)
 272 {
 273         u32 tmp;
 274
 275         tmp = le32_to_cpu(bssid[1]);
 276         rt2x00_set_field32(&tmp, MAC_CSR5_BSS_ID_MASK, 3);
 277         bssid[1] = cpu_to_le32(tmp);
 278
 279         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4, bssid,
 280                                     (2 * sizeof(__le32)));
 281 }
 282
 283 static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
 284                                 const int tsf_sync)
 285 {
 286         u32 reg;
 287
 288         /*
 289          * Clear current synchronisation setup.
 290          * For the Beacon base registers we only need to clear
 291          * the first byte since that byte contains the VALID and OWNER
 292          * bits which (when set to 0) will invalidate the entire beacon.
 293          */
 294         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 295         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
 296         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
 297         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
 298         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
 299
 300         /*
 301          * Enable synchronisation.
 302          */
 303         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 304         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 305         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 306         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 307         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, tsf_sync);
 308         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 309 }
 310
 311 static void rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
 312                                       const int short_preamble,
 313                                       const int ack_timeout,
 314                                       const int ack_consume_time)
 315 {
 316         u32 reg;
 317
 318         /*
 319          * When in atomic context, reschedule and let rt2x00lib
 320          * call this function again.
 321          */
 322         if (in_atomic()) {
 323                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
 324                 return;
 325         }
 326
 327         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 328         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
 329         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 330
 331         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 332         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 333                            !!short_preamble);
 334         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 335 }
 336
 337 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 338                                    const int basic_rate_mask)
 339 {
 340         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 341 }
 342
 343 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 344                                    struct rf_channel *rf, const int txpower)
 345 {
 346         u8 r3;
 347         u8 r94;
 348         u8 smart;
 349
 350         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 351         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 352
 353         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 354                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 355
 356         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 357         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 358         rt73usb_bbp_write(rt2x00dev, 3, r3);
 359
 360         r94 = 6;
 361         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 362                 r94 += txpower - MAX_TXPOWER;
 363         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 364                 r94 += txpower;
 365         rt73usb_bbp_write(rt2x00dev, 94, r94);
 366
 367         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 368         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 369         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 370         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 371
 372         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 373         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 374         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 375         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 376
 377         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 378         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 379         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 380         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 381
 382         udelay(10);
 383 }
 384
 385 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 386                                    const int txpower)
 387 {
 388         struct rf_channel rf;
 389
 390         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 391         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 392         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 393         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 394
 395         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 396 }
 397
 398 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 399                                       struct antenna_setup *ant)
 400 {
 401         u8 r3;
 402         u8 r4;
 403         u8 r77;
 404
 405         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 406         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 407         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 408
 409         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 410
 411         switch (ant->rx) {
 412         case ANTENNA_HW_DIVERSITY:
 413                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 414                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 415                                   !!(rt2x00dev->curr_hwmode != HWMODE_A));
 416                 break;
 417         case ANTENNA_A:
 418                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 419                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 420
 421                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 422                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 423                 else
 424                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 425                 break;
 426         case ANTENNA_SW_DIVERSITY:
 427                 /*
 428                  * NOTE: We should never come here because rt2x00lib is
 429                  * supposed to catch this and send us the correct antenna
 430                  * explicitely. However we are nog going to bug about this.
 431                  * Instead, just default to antenna B.
 432                  */
 433         case ANTENNA_B:
 434                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 435                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 436
 437                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 438                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 439                 else
 440                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 441                 break;
 442         }
 443
 444         rt73usb_bbp_write(rt2x00dev, 77, r77);
 445         rt73usb_bbp_write(rt2x00dev, 3, r3);
 446         rt73usb_bbp_write(rt2x00dev, 4, r4);
 447 }
 448
 449 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 450                                       struct antenna_setup *ant)
 451 {
 452         u8 r3;
 453         u8 r4;
 454         u8 r77;
 455
 456         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 457         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 458         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 459
 460         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 461         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 462                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 463
 464         switch (ant->rx) {
 465         case ANTENNA_HW_DIVERSITY:
 466                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 467                 break;
 468         case ANTENNA_A:
 469                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 470                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 471                 break;
 472         case ANTENNA_SW_DIVERSITY:
 473                 /*
 474                  * NOTE: We should never come here because rt2x00lib is
 475                  * supposed to catch this and send us the correct antenna
 476                  * explicitely. However we are nog going to bug about this.
 477                  * Instead, just default to antenna B.
 478                  */
 479         case ANTENNA_B:
 480                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 481                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 482                 break;
 483         }
 484
 485         rt73usb_bbp_write(rt2x00dev, 77, r77);
 486         rt73usb_bbp_write(rt2x00dev, 3, r3);
 487         rt73usb_bbp_write(rt2x00dev, 4, r4);
 488 }
 489
 490 struct antenna_sel {
 491         u8 word;
 492         /*
 493          * value[0] -> non-LNA
 494          * value[1] -> LNA
 495          */
 496         u8 value[2];
 497 };
 498
 499 static const struct antenna_sel antenna_sel_a[] = {
 500         { 96,  { 0x58, 0x78 } },
 501         { 104, { 0x38, 0x48 } },
 502         { 75,  { 0xfe, 0x80 } },
 503         { 86,  { 0xfe, 0x80 } },
 504         { 88,  { 0xfe, 0x80 } },
 505         { 35,  { 0x60, 0x60 } },
 506         { 97,  { 0x58, 0x58 } },
 507         { 98,  { 0x58, 0x58 } },
 508 };
 509
 510 static const struct antenna_sel antenna_sel_bg[] = {
 511         { 96,  { 0x48, 0x68 } },
 512         { 104, { 0x2c, 0x3c } },
 513         { 75,  { 0xfe, 0x80 } },
 514         { 86,  { 0xfe, 0x80 } },
 515         { 88,  { 0xfe, 0x80 } },
 516         { 35,  { 0x50, 0x50 } },
 517         { 97,  { 0x48, 0x48 } },
 518         { 98,  { 0x48, 0x48 } },
 519 };
 520
 521 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 522                                    struct antenna_setup *ant)
 523 {
 524         const struct antenna_sel *sel;
 525         unsigned int lna;
 526         unsigned int i;
 527         u32 reg;
 528
 529         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 530
 531         if (rt2x00dev->curr_hwmode == HWMODE_A) {
 532                 sel = antenna_sel_a;
 533                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 534
 535                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 0);
 536                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 1);
 537         } else {
 538                 sel = antenna_sel_bg;
 539                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 540
 541                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 1);
 542                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 0);
 543         }
 544
 545         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 546                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 547
 548         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 549
 550         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 551             rt2x00_rf(&rt2x00dev->chip, RF5225))
 552                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 553         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 554                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 555                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 556 }
 557
 558 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 559                                     struct rt2x00lib_conf *libconf)
 560 {
 561         u32 reg;
 562
 563         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 564         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 565         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 566
 567         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 568         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 569         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 570         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 571         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 572
 573         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 574         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 575         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 576
 577         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 578         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 579         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 580
 581         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 582         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 583                            libconf->conf->beacon_int * 16);
 584         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 585 }
 586
 587 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 588                            const unsigned int flags,
 589                            struct rt2x00lib_conf *libconf)
 590 {
 591         if (flags & CONFIG_UPDATE_PHYMODE)
 592                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 593         if (flags & CONFIG_UPDATE_CHANNEL)
 594                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 595                                        libconf->conf->power_level);
 596         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 597                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 598         if (flags & CONFIG_UPDATE_ANTENNA)
 599                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 600         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 601                 rt73usb_config_duration(rt2x00dev, libconf);
 602 }
 603
 604 /*
 605  * LED functions.
 606  */
 607 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 608 {
 609         u32 reg;
 610
 611         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 612         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 613         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 614         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 615
 616         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 617         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A)
 618                 rt2x00_set_field16(&rt2x00dev->led_reg,
 619                                    MCU_LEDCS_LINK_A_STATUS, 1);
 620         else
 621                 rt2x00_set_field16(&rt2x00dev->led_reg,
 622                                    MCU_LEDCS_LINK_BG_STATUS, 1);
 623
 624         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 625                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 626 }
 627
 628 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 629 {
 630         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 631         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 632         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 633
 634         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 635                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 636 }
 637
 638 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, int rssi)
 639 {
 640         u32 led;
 641
 642         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 643                 return;
 644
 645         /*
 646          * Led handling requires a positive value for the rssi,
 647          * to do that correctly we need to add the correction.
 648          */
 649         rssi += rt2x00dev->rssi_offset;
 650
 651         if (rssi <= 30)
 652                 led = 0;
 653         else if (rssi <= 39)
 654                 led = 1;
 655         else if (rssi <= 49)
 656                 led = 2;
 657         else if (rssi <= 53)
 658                 led = 3;
 659         else if (rssi <= 63)
 660                 led = 4;
 661         else
 662                 led = 5;
 663
 664         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, led,
 665                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 666 }
 667
 668 /*
 669  * Link tuning
 670  */
 671 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 672                                struct link_qual *qual)
 673 {
 674         u32 reg;
 675
 676         /*
 677          * Update FCS error count from register.
 678          */
 679         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 680         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 681
 682         /*
 683          * Update False CCA count from register.
 684          */
 685         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 686         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 687 }
 688
 689 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 690 {
 691         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 692         rt2x00dev->link.vgc_level = 0x20;
 693 }
 694
 695 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 696 {
 697         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 698         u8 r17;
 699         u8 up_bound;
 700         u8 low_bound;
 701
 702         /*
 703          * Update Led strength
 704          */
 705         rt73usb_activity_led(rt2x00dev, rssi);
 706
 707         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 708
 709         /*
 710          * Determine r17 bounds.
 711          */
 712         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
 713                 low_bound = 0x28;
 714                 up_bound = 0x48;
 715
 716                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 717                         low_bound += 0x10;
 718                         up_bound += 0x10;
 719                 }
 720         } else {
 721                 if (rssi > -82) {
 722                         low_bound = 0x1c;
 723                         up_bound = 0x40;
 724                 } else if (rssi > -84) {
 725                         low_bound = 0x1c;
 726                         up_bound = 0x20;
 727                 } else {
 728                         low_bound = 0x1c;
 729                         up_bound = 0x1c;
 730                 }
 731
 732                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 733                         low_bound += 0x14;
 734                         up_bound += 0x10;
 735                 }
 736         }
 737
 738         /*
 739          * Special big-R17 for very short distance
 740          */
 741         if (rssi > -35) {
 742                 if (r17 != 0x60)
 743                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 744                 return;
 745         }
 746
 747         /*
 748          * Special big-R17 for short distance
 749          */
 750         if (rssi >= -58) {
 751                 if (r17 != up_bound)
 752                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 753                 return;
 754         }
 755
 756         /*
 757          * Special big-R17 for middle-short distance
 758          */
 759         if (rssi >= -66) {
 760                 low_bound += 0x10;
 761                 if (r17 != low_bound)
 762                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 763                 return;
 764         }
 765
 766         /*
 767          * Special mid-R17 for middle distance
 768          */
 769         if (rssi >= -74) {
 770                 if (r17 != (low_bound + 0x10))
 771                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 772                 return;
 773         }
 774
 775         /*
 776          * Special case: Change up_bound based on the rssi.
 777          * Lower up_bound when rssi is weaker then -74 dBm.
 778          */
 779         up_bound -= 2 * (-74 - rssi);
 780         if (low_bound > up_bound)
 781                 up_bound = low_bound;
 782
 783         if (r17 > up_bound) {
 784                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 785                 return;
 786         }
 787
 788         /*
 789          * r17 does not yet exceed upper limit, continue and base
 790          * the r17 tuning on the false CCA count.
 791          */
 792         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 793                 r17 += 4;
 794                 if (r17 > up_bound)
 795                         r17 = up_bound;
 796                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 797         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 798                 r17 -= 4;
 799                 if (r17 < low_bound)
 800                         r17 = low_bound;
 801                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 802         }
 803 }
 804
 805 /*
 806  * Firmware name function.
 807  */
 808 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 809 {
 810         return FIRMWARE_RT2571;
 811 }
 812
 813 /*
 814  * Initialization functions.
 815  */
 816 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 817                                  const size_t len)
 818 {
 819         unsigned int i;
 820         int status;
 821         u32 reg;
 822         char *ptr = data;
 823         char *cache;
 824         int buflen;
 825         int timeout;
 826
 827         /*
 828          * Wait for stable hardware.
 829          */
 830         for (i = 0; i < 100; i++) {
 831                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 832                 if (reg)
 833                         break;
 834                 msleep(1);
 835         }
 836
 837         if (!reg) {
 838                 ERROR(rt2x00dev, "Unstable hardware.\n");
 839                 return -EBUSY;
 840         }
 841
 842         /*
 843          * Write firmware to device.
 844          * We setup a seperate cache for this action,
 845          * since we are going to write larger chunks of data
 846          * then normally used cache size.
 847          */
 848         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 849         if (!cache) {
 850                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 851                 return -ENOMEM;
 852         }
 853
 854         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 855                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 856                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 857
 858                 memcpy(cache, ptr, buflen);
 859
 860                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 861                                          USB_VENDOR_REQUEST_OUT,
 862                                          FIRMWARE_IMAGE_BASE + i, 0x0000,
 863                                          cache, buflen, timeout);
 864
 865                 ptr += buflen;
 866         }
 867
 868         kfree(cache);
 869
 870         /*
 871          * Send firmware request to device to load firmware,
 872          * we need to specify a long timeout time.
 873          */
 874         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 875                                              0x0000, USB_MODE_FIRMWARE,
 876                                              REGISTER_TIMEOUT_FIRMWARE);
 877         if (status < 0) {
 878                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 879                 return status;
 880         }
 881
 882         rt73usb_disable_led(rt2x00dev);
 883
 884         return 0;
 885 }
 886
 887 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 888 {
 889         u32 reg;
 890
 891         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 892         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 893         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 894         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 895         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 896
 897         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 898         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 899         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 900         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 901         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 902         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 903         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 904         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 905         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 906         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 907
 908         /*
 909          * CCK TXD BBP registers
 910          */
 911         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 912         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 913         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 914         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 915         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 916         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 917         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 918         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 919         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 920         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 921
 922         /*
 923          * OFDM TXD BBP registers
 924          */
 925         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 926         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 927         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 928         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 929         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 930         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 931         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 932         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 933
 934         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 935         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 936         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 937         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 938         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 939         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 940
 941         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 942         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 943         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 944         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 945         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 946         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 947
 948         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 949
 950         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 951         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
 952         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
 953
 954         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
 955
 956         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
 957                 return -EBUSY;
 958
 959         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
 960
 961         /*
 962          * Invalidate all Shared Keys (SEC_CSR0),
 963          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
 964          */
 965         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
 966         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
 967         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
 968
 969         reg = 0x000023b0;
 970         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 971             rt2x00_rf(&rt2x00dev->chip, RF2527))
 972                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
 973         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
 974
 975         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
 976         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
 977         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
 978
 979         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
 980         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
 981         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
 982         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
 983
 984         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
 985         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
 986         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
 987         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
 988
 989         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 990         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
 991         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 992
 993         /*
 994          * We must clear the error counters.
 995          * These registers are cleared on read,
 996          * so we may pass a useless variable to store the value.
 997          */
 998         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 999         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1000         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1001
1002         /*
1003          * Reset MAC and BBP registers.
1004          */
1005         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1006         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1007         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1008         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1009
1010         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1011         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1012         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1013         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1014
1015         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1016         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1017         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1018
1019         return 0;
1020 }
1021
1022 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1023 {
1024         unsigned int i;
1025         u16 eeprom;
1026         u8 reg_id;
1027         u8 value;
1028
1029         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1030                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1031                 if ((value != 0xff) && (value != 0x00))
1032                         goto continue_csr_init;
1033                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1034                 udelay(REGISTER_BUSY_DELAY);
1035         }
1036
1037         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1038         return -EACCES;
1039
1040 continue_csr_init:
1041         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1042         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1043         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1044         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1045         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1046         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1047         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1048         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1049         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1050         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1051         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1052         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1053         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1054         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1055         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1056         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1057         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1058         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1059         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1060         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1061         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1062         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1063         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1064         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1065         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1066
1067         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1068         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1069                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1070
1071                 if (eeprom != 0xffff && eeprom != 0x0000) {
1072                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1073                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1074                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1075                               reg_id, value);
1076                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1077                 }
1078         }
1079         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1080
1081         return 0;
1082 }
1083
1084 /*
1085  * Device state switch handlers.
1086  */
1087 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1088                               enum dev_state state)
1089 {
1090         u32 reg;
1091
1092         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1093         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1094                            state == STATE_RADIO_RX_OFF);
1095         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1096 }
1097
1098 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1099 {
1100         /*
1101          * Initialize all registers.
1102          */
1103         if (rt73usb_init_registers(rt2x00dev) ||
1104             rt73usb_init_bbp(rt2x00dev)) {
1105                 ERROR(rt2x00dev, "Register initialization failed.\n");
1106                 return -EIO;
1107         }
1108
1109         rt2x00usb_enable_radio(rt2x00dev);
1110
1111         /*
1112          * Enable LED
1113          */
1114         rt73usb_enable_led(rt2x00dev);
1115
1116         return 0;
1117 }
1118
1119 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1120 {
1121         /*
1122          * Disable LED
1123          */
1124         rt73usb_disable_led(rt2x00dev);
1125
1126         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1127
1128         /*
1129          * Disable synchronisation.
1130          */
1131         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1132
1133         rt2x00usb_disable_radio(rt2x00dev);
1134 }
1135
1136 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1137 {
1138         u32 reg;
1139         unsigned int i;
1140         char put_to_sleep;
1141         char current_state;
1142
1143         put_to_sleep = (state != STATE_AWAKE);
1144
1145         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1146         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1147         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1148         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1149
1150         /*
1151          * Device is not guaranteed to be in the requested state yet.
1152          * We must wait until the register indicates that the
1153          * device has entered the correct state.
1154          */
1155         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1156                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1157                 current_state =
1158                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1159                 if (current_state == !put_to_sleep)
1160                         return 0;
1161                 msleep(10);
1162         }
1163
1164         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1165                "current device state %d.\n", !put_to_sleep, current_state);
1166
1167         return -EBUSY;
1168 }
1169
1170 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1171                                     enum dev_state state)
1172 {
1173         int retval = 0;
1174
1175         switch (state) {
1176         case STATE_RADIO_ON:
1177                 retval = rt73usb_enable_radio(rt2x00dev);
1178                 break;
1179         case STATE_RADIO_OFF:
1180                 rt73usb_disable_radio(rt2x00dev);
1181                 break;
1182         case STATE_RADIO_RX_ON:
1183         case STATE_RADIO_RX_OFF:
1184                 rt73usb_toggle_rx(rt2x00dev, state);
1185                 break;
1186         case STATE_DEEP_SLEEP:
1187         case STATE_SLEEP:
1188         case STATE_STANDBY:
1189         case STATE_AWAKE:
1190                 retval = rt73usb_set_state(rt2x00dev, state);
1191                 break;
1192         default:
1193                 retval = -ENOTSUPP;
1194                 break;
1195         }
1196
1197         return retval;
1198 }
1199
1200 /*
1201  * TX descriptor initialization
1202  */
1203 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1204                                   struct data_desc *txd,
1205                                   struct txdata_entry_desc *desc,
1206                                   struct ieee80211_hdr *ieee80211hdr,
1207                                   unsigned int length,
1208                                   struct ieee80211_tx_control *control)
1209 {
1210         u32 word;
1211
1212         /*
1213          * Start writing the descriptor words.
1214          */
1215         rt2x00_desc_read(txd, 1, &word);
1216         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue);
1217         rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs);
1218         rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1219         rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1220         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1221         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1222         rt2x00_desc_write(txd, 1, word);
1223
1224         rt2x00_desc_read(txd, 2, &word);
1225         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1226         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1227         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1228         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1229         rt2x00_desc_write(txd, 2, word);
1230
1231         rt2x00_desc_read(txd, 5, &word);
1232         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1233                            TXPOWER_TO_DEV(control->power_level));
1234         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1235         rt2x00_desc_write(txd, 5, word);
1236
1237         rt2x00_desc_read(txd, 0, &word);
1238         rt2x00_set_field32(&word, TXD_W0_BURST,
1239                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1240         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1241         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1242                            test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1243         rt2x00_set_field32(&word, TXD_W0_ACK,
1244                            !(control->flags & IEEE80211_TXCTL_NO_ACK));
1245         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1246                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1247         rt2x00_set_field32(&word, TXD_W0_OFDM,
1248                            test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1249         rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1250         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1251                            !!(control->flags &
1252                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1253         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1254         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1255         rt2x00_set_field32(&word, TXD_W0_BURST2,
1256                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1257         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1258         rt2x00_desc_write(txd, 0, word);
1259 }
1260
1261 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1262                                    struct sk_buff *skb)
1263 {
1264         int length;
1265
1266         /*
1267          * The length _must_ be a multiple of 4,
1268          * but it must _not_ be a multiple of the USB packet size.
1269          */
1270         length = roundup(skb->len, 4);
1271         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1272
1273         return length;
1274 }
1275
1276 /*
1277  * TX data initialization
1278  */
1279 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1280                                   unsigned int queue)
1281 {
1282         u32 reg;
1283
1284         if (queue != IEEE80211_TX_QUEUE_BEACON)
1285                 return;
1286
1287         /*
1288          * For Wi-Fi faily generated beacons between participating stations.
1289          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1290          */
1291         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1292
1293         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1294         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1295                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1296                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1297         }
1298 }
1299
1300 /*
1301  * RX control handlers
1302  */
1303 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1304 {
1305         u16 eeprom;
1306         u8 offset;
1307         u8 lna;
1308
1309         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1310         switch (lna) {
1311         case 3:
1312                 offset = 90;
1313                 break;
1314         case 2:
1315                 offset = 74;
1316                 break;
1317         case 1:
1318                 offset = 64;
1319                 break;
1320         default:
1321                 return 0;
1322         }
1323
1324         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
1325                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1326                         if (lna == 3 || lna == 2)
1327                                 offset += 10;
1328                 } else {
1329                         if (lna == 3)
1330                                 offset += 6;
1331                         else if (lna == 2)
1332                                 offset += 8;
1333                 }
1334
1335                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1336                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1337         } else {
1338                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1339                         offset += 14;
1340
1341                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1342                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1343         }
1344
1345         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1346 }
1347
1348 static void rt73usb_fill_rxdone(struct data_entry *entry,
1349                                 struct rxdata_entry_desc *desc)
1350 {
1351         struct data_desc *rxd = (struct data_desc *)entry->skb->data;
1352         u32 word0;
1353         u32 word1;
1354
1355         rt2x00_desc_read(rxd, 0, &word0);
1356         rt2x00_desc_read(rxd, 1, &word1);
1357
1358         desc->flags = 0;
1359         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1360                 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1361
1362         /*
1363          * Obtain the status about this packet.
1364          */
1365         desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1366         desc->rssi = rt73usb_agc_to_rssi(entry->ring->rt2x00dev, word1);
1367         desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1368         desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1369
1370         /*
1371          * Pull the skb to clear the descriptor area.
1372          */
1373         skb_pull(entry->skb, entry->ring->desc_size);
1374
1375         return;
1376 }
1377
1378 /*
1379  * Device probe functions.
1380  */
1381 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1382 {
1383         u16 word;
1384         u8 *mac;
1385         s8 value;
1386
1387         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1388
1389         /*
1390          * Start validation of the data that has been read.
1391          */
1392         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1393         if (!is_valid_ether_addr(mac)) {
1394                 DECLARE_MAC_BUF(macbuf);
1395
1396                 random_ether_addr(mac);
1397                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1398         }
1399
1400         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1401         if (word == 0xffff) {
1402                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1403                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1404                                    ANTENNA_B);
1405                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1406                                    ANTENNA_B);
1407                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1408                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1409                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1410                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1411                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1412                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1413         }
1414
1415         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1416         if (word == 0xffff) {
1417                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1418                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1419                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1420         }
1421
1422         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1423         if (word == 0xffff) {
1424                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1425                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1426                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1427                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1428                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1429                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1430                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1431                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1432                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1433                                    LED_MODE_DEFAULT);
1434                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1435                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1436         }
1437
1438         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1439         if (word == 0xffff) {
1440                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1441                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1442                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1443                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1444         }
1445
1446         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1447         if (word == 0xffff) {
1448                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1449                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1450                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1451                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1452         } else {
1453                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1454                 if (value < -10 || value > 10)
1455                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1456                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1457                 if (value < -10 || value > 10)
1458                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1459                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1460         }
1461
1462         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1463         if (word == 0xffff) {
1464                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1465                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1466                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1467                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1468         } else {
1469                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1470                 if (value < -10 || value > 10)
1471                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1472                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1473                 if (value < -10 || value > 10)
1474                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1475                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1476         }
1477
1478         return 0;
1479 }
1480
1481 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1482 {
1483         u32 reg;
1484         u16 value;
1485         u16 eeprom;
1486
1487         /*
1488          * Read EEPROM word for configuration.
1489          */
1490         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1491
1492         /*
1493          * Identify RF chipset.
1494          */
1495         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1496         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1497         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1498
1499         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1500                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1501                 return -ENODEV;
1502         }
1503
1504         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1505             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1506             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1507             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1508                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1509                 return -ENODEV;
1510         }
1511
1512         /*
1513          * Identify default antenna configuration.
1514          */
1515         rt2x00dev->default_ant.tx =
1516             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1517         rt2x00dev->default_ant.rx =
1518             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1519
1520         /*
1521          * Read the Frame type.
1522          */
1523         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1524                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1525
1526         /*
1527          * Read frequency offset.
1528          */
1529         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1530         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1531
1532         /*
1533          * Read external LNA informations.
1534          */
1535         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1536
1537         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1538                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1539                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1540         }
1541
1542         /*
1543          * Store led settings, for correct led behaviour.
1544          */
1545         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1546
1547         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1548                            rt2x00dev->led_mode);
1549         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1550                            rt2x00_get_field16(eeprom,
1551                                               EEPROM_LED_POLARITY_GPIO_0));
1552         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1553                            rt2x00_get_field16(eeprom,
1554                                               EEPROM_LED_POLARITY_GPIO_1));
1555         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1556                            rt2x00_get_field16(eeprom,
1557                                               EEPROM_LED_POLARITY_GPIO_2));
1558         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1559                            rt2x00_get_field16(eeprom,
1560                                               EEPROM_LED_POLARITY_GPIO_3));
1561         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1562                            rt2x00_get_field16(eeprom,
1563                                               EEPROM_LED_POLARITY_GPIO_4));
1564         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1565                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1566         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1567                            rt2x00_get_field16(eeprom,
1568                                               EEPROM_LED_POLARITY_RDY_G));
1569         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1570                            rt2x00_get_field16(eeprom,
1571                                               EEPROM_LED_POLARITY_RDY_A));
1572
1573         return 0;
1574 }
1575
1576 /*
1577  * RF value list for RF2528
1578  * Supports: 2.4 GHz
1579  */
1580 static const struct rf_channel rf_vals_bg_2528[] = {
1581         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1582         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1583         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1584         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1585         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1586         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1587         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1588         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1589         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1590         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1591         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1592         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1593         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1594         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1595 };
1596
1597 /*
1598  * RF value list for RF5226
1599  * Supports: 2.4 GHz & 5.2 GHz
1600  */
1601 static const struct rf_channel rf_vals_5226[] = {
1602         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1603         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1604         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1605         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1606         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1607         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1608         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1609         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1610         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1611         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1612         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1613         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1614         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1615         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1616
1617         /* 802.11 UNI / HyperLan 2 */
1618         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1619         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1620         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1621         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1622         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1623         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1624         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1625         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1626
1627         /* 802.11 HyperLan 2 */
1628         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1629         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1630         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1631         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1632         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1633         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1634         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1635         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1636         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1637         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1638
1639         /* 802.11 UNII */
1640         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1641         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1642         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1643         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1644         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1645         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1646
1647         /* MMAC(Japan)J52 ch 34,38,42,46 */
1648         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1649         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1650         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1651         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1652 };
1653
1654 /*
1655  * RF value list for RF5225 & RF2527
1656  * Supports: 2.4 GHz & 5.2 GHz
1657  */
1658 static const struct rf_channel rf_vals_5225_2527[] = {
1659         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1660         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1661         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1662         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1663         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1664         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1665         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1666         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1667         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1668         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1669         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1670         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1671         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1672         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1673
1674         /* 802.11 UNI / HyperLan 2 */
1675         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1676         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1677         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1678         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1679         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1680         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1681         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1682         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1683
1684         /* 802.11 HyperLan 2 */
1685         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1686         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1687         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1688         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1689         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1690         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1691         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1692         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1693         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1694         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1695
1696         /* 802.11 UNII */
1697         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1698         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1699         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1700         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1701         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1702         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1703
1704         /* MMAC(Japan)J52 ch 34,38,42,46 */
1705         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1706         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1707         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1708         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1709 };
1710
1711
1712 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1713 {
1714         struct hw_mode_spec *spec = &rt2x00dev->spec;
1715         u8 *txpower;
1716         unsigned int i;
1717
1718         /*
1719          * Initialize all hw fields.
1720          */
1721         rt2x00dev->hw->flags =
1722             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1723             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1724         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1725         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1726         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1727         rt2x00dev->hw->queues = 5;
1728
1729         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1730         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1731                                 rt2x00_eeprom_addr(rt2x00dev,
1732                                                    EEPROM_MAC_ADDR_0));
1733
1734         /*
1735          * Convert tx_power array in eeprom.
1736          */
1737         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1738         for (i = 0; i < 14; i++)
1739                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1740
1741         /*
1742          * Initialize hw_mode information.
1743          */
1744         spec->num_modes = 2;
1745         spec->num_rates = 12;
1746         spec->tx_power_a = NULL;
1747         spec->tx_power_bg = txpower;
1748         spec->tx_power_default = DEFAULT_TXPOWER;
1749
1750         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1751                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1752                 spec->channels = rf_vals_bg_2528;
1753         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1754                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1755                 spec->channels = rf_vals_5226;
1756         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1757                 spec->num_channels = 14;
1758                 spec->channels = rf_vals_5225_2527;
1759         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1760                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1761                 spec->channels = rf_vals_5225_2527;
1762         }
1763
1764         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1765             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1766                 spec->num_modes = 3;
1767
1768                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1769                 for (i = 0; i < 14; i++)
1770                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1771
1772                 spec->tx_power_a = txpower;
1773         }
1774 }
1775
1776 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1777 {
1778         int retval;
1779
1780         /*
1781          * Allocate eeprom data.
1782          */
1783         retval = rt73usb_validate_eeprom(rt2x00dev);
1784         if (retval)
1785                 return retval;
1786
1787         retval = rt73usb_init_eeprom(rt2x00dev);
1788         if (retval)
1789                 return retval;
1790
1791         /*
1792          * Initialize hw specifications.
1793          */
1794         rt73usb_probe_hw_mode(rt2x00dev);
1795
1796         /*
1797          * This device requires firmware
1798          */
1799         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1800
1801         /*
1802          * Set the rssi offset.
1803          */
1804         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1805
1806         return 0;
1807 }
1808
1809 /*
1810  * IEEE80211 stack callback functions.
1811  */
1812 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1813                                      unsigned int changed_flags,
1814                                      unsigned int *total_flags,
1815                                      int mc_count,
1816                                      struct dev_addr_list *mc_list)
1817 {
1818         struct rt2x00_dev *rt2x00dev = hw->priv;
1819         struct interface *intf = &rt2x00dev->interface;
1820         u32 reg;
1821
1822         /*
1823          * Mask off any flags we are going to ignore from
1824          * the total_flags field.
1825          */
1826         *total_flags &=
1827             FIF_ALLMULTI |
1828             FIF_FCSFAIL |
1829             FIF_PLCPFAIL |
1830             FIF_CONTROL |
1831             FIF_OTHER_BSS |
1832             FIF_PROMISC_IN_BSS;
1833
1834         /*
1835          * Apply some rules to the filters:
1836          * - Some filters imply different filters to be set.
1837          * - Some things we can't filter out at all.
1838          * - Some filters are set based on interface type.
1839          */
1840         if (mc_count)
1841                 *total_flags |= FIF_ALLMULTI;
1842         if (*total_flags & FIF_OTHER_BSS ||
1843             *total_flags & FIF_PROMISC_IN_BSS)
1844                 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1845         if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1846                 *total_flags |= FIF_PROMISC_IN_BSS;
1847
1848         /*
1849          * Check if there is any work left for us.
1850          */
1851         if (intf->filter == *total_flags)
1852                 return;
1853         intf->filter = *total_flags;
1854
1855         /*
1856          * When in atomic context, reschedule and let rt2x00lib
1857          * call this function again.
1858          */
1859         if (in_atomic()) {
1860                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1861                 return;
1862         }
1863
1864         /*
1865          * Start configuration steps.
1866          * Note that the version error will always be dropped
1867          * and broadcast frames will always be accepted since
1868          * there is no filter for it at this time.
1869          */
1870         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1871         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
1872                            !(*total_flags & FIF_FCSFAIL));
1873         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
1874                            !(*total_flags & FIF_PLCPFAIL));
1875         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
1876                            !(*total_flags & FIF_CONTROL));
1877         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
1878                            !(*total_flags & FIF_PROMISC_IN_BSS));
1879         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
1880                            !(*total_flags & FIF_PROMISC_IN_BSS));
1881         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1882         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
1883                            !(*total_flags & FIF_ALLMULTI));
1884         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
1885         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS, 1);
1886         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1887 }
1888
1889 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1890                                    u32 short_retry, u32 long_retry)
1891 {
1892         struct rt2x00_dev *rt2x00dev = hw->priv;
1893         u32 reg;
1894
1895         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1896         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1897         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1898         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1899
1900         return 0;
1901 }
1902
1903 #if 0
1904 /*
1905  * Mac80211 demands get_tsf must be atomic.
1906  * This is not possible for rt73usb since all register access
1907  * functions require sleeping. Untill mac80211 no longer needs
1908  * get_tsf to be atomic, this function should be disabled.
1909  */
1910 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1911 {
1912         struct rt2x00_dev *rt2x00dev = hw->priv;
1913         u64 tsf;
1914         u32 reg;
1915
1916         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1917         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1918         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1919         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1920
1921         return tsf;
1922 }
1923 #else
1924 #define rt73usb_get_tsf NULL
1925 #endif
1926
1927 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1928 {
1929         struct rt2x00_dev *rt2x00dev = hw->priv;
1930
1931         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
1932         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
1933 }
1934
1935 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1936                           struct ieee80211_tx_control *control)
1937 {
1938         struct rt2x00_dev *rt2x00dev = hw->priv;
1939         int timeout;
1940
1941         /*
1942          * Just in case the ieee80211 doesn't set this,
1943          * but we need this queue set for the descriptor
1944          * initialization.
1945          */
1946         control->queue = IEEE80211_TX_QUEUE_BEACON;
1947
1948         /*
1949          * First we create the beacon.
1950          */
1951         skb_push(skb, TXD_DESC_SIZE);
1952         memset(skb->data, 0, TXD_DESC_SIZE);
1953
1954         rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1955                                 (struct ieee80211_hdr *)(skb->data +
1956                                                          TXD_DESC_SIZE),
1957                                 skb->len - TXD_DESC_SIZE, control);
1958
1959         /*
1960          * Write entire beacon with descriptor to register,
1961          * and kick the beacon generator.
1962          */
1963         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
1964         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
1965                                  USB_VENDOR_REQUEST_OUT,
1966                                  HW_BEACON_BASE0, 0x0000,
1967                                  skb->data, skb->len, timeout);
1968         rt73usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1969
1970         return 0;
1971 }
1972
1973 static const struct ieee80211_ops rt73usb_mac80211_ops = {
1974         .tx                     = rt2x00mac_tx,
1975         .start                  = rt2x00mac_start,
1976         .stop                   = rt2x00mac_stop,
1977         .add_interface          = rt2x00mac_add_interface,
1978         .remove_interface       = rt2x00mac_remove_interface,
1979         .config                 = rt2x00mac_config,
1980         .config_interface       = rt2x00mac_config_interface,
1981         .configure_filter       = rt73usb_configure_filter,
1982         .get_stats              = rt2x00mac_get_stats,
1983         .set_retry_limit        = rt73usb_set_retry_limit,
1984         .erp_ie_changed         = rt2x00mac_erp_ie_changed,
1985         .conf_tx                = rt2x00mac_conf_tx,
1986         .get_tx_stats           = rt2x00mac_get_tx_stats,
1987         .get_tsf                = rt73usb_get_tsf,
1988         .reset_tsf              = rt73usb_reset_tsf,
1989         .beacon_update          = rt73usb_beacon_update,
1990 };
1991
1992 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
1993         .probe_hw               = rt73usb_probe_hw,
1994         .get_firmware_name      = rt73usb_get_firmware_name,
1995         .load_firmware          = rt73usb_load_firmware,
1996         .initialize             = rt2x00usb_initialize,
1997         .uninitialize           = rt2x00usb_uninitialize,
1998         .set_device_state       = rt73usb_set_device_state,
1999         .link_stats             = rt73usb_link_stats,
2000         .reset_tuner            = rt73usb_reset_tuner,
2001         .link_tuner             = rt73usb_link_tuner,
2002         .write_tx_desc          = rt73usb_write_tx_desc,
2003         .write_tx_data          = rt2x00usb_write_tx_data,
2004         .get_tx_data_len        = rt73usb_get_tx_data_len,
2005         .kick_tx_queue          = rt73usb_kick_tx_queue,
2006         .fill_rxdone            = rt73usb_fill_rxdone,
2007         .config_mac_addr        = rt73usb_config_mac_addr,
2008         .config_bssid           = rt73usb_config_bssid,
2009         .config_type            = rt73usb_config_type,
2010         .config_preamble        = rt73usb_config_preamble,
2011         .config                 = rt73usb_config,
2012 };
2013
2014 static const struct rt2x00_ops rt73usb_ops = {
2015         .name           = DRV_NAME,
2016         .rxd_size       = RXD_DESC_SIZE,
2017         .txd_size       = TXD_DESC_SIZE,
2018         .eeprom_size    = EEPROM_SIZE,
2019         .rf_size        = RF_SIZE,
2020         .lib            = &rt73usb_rt2x00_ops,
2021         .hw             = &rt73usb_mac80211_ops,
2022 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2023         .debugfs        = &rt73usb_rt2x00debug,
2024 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2025 };
2026
2027 /*
2028  * rt73usb module information.
2029  */
2030 static struct usb_device_id rt73usb_device_table[] = {
2031         /* AboCom */
2032         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2033         /* Askey */
2034         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2035         /* ASUS */
2036         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2037         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2038         /* Belkin */
2039         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2040         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2041         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2042         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2043         /* Billionton */
2044         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2045         /* Buffalo */
2046         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2047         /* CNet */
2048         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2049         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2050         /* Conceptronic */
2051         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2052         /* D-Link */
2053         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2054         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2055         /* Gemtek */
2056         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2057         /* Gigabyte */
2058         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2059         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2060         /* Huawei-3Com */
2061         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2062         /* Hercules */
2063         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2064         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2065         /* Linksys */
2066         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2067         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2068         /* MSI */
2069         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2070         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2071         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2072         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2073         /* Ralink */
2074         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2075         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2076         /* Qcom */
2077         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2078         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2079         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2080         /* Senao */
2081         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2082         /* Sitecom */
2083         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2084         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2085         /* Surecom */
2086         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2087         /* Planex */
2088         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2089         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2090         { 0, }
2091 };
2092
2093 MODULE_AUTHOR(DRV_PROJECT);
2094 MODULE_VERSION(DRV_VERSION);
2095 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2096 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2097 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2098 MODULE_FIRMWARE(FIRMWARE_RT2571);
2099 MODULE_LICENSE("GPL");
2100
2101 static struct usb_driver rt73usb_driver = {
2102         .name           = DRV_NAME,
2103         .id_table       = rt73usb_device_table,
2104         .probe          = rt2x00usb_probe,
2105         .disconnect     = rt2x00usb_disconnect,
2106         .suspend        = rt2x00usb_suspend,
2107         .resume         = rt2x00usb_resume,
2108 };
2109
2110 static int __init rt73usb_init(void)
2111 {
2112         return usb_register(&rt73usb_driver);
2113 }
2114
2115 static void __exit rt73usb_exit(void)
2116 {
2117         usb_deregister(&rt73usb_driver);
2118 }
2119
2120 module_init(rt73usb_init);
2121 module_exit(rt73usb_exit);