SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/p54/p54spi.c

   1 /*
   2  * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
   3  * Copyright 2008       Johannes Berg <johannes@sipsolutions.net>
   4  *
   5  * This driver is a port from stlc45xx:
   6  *      Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/firmware.h>
  27 #include <linux/delay.h>
  28 #include <linux/irq.h>
  29 #include <linux/spi/spi.h>
  30 #include <linux/etherdevice.h>
  31 #include <linux/gpio.h>
  32
  33 #include "p54spi.h"
  34 #include "p54spi_eeprom.h"
  35 #include "p54.h"
  36
  37 #include "lmac.h"
  38
  39 MODULE_FIRMWARE("3826.arm");
  40 MODULE_ALIAS("stlc45xx");
  41
  42 /*
  43  * gpios should be handled in board files and provided via platform data,
  44  * but because it's currently impossible for p54spi to have a header file
  45  * in include/linux, let's use module paramaters for now
  46  */
  47
  48 static int p54spi_gpio_power = 97;
  49 module_param(p54spi_gpio_power, int, 0444);
  50 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
  51
  52 static int p54spi_gpio_irq = 87;
  53 module_param(p54spi_gpio_irq, int, 0444);
  54 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
  55
  56 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
  57                               void *buf, size_t len)
  58 {
  59         struct spi_transfer t[2];
  60         struct spi_message m;
  61         __le16 addr;
  62
  63         /* We first push the address */
  64         addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
  65
  66         spi_message_init(&m);
  67         memset(t, 0, sizeof(t));
  68
  69         t[0].tx_buf = &addr;
  70         t[0].len = sizeof(addr);
  71         spi_message_add_tail(&t[0], &m);
  72
  73         t[1].rx_buf = buf;
  74         t[1].len = len;
  75         spi_message_add_tail(&t[1], &m);
  76
  77         spi_sync(priv->spi, &m);
  78 }
  79
  80
  81 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
  82                              const void *buf, size_t len)
  83 {
  84         struct spi_transfer t[3];
  85         struct spi_message m;
  86         __le16 addr;
  87
  88         /* We first push the address */
  89         addr = cpu_to_le16(address << 8);
  90
  91         spi_message_init(&m);
  92         memset(t, 0, sizeof(t));
  93
  94         t[0].tx_buf = &addr;
  95         t[0].len = sizeof(addr);
  96         spi_message_add_tail(&t[0], &m);
  97
  98         t[1].tx_buf = buf;
  99         t[1].len = len & ~1;
 100         spi_message_add_tail(&t[1], &m);
 101
 102         if (len % 2) {
 103                 __le16 last_word;
 104                 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
 105
 106                 t[2].tx_buf = &last_word;
 107                 t[2].len = sizeof(last_word);
 108                 spi_message_add_tail(&t[2], &m);
 109         }
 110
 111         spi_sync(priv->spi, &m);
 112 }
 113
 114 static u16 p54spi_read16(struct p54s_priv *priv, u8 addr)
 115 {
 116         __le16 val;
 117
 118         p54spi_spi_read(priv, addr, &val, sizeof(val));
 119
 120         return le16_to_cpu(val);
 121 }
 122
 123 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
 124 {
 125         __le32 val;
 126
 127         p54spi_spi_read(priv, addr, &val, sizeof(val));
 128
 129         return le32_to_cpu(val);
 130 }
 131
 132 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
 133 {
 134         p54spi_spi_write(priv, addr, &val, sizeof(val));
 135 }
 136
 137 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
 138 {
 139         p54spi_spi_write(priv, addr, &val, sizeof(val));
 140 }
 141
 142 struct p54spi_spi_reg {
 143         u16 address;            /* __le16 ? */
 144         u16 length;
 145         char *name;
 146 };
 147
 148 static const struct p54spi_spi_reg p54spi_registers_array[] =
 149 {
 150         { SPI_ADRS_ARM_INTERRUPTS,      32, "ARM_INT     " },
 151         { SPI_ADRS_ARM_INT_EN,          32, "ARM_INT_ENA " },
 152         { SPI_ADRS_HOST_INTERRUPTS,     32, "HOST_INT    " },
 153         { SPI_ADRS_HOST_INT_EN,         32, "HOST_INT_ENA" },
 154         { SPI_ADRS_HOST_INT_ACK,        32, "HOST_INT_ACK" },
 155         { SPI_ADRS_GEN_PURP_1,          32, "GP1_COMM    " },
 156         { SPI_ADRS_GEN_PURP_2,          32, "GP2_COMM    " },
 157         { SPI_ADRS_DEV_CTRL_STAT,       32, "DEV_CTRL_STA" },
 158         { SPI_ADRS_DMA_DATA,            16, "DMA_DATA    " },
 159         { SPI_ADRS_DMA_WRITE_CTRL,      16, "DMA_WR_CTRL " },
 160         { SPI_ADRS_DMA_WRITE_LEN,       16, "DMA_WR_LEN  " },
 161         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_WR_BASE " },
 162         { SPI_ADRS_DMA_READ_CTRL,       16, "DMA_RD_CTRL " },
 163         { SPI_ADRS_DMA_READ_LEN,        16, "DMA_RD_LEN  " },
 164         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_RD_BASE " }
 165 };
 166
 167 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, u32 bits)
 168 {
 169         int i;
 170
 171         for (i = 0; i < 2000; i++) {
 172                 u32 buffer = p54spi_read32(priv, reg);
 173                 if ((buffer & bits) == bits)
 174                         return 1;
 175         }
 176         return 0;
 177 }
 178
 179 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
 180                                 const void *buf, size_t len)
 181 {
 182         if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, HOST_ALLOWED)) {
 183                 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
 184                         "to DMA write.\n");
 185                 return -EAGAIN;
 186         }
 187
 188         p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
 189                        cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
 190
 191         p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
 192         p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
 193         p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
 194         return 0;
 195 }
 196
 197 static int p54spi_request_firmware(struct ieee80211_hw *dev)
 198 {
 199         struct p54s_priv *priv = dev->priv;
 200         int ret;
 201
 202         /* FIXME: should driver use it's own struct device? */
 203         ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
 204
 205         if (ret < 0) {
 206                 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
 207                 return ret;
 208         }
 209
 210         ret = p54_parse_firmware(dev, priv->firmware);
 211         if (ret) {
 212                 release_firmware(priv->firmware);
 213                 return ret;
 214         }
 215
 216         return 0;
 217 }
 218
 219 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
 220 {
 221         struct p54s_priv *priv = dev->priv;
 222         const struct firmware *eeprom;
 223         int ret;
 224
 225         /*
 226          * allow users to customize their eeprom.
 227          */
 228
 229         ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
 230         if (ret < 0) {
 231                 dev_info(&priv->spi->dev, "loading default eeprom...\n");
 232                 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
 233                                        sizeof(p54spi_eeprom));
 234         } else {
 235                 dev_info(&priv->spi->dev, "loading user eeprom...\n");
 236                 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
 237                                        (int)eeprom->size);
 238                 release_firmware(eeprom);
 239         }
 240         return ret;
 241 }
 242
 243 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
 244 {
 245         struct p54s_priv *priv = dev->priv;
 246         unsigned long fw_len, _fw_len;
 247         unsigned int offset = 0;
 248         int err = 0;
 249         u8 *fw;
 250
 251         fw_len = priv->firmware->size;
 252         fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
 253         if (!fw)
 254                 return -ENOMEM;
 255
 256         /* stop the device */
 257         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 258                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
 259                        SPI_CTRL_STAT_START_HALTED));
 260
 261         msleep(TARGET_BOOT_SLEEP);
 262
 263         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 264                        SPI_CTRL_STAT_HOST_OVERRIDE |
 265                        SPI_CTRL_STAT_START_HALTED));
 266
 267         msleep(TARGET_BOOT_SLEEP);
 268
 269         while (fw_len > 0) {
 270                 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
 271
 272                 err = p54spi_spi_write_dma(priv, cpu_to_le32(
 273                                            ISL38XX_DEV_FIRMWARE_ADDR + offset),
 274                                            (fw + offset), _fw_len);
 275                 if (err < 0)
 276                         goto out;
 277
 278                 fw_len -= _fw_len;
 279                 offset += _fw_len;
 280         }
 281
 282         BUG_ON(fw_len != 0);
 283
 284         /* enable host interrupts */
 285         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
 286                        cpu_to_le32(SPI_HOST_INTS_DEFAULT));
 287
 288         /* boot the device */
 289         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 290                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
 291                        SPI_CTRL_STAT_RAM_BOOT));
 292
 293         msleep(TARGET_BOOT_SLEEP);
 294
 295         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 296                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
 297         msleep(TARGET_BOOT_SLEEP);
 298
 299 out:
 300         kfree(fw);
 301         return err;
 302 }
 303
 304 static void p54spi_power_off(struct p54s_priv *priv)
 305 {
 306         disable_irq(gpio_to_irq(p54spi_gpio_irq));
 307         gpio_set_value(p54spi_gpio_power, 0);
 308 }
 309
 310 static void p54spi_power_on(struct p54s_priv *priv)
 311 {
 312         gpio_set_value(p54spi_gpio_power, 1);
 313         enable_irq(gpio_to_irq(p54spi_gpio_irq));
 314
 315         /*
 316          * need to wait a while before device can be accessed, the lenght
 317          * is just a guess
 318          */
 319         msleep(10);
 320 }
 321
 322 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
 323 {
 324         p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
 325 }
 326
 327 static int p54spi_wakeup(struct p54s_priv *priv)
 328 {
 329         /* wake the chip */
 330         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
 331                        cpu_to_le32(SPI_TARGET_INT_WAKEUP));
 332
 333         /* And wait for the READY interrupt */
 334         if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
 335                              SPI_HOST_INT_READY)) {
 336                 dev_err(&priv->spi->dev, "INT_READY timeout\n");
 337                 return -EBUSY;
 338         }
 339
 340         p54spi_int_ack(priv, SPI_HOST_INT_READY);
 341         return 0;
 342 }
 343
 344 static inline void p54spi_sleep(struct p54s_priv *priv)
 345 {
 346         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
 347                        cpu_to_le32(SPI_TARGET_INT_SLEEP));
 348 }
 349
 350 static void p54spi_int_ready(struct p54s_priv *priv)
 351 {
 352         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
 353                        SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
 354
 355         switch (priv->fw_state) {
 356         case FW_STATE_BOOTING:
 357                 priv->fw_state = FW_STATE_READY;
 358                 complete(&priv->fw_comp);
 359                 break;
 360         case FW_STATE_RESETTING:
 361                 priv->fw_state = FW_STATE_READY;
 362                 /* TODO: reinitialize state */
 363                 break;
 364         default:
 365                 break;
 366         }
 367 }
 368
 369 static int p54spi_rx(struct p54s_priv *priv)
 370 {
 371         struct sk_buff *skb;
 372         u16 len;
 373         u16 rx_head[2];
 374 #define READAHEAD_SZ (sizeof(rx_head)-sizeof(u16))
 375
 376         if (p54spi_wakeup(priv) < 0)
 377                 return -EBUSY;
 378
 379         /* Read data size and first data word in one SPI transaction
 380          * This is workaround for firmware/DMA bug,
 381          * when first data word gets lost under high load.
 382          */
 383         p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, rx_head, sizeof(rx_head));
 384         len = rx_head[0];
 385
 386         if (len == 0) {
 387                 p54spi_sleep(priv);
 388                 dev_err(&priv->spi->dev, "rx request of zero bytes\n");
 389                 return 0;
 390         }
 391
 392         /* Firmware may insert up to 4 padding bytes after the lmac header,
 393          * but it does not amend the size of SPI data transfer.
 394          * Such packets has correct data size in header, thus referencing
 395          * past the end of allocated skb. Reserve extra 4 bytes for this case */
 396         skb = dev_alloc_skb(len + 4);
 397         if (!skb) {
 398                 p54spi_sleep(priv);
 399                 dev_err(&priv->spi->dev, "could not alloc skb");
 400                 return -ENOMEM;
 401         }
 402
 403         if (len <= READAHEAD_SZ) {
 404                 memcpy(skb_put(skb, len), rx_head + 1, len);
 405         } else {
 406                 memcpy(skb_put(skb, READAHEAD_SZ), rx_head + 1, READAHEAD_SZ);
 407                 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA,
 408                                 skb_put(skb, len - READAHEAD_SZ),
 409                                 len - READAHEAD_SZ);
 410         }
 411         p54spi_sleep(priv);
 412         /* Put additional bytes to compensate for the possible
 413          * alignment-caused truncation */
 414         skb_put(skb, 4);
 415
 416         if (p54_rx(priv->hw, skb) == 0)
 417                 dev_kfree_skb(skb);
 418
 419         return 0;
 420 }
 421
 422
 423 static irqreturn_t p54spi_interrupt(int irq, void *config)
 424 {
 425         struct spi_device *spi = config;
 426         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
 427
 428         queue_work(priv->hw->workqueue, &priv->work);
 429
 430         return IRQ_HANDLED;
 431 }
 432
 433 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
 434 {
 435         struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
 436         int ret = 0;
 437
 438         if (p54spi_wakeup(priv) < 0)
 439                 return -EBUSY;
 440
 441         ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
 442         if (ret < 0)
 443                 goto out;
 444
 445         if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS,
 446                              SPI_HOST_INT_WR_READY)) {
 447                 dev_err(&priv->spi->dev, "WR_READY timeout\n");
 448                 ret = -EAGAIN;
 449                 goto out;
 450         }
 451
 452         p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
 453
 454         if (FREE_AFTER_TX(skb))
 455                 p54_free_skb(priv->hw, skb);
 456 out:
 457         p54spi_sleep(priv);
 458         return ret;
 459 }
 460
 461 static int p54spi_wq_tx(struct p54s_priv *priv)
 462 {
 463         struct p54s_tx_info *entry;
 464         struct sk_buff *skb;
 465         struct ieee80211_tx_info *info;
 466         struct p54_tx_info *minfo;
 467         struct p54s_tx_info *dinfo;
 468         unsigned long flags;
 469         int ret = 0;
 470
 471         spin_lock_irqsave(&priv->tx_lock, flags);
 472
 473         while (!list_empty(&priv->tx_pending)) {
 474                 entry = list_entry(priv->tx_pending.next,
 475                                    struct p54s_tx_info, tx_list);
 476
 477                 list_del_init(&entry->tx_list);
 478
 479                 spin_unlock_irqrestore(&priv->tx_lock, flags);
 480
 481                 dinfo = container_of((void *) entry, struct p54s_tx_info,
 482                                      tx_list);
 483                 minfo = container_of((void *) dinfo, struct p54_tx_info,
 484                                      data);
 485                 info = container_of((void *) minfo, struct ieee80211_tx_info,
 486                                     rate_driver_data);
 487                 skb = container_of((void *) info, struct sk_buff, cb);
 488
 489                 ret = p54spi_tx_frame(priv, skb);
 490
 491                 if (ret < 0) {
 492                         p54_free_skb(priv->hw, skb);
 493                         return ret;
 494                 }
 495
 496                 spin_lock_irqsave(&priv->tx_lock, flags);
 497         }
 498         spin_unlock_irqrestore(&priv->tx_lock, flags);
 499         return ret;
 500 }
 501
 502 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 503 {
 504         struct p54s_priv *priv = dev->priv;
 505         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 506         struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
 507         struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
 508         unsigned long flags;
 509
 510         BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
 511
 512         spin_lock_irqsave(&priv->tx_lock, flags);
 513         list_add_tail(&di->tx_list, &priv->tx_pending);
 514         spin_unlock_irqrestore(&priv->tx_lock, flags);
 515
 516         queue_work(priv->hw->workqueue, &priv->work);
 517 }
 518
 519 static void p54spi_work(struct work_struct *work)
 520 {
 521         struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
 522         u32 ints;
 523         int ret;
 524
 525         mutex_lock(&priv->mutex);
 526
 527         if (priv->fw_state == FW_STATE_OFF)
 528                 goto out;
 529
 530         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
 531
 532         if (ints & SPI_HOST_INT_READY) {
 533                 p54spi_int_ready(priv);
 534                 p54spi_int_ack(priv, SPI_HOST_INT_READY);
 535         }
 536
 537         if (priv->fw_state != FW_STATE_READY)
 538                 goto out;
 539
 540         if (ints & SPI_HOST_INT_UPDATE) {
 541                 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
 542                 ret = p54spi_rx(priv);
 543                 if (ret < 0)
 544                         goto out;
 545         }
 546         if (ints & SPI_HOST_INT_SW_UPDATE) {
 547                 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
 548                 ret = p54spi_rx(priv);
 549                 if (ret < 0)
 550                         goto out;
 551         }
 552
 553         ret = p54spi_wq_tx(priv);
 554 out:
 555         mutex_unlock(&priv->mutex);
 556 }
 557
 558 static int p54spi_op_start(struct ieee80211_hw *dev)
 559 {
 560         struct p54s_priv *priv = dev->priv;
 561         unsigned long timeout;
 562         int ret = 0;
 563
 564         if (mutex_lock_interruptible(&priv->mutex)) {
 565                 ret = -EINTR;
 566                 goto out;
 567         }
 568
 569         priv->fw_state = FW_STATE_BOOTING;
 570
 571         p54spi_power_on(priv);
 572
 573         ret = p54spi_upload_firmware(dev);
 574         if (ret < 0) {
 575                 p54spi_power_off(priv);
 576                 goto out_unlock;
 577         }
 578
 579         mutex_unlock(&priv->mutex);
 580
 581         timeout = msecs_to_jiffies(2000);
 582         timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
 583                                                             timeout);
 584         if (!timeout) {
 585                 dev_err(&priv->spi->dev, "firmware boot failed");
 586                 p54spi_power_off(priv);
 587                 ret = -1;
 588                 goto out;
 589         }
 590
 591         if (mutex_lock_interruptible(&priv->mutex)) {
 592                 ret = -EINTR;
 593                 p54spi_power_off(priv);
 594                 goto out;
 595         }
 596
 597         WARN_ON(priv->fw_state != FW_STATE_READY);
 598
 599 out_unlock:
 600         mutex_unlock(&priv->mutex);
 601
 602 out:
 603         return ret;
 604 }
 605
 606 static void p54spi_op_stop(struct ieee80211_hw *dev)
 607 {
 608         struct p54s_priv *priv = dev->priv;
 609         unsigned long flags;
 610
 611         if (mutex_lock_interruptible(&priv->mutex)) {
 612                 /* FIXME: how to handle this error? */
 613                 return;
 614         }
 615
 616         WARN_ON(priv->fw_state != FW_STATE_READY);
 617
 618         cancel_work_sync(&priv->work);
 619
 620         p54spi_power_off(priv);
 621         spin_lock_irqsave(&priv->tx_lock, flags);
 622         INIT_LIST_HEAD(&priv->tx_pending);
 623         spin_unlock_irqrestore(&priv->tx_lock, flags);
 624
 625         priv->fw_state = FW_STATE_OFF;
 626         mutex_unlock(&priv->mutex);
 627 }
 628
 629 static int __devinit p54spi_probe(struct spi_device *spi)
 630 {
 631         struct p54s_priv *priv = NULL;
 632         struct ieee80211_hw *hw;
 633         int ret = -EINVAL;
 634
 635         hw = p54_init_common(sizeof(*priv));
 636         if (!hw) {
 637                 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw");
 638                 return -ENOMEM;
 639         }
 640
 641         priv = hw->priv;
 642         priv->hw = hw;
 643         dev_set_drvdata(&spi->dev, priv);
 644         priv->spi = spi;
 645
 646         spi->bits_per_word = 16;
 647         spi->max_speed_hz = 24000000;
 648
 649         ret = spi_setup(spi);
 650         if (ret < 0) {
 651                 dev_err(&priv->spi->dev, "spi_setup failed");
 652                 goto err_free_common;
 653         }
 654
 655         ret = gpio_request(p54spi_gpio_power, "p54spi power");
 656         if (ret < 0) {
 657                 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
 658                 goto err_free_common;
 659         }
 660
 661         ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
 662         if (ret < 0) {
 663                 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
 664                 goto err_free_common;
 665         }
 666
 667         gpio_direction_output(p54spi_gpio_power, 0);
 668         gpio_direction_input(p54spi_gpio_irq);
 669
 670         ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
 671                           p54spi_interrupt, IRQF_DISABLED, "p54spi",
 672                           priv->spi);
 673         if (ret < 0) {
 674                 dev_err(&priv->spi->dev, "request_irq() failed");
 675                 goto err_free_common;
 676         }
 677
 678         set_irq_type(gpio_to_irq(p54spi_gpio_irq),
 679                      IRQ_TYPE_EDGE_RISING);
 680
 681         disable_irq(gpio_to_irq(p54spi_gpio_irq));
 682
 683         INIT_WORK(&priv->work, p54spi_work);
 684         init_completion(&priv->fw_comp);
 685         INIT_LIST_HEAD(&priv->tx_pending);
 686         mutex_init(&priv->mutex);
 687         SET_IEEE80211_DEV(hw, &spi->dev);
 688         priv->common.open = p54spi_op_start;
 689         priv->common.stop = p54spi_op_stop;
 690         priv->common.tx = p54spi_op_tx;
 691
 692         ret = p54spi_request_firmware(hw);
 693         if (ret < 0)
 694                 goto err_free_common;
 695
 696         ret = p54spi_request_eeprom(hw);
 697         if (ret)
 698                 goto err_free_common;
 699
 700         ret = p54_register_common(hw, &priv->spi->dev);
 701         if (ret)
 702                 goto err_free_common;
 703
 704         return 0;
 705
 706 err_free_common:
 707         p54_free_common(priv->hw);
 708         return ret;
 709 }
 710
 711 static int __devexit p54spi_remove(struct spi_device *spi)
 712 {
 713         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
 714
 715         p54_unregister_common(priv->hw);
 716
 717         free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
 718
 719         gpio_free(p54spi_gpio_power);
 720         gpio_free(p54spi_gpio_irq);
 721         release_firmware(priv->firmware);
 722
 723         mutex_destroy(&priv->mutex);
 724
 725         p54_free_common(priv->hw);
 726
 727         return 0;
 728 }
 729
 730
 731 static struct spi_driver p54spi_driver = {
 732         .driver = {
 733                 /* use cx3110x name because board-n800.c uses that for the
 734                  * SPI port */
 735                 .name           = "cx3110x",
 736                 .bus            = &spi_bus_type,
 737                 .owner          = THIS_MODULE,
 738         },
 739
 740         .probe          = p54spi_probe,
 741         .remove         = __devexit_p(p54spi_remove),
 742 };
 743
 744 static int __init p54spi_init(void)
 745 {
 746         int ret;
 747
 748         ret = spi_register_driver(&p54spi_driver);
 749         if (ret < 0) {
 750                 printk(KERN_ERR "failed to register SPI driver: %d", ret);
 751                 goto out;
 752         }
 753
 754 out:
 755         return ret;
 756 }
 757
 758 static void __exit p54spi_exit(void)
 759 {
 760         spi_unregister_driver(&p54spi_driver);
 761 }
 762
 763 module_init(p54spi_init);
 764 module_exit(p54spi_exit);
 765
 766 MODULE_LICENSE("GPL");
 767 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");