2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
144 struct ieee80211_supported_band band_24;
145 struct ieee80211_channel channels_24[14];
146 struct ieee80211_rate rates_24[14];
147 struct ieee80211_supported_band band_50;
148 struct ieee80211_channel channels_50[4];
149 struct ieee80211_rate rates_50[9];
151 /* firmware access */
152 struct mutex fw_mutex;
153 struct task_struct *fw_mutex_owner;
155 struct completion *hostcmd_wait;
157 /* lock held over TX and TX reap */
160 /* TX quiesce completion, protected by fw_mutex and tx_lock */
161 struct completion *tx_wait;
163 /* List of interfaces. */
164 struct list_head vif_list;
166 /* power management status cookie from firmware */
168 dma_addr_t cookie_dma;
175 * Running count of TX packets in flight, to avoid
176 * iterating over the transmit rings each time.
180 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
181 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
184 bool radio_short_preamble;
185 bool sniffer_enabled;
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
192 /* XXX need to convert this to handle multiple interfaces */
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
203 struct work_struct finalize_join_worker;
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
208 /* Tasklet to perform RX. */
209 struct tasklet_struct poll_rx_task;
212 /* Per interface specific private data */
214 struct list_head list;
215 struct ieee80211_vif *vif;
217 /* Firmware macid for this vif. */
220 /* Non AMPDU sequence number assigned by driver. */
223 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
226 /* Index into station database. Returned by UPDATE_STADB. */
229 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
231 static const struct ieee80211_channel mwl8k_channels_24[] = {
232 { .center_freq = 2412, .hw_value = 1, },
233 { .center_freq = 2417, .hw_value = 2, },
234 { .center_freq = 2422, .hw_value = 3, },
235 { .center_freq = 2427, .hw_value = 4, },
236 { .center_freq = 2432, .hw_value = 5, },
237 { .center_freq = 2437, .hw_value = 6, },
238 { .center_freq = 2442, .hw_value = 7, },
239 { .center_freq = 2447, .hw_value = 8, },
240 { .center_freq = 2452, .hw_value = 9, },
241 { .center_freq = 2457, .hw_value = 10, },
242 { .center_freq = 2462, .hw_value = 11, },
243 { .center_freq = 2467, .hw_value = 12, },
244 { .center_freq = 2472, .hw_value = 13, },
245 { .center_freq = 2484, .hw_value = 14, },
248 static const struct ieee80211_rate mwl8k_rates_24[] = {
249 { .bitrate = 10, .hw_value = 2, },
250 { .bitrate = 20, .hw_value = 4, },
251 { .bitrate = 55, .hw_value = 11, },
252 { .bitrate = 110, .hw_value = 22, },
253 { .bitrate = 220, .hw_value = 44, },
254 { .bitrate = 60, .hw_value = 12, },
255 { .bitrate = 90, .hw_value = 18, },
256 { .bitrate = 120, .hw_value = 24, },
257 { .bitrate = 180, .hw_value = 36, },
258 { .bitrate = 240, .hw_value = 48, },
259 { .bitrate = 360, .hw_value = 72, },
260 { .bitrate = 480, .hw_value = 96, },
261 { .bitrate = 540, .hw_value = 108, },
262 { .bitrate = 720, .hw_value = 144, },
265 static const struct ieee80211_channel mwl8k_channels_50[] = {
266 { .center_freq = 5180, .hw_value = 36, },
267 { .center_freq = 5200, .hw_value = 40, },
268 { .center_freq = 5220, .hw_value = 44, },
269 { .center_freq = 5240, .hw_value = 48, },
272 static const struct ieee80211_rate mwl8k_rates_50[] = {
273 { .bitrate = 60, .hw_value = 12, },
274 { .bitrate = 90, .hw_value = 18, },
275 { .bitrate = 120, .hw_value = 24, },
276 { .bitrate = 180, .hw_value = 36, },
277 { .bitrate = 240, .hw_value = 48, },
278 { .bitrate = 360, .hw_value = 72, },
279 { .bitrate = 480, .hw_value = 96, },
280 { .bitrate = 540, .hw_value = 108, },
281 { .bitrate = 720, .hw_value = 144, },
284 /* Set or get info from Firmware */
285 #define MWL8K_CMD_SET 0x0001
286 #define MWL8K_CMD_GET 0x0000
288 /* Firmware command codes */
289 #define MWL8K_CMD_CODE_DNLD 0x0001
290 #define MWL8K_CMD_GET_HW_SPEC 0x0003
291 #define MWL8K_CMD_SET_HW_SPEC 0x0004
292 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
293 #define MWL8K_CMD_GET_STAT 0x0014
294 #define MWL8K_CMD_RADIO_CONTROL 0x001c
295 #define MWL8K_CMD_RF_TX_POWER 0x001e
296 #define MWL8K_CMD_RF_ANTENNA 0x0020
297 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
298 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
299 #define MWL8K_CMD_SET_POST_SCAN 0x0108
300 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
301 #define MWL8K_CMD_SET_AID 0x010d
302 #define MWL8K_CMD_SET_RATE 0x0110
303 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
304 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
305 #define MWL8K_CMD_SET_SLOT 0x0114
306 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
307 #define MWL8K_CMD_SET_WMM_MODE 0x0123
308 #define MWL8K_CMD_MIMO_CONFIG 0x0125
309 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
310 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
311 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
312 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
313 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
314 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
315 #define MWL8K_CMD_UPDATE_STADB 0x1123
317 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
319 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
320 snprintf(buf, bufsize, "%s", #x);\
323 switch (cmd & ~0x8000) {
324 MWL8K_CMDNAME(CODE_DNLD);
325 MWL8K_CMDNAME(GET_HW_SPEC);
326 MWL8K_CMDNAME(SET_HW_SPEC);
327 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
328 MWL8K_CMDNAME(GET_STAT);
329 MWL8K_CMDNAME(RADIO_CONTROL);
330 MWL8K_CMDNAME(RF_TX_POWER);
331 MWL8K_CMDNAME(RF_ANTENNA);
332 MWL8K_CMDNAME(SET_BEACON);
333 MWL8K_CMDNAME(SET_PRE_SCAN);
334 MWL8K_CMDNAME(SET_POST_SCAN);
335 MWL8K_CMDNAME(SET_RF_CHANNEL);
336 MWL8K_CMDNAME(SET_AID);
337 MWL8K_CMDNAME(SET_RATE);
338 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
339 MWL8K_CMDNAME(RTS_THRESHOLD);
340 MWL8K_CMDNAME(SET_SLOT);
341 MWL8K_CMDNAME(SET_EDCA_PARAMS);
342 MWL8K_CMDNAME(SET_WMM_MODE);
343 MWL8K_CMDNAME(MIMO_CONFIG);
344 MWL8K_CMDNAME(USE_FIXED_RATE);
345 MWL8K_CMDNAME(ENABLE_SNIFFER);
346 MWL8K_CMDNAME(SET_MAC_ADDR);
347 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
348 MWL8K_CMDNAME(BSS_START);
349 MWL8K_CMDNAME(SET_NEW_STN);
350 MWL8K_CMDNAME(UPDATE_STADB);
352 snprintf(buf, bufsize, "0x%x", cmd);
359 /* Hardware and firmware reset */
360 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
362 iowrite32(MWL8K_H2A_INT_RESET,
363 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
364 iowrite32(MWL8K_H2A_INT_RESET,
365 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
369 /* Release fw image */
370 static void mwl8k_release_fw(struct firmware **fw)
374 release_firmware(*fw);
378 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
380 mwl8k_release_fw(&priv->fw_ucode);
381 mwl8k_release_fw(&priv->fw_helper);
384 /* Request fw image */
385 static int mwl8k_request_fw(struct mwl8k_priv *priv,
386 const char *fname, struct firmware **fw)
388 /* release current image */
390 mwl8k_release_fw(fw);
392 return request_firmware((const struct firmware **)fw,
393 fname, &priv->pdev->dev);
396 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
398 struct mwl8k_device_info *di = priv->device_info;
401 if (di->helper_image != NULL) {
402 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
404 printk(KERN_ERR "%s: Error requesting helper "
405 "firmware file %s\n", pci_name(priv->pdev),
411 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
413 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
414 pci_name(priv->pdev), di->fw_image);
415 mwl8k_release_fw(&priv->fw_helper);
422 struct mwl8k_cmd_pkt {
429 } __attribute__((packed));
435 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
437 void __iomem *regs = priv->regs;
441 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
442 if (pci_dma_mapping_error(priv->pdev, dma_addr))
445 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
446 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
447 iowrite32(MWL8K_H2A_INT_DOORBELL,
448 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
449 iowrite32(MWL8K_H2A_INT_DUMMY,
450 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
456 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
457 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
458 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
466 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
468 return loops ? 0 : -ETIMEDOUT;
471 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
472 const u8 *data, size_t length)
474 struct mwl8k_cmd_pkt *cmd;
478 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
482 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
489 int block_size = length > 256 ? 256 : length;
491 memcpy(cmd->payload, data + done, block_size);
492 cmd->length = cpu_to_le16(block_size);
494 rc = mwl8k_send_fw_load_cmd(priv, cmd,
495 sizeof(*cmd) + block_size);
500 length -= block_size;
505 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
513 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
514 const u8 *data, size_t length)
516 unsigned char *buffer;
517 int may_continue, rc = 0;
518 u32 done, prev_block_size;
520 buffer = kmalloc(1024, GFP_KERNEL);
527 while (may_continue > 0) {
530 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
531 if (block_size & 1) {
535 done += prev_block_size;
536 length -= prev_block_size;
539 if (block_size > 1024 || block_size > length) {
549 if (block_size == 0) {
556 prev_block_size = block_size;
557 memcpy(buffer, data + done, block_size);
559 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
564 if (!rc && length != 0)
572 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
574 struct mwl8k_priv *priv = hw->priv;
575 struct firmware *fw = priv->fw_ucode;
579 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
580 struct firmware *helper = priv->fw_helper;
582 if (helper == NULL) {
583 printk(KERN_ERR "%s: helper image needed but none "
584 "given\n", pci_name(priv->pdev));
588 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
590 printk(KERN_ERR "%s: unable to load firmware "
591 "helper image\n", pci_name(priv->pdev));
596 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
598 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
602 printk(KERN_ERR "%s: unable to load firmware image\n",
603 pci_name(priv->pdev));
607 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
613 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
614 if (ready_code == MWL8K_FWAP_READY) {
617 } else if (ready_code == MWL8K_FWSTA_READY) {
626 return loops ? 0 : -ETIMEDOUT;
630 /* DMA header used by firmware and hardware. */
631 struct mwl8k_dma_data {
633 struct ieee80211_hdr wh;
635 } __attribute__((packed));
637 /* Routines to add/remove DMA header from skb. */
638 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
640 struct mwl8k_dma_data *tr;
643 tr = (struct mwl8k_dma_data *)skb->data;
644 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
646 if (hdrlen != sizeof(tr->wh)) {
647 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
648 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
649 *((__le16 *)(tr->data - 2)) = qos;
651 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
655 if (hdrlen != sizeof(*tr))
656 skb_pull(skb, sizeof(*tr) - hdrlen);
659 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
661 struct ieee80211_hdr *wh;
663 struct mwl8k_dma_data *tr;
666 * Add a firmware DMA header; the firmware requires that we
667 * present a 2-byte payload length followed by a 4-address
668 * header (without QoS field), followed (optionally) by any
669 * WEP/ExtIV header (but only filled in for CCMP).
671 wh = (struct ieee80211_hdr *)skb->data;
673 hdrlen = ieee80211_hdrlen(wh->frame_control);
674 if (hdrlen != sizeof(*tr))
675 skb_push(skb, sizeof(*tr) - hdrlen);
677 if (ieee80211_is_data_qos(wh->frame_control))
680 tr = (struct mwl8k_dma_data *)skb->data;
682 memmove(&tr->wh, wh, hdrlen);
683 if (hdrlen != sizeof(tr->wh))
684 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
687 * Firmware length is the length of the fully formed "802.11
688 * payload". That is, everything except for the 802.11 header.
689 * This includes all crypto material including the MIC.
691 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
696 * Packet reception for 88w8366 AP firmware.
698 struct mwl8k_rxd_8366_ap {
702 __le32 pkt_phys_addr;
703 __le32 next_rxd_phys_addr;
707 __le32 hw_noise_floor_info;
714 } __attribute__((packed));
716 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
717 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
718 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
720 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
722 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
724 struct mwl8k_rxd_8366_ap *rxd = _rxd;
726 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
727 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
730 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
732 struct mwl8k_rxd_8366_ap *rxd = _rxd;
734 rxd->pkt_len = cpu_to_le16(len);
735 rxd->pkt_phys_addr = cpu_to_le32(addr);
741 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
744 struct mwl8k_rxd_8366_ap *rxd = _rxd;
746 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
750 memset(status, 0, sizeof(*status));
752 status->signal = -rxd->rssi;
753 status->noise = -rxd->noise_floor;
755 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
756 status->flag |= RX_FLAG_HT;
757 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
758 status->flag |= RX_FLAG_40MHZ;
759 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
763 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
764 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
765 status->rate_idx = i;
771 if (rxd->channel > 14) {
772 status->band = IEEE80211_BAND_5GHZ;
773 if (!(status->flag & RX_FLAG_HT))
774 status->rate_idx -= 5;
776 status->band = IEEE80211_BAND_2GHZ;
778 status->freq = ieee80211_channel_to_frequency(rxd->channel);
780 *qos = rxd->qos_control;
782 return le16_to_cpu(rxd->pkt_len);
785 static struct rxd_ops rxd_8366_ap_ops = {
786 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
787 .rxd_init = mwl8k_rxd_8366_ap_init,
788 .rxd_refill = mwl8k_rxd_8366_ap_refill,
789 .rxd_process = mwl8k_rxd_8366_ap_process,
793 * Packet reception for STA firmware.
795 struct mwl8k_rxd_sta {
799 __le32 pkt_phys_addr;
800 __le32 next_rxd_phys_addr;
810 } __attribute__((packed));
812 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
813 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
814 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
815 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
816 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
817 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
819 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
821 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
823 struct mwl8k_rxd_sta *rxd = _rxd;
825 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
826 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
829 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
831 struct mwl8k_rxd_sta *rxd = _rxd;
833 rxd->pkt_len = cpu_to_le16(len);
834 rxd->pkt_phys_addr = cpu_to_le32(addr);
840 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
843 struct mwl8k_rxd_sta *rxd = _rxd;
846 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
850 rate_info = le16_to_cpu(rxd->rate_info);
852 memset(status, 0, sizeof(*status));
854 status->signal = -rxd->rssi;
855 status->noise = -rxd->noise_level;
856 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
857 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
859 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
860 status->flag |= RX_FLAG_SHORTPRE;
861 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
862 status->flag |= RX_FLAG_40MHZ;
863 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
864 status->flag |= RX_FLAG_SHORT_GI;
865 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
866 status->flag |= RX_FLAG_HT;
868 if (rxd->channel > 14) {
869 status->band = IEEE80211_BAND_5GHZ;
870 if (!(status->flag & RX_FLAG_HT))
871 status->rate_idx -= 5;
873 status->band = IEEE80211_BAND_2GHZ;
875 status->freq = ieee80211_channel_to_frequency(rxd->channel);
877 *qos = rxd->qos_control;
879 return le16_to_cpu(rxd->pkt_len);
882 static struct rxd_ops rxd_sta_ops = {
883 .rxd_size = sizeof(struct mwl8k_rxd_sta),
884 .rxd_init = mwl8k_rxd_sta_init,
885 .rxd_refill = mwl8k_rxd_sta_refill,
886 .rxd_process = mwl8k_rxd_sta_process,
890 #define MWL8K_RX_DESCS 256
891 #define MWL8K_RX_MAXSZ 3800
893 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
895 struct mwl8k_priv *priv = hw->priv;
896 struct mwl8k_rx_queue *rxq = priv->rxq + index;
904 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
906 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
907 if (rxq->rxd == NULL) {
908 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
909 wiphy_name(hw->wiphy));
912 memset(rxq->rxd, 0, size);
914 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
915 if (rxq->buf == NULL) {
916 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
917 wiphy_name(hw->wiphy));
918 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
921 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
923 for (i = 0; i < MWL8K_RX_DESCS; i++) {
927 dma_addr_t next_dma_addr;
929 desc_size = priv->rxd_ops->rxd_size;
930 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
933 if (nexti == MWL8K_RX_DESCS)
935 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
937 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
943 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
945 struct mwl8k_priv *priv = hw->priv;
946 struct mwl8k_rx_queue *rxq = priv->rxq + index;
950 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
956 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
960 addr = pci_map_single(priv->pdev, skb->data,
961 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
965 if (rxq->tail == MWL8K_RX_DESCS)
967 rxq->buf[rx].skb = skb;
968 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
970 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
971 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
979 /* Must be called only when the card's reception is completely halted */
980 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
982 struct mwl8k_priv *priv = hw->priv;
983 struct mwl8k_rx_queue *rxq = priv->rxq + index;
986 for (i = 0; i < MWL8K_RX_DESCS; i++) {
987 if (rxq->buf[i].skb != NULL) {
988 pci_unmap_single(priv->pdev,
989 pci_unmap_addr(&rxq->buf[i], dma),
990 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
991 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
993 kfree_skb(rxq->buf[i].skb);
994 rxq->buf[i].skb = NULL;
1001 pci_free_consistent(priv->pdev,
1002 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1003 rxq->rxd, rxq->rxd_dma);
1009 * Scan a list of BSSIDs to process for finalize join.
1010 * Allows for extension to process multiple BSSIDs.
1013 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1015 return priv->capture_beacon &&
1016 ieee80211_is_beacon(wh->frame_control) &&
1017 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1020 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1021 struct sk_buff *skb)
1023 struct mwl8k_priv *priv = hw->priv;
1025 priv->capture_beacon = false;
1026 memset(priv->capture_bssid, 0, ETH_ALEN);
1029 * Use GFP_ATOMIC as rxq_process is called from
1030 * the primary interrupt handler, memory allocation call
1033 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1034 if (priv->beacon_skb != NULL)
1035 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1038 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1040 struct mwl8k_priv *priv = hw->priv;
1041 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1045 while (rxq->rxd_count && limit--) {
1046 struct sk_buff *skb;
1049 struct ieee80211_rx_status status;
1052 skb = rxq->buf[rxq->head].skb;
1056 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1058 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1062 rxq->buf[rxq->head].skb = NULL;
1064 pci_unmap_single(priv->pdev,
1065 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1066 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1067 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1070 if (rxq->head == MWL8K_RX_DESCS)
1075 skb_put(skb, pkt_len);
1076 mwl8k_remove_dma_header(skb, qos);
1079 * Check for a pending join operation. Save a
1080 * copy of the beacon and schedule a tasklet to
1081 * send a FINALIZE_JOIN command to the firmware.
1083 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1084 mwl8k_save_beacon(hw, skb);
1086 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1087 ieee80211_rx_irqsafe(hw, skb);
1097 * Packet transmission.
1100 #define MWL8K_TXD_STATUS_OK 0x00000001
1101 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1102 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1103 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1104 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1106 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1107 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1108 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1109 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1110 #define MWL8K_QOS_EOSP 0x0010
1112 struct mwl8k_tx_desc {
1117 __le32 pkt_phys_addr;
1119 __u8 dest_MAC_addr[ETH_ALEN];
1120 __le32 next_txd_phys_addr;
1125 } __attribute__((packed));
1127 #define MWL8K_TX_DESCS 128
1129 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1131 struct mwl8k_priv *priv = hw->priv;
1132 struct mwl8k_tx_queue *txq = priv->txq + index;
1136 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1137 txq->stats.limit = MWL8K_TX_DESCS;
1141 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1143 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1144 if (txq->txd == NULL) {
1145 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1146 wiphy_name(hw->wiphy));
1149 memset(txq->txd, 0, size);
1151 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1152 if (txq->skb == NULL) {
1153 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1154 wiphy_name(hw->wiphy));
1155 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1158 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1160 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1161 struct mwl8k_tx_desc *tx_desc;
1164 tx_desc = txq->txd + i;
1165 nexti = (i + 1) % MWL8K_TX_DESCS;
1167 tx_desc->status = 0;
1168 tx_desc->next_txd_phys_addr =
1169 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1175 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1177 iowrite32(MWL8K_H2A_INT_PPA_READY,
1178 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1179 iowrite32(MWL8K_H2A_INT_DUMMY,
1180 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1181 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1184 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1186 struct mwl8k_priv *priv = hw->priv;
1189 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1190 struct mwl8k_tx_queue *txq = priv->txq + i;
1196 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1197 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1200 status = le32_to_cpu(tx_desc->status);
1201 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1206 if (tx_desc->pkt_len == 0)
1210 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1211 "fw_owned=%d drv_owned=%d unused=%d\n",
1212 wiphy_name(hw->wiphy), i,
1213 txq->stats.len, txq->head, txq->tail,
1214 fw_owned, drv_owned, unused);
1219 * Must be called with priv->fw_mutex held and tx queues stopped.
1221 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1223 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1225 struct mwl8k_priv *priv = hw->priv;
1226 DECLARE_COMPLETION_ONSTACK(tx_wait);
1233 * The TX queues are stopped at this point, so this test
1234 * doesn't need to take ->tx_lock.
1236 if (!priv->pending_tx_pkts)
1242 spin_lock_bh(&priv->tx_lock);
1243 priv->tx_wait = &tx_wait;
1246 unsigned long timeout;
1248 oldcount = priv->pending_tx_pkts;
1250 spin_unlock_bh(&priv->tx_lock);
1251 timeout = wait_for_completion_timeout(&tx_wait,
1252 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1253 spin_lock_bh(&priv->tx_lock);
1256 WARN_ON(priv->pending_tx_pkts);
1258 printk(KERN_NOTICE "%s: tx rings drained\n",
1259 wiphy_name(hw->wiphy));
1264 if (priv->pending_tx_pkts < oldcount) {
1265 printk(KERN_NOTICE "%s: waiting for tx rings "
1266 "to drain (%d -> %d pkts)\n",
1267 wiphy_name(hw->wiphy), oldcount,
1268 priv->pending_tx_pkts);
1273 priv->tx_wait = NULL;
1275 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1276 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1277 mwl8k_dump_tx_rings(hw);
1281 spin_unlock_bh(&priv->tx_lock);
1286 #define MWL8K_TXD_SUCCESS(status) \
1287 ((status) & (MWL8K_TXD_STATUS_OK | \
1288 MWL8K_TXD_STATUS_OK_RETRY | \
1289 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1292 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1294 struct mwl8k_priv *priv = hw->priv;
1295 struct mwl8k_tx_queue *txq = priv->txq + index;
1299 while (txq->stats.len > 0 && limit--) {
1301 struct mwl8k_tx_desc *tx_desc;
1304 struct sk_buff *skb;
1305 struct ieee80211_tx_info *info;
1309 tx_desc = txq->txd + tx;
1311 status = le32_to_cpu(tx_desc->status);
1313 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1317 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1320 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1321 BUG_ON(txq->stats.len == 0);
1323 priv->pending_tx_pkts--;
1325 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1326 size = le16_to_cpu(tx_desc->pkt_len);
1328 txq->skb[tx] = NULL;
1330 BUG_ON(skb == NULL);
1331 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1333 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1335 /* Mark descriptor as unused */
1336 tx_desc->pkt_phys_addr = 0;
1337 tx_desc->pkt_len = 0;
1339 info = IEEE80211_SKB_CB(skb);
1340 ieee80211_tx_info_clear_status(info);
1341 if (MWL8K_TXD_SUCCESS(status))
1342 info->flags |= IEEE80211_TX_STAT_ACK;
1344 ieee80211_tx_status_irqsafe(hw, skb);
1349 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1350 ieee80211_wake_queue(hw, index);
1355 /* must be called only when the card's transmit is completely halted */
1356 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1358 struct mwl8k_priv *priv = hw->priv;
1359 struct mwl8k_tx_queue *txq = priv->txq + index;
1361 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1366 pci_free_consistent(priv->pdev,
1367 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1368 txq->txd, txq->txd_dma);
1373 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1375 struct mwl8k_priv *priv = hw->priv;
1376 struct ieee80211_tx_info *tx_info;
1377 struct mwl8k_vif *mwl8k_vif;
1378 struct ieee80211_hdr *wh;
1379 struct mwl8k_tx_queue *txq;
1380 struct mwl8k_tx_desc *tx;
1386 wh = (struct ieee80211_hdr *)skb->data;
1387 if (ieee80211_is_data_qos(wh->frame_control))
1388 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1392 mwl8k_add_dma_header(skb);
1393 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1395 tx_info = IEEE80211_SKB_CB(skb);
1396 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1398 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1399 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1400 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1401 mwl8k_vif->seqno += 0x10;
1404 /* Setup firmware control bit fields for each frame type. */
1407 if (ieee80211_is_mgmt(wh->frame_control) ||
1408 ieee80211_is_ctl(wh->frame_control)) {
1410 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1411 } else if (ieee80211_is_data(wh->frame_control)) {
1413 if (is_multicast_ether_addr(wh->addr1))
1414 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1416 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1417 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1418 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1420 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1423 dma = pci_map_single(priv->pdev, skb->data,
1424 skb->len, PCI_DMA_TODEVICE);
1426 if (pci_dma_mapping_error(priv->pdev, dma)) {
1427 printk(KERN_DEBUG "%s: failed to dma map skb, "
1428 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1430 return NETDEV_TX_OK;
1433 spin_lock_bh(&priv->tx_lock);
1435 txq = priv->txq + index;
1437 BUG_ON(txq->skb[txq->tail] != NULL);
1438 txq->skb[txq->tail] = skb;
1440 tx = txq->txd + txq->tail;
1441 tx->data_rate = txdatarate;
1442 tx->tx_priority = index;
1443 tx->qos_control = cpu_to_le16(qos);
1444 tx->pkt_phys_addr = cpu_to_le32(dma);
1445 tx->pkt_len = cpu_to_le16(skb->len);
1447 if (!priv->ap_fw && tx_info->control.sta != NULL)
1448 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1452 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1456 priv->pending_tx_pkts++;
1459 if (txq->tail == MWL8K_TX_DESCS)
1462 if (txq->head == txq->tail)
1463 ieee80211_stop_queue(hw, index);
1465 mwl8k_tx_start(priv);
1467 spin_unlock_bh(&priv->tx_lock);
1469 return NETDEV_TX_OK;
1476 * We have the following requirements for issuing firmware commands:
1477 * - Some commands require that the packet transmit path is idle when
1478 * the command is issued. (For simplicity, we'll just quiesce the
1479 * transmit path for every command.)
1480 * - There are certain sequences of commands that need to be issued to
1481 * the hardware sequentially, with no other intervening commands.
1483 * This leads to an implementation of a "firmware lock" as a mutex that
1484 * can be taken recursively, and which is taken by both the low-level
1485 * command submission function (mwl8k_post_cmd) as well as any users of
1486 * that function that require issuing of an atomic sequence of commands,
1487 * and quiesces the transmit path whenever it's taken.
1489 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1491 struct mwl8k_priv *priv = hw->priv;
1493 if (priv->fw_mutex_owner != current) {
1496 mutex_lock(&priv->fw_mutex);
1497 ieee80211_stop_queues(hw);
1499 rc = mwl8k_tx_wait_empty(hw);
1501 ieee80211_wake_queues(hw);
1502 mutex_unlock(&priv->fw_mutex);
1507 priv->fw_mutex_owner = current;
1510 priv->fw_mutex_depth++;
1515 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1517 struct mwl8k_priv *priv = hw->priv;
1519 if (!--priv->fw_mutex_depth) {
1520 ieee80211_wake_queues(hw);
1521 priv->fw_mutex_owner = NULL;
1522 mutex_unlock(&priv->fw_mutex);
1528 * Command processing.
1531 /* Timeout firmware commands after 10s */
1532 #define MWL8K_CMD_TIMEOUT_MS 10000
1534 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1536 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1537 struct mwl8k_priv *priv = hw->priv;
1538 void __iomem *regs = priv->regs;
1539 dma_addr_t dma_addr;
1540 unsigned int dma_size;
1542 unsigned long timeout = 0;
1545 cmd->result = 0xffff;
1546 dma_size = le16_to_cpu(cmd->length);
1547 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1548 PCI_DMA_BIDIRECTIONAL);
1549 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1552 rc = mwl8k_fw_lock(hw);
1554 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1555 PCI_DMA_BIDIRECTIONAL);
1559 priv->hostcmd_wait = &cmd_wait;
1560 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1561 iowrite32(MWL8K_H2A_INT_DOORBELL,
1562 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1563 iowrite32(MWL8K_H2A_INT_DUMMY,
1564 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1566 timeout = wait_for_completion_timeout(&cmd_wait,
1567 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1569 priv->hostcmd_wait = NULL;
1571 mwl8k_fw_unlock(hw);
1573 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1574 PCI_DMA_BIDIRECTIONAL);
1577 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1578 wiphy_name(hw->wiphy),
1579 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1580 MWL8K_CMD_TIMEOUT_MS);
1585 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1587 rc = cmd->result ? -EINVAL : 0;
1589 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1590 wiphy_name(hw->wiphy),
1591 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1592 le16_to_cpu(cmd->result));
1594 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1595 wiphy_name(hw->wiphy),
1596 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1603 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1604 struct ieee80211_vif *vif,
1605 struct mwl8k_cmd_pkt *cmd)
1608 cmd->macid = MWL8K_VIF(vif)->macid;
1609 return mwl8k_post_cmd(hw, cmd);
1613 * Setup code shared between STA and AP firmware images.
1615 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1617 struct mwl8k_priv *priv = hw->priv;
1619 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1620 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1622 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1623 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1625 priv->band_24.band = IEEE80211_BAND_2GHZ;
1626 priv->band_24.channels = priv->channels_24;
1627 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1628 priv->band_24.bitrates = priv->rates_24;
1629 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1631 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1634 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1636 struct mwl8k_priv *priv = hw->priv;
1638 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1639 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1641 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1642 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1644 priv->band_50.band = IEEE80211_BAND_5GHZ;
1645 priv->band_50.channels = priv->channels_50;
1646 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1647 priv->band_50.bitrates = priv->rates_50;
1648 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1650 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1654 * CMD_GET_HW_SPEC (STA version).
1656 struct mwl8k_cmd_get_hw_spec_sta {
1657 struct mwl8k_cmd_pkt header;
1659 __u8 host_interface;
1661 __u8 perm_addr[ETH_ALEN];
1666 __u8 mcs_bitmap[16];
1667 __le32 rx_queue_ptr;
1668 __le32 num_tx_queues;
1669 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1671 __le32 num_tx_desc_per_queue;
1673 } __attribute__((packed));
1675 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1676 #define MWL8K_CAP_GREENFIELD 0x08000000
1677 #define MWL8K_CAP_AMPDU 0x04000000
1678 #define MWL8K_CAP_RX_STBC 0x01000000
1679 #define MWL8K_CAP_TX_STBC 0x00800000
1680 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1681 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1682 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1683 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1684 #define MWL8K_CAP_DELAY_BA 0x00003000
1685 #define MWL8K_CAP_MIMO 0x00000200
1686 #define MWL8K_CAP_40MHZ 0x00000100
1687 #define MWL8K_CAP_BAND_MASK 0x00000007
1688 #define MWL8K_CAP_5GHZ 0x00000004
1689 #define MWL8K_CAP_2GHZ4 0x00000001
1692 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1693 struct ieee80211_supported_band *band, u32 cap)
1698 band->ht_cap.ht_supported = 1;
1700 if (cap & MWL8K_CAP_MAX_AMSDU)
1701 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1702 if (cap & MWL8K_CAP_GREENFIELD)
1703 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1704 if (cap & MWL8K_CAP_AMPDU) {
1705 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1706 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1707 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1709 if (cap & MWL8K_CAP_RX_STBC)
1710 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1711 if (cap & MWL8K_CAP_TX_STBC)
1712 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1713 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1714 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1715 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1716 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1717 if (cap & MWL8K_CAP_DELAY_BA)
1718 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1719 if (cap & MWL8K_CAP_40MHZ)
1720 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1722 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1723 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1725 band->ht_cap.mcs.rx_mask[0] = 0xff;
1726 if (rx_streams >= 2)
1727 band->ht_cap.mcs.rx_mask[1] = 0xff;
1728 if (rx_streams >= 3)
1729 band->ht_cap.mcs.rx_mask[2] = 0xff;
1730 band->ht_cap.mcs.rx_mask[4] = 0x01;
1731 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1733 if (rx_streams != tx_streams) {
1734 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1735 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1736 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1741 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1743 struct mwl8k_priv *priv = hw->priv;
1745 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1746 mwl8k_setup_2ghz_band(hw);
1747 if (caps & MWL8K_CAP_MIMO)
1748 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1751 if (caps & MWL8K_CAP_5GHZ) {
1752 mwl8k_setup_5ghz_band(hw);
1753 if (caps & MWL8K_CAP_MIMO)
1754 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1758 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1760 struct mwl8k_priv *priv = hw->priv;
1761 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1765 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1769 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1770 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1772 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1773 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1774 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1775 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1776 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1777 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1778 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1779 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1781 rc = mwl8k_post_cmd(hw, &cmd->header);
1784 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1785 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1786 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1787 priv->hw_rev = cmd->hw_rev;
1788 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1796 * CMD_GET_HW_SPEC (AP version).
1798 struct mwl8k_cmd_get_hw_spec_ap {
1799 struct mwl8k_cmd_pkt header;
1801 __u8 host_interface;
1804 __u8 perm_addr[ETH_ALEN];
1815 } __attribute__((packed));
1817 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1819 struct mwl8k_priv *priv = hw->priv;
1820 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1823 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1827 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1828 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1830 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1831 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1833 rc = mwl8k_post_cmd(hw, &cmd->header);
1838 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1839 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1840 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1841 priv->hw_rev = cmd->hw_rev;
1842 mwl8k_setup_2ghz_band(hw);
1844 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1845 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1847 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1848 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1850 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1851 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1853 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1854 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1856 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1857 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1859 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1860 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1870 struct mwl8k_cmd_set_hw_spec {
1871 struct mwl8k_cmd_pkt header;
1873 __u8 host_interface;
1875 __u8 perm_addr[ETH_ALEN];
1880 __le32 rx_queue_ptr;
1881 __le32 num_tx_queues;
1882 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1884 __le32 num_tx_desc_per_queue;
1886 } __attribute__((packed));
1888 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1889 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1890 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1892 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1894 struct mwl8k_priv *priv = hw->priv;
1895 struct mwl8k_cmd_set_hw_spec *cmd;
1899 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1903 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1904 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1906 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1907 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1908 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1909 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1910 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1911 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1912 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1913 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1914 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1915 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1917 rc = mwl8k_post_cmd(hw, &cmd->header);
1924 * CMD_MAC_MULTICAST_ADR.
1926 struct mwl8k_cmd_mac_multicast_adr {
1927 struct mwl8k_cmd_pkt header;
1930 __u8 addr[0][ETH_ALEN];
1933 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1934 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1935 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1936 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1938 static struct mwl8k_cmd_pkt *
1939 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1940 int mc_count, struct dev_addr_list *mclist)
1942 struct mwl8k_priv *priv = hw->priv;
1943 struct mwl8k_cmd_mac_multicast_adr *cmd;
1946 if (allmulti || mc_count > priv->num_mcaddrs) {
1951 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1953 cmd = kzalloc(size, GFP_ATOMIC);
1957 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1958 cmd->header.length = cpu_to_le16(size);
1959 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1960 MWL8K_ENABLE_RX_BROADCAST);
1963 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1964 } else if (mc_count) {
1967 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1968 cmd->numaddr = cpu_to_le16(mc_count);
1969 for (i = 0; i < mc_count && mclist; i++) {
1970 if (mclist->da_addrlen != ETH_ALEN) {
1974 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1975 mclist = mclist->next;
1979 return &cmd->header;
1985 struct mwl8k_cmd_get_stat {
1986 struct mwl8k_cmd_pkt header;
1988 } __attribute__((packed));
1990 #define MWL8K_STAT_ACK_FAILURE 9
1991 #define MWL8K_STAT_RTS_FAILURE 12
1992 #define MWL8K_STAT_FCS_ERROR 24
1993 #define MWL8K_STAT_RTS_SUCCESS 11
1995 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1996 struct ieee80211_low_level_stats *stats)
1998 struct mwl8k_cmd_get_stat *cmd;
2001 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2005 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2006 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2008 rc = mwl8k_post_cmd(hw, &cmd->header);
2010 stats->dot11ACKFailureCount =
2011 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2012 stats->dot11RTSFailureCount =
2013 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2014 stats->dot11FCSErrorCount =
2015 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2016 stats->dot11RTSSuccessCount =
2017 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2025 * CMD_RADIO_CONTROL.
2027 struct mwl8k_cmd_radio_control {
2028 struct mwl8k_cmd_pkt header;
2032 } __attribute__((packed));
2035 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2037 struct mwl8k_priv *priv = hw->priv;
2038 struct mwl8k_cmd_radio_control *cmd;
2041 if (enable == priv->radio_on && !force)
2044 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2048 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2049 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2050 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2051 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2052 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2054 rc = mwl8k_post_cmd(hw, &cmd->header);
2058 priv->radio_on = enable;
2063 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2065 return mwl8k_cmd_radio_control(hw, 0, 0);
2068 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2070 return mwl8k_cmd_radio_control(hw, 1, 0);
2074 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2076 struct mwl8k_priv *priv = hw->priv;
2078 priv->radio_short_preamble = short_preamble;
2080 return mwl8k_cmd_radio_control(hw, 1, 1);
2086 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2088 struct mwl8k_cmd_rf_tx_power {
2089 struct mwl8k_cmd_pkt header;
2091 __le16 support_level;
2092 __le16 current_level;
2094 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2095 } __attribute__((packed));
2097 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2099 struct mwl8k_cmd_rf_tx_power *cmd;
2102 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2106 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2107 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2108 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2109 cmd->support_level = cpu_to_le16(dBm);
2111 rc = mwl8k_post_cmd(hw, &cmd->header);
2120 struct mwl8k_cmd_rf_antenna {
2121 struct mwl8k_cmd_pkt header;
2124 } __attribute__((packed));
2126 #define MWL8K_RF_ANTENNA_RX 1
2127 #define MWL8K_RF_ANTENNA_TX 2
2130 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2132 struct mwl8k_cmd_rf_antenna *cmd;
2135 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2139 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2140 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2141 cmd->antenna = cpu_to_le16(antenna);
2142 cmd->mode = cpu_to_le16(mask);
2144 rc = mwl8k_post_cmd(hw, &cmd->header);
2153 struct mwl8k_cmd_set_beacon {
2154 struct mwl8k_cmd_pkt header;
2159 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2160 struct ieee80211_vif *vif, u8 *beacon, int len)
2162 struct mwl8k_cmd_set_beacon *cmd;
2165 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2169 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2170 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2171 cmd->beacon_len = cpu_to_le16(len);
2172 memcpy(cmd->beacon, beacon, len);
2174 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2183 struct mwl8k_cmd_set_pre_scan {
2184 struct mwl8k_cmd_pkt header;
2185 } __attribute__((packed));
2187 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2189 struct mwl8k_cmd_set_pre_scan *cmd;
2192 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2196 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2197 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2199 rc = mwl8k_post_cmd(hw, &cmd->header);
2206 * CMD_SET_POST_SCAN.
2208 struct mwl8k_cmd_set_post_scan {
2209 struct mwl8k_cmd_pkt header;
2211 __u8 bssid[ETH_ALEN];
2212 } __attribute__((packed));
2215 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2217 struct mwl8k_cmd_set_post_scan *cmd;
2220 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2224 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2225 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2227 memcpy(cmd->bssid, mac, ETH_ALEN);
2229 rc = mwl8k_post_cmd(hw, &cmd->header);
2236 * CMD_SET_RF_CHANNEL.
2238 struct mwl8k_cmd_set_rf_channel {
2239 struct mwl8k_cmd_pkt header;
2241 __u8 current_channel;
2242 __le32 channel_flags;
2243 } __attribute__((packed));
2245 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2246 struct ieee80211_conf *conf)
2248 struct ieee80211_channel *channel = conf->channel;
2249 struct mwl8k_cmd_set_rf_channel *cmd;
2252 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2256 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2257 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2258 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2259 cmd->current_channel = channel->hw_value;
2261 if (channel->band == IEEE80211_BAND_2GHZ)
2262 cmd->channel_flags |= cpu_to_le32(0x00000001);
2263 else if (channel->band == IEEE80211_BAND_5GHZ)
2264 cmd->channel_flags |= cpu_to_le32(0x00000004);
2266 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2267 conf->channel_type == NL80211_CHAN_HT20)
2268 cmd->channel_flags |= cpu_to_le32(0x00000080);
2269 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2270 cmd->channel_flags |= cpu_to_le32(0x000001900);
2271 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2272 cmd->channel_flags |= cpu_to_le32(0x000000900);
2274 rc = mwl8k_post_cmd(hw, &cmd->header);
2283 #define MWL8K_FRAME_PROT_DISABLED 0x00
2284 #define MWL8K_FRAME_PROT_11G 0x07
2285 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2286 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2288 struct mwl8k_cmd_update_set_aid {
2289 struct mwl8k_cmd_pkt header;
2292 /* AP's MAC address (BSSID) */
2293 __u8 bssid[ETH_ALEN];
2294 __le16 protection_mode;
2295 __u8 supp_rates[14];
2296 } __attribute__((packed));
2298 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2304 * Clear nonstandard rates 4 and 13.
2308 for (i = 0, j = 0; i < 14; i++) {
2309 if (mask & (1 << i))
2310 rates[j++] = mwl8k_rates_24[i].hw_value;
2315 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2316 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2318 struct mwl8k_cmd_update_set_aid *cmd;
2322 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2326 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2327 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2328 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2329 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2331 if (vif->bss_conf.use_cts_prot) {
2332 prot_mode = MWL8K_FRAME_PROT_11G;
2334 switch (vif->bss_conf.ht_operation_mode &
2335 IEEE80211_HT_OP_MODE_PROTECTION) {
2336 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2337 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2339 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2340 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2343 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2347 cmd->protection_mode = cpu_to_le16(prot_mode);
2349 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2351 rc = mwl8k_post_cmd(hw, &cmd->header);
2360 struct mwl8k_cmd_set_rate {
2361 struct mwl8k_cmd_pkt header;
2362 __u8 legacy_rates[14];
2364 /* Bitmap for supported MCS codes. */
2367 } __attribute__((packed));
2370 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2371 u32 legacy_rate_mask, u8 *mcs_rates)
2373 struct mwl8k_cmd_set_rate *cmd;
2376 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2380 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2381 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2382 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2383 memcpy(cmd->mcs_set, mcs_rates, 16);
2385 rc = mwl8k_post_cmd(hw, &cmd->header);
2392 * CMD_FINALIZE_JOIN.
2394 #define MWL8K_FJ_BEACON_MAXLEN 128
2396 struct mwl8k_cmd_finalize_join {
2397 struct mwl8k_cmd_pkt header;
2398 __le32 sleep_interval; /* Number of beacon periods to sleep */
2399 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2400 } __attribute__((packed));
2402 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2403 int framelen, int dtim)
2405 struct mwl8k_cmd_finalize_join *cmd;
2406 struct ieee80211_mgmt *payload = frame;
2410 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2414 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2415 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2416 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2418 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2419 if (payload_len < 0)
2421 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2422 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2424 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2426 rc = mwl8k_post_cmd(hw, &cmd->header);
2433 * CMD_SET_RTS_THRESHOLD.
2435 struct mwl8k_cmd_set_rts_threshold {
2436 struct mwl8k_cmd_pkt header;
2439 } __attribute__((packed));
2442 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2444 struct mwl8k_cmd_set_rts_threshold *cmd;
2447 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2451 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2452 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2453 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2454 cmd->threshold = cpu_to_le16(rts_thresh);
2456 rc = mwl8k_post_cmd(hw, &cmd->header);
2465 struct mwl8k_cmd_set_slot {
2466 struct mwl8k_cmd_pkt header;
2469 } __attribute__((packed));
2471 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2473 struct mwl8k_cmd_set_slot *cmd;
2476 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2480 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2481 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2482 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2483 cmd->short_slot = short_slot_time;
2485 rc = mwl8k_post_cmd(hw, &cmd->header);
2492 * CMD_SET_EDCA_PARAMS.
2494 struct mwl8k_cmd_set_edca_params {
2495 struct mwl8k_cmd_pkt header;
2497 /* See MWL8K_SET_EDCA_XXX below */
2500 /* TX opportunity in units of 32 us */
2505 /* Log exponent of max contention period: 0...15 */
2508 /* Log exponent of min contention period: 0...15 */
2511 /* Adaptive interframe spacing in units of 32us */
2514 /* TX queue to configure */
2518 /* Log exponent of max contention period: 0...15 */
2521 /* Log exponent of min contention period: 0...15 */
2524 /* Adaptive interframe spacing in units of 32us */
2527 /* TX queue to configure */
2531 } __attribute__((packed));
2533 #define MWL8K_SET_EDCA_CW 0x01
2534 #define MWL8K_SET_EDCA_TXOP 0x02
2535 #define MWL8K_SET_EDCA_AIFS 0x04
2537 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2538 MWL8K_SET_EDCA_TXOP | \
2539 MWL8K_SET_EDCA_AIFS)
2542 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2543 __u16 cw_min, __u16 cw_max,
2544 __u8 aifs, __u16 txop)
2546 struct mwl8k_priv *priv = hw->priv;
2547 struct mwl8k_cmd_set_edca_params *cmd;
2550 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2554 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2555 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2556 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2557 cmd->txop = cpu_to_le16(txop);
2559 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2560 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2561 cmd->ap.aifs = aifs;
2564 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2565 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2566 cmd->sta.aifs = aifs;
2567 cmd->sta.txq = qnum;
2570 rc = mwl8k_post_cmd(hw, &cmd->header);
2579 struct mwl8k_cmd_set_wmm_mode {
2580 struct mwl8k_cmd_pkt header;
2582 } __attribute__((packed));
2584 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2586 struct mwl8k_priv *priv = hw->priv;
2587 struct mwl8k_cmd_set_wmm_mode *cmd;
2590 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2594 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2595 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2596 cmd->action = cpu_to_le16(!!enable);
2598 rc = mwl8k_post_cmd(hw, &cmd->header);
2602 priv->wmm_enabled = enable;
2610 struct mwl8k_cmd_mimo_config {
2611 struct mwl8k_cmd_pkt header;
2613 __u8 rx_antenna_map;
2614 __u8 tx_antenna_map;
2615 } __attribute__((packed));
2617 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2619 struct mwl8k_cmd_mimo_config *cmd;
2622 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2626 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2627 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2628 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2629 cmd->rx_antenna_map = rx;
2630 cmd->tx_antenna_map = tx;
2632 rc = mwl8k_post_cmd(hw, &cmd->header);
2639 * CMD_USE_FIXED_RATE (STA version).
2641 struct mwl8k_cmd_use_fixed_rate_sta {
2642 struct mwl8k_cmd_pkt header;
2644 __le32 allow_rate_drop;
2648 __le32 enable_retry;
2655 } __attribute__((packed));
2657 #define MWL8K_USE_AUTO_RATE 0x0002
2658 #define MWL8K_UCAST_RATE 0
2660 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2662 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2665 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2669 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2670 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2671 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2672 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2674 rc = mwl8k_post_cmd(hw, &cmd->header);
2681 * CMD_USE_FIXED_RATE (AP version).
2683 struct mwl8k_cmd_use_fixed_rate_ap {
2684 struct mwl8k_cmd_pkt header;
2686 __le32 allow_rate_drop;
2688 struct mwl8k_rate_entry_ap {
2690 __le32 enable_retry;
2695 u8 multicast_rate_type;
2697 } __attribute__((packed));
2700 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2702 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2705 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2709 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2710 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2711 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2712 cmd->multicast_rate = mcast;
2713 cmd->management_rate = mgmt;
2715 rc = mwl8k_post_cmd(hw, &cmd->header);
2722 * CMD_ENABLE_SNIFFER.
2724 struct mwl8k_cmd_enable_sniffer {
2725 struct mwl8k_cmd_pkt header;
2727 } __attribute__((packed));
2729 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2731 struct mwl8k_cmd_enable_sniffer *cmd;
2734 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2738 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2739 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2740 cmd->action = cpu_to_le32(!!enable);
2742 rc = mwl8k_post_cmd(hw, &cmd->header);
2751 struct mwl8k_cmd_set_mac_addr {
2752 struct mwl8k_cmd_pkt header;
2756 __u8 mac_addr[ETH_ALEN];
2758 __u8 mac_addr[ETH_ALEN];
2760 } __attribute__((packed));
2762 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2763 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2765 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2766 struct ieee80211_vif *vif, u8 *mac)
2768 struct mwl8k_priv *priv = hw->priv;
2769 struct mwl8k_cmd_set_mac_addr *cmd;
2772 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2776 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2777 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2779 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2780 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2782 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2785 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2792 * CMD_SET_RATEADAPT_MODE.
2794 struct mwl8k_cmd_set_rate_adapt_mode {
2795 struct mwl8k_cmd_pkt header;
2798 } __attribute__((packed));
2800 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2802 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2805 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2809 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2810 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2811 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2812 cmd->mode = cpu_to_le16(mode);
2814 rc = mwl8k_post_cmd(hw, &cmd->header);
2823 struct mwl8k_cmd_bss_start {
2824 struct mwl8k_cmd_pkt header;
2826 } __attribute__((packed));
2828 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2829 struct ieee80211_vif *vif, int enable)
2831 struct mwl8k_cmd_bss_start *cmd;
2834 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2838 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2839 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2840 cmd->enable = cpu_to_le32(enable);
2842 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2851 struct mwl8k_cmd_set_new_stn {
2852 struct mwl8k_cmd_pkt header;
2858 __le32 legacy_rates;
2861 __le16 ht_capabilities_info;
2862 __u8 mac_ht_param_info;
2864 __u8 control_channel;
2871 } __attribute__((packed));
2873 #define MWL8K_STA_ACTION_ADD 0
2874 #define MWL8K_STA_ACTION_REMOVE 2
2876 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2877 struct ieee80211_vif *vif,
2878 struct ieee80211_sta *sta)
2880 struct mwl8k_cmd_set_new_stn *cmd;
2884 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2888 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2889 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2890 cmd->aid = cpu_to_le16(sta->aid);
2891 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2892 cmd->stn_id = cpu_to_le16(sta->aid);
2893 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2894 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2895 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2897 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2898 cmd->legacy_rates = cpu_to_le32(rates);
2899 if (sta->ht_cap.ht_supported) {
2900 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2901 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2902 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2903 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2904 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2905 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2906 ((sta->ht_cap.ampdu_density & 7) << 2);
2907 cmd->is_qos_sta = 1;
2910 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2916 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2917 struct ieee80211_vif *vif)
2919 struct mwl8k_cmd_set_new_stn *cmd;
2922 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2926 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2927 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2928 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2930 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2936 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2937 struct ieee80211_vif *vif, u8 *addr)
2939 struct mwl8k_cmd_set_new_stn *cmd;
2942 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2946 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2947 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2948 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2949 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2951 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2960 struct ewc_ht_info {
2964 } __attribute__((packed));
2966 struct peer_capability_info {
2967 /* Peer type - AP vs. STA. */
2970 /* Basic 802.11 capabilities from assoc resp. */
2973 /* Set if peer supports 802.11n high throughput (HT). */
2976 /* Valid if HT is supported. */
2978 __u8 extended_ht_caps;
2979 struct ewc_ht_info ewc_info;
2981 /* Legacy rate table. Intersection of our rates and peer rates. */
2982 __u8 legacy_rates[12];
2984 /* HT rate table. Intersection of our rates and peer rates. */
2988 /* If set, interoperability mode, no proprietary extensions. */
2992 __le16 amsdu_enabled;
2993 } __attribute__((packed));
2995 struct mwl8k_cmd_update_stadb {
2996 struct mwl8k_cmd_pkt header;
2998 /* See STADB_ACTION_TYPE */
3001 /* Peer MAC address */
3002 __u8 peer_addr[ETH_ALEN];
3006 /* Peer info - valid during add/update. */
3007 struct peer_capability_info peer_info;
3008 } __attribute__((packed));
3010 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3011 #define MWL8K_STA_DB_DEL_ENTRY 2
3013 /* Peer Entry flags - used to define the type of the peer node */
3014 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3016 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3017 struct ieee80211_vif *vif,
3018 struct ieee80211_sta *sta)
3020 struct mwl8k_cmd_update_stadb *cmd;
3021 struct peer_capability_info *p;
3025 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3029 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3030 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3031 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3032 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3034 p = &cmd->peer_info;
3035 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3036 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3037 p->ht_support = sta->ht_cap.ht_supported;
3038 p->ht_caps = sta->ht_cap.cap;
3039 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3040 ((sta->ht_cap.ampdu_density & 7) << 2);
3041 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3042 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3044 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3045 legacy_rate_mask_to_array(p->legacy_rates, rates);
3046 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3048 p->amsdu_enabled = 0;
3050 rc = mwl8k_post_cmd(hw, &cmd->header);
3053 return rc ? rc : p->station_id;
3056 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3057 struct ieee80211_vif *vif, u8 *addr)
3059 struct mwl8k_cmd_update_stadb *cmd;
3062 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3066 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3067 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3068 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3069 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3071 rc = mwl8k_post_cmd(hw, &cmd->header);
3079 * Interrupt handling.
3081 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3083 struct ieee80211_hw *hw = dev_id;
3084 struct mwl8k_priv *priv = hw->priv;
3087 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3091 if (status & MWL8K_A2H_INT_TX_DONE) {
3092 status &= ~MWL8K_A2H_INT_TX_DONE;
3093 tasklet_schedule(&priv->poll_tx_task);
3096 if (status & MWL8K_A2H_INT_RX_READY) {
3097 status &= ~MWL8K_A2H_INT_RX_READY;
3098 tasklet_schedule(&priv->poll_rx_task);
3102 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3104 if (status & MWL8K_A2H_INT_OPC_DONE) {
3105 if (priv->hostcmd_wait != NULL)
3106 complete(priv->hostcmd_wait);
3109 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3110 if (!mutex_is_locked(&priv->fw_mutex) &&
3111 priv->radio_on && priv->pending_tx_pkts)
3112 mwl8k_tx_start(priv);
3118 static void mwl8k_tx_poll(unsigned long data)
3120 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3121 struct mwl8k_priv *priv = hw->priv;
3127 spin_lock_bh(&priv->tx_lock);
3129 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3130 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3132 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3133 complete(priv->tx_wait);
3134 priv->tx_wait = NULL;
3137 spin_unlock_bh(&priv->tx_lock);
3140 writel(~MWL8K_A2H_INT_TX_DONE,
3141 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3143 tasklet_schedule(&priv->poll_tx_task);
3147 static void mwl8k_rx_poll(unsigned long data)
3149 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3150 struct mwl8k_priv *priv = hw->priv;
3154 limit -= rxq_process(hw, 0, limit);
3155 limit -= rxq_refill(hw, 0, limit);
3158 writel(~MWL8K_A2H_INT_RX_READY,
3159 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3161 tasklet_schedule(&priv->poll_rx_task);
3167 * Core driver operations.
3169 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3171 struct mwl8k_priv *priv = hw->priv;
3172 int index = skb_get_queue_mapping(skb);
3175 if (!priv->radio_on) {
3176 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3177 "disabled\n", wiphy_name(hw->wiphy));
3179 return NETDEV_TX_OK;
3182 rc = mwl8k_txq_xmit(hw, index, skb);
3187 static int mwl8k_start(struct ieee80211_hw *hw)
3189 struct mwl8k_priv *priv = hw->priv;
3192 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3193 IRQF_SHARED, MWL8K_NAME, hw);
3195 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3196 wiphy_name(hw->wiphy));
3200 /* Enable TX reclaim and RX tasklets. */
3201 tasklet_enable(&priv->poll_tx_task);
3202 tasklet_enable(&priv->poll_rx_task);
3204 /* Enable interrupts */
3205 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3207 rc = mwl8k_fw_lock(hw);
3209 rc = mwl8k_cmd_radio_enable(hw);
3213 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3216 rc = mwl8k_cmd_set_pre_scan(hw);
3219 rc = mwl8k_cmd_set_post_scan(hw,
3220 "\x00\x00\x00\x00\x00\x00");
3224 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3227 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3229 mwl8k_fw_unlock(hw);
3233 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3234 free_irq(priv->pdev->irq, hw);
3235 tasklet_disable(&priv->poll_tx_task);
3236 tasklet_disable(&priv->poll_rx_task);
3242 static void mwl8k_stop(struct ieee80211_hw *hw)
3244 struct mwl8k_priv *priv = hw->priv;
3247 mwl8k_cmd_radio_disable(hw);
3249 ieee80211_stop_queues(hw);
3251 /* Disable interrupts */
3252 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3253 free_irq(priv->pdev->irq, hw);
3255 /* Stop finalize join worker */
3256 cancel_work_sync(&priv->finalize_join_worker);
3257 if (priv->beacon_skb != NULL)
3258 dev_kfree_skb(priv->beacon_skb);
3260 /* Stop TX reclaim and RX tasklets. */
3261 tasklet_disable(&priv->poll_tx_task);
3262 tasklet_disable(&priv->poll_rx_task);
3264 /* Return all skbs to mac80211 */
3265 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3266 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3269 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3270 struct ieee80211_vif *vif)
3272 struct mwl8k_priv *priv = hw->priv;
3273 struct mwl8k_vif *mwl8k_vif;
3276 * We only support one active interface at a time.
3278 if (!list_empty(&priv->vif_list))
3282 * Reject interface creation if sniffer mode is active, as
3283 * STA operation is mutually exclusive with hardware sniffer
3284 * mode. (Sniffer mode is only used on STA firmware.)
3286 if (priv->sniffer_enabled) {
3287 printk(KERN_INFO "%s: unable to create STA "
3288 "interface due to sniffer mode being enabled\n",
3289 wiphy_name(hw->wiphy));
3293 /* Setup driver private area. */
3294 mwl8k_vif = MWL8K_VIF(vif);
3295 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3296 mwl8k_vif->vif = vif;
3297 mwl8k_vif->macid = 0;
3298 mwl8k_vif->seqno = 0;
3300 /* Set the mac address. */
3301 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3304 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3306 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3311 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3312 struct ieee80211_vif *vif)
3314 struct mwl8k_priv *priv = hw->priv;
3315 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3318 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3320 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3322 list_del(&mwl8k_vif->list);
3325 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3327 struct ieee80211_conf *conf = &hw->conf;
3328 struct mwl8k_priv *priv = hw->priv;
3331 if (conf->flags & IEEE80211_CONF_IDLE) {
3332 mwl8k_cmd_radio_disable(hw);
3336 rc = mwl8k_fw_lock(hw);
3340 rc = mwl8k_cmd_radio_enable(hw);
3344 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3348 if (conf->power_level > 18)
3349 conf->power_level = 18;
3350 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3355 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3357 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3359 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3363 mwl8k_fw_unlock(hw);
3369 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3370 struct ieee80211_bss_conf *info, u32 changed)
3372 struct mwl8k_priv *priv = hw->priv;
3373 u32 ap_legacy_rates;
3374 u8 ap_mcs_rates[16];
3377 if (mwl8k_fw_lock(hw))
3381 * No need to capture a beacon if we're no longer associated.
3383 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3384 priv->capture_beacon = false;
3387 * Get the AP's legacy and MCS rates.
3389 if (vif->bss_conf.assoc) {
3390 struct ieee80211_sta *ap;
3394 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3400 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3401 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3404 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3406 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3411 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3412 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3416 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3421 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3422 rc = mwl8k_set_radio_preamble(hw,
3423 vif->bss_conf.use_short_preamble);
3428 if (changed & BSS_CHANGED_ERP_SLOT) {
3429 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3434 if (vif->bss_conf.assoc &&
3435 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3437 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3442 if (vif->bss_conf.assoc &&
3443 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3445 * Finalize the join. Tell rx handler to process
3446 * next beacon from our BSSID.
3448 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3449 priv->capture_beacon = true;
3453 mwl8k_fw_unlock(hw);
3457 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3458 struct ieee80211_bss_conf *info, u32 changed)
3462 if (mwl8k_fw_lock(hw))
3465 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3466 rc = mwl8k_set_radio_preamble(hw,
3467 vif->bss_conf.use_short_preamble);
3472 if (changed & BSS_CHANGED_BASIC_RATES) {
3477 * Use lowest supported basic rate for multicasts
3478 * and management frames (such as probe responses --
3479 * beacons will always go out at 1 Mb/s).
3481 idx = ffs(vif->bss_conf.basic_rates);
3485 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3486 rate = mwl8k_rates_24[idx].hw_value;
3488 rate = mwl8k_rates_50[idx].hw_value;
3490 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3493 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3494 struct sk_buff *skb;
3496 skb = ieee80211_beacon_get(hw, vif);
3498 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3503 if (changed & BSS_CHANGED_BEACON_ENABLED)
3504 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3507 mwl8k_fw_unlock(hw);
3511 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3512 struct ieee80211_bss_conf *info, u32 changed)
3514 struct mwl8k_priv *priv = hw->priv;
3517 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3519 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3522 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3523 int mc_count, struct dev_addr_list *mclist)
3525 struct mwl8k_cmd_pkt *cmd;
3528 * Synthesize and return a command packet that programs the
3529 * hardware multicast address filter. At this point we don't
3530 * know whether FIF_ALLMULTI is being requested, but if it is,
3531 * we'll end up throwing this packet away and creating a new
3532 * one in mwl8k_configure_filter().
3534 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3536 return (unsigned long)cmd;
3540 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3541 unsigned int changed_flags,
3542 unsigned int *total_flags)
3544 struct mwl8k_priv *priv = hw->priv;
3547 * Hardware sniffer mode is mutually exclusive with STA
3548 * operation, so refuse to enable sniffer mode if a STA
3549 * interface is active.
3551 if (!list_empty(&priv->vif_list)) {
3552 if (net_ratelimit())
3553 printk(KERN_INFO "%s: not enabling sniffer "
3554 "mode because STA interface is active\n",
3555 wiphy_name(hw->wiphy));
3559 if (!priv->sniffer_enabled) {
3560 if (mwl8k_cmd_enable_sniffer(hw, 1))
3562 priv->sniffer_enabled = true;
3565 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3566 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3572 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3574 if (!list_empty(&priv->vif_list))
3575 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3580 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3581 unsigned int changed_flags,
3582 unsigned int *total_flags,
3585 struct mwl8k_priv *priv = hw->priv;
3586 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3589 * AP firmware doesn't allow fine-grained control over
3590 * the receive filter.
3593 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3599 * Enable hardware sniffer mode if FIF_CONTROL or
3600 * FIF_OTHER_BSS is requested.
3602 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3603 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3608 /* Clear unsupported feature flags */
3609 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3611 if (mwl8k_fw_lock(hw)) {
3616 if (priv->sniffer_enabled) {
3617 mwl8k_cmd_enable_sniffer(hw, 0);
3618 priv->sniffer_enabled = false;
3621 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3622 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3624 * Disable the BSS filter.
3626 mwl8k_cmd_set_pre_scan(hw);
3628 struct mwl8k_vif *mwl8k_vif;
3632 * Enable the BSS filter.
3634 * If there is an active STA interface, use that
3635 * interface's BSSID, otherwise use a dummy one
3636 * (where the OUI part needs to be nonzero for
3637 * the BSSID to be accepted by POST_SCAN).
3639 mwl8k_vif = mwl8k_first_vif(priv);
3640 if (mwl8k_vif != NULL)
3641 bssid = mwl8k_vif->vif->bss_conf.bssid;
3643 bssid = "\x01\x00\x00\x00\x00\x00";
3645 mwl8k_cmd_set_post_scan(hw, bssid);
3650 * If FIF_ALLMULTI is being requested, throw away the command
3651 * packet that ->prepare_multicast() built and replace it with
3652 * a command packet that enables reception of all multicast
3655 if (*total_flags & FIF_ALLMULTI) {
3657 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3661 mwl8k_post_cmd(hw, cmd);
3665 mwl8k_fw_unlock(hw);
3668 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3670 return mwl8k_cmd_set_rts_threshold(hw, value);
3673 struct mwl8k_sta_notify_item
3675 struct list_head list;
3676 struct ieee80211_vif *vif;
3677 enum sta_notify_cmd cmd;
3678 struct ieee80211_sta sta;
3682 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3684 struct mwl8k_priv *priv = hw->priv;
3687 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3689 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3692 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3694 struct ieee80211_sta *sta;
3697 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3699 MWL8K_STA(sta)->peer_id = rc;
3702 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3703 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3704 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3705 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3706 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3707 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3711 static void mwl8k_sta_notify_worker(struct work_struct *work)
3713 struct mwl8k_priv *priv =
3714 container_of(work, struct mwl8k_priv, sta_notify_worker);
3715 struct ieee80211_hw *hw = priv->hw;
3717 spin_lock_bh(&priv->sta_notify_list_lock);
3718 while (!list_empty(&priv->sta_notify_list)) {
3719 struct mwl8k_sta_notify_item *s;
3721 s = list_entry(priv->sta_notify_list.next,
3722 struct mwl8k_sta_notify_item, list);
3725 spin_unlock_bh(&priv->sta_notify_list_lock);
3727 mwl8k_do_sta_notify(hw, s);
3730 spin_lock_bh(&priv->sta_notify_list_lock);
3732 spin_unlock_bh(&priv->sta_notify_list_lock);
3736 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3737 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3739 struct mwl8k_priv *priv = hw->priv;
3740 struct mwl8k_sta_notify_item *s;
3742 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3745 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3751 spin_lock(&priv->sta_notify_list_lock);
3752 list_add_tail(&s->list, &priv->sta_notify_list);
3753 spin_unlock(&priv->sta_notify_list_lock);
3755 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3759 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3760 const struct ieee80211_tx_queue_params *params)
3762 struct mwl8k_priv *priv = hw->priv;
3765 rc = mwl8k_fw_lock(hw);
3767 if (!priv->wmm_enabled)
3768 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3771 rc = mwl8k_cmd_set_edca_params(hw, queue,
3777 mwl8k_fw_unlock(hw);
3783 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3784 struct ieee80211_tx_queue_stats *stats)
3786 struct mwl8k_priv *priv = hw->priv;
3787 struct mwl8k_tx_queue *txq;
3790 spin_lock_bh(&priv->tx_lock);
3791 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3792 txq = priv->txq + index;
3793 memcpy(&stats[index], &txq->stats,
3794 sizeof(struct ieee80211_tx_queue_stats));
3796 spin_unlock_bh(&priv->tx_lock);
3801 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3802 struct ieee80211_low_level_stats *stats)
3804 return mwl8k_cmd_get_stat(hw, stats);
3808 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3809 enum ieee80211_ampdu_mlme_action action,
3810 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3813 case IEEE80211_AMPDU_RX_START:
3814 case IEEE80211_AMPDU_RX_STOP:
3815 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3823 static const struct ieee80211_ops mwl8k_ops = {
3825 .start = mwl8k_start,
3827 .add_interface = mwl8k_add_interface,
3828 .remove_interface = mwl8k_remove_interface,
3829 .config = mwl8k_config,
3830 .bss_info_changed = mwl8k_bss_info_changed,
3831 .prepare_multicast = mwl8k_prepare_multicast,
3832 .configure_filter = mwl8k_configure_filter,
3833 .set_rts_threshold = mwl8k_set_rts_threshold,
3834 .sta_notify = mwl8k_sta_notify,
3835 .conf_tx = mwl8k_conf_tx,
3836 .get_tx_stats = mwl8k_get_tx_stats,
3837 .get_stats = mwl8k_get_stats,
3838 .ampdu_action = mwl8k_ampdu_action,
3841 static void mwl8k_finalize_join_worker(struct work_struct *work)
3843 struct mwl8k_priv *priv =
3844 container_of(work, struct mwl8k_priv, finalize_join_worker);
3845 struct sk_buff *skb = priv->beacon_skb;
3846 struct mwl8k_vif *mwl8k_vif;
3848 mwl8k_vif = mwl8k_first_vif(priv);
3849 if (mwl8k_vif != NULL)
3850 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3851 mwl8k_vif->vif->bss_conf.dtim_period);
3854 priv->beacon_skb = NULL;
3863 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3865 .part_name = "88w8363",
3866 .helper_image = "mwl8k/helper_8363.fw",
3867 .fw_image = "mwl8k/fmimage_8363.fw",
3870 .part_name = "88w8687",
3871 .helper_image = "mwl8k/helper_8687.fw",
3872 .fw_image = "mwl8k/fmimage_8687.fw",
3875 .part_name = "88w8366",
3876 .helper_image = "mwl8k/helper_8366.fw",
3877 .fw_image = "mwl8k/fmimage_8366.fw",
3878 .ap_rxd_ops = &rxd_8366_ap_ops,
3882 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3883 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3884 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3885 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3886 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3887 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3889 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3890 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3891 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3892 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3893 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3894 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3895 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3898 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3900 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3901 const struct pci_device_id *id)
3903 static int printed_version = 0;
3904 struct ieee80211_hw *hw;
3905 struct mwl8k_priv *priv;
3909 if (!printed_version) {
3910 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3911 printed_version = 1;
3915 rc = pci_enable_device(pdev);
3917 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3922 rc = pci_request_regions(pdev, MWL8K_NAME);
3924 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3926 goto err_disable_device;
3929 pci_set_master(pdev);
3932 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3934 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3939 SET_IEEE80211_DEV(hw, &pdev->dev);
3940 pci_set_drvdata(pdev, hw);
3945 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3948 priv->sram = pci_iomap(pdev, 0, 0x10000);
3949 if (priv->sram == NULL) {
3950 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3951 wiphy_name(hw->wiphy));
3956 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3957 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3959 priv->regs = pci_iomap(pdev, 1, 0x10000);
3960 if (priv->regs == NULL) {
3961 priv->regs = pci_iomap(pdev, 2, 0x10000);
3962 if (priv->regs == NULL) {
3963 printk(KERN_ERR "%s: Cannot map device registers\n",
3964 wiphy_name(hw->wiphy));
3970 /* Reset firmware and hardware */
3971 mwl8k_hw_reset(priv);
3973 /* Ask userland hotplug daemon for the device firmware */
3974 rc = mwl8k_request_firmware(priv);
3976 printk(KERN_ERR "%s: Firmware files not found\n",
3977 wiphy_name(hw->wiphy));
3978 goto err_stop_firmware;
3981 /* Load firmware into hardware */
3982 rc = mwl8k_load_firmware(hw);
3984 printk(KERN_ERR "%s: Cannot start firmware\n",
3985 wiphy_name(hw->wiphy));
3986 goto err_stop_firmware;
3989 /* Reclaim memory once firmware is successfully loaded */
3990 mwl8k_release_firmware(priv);
3994 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3995 if (priv->rxd_ops == NULL) {
3996 printk(KERN_ERR "%s: Driver does not have AP "
3997 "firmware image support for this hardware\n",
3998 wiphy_name(hw->wiphy));
3999 goto err_stop_firmware;
4002 priv->rxd_ops = &rxd_sta_ops;
4005 priv->sniffer_enabled = false;
4006 priv->wmm_enabled = false;
4007 priv->pending_tx_pkts = 0;
4011 * Extra headroom is the size of the required DMA header
4012 * minus the size of the smallest 802.11 frame (CTS frame).
4014 hw->extra_tx_headroom =
4015 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
4017 hw->channel_change_time = 10;
4019 hw->queues = MWL8K_TX_QUEUES;
4021 /* Set rssi and noise values to dBm */
4022 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
4023 hw->vif_data_size = sizeof(struct mwl8k_vif);
4024 hw->sta_data_size = sizeof(struct mwl8k_sta);
4026 INIT_LIST_HEAD(&priv->vif_list);
4028 /* Set default radio state and preamble */
4030 priv->radio_short_preamble = 0;
4032 /* Station database handling */
4033 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
4034 spin_lock_init(&priv->sta_notify_list_lock);
4035 INIT_LIST_HEAD(&priv->sta_notify_list);
4037 /* Finalize join worker */
4038 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4040 /* TX reclaim and RX tasklets. */
4041 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4042 tasklet_disable(&priv->poll_tx_task);
4043 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4044 tasklet_disable(&priv->poll_rx_task);
4046 /* Power management cookie */
4047 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4048 if (priv->cookie == NULL)
4049 goto err_stop_firmware;
4051 rc = mwl8k_rxq_init(hw, 0);
4053 goto err_free_cookie;
4054 rxq_refill(hw, 0, INT_MAX);
4056 mutex_init(&priv->fw_mutex);
4057 priv->fw_mutex_owner = NULL;
4058 priv->fw_mutex_depth = 0;
4059 priv->hostcmd_wait = NULL;
4061 spin_lock_init(&priv->tx_lock);
4063 priv->tx_wait = NULL;
4065 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4066 rc = mwl8k_txq_init(hw, i);
4068 goto err_free_queues;
4071 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4072 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4073 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4074 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4075 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4077 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4078 IRQF_SHARED, MWL8K_NAME, hw);
4080 printk(KERN_ERR "%s: failed to register IRQ handler\n",
4081 wiphy_name(hw->wiphy));
4082 goto err_free_queues;
4086 * Temporarily enable interrupts. Initial firmware host
4087 * commands use interrupts and avoid polling. Disable
4088 * interrupts when done.
4090 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4092 /* Get config data, mac addrs etc */
4094 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4096 rc = mwl8k_cmd_set_hw_spec(hw);
4098 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
4100 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4102 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
4105 printk(KERN_ERR "%s: Cannot initialise firmware\n",
4106 wiphy_name(hw->wiphy));
4110 /* Turn radio off */
4111 rc = mwl8k_cmd_radio_disable(hw);
4113 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
4117 /* Clear MAC address */
4118 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4120 printk(KERN_ERR "%s: Cannot clear MAC address\n",
4121 wiphy_name(hw->wiphy));
4125 /* Disable interrupts */
4126 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4127 free_irq(priv->pdev->irq, hw);
4129 rc = ieee80211_register_hw(hw);
4131 printk(KERN_ERR "%s: Cannot register device\n",
4132 wiphy_name(hw->wiphy));
4133 goto err_free_queues;
4136 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
4137 wiphy_name(hw->wiphy), priv->device_info->part_name,
4138 priv->hw_rev, hw->wiphy->perm_addr,
4139 priv->ap_fw ? "AP" : "STA",
4140 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4141 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4146 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4147 free_irq(priv->pdev->irq, hw);
4150 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4151 mwl8k_txq_deinit(hw, i);
4152 mwl8k_rxq_deinit(hw, 0);
4155 if (priv->cookie != NULL)
4156 pci_free_consistent(priv->pdev, 4,
4157 priv->cookie, priv->cookie_dma);
4160 mwl8k_hw_reset(priv);
4161 mwl8k_release_firmware(priv);
4164 if (priv->regs != NULL)
4165 pci_iounmap(pdev, priv->regs);
4167 if (priv->sram != NULL)
4168 pci_iounmap(pdev, priv->sram);
4170 pci_set_drvdata(pdev, NULL);
4171 ieee80211_free_hw(hw);
4174 pci_release_regions(pdev);
4177 pci_disable_device(pdev);
4182 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4184 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4187 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4189 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4190 struct mwl8k_priv *priv;
4197 ieee80211_stop_queues(hw);
4199 ieee80211_unregister_hw(hw);
4201 /* Remove TX reclaim and RX tasklets. */
4202 tasklet_kill(&priv->poll_tx_task);
4203 tasklet_kill(&priv->poll_rx_task);
4206 mwl8k_hw_reset(priv);
4208 /* Return all skbs to mac80211 */
4209 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4210 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4212 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4213 mwl8k_txq_deinit(hw, i);
4215 mwl8k_rxq_deinit(hw, 0);
4217 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4219 pci_iounmap(pdev, priv->regs);
4220 pci_iounmap(pdev, priv->sram);
4221 pci_set_drvdata(pdev, NULL);
4222 ieee80211_free_hw(hw);
4223 pci_release_regions(pdev);
4224 pci_disable_device(pdev);
4227 static struct pci_driver mwl8k_driver = {
4229 .id_table = mwl8k_pci_id_table,
4230 .probe = mwl8k_probe,
4231 .remove = __devexit_p(mwl8k_remove),
4232 .shutdown = __devexit_p(mwl8k_shutdown),
4235 static int __init mwl8k_init(void)
4237 return pci_register_driver(&mwl8k_driver);
4240 static void __exit mwl8k_exit(void)
4242 pci_unregister_driver(&mwl8k_driver);
4245 module_init(mwl8k_init);
4246 module_exit(mwl8k_exit);
4248 MODULE_DESCRIPTION(MWL8K_DESC);
4249 MODULE_VERSION(MWL8K_VERSION);
4250 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4251 MODULE_LICENSE("GPL");