2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
145 /* firmware access */
146 struct mutex fw_mutex;
147 struct task_struct *fw_mutex_owner;
149 struct completion *hostcmd_wait;
151 /* lock held over TX and TX reap */
154 /* TX quiesce completion, protected by fw_mutex and tx_lock */
155 struct completion *tx_wait;
157 struct ieee80211_vif *vif;
159 struct ieee80211_channel *current_channel;
161 /* power management status cookie from firmware */
163 dma_addr_t cookie_dma;
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[14];
184 bool radio_short_preamble;
185 bool sniffer_enabled;
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
192 /* XXX need to convert this to handle multiple interfaces */
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
203 struct work_struct finalize_join_worker;
205 /* Tasklet to reclaim TX descriptors and buffers after tx */
206 struct tasklet_struct tx_reclaim_task;
209 /* Per interface specific private data */
211 /* Local MAC address. */
212 u8 mac_addr[ETH_ALEN];
214 /* Non AMPDU sequence number assigned by driver */
217 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
220 /* Index into station database. Returned by UPDATE_STADB. */
223 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
225 static const struct ieee80211_channel mwl8k_channels[] = {
226 { .center_freq = 2412, .hw_value = 1, },
227 { .center_freq = 2417, .hw_value = 2, },
228 { .center_freq = 2422, .hw_value = 3, },
229 { .center_freq = 2427, .hw_value = 4, },
230 { .center_freq = 2432, .hw_value = 5, },
231 { .center_freq = 2437, .hw_value = 6, },
232 { .center_freq = 2442, .hw_value = 7, },
233 { .center_freq = 2447, .hw_value = 8, },
234 { .center_freq = 2452, .hw_value = 9, },
235 { .center_freq = 2457, .hw_value = 10, },
236 { .center_freq = 2462, .hw_value = 11, },
237 { .center_freq = 2467, .hw_value = 12, },
238 { .center_freq = 2472, .hw_value = 13, },
239 { .center_freq = 2484, .hw_value = 14, },
242 static const struct ieee80211_rate mwl8k_rates[] = {
243 { .bitrate = 10, .hw_value = 2, },
244 { .bitrate = 20, .hw_value = 4, },
245 { .bitrate = 55, .hw_value = 11, },
246 { .bitrate = 110, .hw_value = 22, },
247 { .bitrate = 220, .hw_value = 44, },
248 { .bitrate = 60, .hw_value = 12, },
249 { .bitrate = 90, .hw_value = 18, },
250 { .bitrate = 120, .hw_value = 24, },
251 { .bitrate = 180, .hw_value = 36, },
252 { .bitrate = 240, .hw_value = 48, },
253 { .bitrate = 360, .hw_value = 72, },
254 { .bitrate = 480, .hw_value = 96, },
255 { .bitrate = 540, .hw_value = 108, },
256 { .bitrate = 720, .hw_value = 144, },
259 static const u8 mwl8k_rateids[12] = {
260 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108,
263 /* Set or get info from Firmware */
264 #define MWL8K_CMD_SET 0x0001
265 #define MWL8K_CMD_GET 0x0000
267 /* Firmware command codes */
268 #define MWL8K_CMD_CODE_DNLD 0x0001
269 #define MWL8K_CMD_GET_HW_SPEC 0x0003
270 #define MWL8K_CMD_SET_HW_SPEC 0x0004
271 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
272 #define MWL8K_CMD_GET_STAT 0x0014
273 #define MWL8K_CMD_RADIO_CONTROL 0x001c
274 #define MWL8K_CMD_RF_TX_POWER 0x001e
275 #define MWL8K_CMD_RF_ANTENNA 0x0020
276 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
277 #define MWL8K_CMD_SET_POST_SCAN 0x0108
278 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
279 #define MWL8K_CMD_SET_AID 0x010d
280 #define MWL8K_CMD_SET_RATE 0x0110
281 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
282 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
283 #define MWL8K_CMD_SET_SLOT 0x0114
284 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
285 #define MWL8K_CMD_SET_WMM_MODE 0x0123
286 #define MWL8K_CMD_MIMO_CONFIG 0x0125
287 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
288 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
289 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
290 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
291 #define MWL8K_CMD_UPDATE_STADB 0x1123
293 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
295 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
296 snprintf(buf, bufsize, "%s", #x);\
299 switch (cmd & ~0x8000) {
300 MWL8K_CMDNAME(CODE_DNLD);
301 MWL8K_CMDNAME(GET_HW_SPEC);
302 MWL8K_CMDNAME(SET_HW_SPEC);
303 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
304 MWL8K_CMDNAME(GET_STAT);
305 MWL8K_CMDNAME(RADIO_CONTROL);
306 MWL8K_CMDNAME(RF_TX_POWER);
307 MWL8K_CMDNAME(RF_ANTENNA);
308 MWL8K_CMDNAME(SET_PRE_SCAN);
309 MWL8K_CMDNAME(SET_POST_SCAN);
310 MWL8K_CMDNAME(SET_RF_CHANNEL);
311 MWL8K_CMDNAME(SET_AID);
312 MWL8K_CMDNAME(SET_RATE);
313 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
314 MWL8K_CMDNAME(RTS_THRESHOLD);
315 MWL8K_CMDNAME(SET_SLOT);
316 MWL8K_CMDNAME(SET_EDCA_PARAMS);
317 MWL8K_CMDNAME(SET_WMM_MODE);
318 MWL8K_CMDNAME(MIMO_CONFIG);
319 MWL8K_CMDNAME(USE_FIXED_RATE);
320 MWL8K_CMDNAME(ENABLE_SNIFFER);
321 MWL8K_CMDNAME(SET_MAC_ADDR);
322 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
323 MWL8K_CMDNAME(UPDATE_STADB);
325 snprintf(buf, bufsize, "0x%x", cmd);
332 /* Hardware and firmware reset */
333 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
335 iowrite32(MWL8K_H2A_INT_RESET,
336 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
337 iowrite32(MWL8K_H2A_INT_RESET,
338 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
342 /* Release fw image */
343 static void mwl8k_release_fw(struct firmware **fw)
347 release_firmware(*fw);
351 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
353 mwl8k_release_fw(&priv->fw_ucode);
354 mwl8k_release_fw(&priv->fw_helper);
357 /* Request fw image */
358 static int mwl8k_request_fw(struct mwl8k_priv *priv,
359 const char *fname, struct firmware **fw)
361 /* release current image */
363 mwl8k_release_fw(fw);
365 return request_firmware((const struct firmware **)fw,
366 fname, &priv->pdev->dev);
369 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
371 struct mwl8k_device_info *di = priv->device_info;
374 if (di->helper_image != NULL) {
375 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
377 printk(KERN_ERR "%s: Error requesting helper "
378 "firmware file %s\n", pci_name(priv->pdev),
384 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
386 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
387 pci_name(priv->pdev), di->fw_image);
388 mwl8k_release_fw(&priv->fw_helper);
395 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
396 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
398 struct mwl8k_cmd_pkt {
404 } __attribute__((packed));
410 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
412 void __iomem *regs = priv->regs;
416 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
417 if (pci_dma_mapping_error(priv->pdev, dma_addr))
420 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
421 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
422 iowrite32(MWL8K_H2A_INT_DOORBELL,
423 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
424 iowrite32(MWL8K_H2A_INT_DUMMY,
425 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
431 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
432 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
433 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
441 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
443 return loops ? 0 : -ETIMEDOUT;
446 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
447 const u8 *data, size_t length)
449 struct mwl8k_cmd_pkt *cmd;
453 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
457 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
463 int block_size = length > 256 ? 256 : length;
465 memcpy(cmd->payload, data + done, block_size);
466 cmd->length = cpu_to_le16(block_size);
468 rc = mwl8k_send_fw_load_cmd(priv, cmd,
469 sizeof(*cmd) + block_size);
474 length -= block_size;
479 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
487 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
488 const u8 *data, size_t length)
490 unsigned char *buffer;
491 int may_continue, rc = 0;
492 u32 done, prev_block_size;
494 buffer = kmalloc(1024, GFP_KERNEL);
501 while (may_continue > 0) {
504 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
505 if (block_size & 1) {
509 done += prev_block_size;
510 length -= prev_block_size;
513 if (block_size > 1024 || block_size > length) {
523 if (block_size == 0) {
530 prev_block_size = block_size;
531 memcpy(buffer, data + done, block_size);
533 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
538 if (!rc && length != 0)
546 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
548 struct mwl8k_priv *priv = hw->priv;
549 struct firmware *fw = priv->fw_ucode;
553 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
554 struct firmware *helper = priv->fw_helper;
556 if (helper == NULL) {
557 printk(KERN_ERR "%s: helper image needed but none "
558 "given\n", pci_name(priv->pdev));
562 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
564 printk(KERN_ERR "%s: unable to load firmware "
565 "helper image\n", pci_name(priv->pdev));
570 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
572 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
576 printk(KERN_ERR "%s: unable to load firmware image\n",
577 pci_name(priv->pdev));
581 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
587 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
588 if (ready_code == MWL8K_FWAP_READY) {
591 } else if (ready_code == MWL8K_FWSTA_READY) {
600 return loops ? 0 : -ETIMEDOUT;
604 /* DMA header used by firmware and hardware. */
605 struct mwl8k_dma_data {
607 struct ieee80211_hdr wh;
609 } __attribute__((packed));
611 /* Routines to add/remove DMA header from skb. */
612 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
614 struct mwl8k_dma_data *tr;
617 tr = (struct mwl8k_dma_data *)skb->data;
618 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
620 if (hdrlen != sizeof(tr->wh)) {
621 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
622 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
623 *((__le16 *)(tr->data - 2)) = qos;
625 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
629 if (hdrlen != sizeof(*tr))
630 skb_pull(skb, sizeof(*tr) - hdrlen);
633 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
635 struct ieee80211_hdr *wh;
637 struct mwl8k_dma_data *tr;
640 * Add a firmware DMA header; the firmware requires that we
641 * present a 2-byte payload length followed by a 4-address
642 * header (without QoS field), followed (optionally) by any
643 * WEP/ExtIV header (but only filled in for CCMP).
645 wh = (struct ieee80211_hdr *)skb->data;
647 hdrlen = ieee80211_hdrlen(wh->frame_control);
648 if (hdrlen != sizeof(*tr))
649 skb_push(skb, sizeof(*tr) - hdrlen);
651 if (ieee80211_is_data_qos(wh->frame_control))
654 tr = (struct mwl8k_dma_data *)skb->data;
656 memmove(&tr->wh, wh, hdrlen);
657 if (hdrlen != sizeof(tr->wh))
658 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
661 * Firmware length is the length of the fully formed "802.11
662 * payload". That is, everything except for the 802.11 header.
663 * This includes all crypto material including the MIC.
665 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
670 * Packet reception for 88w8366 AP firmware.
672 struct mwl8k_rxd_8366_ap {
676 __le32 pkt_phys_addr;
677 __le32 next_rxd_phys_addr;
681 __le32 hw_noise_floor_info;
688 } __attribute__((packed));
690 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
691 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
692 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
694 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
696 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
698 struct mwl8k_rxd_8366_ap *rxd = _rxd;
700 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
701 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
704 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
706 struct mwl8k_rxd_8366_ap *rxd = _rxd;
708 rxd->pkt_len = cpu_to_le16(len);
709 rxd->pkt_phys_addr = cpu_to_le32(addr);
715 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
718 struct mwl8k_rxd_8366_ap *rxd = _rxd;
720 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
724 memset(status, 0, sizeof(*status));
726 status->signal = -rxd->rssi;
727 status->noise = -rxd->noise_floor;
729 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
730 status->flag |= RX_FLAG_HT;
731 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
732 status->flag |= RX_FLAG_40MHZ;
733 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
737 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
738 if (mwl8k_rates[i].hw_value == rxd->rate) {
739 status->rate_idx = i;
745 status->band = IEEE80211_BAND_2GHZ;
746 status->freq = ieee80211_channel_to_frequency(rxd->channel);
748 *qos = rxd->qos_control;
750 return le16_to_cpu(rxd->pkt_len);
753 static struct rxd_ops rxd_8366_ap_ops = {
754 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
755 .rxd_init = mwl8k_rxd_8366_ap_init,
756 .rxd_refill = mwl8k_rxd_8366_ap_refill,
757 .rxd_process = mwl8k_rxd_8366_ap_process,
761 * Packet reception for STA firmware.
763 struct mwl8k_rxd_sta {
767 __le32 pkt_phys_addr;
768 __le32 next_rxd_phys_addr;
778 } __attribute__((packed));
780 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
781 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
782 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
783 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
784 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
785 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
787 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
789 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
791 struct mwl8k_rxd_sta *rxd = _rxd;
793 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
794 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
797 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
799 struct mwl8k_rxd_sta *rxd = _rxd;
801 rxd->pkt_len = cpu_to_le16(len);
802 rxd->pkt_phys_addr = cpu_to_le32(addr);
808 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
811 struct mwl8k_rxd_sta *rxd = _rxd;
814 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
818 rate_info = le16_to_cpu(rxd->rate_info);
820 memset(status, 0, sizeof(*status));
822 status->signal = -rxd->rssi;
823 status->noise = -rxd->noise_level;
824 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
825 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
827 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
828 status->flag |= RX_FLAG_SHORTPRE;
829 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
830 status->flag |= RX_FLAG_40MHZ;
831 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
832 status->flag |= RX_FLAG_SHORT_GI;
833 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
834 status->flag |= RX_FLAG_HT;
836 status->band = IEEE80211_BAND_2GHZ;
837 status->freq = ieee80211_channel_to_frequency(rxd->channel);
839 *qos = rxd->qos_control;
841 return le16_to_cpu(rxd->pkt_len);
844 static struct rxd_ops rxd_sta_ops = {
845 .rxd_size = sizeof(struct mwl8k_rxd_sta),
846 .rxd_init = mwl8k_rxd_sta_init,
847 .rxd_refill = mwl8k_rxd_sta_refill,
848 .rxd_process = mwl8k_rxd_sta_process,
852 #define MWL8K_RX_DESCS 256
853 #define MWL8K_RX_MAXSZ 3800
855 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
857 struct mwl8k_priv *priv = hw->priv;
858 struct mwl8k_rx_queue *rxq = priv->rxq + index;
866 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
868 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
869 if (rxq->rxd == NULL) {
870 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
871 wiphy_name(hw->wiphy));
874 memset(rxq->rxd, 0, size);
876 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
877 if (rxq->buf == NULL) {
878 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
879 wiphy_name(hw->wiphy));
880 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
883 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
885 for (i = 0; i < MWL8K_RX_DESCS; i++) {
889 dma_addr_t next_dma_addr;
891 desc_size = priv->rxd_ops->rxd_size;
892 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
895 if (nexti == MWL8K_RX_DESCS)
897 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
899 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
905 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
907 struct mwl8k_priv *priv = hw->priv;
908 struct mwl8k_rx_queue *rxq = priv->rxq + index;
912 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
918 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
922 addr = pci_map_single(priv->pdev, skb->data,
923 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
927 if (rxq->tail == MWL8K_RX_DESCS)
929 rxq->buf[rx].skb = skb;
930 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
932 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
933 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
941 /* Must be called only when the card's reception is completely halted */
942 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
944 struct mwl8k_priv *priv = hw->priv;
945 struct mwl8k_rx_queue *rxq = priv->rxq + index;
948 for (i = 0; i < MWL8K_RX_DESCS; i++) {
949 if (rxq->buf[i].skb != NULL) {
950 pci_unmap_single(priv->pdev,
951 pci_unmap_addr(&rxq->buf[i], dma),
952 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
953 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
955 kfree_skb(rxq->buf[i].skb);
956 rxq->buf[i].skb = NULL;
963 pci_free_consistent(priv->pdev,
964 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
965 rxq->rxd, rxq->rxd_dma);
971 * Scan a list of BSSIDs to process for finalize join.
972 * Allows for extension to process multiple BSSIDs.
975 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
977 return priv->capture_beacon &&
978 ieee80211_is_beacon(wh->frame_control) &&
979 !compare_ether_addr(wh->addr3, priv->capture_bssid);
982 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
985 struct mwl8k_priv *priv = hw->priv;
987 priv->capture_beacon = false;
988 memset(priv->capture_bssid, 0, ETH_ALEN);
991 * Use GFP_ATOMIC as rxq_process is called from
992 * the primary interrupt handler, memory allocation call
995 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
996 if (priv->beacon_skb != NULL)
997 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1000 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1002 struct mwl8k_priv *priv = hw->priv;
1003 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1007 while (rxq->rxd_count && limit--) {
1008 struct sk_buff *skb;
1011 struct ieee80211_rx_status status;
1014 skb = rxq->buf[rxq->head].skb;
1018 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1020 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1024 rxq->buf[rxq->head].skb = NULL;
1026 pci_unmap_single(priv->pdev,
1027 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1028 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1029 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1032 if (rxq->head == MWL8K_RX_DESCS)
1037 skb_put(skb, pkt_len);
1038 mwl8k_remove_dma_header(skb, qos);
1041 * Check for a pending join operation. Save a
1042 * copy of the beacon and schedule a tasklet to
1043 * send a FINALIZE_JOIN command to the firmware.
1045 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1046 mwl8k_save_beacon(hw, skb);
1048 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1049 ieee80211_rx_irqsafe(hw, skb);
1059 * Packet transmission.
1062 #define MWL8K_TXD_STATUS_OK 0x00000001
1063 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1064 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1065 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1066 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1068 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1069 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1070 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1071 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1072 #define MWL8K_QOS_EOSP 0x0010
1074 struct mwl8k_tx_desc {
1079 __le32 pkt_phys_addr;
1081 __u8 dest_MAC_addr[ETH_ALEN];
1082 __le32 next_txd_phys_addr;
1087 } __attribute__((packed));
1089 #define MWL8K_TX_DESCS 128
1091 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1093 struct mwl8k_priv *priv = hw->priv;
1094 struct mwl8k_tx_queue *txq = priv->txq + index;
1098 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1099 txq->stats.limit = MWL8K_TX_DESCS;
1103 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1105 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1106 if (txq->txd == NULL) {
1107 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1108 wiphy_name(hw->wiphy));
1111 memset(txq->txd, 0, size);
1113 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1114 if (txq->skb == NULL) {
1115 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1116 wiphy_name(hw->wiphy));
1117 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1120 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1122 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1123 struct mwl8k_tx_desc *tx_desc;
1126 tx_desc = txq->txd + i;
1127 nexti = (i + 1) % MWL8K_TX_DESCS;
1129 tx_desc->status = 0;
1130 tx_desc->next_txd_phys_addr =
1131 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1137 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1139 iowrite32(MWL8K_H2A_INT_PPA_READY,
1140 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1141 iowrite32(MWL8K_H2A_INT_DUMMY,
1142 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1143 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1146 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1148 struct mwl8k_priv *priv = hw->priv;
1151 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1152 struct mwl8k_tx_queue *txq = priv->txq + i;
1158 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1159 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1162 status = le32_to_cpu(tx_desc->status);
1163 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1168 if (tx_desc->pkt_len == 0)
1172 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1173 "fw_owned=%d drv_owned=%d unused=%d\n",
1174 wiphy_name(hw->wiphy), i,
1175 txq->stats.len, txq->head, txq->tail,
1176 fw_owned, drv_owned, unused);
1181 * Must be called with priv->fw_mutex held and tx queues stopped.
1183 #define MWL8K_TX_WAIT_TIMEOUT_MS 1000
1185 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1187 struct mwl8k_priv *priv = hw->priv;
1188 DECLARE_COMPLETION_ONSTACK(tx_wait);
1195 * The TX queues are stopped at this point, so this test
1196 * doesn't need to take ->tx_lock.
1198 if (!priv->pending_tx_pkts)
1204 spin_lock_bh(&priv->tx_lock);
1205 priv->tx_wait = &tx_wait;
1208 unsigned long timeout;
1210 oldcount = priv->pending_tx_pkts;
1212 spin_unlock_bh(&priv->tx_lock);
1213 timeout = wait_for_completion_timeout(&tx_wait,
1214 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1215 spin_lock_bh(&priv->tx_lock);
1218 WARN_ON(priv->pending_tx_pkts);
1220 printk(KERN_NOTICE "%s: tx rings drained\n",
1221 wiphy_name(hw->wiphy));
1226 if (priv->pending_tx_pkts < oldcount) {
1227 printk(KERN_NOTICE "%s: waiting for tx rings "
1228 "to drain (%d -> %d pkts)\n",
1229 wiphy_name(hw->wiphy), oldcount,
1230 priv->pending_tx_pkts);
1235 priv->tx_wait = NULL;
1237 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1238 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1239 mwl8k_dump_tx_rings(hw);
1243 spin_unlock_bh(&priv->tx_lock);
1248 #define MWL8K_TXD_SUCCESS(status) \
1249 ((status) & (MWL8K_TXD_STATUS_OK | \
1250 MWL8K_TXD_STATUS_OK_RETRY | \
1251 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1253 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1255 struct mwl8k_priv *priv = hw->priv;
1256 struct mwl8k_tx_queue *txq = priv->txq + index;
1259 while (txq->stats.len > 0) {
1261 struct mwl8k_tx_desc *tx_desc;
1264 struct sk_buff *skb;
1265 struct ieee80211_tx_info *info;
1269 tx_desc = txq->txd + tx;
1271 status = le32_to_cpu(tx_desc->status);
1273 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1277 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1280 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1281 BUG_ON(txq->stats.len == 0);
1283 priv->pending_tx_pkts--;
1285 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1286 size = le16_to_cpu(tx_desc->pkt_len);
1288 txq->skb[tx] = NULL;
1290 BUG_ON(skb == NULL);
1291 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1293 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1295 /* Mark descriptor as unused */
1296 tx_desc->pkt_phys_addr = 0;
1297 tx_desc->pkt_len = 0;
1299 info = IEEE80211_SKB_CB(skb);
1300 ieee80211_tx_info_clear_status(info);
1301 if (MWL8K_TXD_SUCCESS(status))
1302 info->flags |= IEEE80211_TX_STAT_ACK;
1304 ieee80211_tx_status_irqsafe(hw, skb);
1309 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1310 ieee80211_wake_queue(hw, index);
1313 /* must be called only when the card's transmit is completely halted */
1314 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1316 struct mwl8k_priv *priv = hw->priv;
1317 struct mwl8k_tx_queue *txq = priv->txq + index;
1319 mwl8k_txq_reclaim(hw, index, 1);
1324 pci_free_consistent(priv->pdev,
1325 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1326 txq->txd, txq->txd_dma);
1331 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1333 struct mwl8k_priv *priv = hw->priv;
1334 struct ieee80211_tx_info *tx_info;
1335 struct mwl8k_vif *mwl8k_vif;
1336 struct ieee80211_hdr *wh;
1337 struct mwl8k_tx_queue *txq;
1338 struct mwl8k_tx_desc *tx;
1344 wh = (struct ieee80211_hdr *)skb->data;
1345 if (ieee80211_is_data_qos(wh->frame_control))
1346 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1350 mwl8k_add_dma_header(skb);
1351 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1353 tx_info = IEEE80211_SKB_CB(skb);
1354 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1356 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1357 u16 seqno = mwl8k_vif->seqno;
1359 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1360 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1361 mwl8k_vif->seqno = seqno++ % 4096;
1364 /* Setup firmware control bit fields for each frame type. */
1367 if (ieee80211_is_mgmt(wh->frame_control) ||
1368 ieee80211_is_ctl(wh->frame_control)) {
1370 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1371 } else if (ieee80211_is_data(wh->frame_control)) {
1373 if (is_multicast_ether_addr(wh->addr1))
1374 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1376 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1377 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1378 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1380 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1383 dma = pci_map_single(priv->pdev, skb->data,
1384 skb->len, PCI_DMA_TODEVICE);
1386 if (pci_dma_mapping_error(priv->pdev, dma)) {
1387 printk(KERN_DEBUG "%s: failed to dma map skb, "
1388 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1390 return NETDEV_TX_OK;
1393 spin_lock_bh(&priv->tx_lock);
1395 txq = priv->txq + index;
1397 BUG_ON(txq->skb[txq->tail] != NULL);
1398 txq->skb[txq->tail] = skb;
1400 tx = txq->txd + txq->tail;
1401 tx->data_rate = txdatarate;
1402 tx->tx_priority = index;
1403 tx->qos_control = cpu_to_le16(qos);
1404 tx->pkt_phys_addr = cpu_to_le32(dma);
1405 tx->pkt_len = cpu_to_le16(skb->len);
1407 if (!priv->ap_fw && tx_info->control.sta != NULL)
1408 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1412 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1416 priv->pending_tx_pkts++;
1419 if (txq->tail == MWL8K_TX_DESCS)
1422 if (txq->head == txq->tail)
1423 ieee80211_stop_queue(hw, index);
1425 mwl8k_tx_start(priv);
1427 spin_unlock_bh(&priv->tx_lock);
1429 return NETDEV_TX_OK;
1436 * We have the following requirements for issuing firmware commands:
1437 * - Some commands require that the packet transmit path is idle when
1438 * the command is issued. (For simplicity, we'll just quiesce the
1439 * transmit path for every command.)
1440 * - There are certain sequences of commands that need to be issued to
1441 * the hardware sequentially, with no other intervening commands.
1443 * This leads to an implementation of a "firmware lock" as a mutex that
1444 * can be taken recursively, and which is taken by both the low-level
1445 * command submission function (mwl8k_post_cmd) as well as any users of
1446 * that function that require issuing of an atomic sequence of commands,
1447 * and quiesces the transmit path whenever it's taken.
1449 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1451 struct mwl8k_priv *priv = hw->priv;
1453 if (priv->fw_mutex_owner != current) {
1456 mutex_lock(&priv->fw_mutex);
1457 ieee80211_stop_queues(hw);
1459 rc = mwl8k_tx_wait_empty(hw);
1461 ieee80211_wake_queues(hw);
1462 mutex_unlock(&priv->fw_mutex);
1467 priv->fw_mutex_owner = current;
1470 priv->fw_mutex_depth++;
1475 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1477 struct mwl8k_priv *priv = hw->priv;
1479 if (!--priv->fw_mutex_depth) {
1480 ieee80211_wake_queues(hw);
1481 priv->fw_mutex_owner = NULL;
1482 mutex_unlock(&priv->fw_mutex);
1488 * Command processing.
1491 /* Timeout firmware commands after 10s */
1492 #define MWL8K_CMD_TIMEOUT_MS 10000
1494 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1496 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1497 struct mwl8k_priv *priv = hw->priv;
1498 void __iomem *regs = priv->regs;
1499 dma_addr_t dma_addr;
1500 unsigned int dma_size;
1502 unsigned long timeout = 0;
1505 cmd->result = 0xffff;
1506 dma_size = le16_to_cpu(cmd->length);
1507 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1508 PCI_DMA_BIDIRECTIONAL);
1509 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1512 rc = mwl8k_fw_lock(hw);
1514 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1515 PCI_DMA_BIDIRECTIONAL);
1519 priv->hostcmd_wait = &cmd_wait;
1520 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1521 iowrite32(MWL8K_H2A_INT_DOORBELL,
1522 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1523 iowrite32(MWL8K_H2A_INT_DUMMY,
1524 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1526 timeout = wait_for_completion_timeout(&cmd_wait,
1527 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1529 priv->hostcmd_wait = NULL;
1531 mwl8k_fw_unlock(hw);
1533 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1534 PCI_DMA_BIDIRECTIONAL);
1537 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1538 wiphy_name(hw->wiphy),
1539 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1540 MWL8K_CMD_TIMEOUT_MS);
1545 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1547 rc = cmd->result ? -EINVAL : 0;
1549 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1550 wiphy_name(hw->wiphy),
1551 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1552 le16_to_cpu(cmd->result));
1554 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1555 wiphy_name(hw->wiphy),
1556 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1564 * CMD_GET_HW_SPEC (STA version).
1566 struct mwl8k_cmd_get_hw_spec_sta {
1567 struct mwl8k_cmd_pkt header;
1569 __u8 host_interface;
1571 __u8 perm_addr[ETH_ALEN];
1576 __u8 mcs_bitmap[16];
1577 __le32 rx_queue_ptr;
1578 __le32 num_tx_queues;
1579 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1581 __le32 num_tx_desc_per_queue;
1583 } __attribute__((packed));
1585 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1587 struct mwl8k_priv *priv = hw->priv;
1588 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1592 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1596 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1597 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1599 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1600 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1601 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1602 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1603 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1604 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1605 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1606 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1608 rc = mwl8k_post_cmd(hw, &cmd->header);
1611 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1612 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1613 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1614 priv->hw_rev = cmd->hw_rev;
1622 * CMD_GET_HW_SPEC (AP version).
1624 struct mwl8k_cmd_get_hw_spec_ap {
1625 struct mwl8k_cmd_pkt header;
1627 __u8 host_interface;
1630 __u8 perm_addr[ETH_ALEN];
1641 } __attribute__((packed));
1643 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1645 struct mwl8k_priv *priv = hw->priv;
1646 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1649 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1653 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1654 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1656 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1657 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1659 rc = mwl8k_post_cmd(hw, &cmd->header);
1664 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1665 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1666 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1667 priv->hw_rev = cmd->hw_rev;
1669 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1670 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1672 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1673 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1675 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1676 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1678 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1679 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1681 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1682 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1684 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1685 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1695 struct mwl8k_cmd_set_hw_spec {
1696 struct mwl8k_cmd_pkt header;
1698 __u8 host_interface;
1700 __u8 perm_addr[ETH_ALEN];
1705 __le32 rx_queue_ptr;
1706 __le32 num_tx_queues;
1707 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1709 __le32 num_tx_desc_per_queue;
1711 } __attribute__((packed));
1713 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1715 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1717 struct mwl8k_priv *priv = hw->priv;
1718 struct mwl8k_cmd_set_hw_spec *cmd;
1722 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1726 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1727 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1729 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1730 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1731 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1732 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1733 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1734 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT);
1735 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1736 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1738 rc = mwl8k_post_cmd(hw, &cmd->header);
1745 * CMD_MAC_MULTICAST_ADR.
1747 struct mwl8k_cmd_mac_multicast_adr {
1748 struct mwl8k_cmd_pkt header;
1751 __u8 addr[0][ETH_ALEN];
1754 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1755 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1756 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1757 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1759 static struct mwl8k_cmd_pkt *
1760 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1761 int mc_count, struct dev_addr_list *mclist)
1763 struct mwl8k_priv *priv = hw->priv;
1764 struct mwl8k_cmd_mac_multicast_adr *cmd;
1767 if (allmulti || mc_count > priv->num_mcaddrs) {
1772 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1774 cmd = kzalloc(size, GFP_ATOMIC);
1778 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1779 cmd->header.length = cpu_to_le16(size);
1780 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1781 MWL8K_ENABLE_RX_BROADCAST);
1784 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1785 } else if (mc_count) {
1788 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1789 cmd->numaddr = cpu_to_le16(mc_count);
1790 for (i = 0; i < mc_count && mclist; i++) {
1791 if (mclist->da_addrlen != ETH_ALEN) {
1795 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1796 mclist = mclist->next;
1800 return &cmd->header;
1806 struct mwl8k_cmd_get_stat {
1807 struct mwl8k_cmd_pkt header;
1809 } __attribute__((packed));
1811 #define MWL8K_STAT_ACK_FAILURE 9
1812 #define MWL8K_STAT_RTS_FAILURE 12
1813 #define MWL8K_STAT_FCS_ERROR 24
1814 #define MWL8K_STAT_RTS_SUCCESS 11
1816 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1817 struct ieee80211_low_level_stats *stats)
1819 struct mwl8k_cmd_get_stat *cmd;
1822 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1826 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1827 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1829 rc = mwl8k_post_cmd(hw, &cmd->header);
1831 stats->dot11ACKFailureCount =
1832 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1833 stats->dot11RTSFailureCount =
1834 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1835 stats->dot11FCSErrorCount =
1836 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1837 stats->dot11RTSSuccessCount =
1838 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1846 * CMD_RADIO_CONTROL.
1848 struct mwl8k_cmd_radio_control {
1849 struct mwl8k_cmd_pkt header;
1853 } __attribute__((packed));
1856 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1858 struct mwl8k_priv *priv = hw->priv;
1859 struct mwl8k_cmd_radio_control *cmd;
1862 if (enable == priv->radio_on && !force)
1865 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1869 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1870 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1871 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1872 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1873 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1875 rc = mwl8k_post_cmd(hw, &cmd->header);
1879 priv->radio_on = enable;
1884 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1886 return mwl8k_cmd_radio_control(hw, 0, 0);
1889 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1891 return mwl8k_cmd_radio_control(hw, 1, 0);
1895 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1897 struct mwl8k_priv *priv = hw->priv;
1899 priv->radio_short_preamble = short_preamble;
1901 return mwl8k_cmd_radio_control(hw, 1, 1);
1907 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1909 struct mwl8k_cmd_rf_tx_power {
1910 struct mwl8k_cmd_pkt header;
1912 __le16 support_level;
1913 __le16 current_level;
1915 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1916 } __attribute__((packed));
1918 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1920 struct mwl8k_cmd_rf_tx_power *cmd;
1923 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1927 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1928 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1929 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1930 cmd->support_level = cpu_to_le16(dBm);
1932 rc = mwl8k_post_cmd(hw, &cmd->header);
1941 struct mwl8k_cmd_rf_antenna {
1942 struct mwl8k_cmd_pkt header;
1945 } __attribute__((packed));
1947 #define MWL8K_RF_ANTENNA_RX 1
1948 #define MWL8K_RF_ANTENNA_TX 2
1951 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
1953 struct mwl8k_cmd_rf_antenna *cmd;
1956 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1960 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
1961 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1962 cmd->antenna = cpu_to_le16(antenna);
1963 cmd->mode = cpu_to_le16(mask);
1965 rc = mwl8k_post_cmd(hw, &cmd->header);
1974 struct mwl8k_cmd_set_pre_scan {
1975 struct mwl8k_cmd_pkt header;
1976 } __attribute__((packed));
1978 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1980 struct mwl8k_cmd_set_pre_scan *cmd;
1983 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1987 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1988 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1990 rc = mwl8k_post_cmd(hw, &cmd->header);
1997 * CMD_SET_POST_SCAN.
1999 struct mwl8k_cmd_set_post_scan {
2000 struct mwl8k_cmd_pkt header;
2002 __u8 bssid[ETH_ALEN];
2003 } __attribute__((packed));
2006 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2008 struct mwl8k_cmd_set_post_scan *cmd;
2011 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2015 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2016 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2018 memcpy(cmd->bssid, mac, ETH_ALEN);
2020 rc = mwl8k_post_cmd(hw, &cmd->header);
2027 * CMD_SET_RF_CHANNEL.
2029 struct mwl8k_cmd_set_rf_channel {
2030 struct mwl8k_cmd_pkt header;
2032 __u8 current_channel;
2033 __le32 channel_flags;
2034 } __attribute__((packed));
2036 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2037 struct ieee80211_channel *channel)
2039 struct mwl8k_cmd_set_rf_channel *cmd;
2042 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2046 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2047 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2048 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2049 cmd->current_channel = channel->hw_value;
2050 if (channel->band == IEEE80211_BAND_2GHZ)
2051 cmd->channel_flags = cpu_to_le32(0x00000081);
2053 cmd->channel_flags = cpu_to_le32(0x00000000);
2055 rc = mwl8k_post_cmd(hw, &cmd->header);
2064 #define MWL8K_FRAME_PROT_DISABLED 0x00
2065 #define MWL8K_FRAME_PROT_11G 0x07
2066 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2067 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2069 struct mwl8k_cmd_update_set_aid {
2070 struct mwl8k_cmd_pkt header;
2073 /* AP's MAC address (BSSID) */
2074 __u8 bssid[ETH_ALEN];
2075 __le16 protection_mode;
2076 __u8 supp_rates[14];
2077 } __attribute__((packed));
2080 mwl8k_cmd_set_aid(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2082 struct mwl8k_cmd_update_set_aid *cmd;
2086 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2090 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2091 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2092 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2094 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2096 if (vif->bss_conf.use_cts_prot) {
2097 prot_mode = MWL8K_FRAME_PROT_11G;
2099 switch (vif->bss_conf.ht_operation_mode &
2100 IEEE80211_HT_OP_MODE_PROTECTION) {
2101 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2102 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2104 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2105 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2108 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2112 cmd->protection_mode = cpu_to_le16(prot_mode);
2114 memcpy(cmd->supp_rates, mwl8k_rateids, sizeof(mwl8k_rateids));
2116 rc = mwl8k_post_cmd(hw, &cmd->header);
2125 struct mwl8k_cmd_set_rate {
2126 struct mwl8k_cmd_pkt header;
2127 __u8 legacy_rates[14];
2129 /* Bitmap for supported MCS codes. */
2132 } __attribute__((packed));
2135 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2137 struct mwl8k_cmd_set_rate *cmd;
2140 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2144 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2145 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2146 memcpy(cmd->legacy_rates, mwl8k_rateids, sizeof(mwl8k_rateids));
2148 rc = mwl8k_post_cmd(hw, &cmd->header);
2155 * CMD_FINALIZE_JOIN.
2157 #define MWL8K_FJ_BEACON_MAXLEN 128
2159 struct mwl8k_cmd_finalize_join {
2160 struct mwl8k_cmd_pkt header;
2161 __le32 sleep_interval; /* Number of beacon periods to sleep */
2162 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2163 } __attribute__((packed));
2165 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2166 int framelen, int dtim)
2168 struct mwl8k_cmd_finalize_join *cmd;
2169 struct ieee80211_mgmt *payload = frame;
2173 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2177 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2178 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2179 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2181 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2182 if (payload_len < 0)
2184 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2185 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2187 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2189 rc = mwl8k_post_cmd(hw, &cmd->header);
2196 * CMD_SET_RTS_THRESHOLD.
2198 struct mwl8k_cmd_set_rts_threshold {
2199 struct mwl8k_cmd_pkt header;
2202 } __attribute__((packed));
2204 static int mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw,
2205 u16 action, u16 threshold)
2207 struct mwl8k_cmd_set_rts_threshold *cmd;
2210 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2214 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2215 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2216 cmd->action = cpu_to_le16(action);
2217 cmd->threshold = cpu_to_le16(threshold);
2219 rc = mwl8k_post_cmd(hw, &cmd->header);
2228 struct mwl8k_cmd_set_slot {
2229 struct mwl8k_cmd_pkt header;
2232 } __attribute__((packed));
2234 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2236 struct mwl8k_cmd_set_slot *cmd;
2239 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2243 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2244 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2245 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2246 cmd->short_slot = short_slot_time;
2248 rc = mwl8k_post_cmd(hw, &cmd->header);
2255 * CMD_SET_EDCA_PARAMS.
2257 struct mwl8k_cmd_set_edca_params {
2258 struct mwl8k_cmd_pkt header;
2260 /* See MWL8K_SET_EDCA_XXX below */
2263 /* TX opportunity in units of 32 us */
2268 /* Log exponent of max contention period: 0...15 */
2271 /* Log exponent of min contention period: 0...15 */
2274 /* Adaptive interframe spacing in units of 32us */
2277 /* TX queue to configure */
2281 /* Log exponent of max contention period: 0...15 */
2284 /* Log exponent of min contention period: 0...15 */
2287 /* Adaptive interframe spacing in units of 32us */
2290 /* TX queue to configure */
2294 } __attribute__((packed));
2296 #define MWL8K_SET_EDCA_CW 0x01
2297 #define MWL8K_SET_EDCA_TXOP 0x02
2298 #define MWL8K_SET_EDCA_AIFS 0x04
2300 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2301 MWL8K_SET_EDCA_TXOP | \
2302 MWL8K_SET_EDCA_AIFS)
2305 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2306 __u16 cw_min, __u16 cw_max,
2307 __u8 aifs, __u16 txop)
2309 struct mwl8k_priv *priv = hw->priv;
2310 struct mwl8k_cmd_set_edca_params *cmd;
2313 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2318 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2321 qnum ^= !(qnum >> 1);
2323 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2324 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2325 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2326 cmd->txop = cpu_to_le16(txop);
2328 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2329 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2330 cmd->ap.aifs = aifs;
2333 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2334 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2335 cmd->sta.aifs = aifs;
2336 cmd->sta.txq = qnum;
2339 rc = mwl8k_post_cmd(hw, &cmd->header);
2348 struct mwl8k_cmd_set_wmm_mode {
2349 struct mwl8k_cmd_pkt header;
2351 } __attribute__((packed));
2353 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2355 struct mwl8k_priv *priv = hw->priv;
2356 struct mwl8k_cmd_set_wmm_mode *cmd;
2359 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2363 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2364 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2365 cmd->action = cpu_to_le16(!!enable);
2367 rc = mwl8k_post_cmd(hw, &cmd->header);
2371 priv->wmm_enabled = enable;
2379 struct mwl8k_cmd_mimo_config {
2380 struct mwl8k_cmd_pkt header;
2382 __u8 rx_antenna_map;
2383 __u8 tx_antenna_map;
2384 } __attribute__((packed));
2386 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2388 struct mwl8k_cmd_mimo_config *cmd;
2391 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2395 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2396 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2397 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2398 cmd->rx_antenna_map = rx;
2399 cmd->tx_antenna_map = tx;
2401 rc = mwl8k_post_cmd(hw, &cmd->header);
2408 * CMD_USE_FIXED_RATE.
2410 #define MWL8K_RATE_TABLE_SIZE 8
2411 #define MWL8K_UCAST_RATE 0
2412 #define MWL8K_USE_AUTO_RATE 0x0002
2414 struct mwl8k_rate_entry {
2415 /* Set to 1 if HT rate, 0 if legacy. */
2418 /* Set to 1 to use retry_count field. */
2419 __le32 enable_retry;
2421 /* Specified legacy rate or MCS. */
2424 /* Number of allowed retries. */
2426 } __attribute__((packed));
2428 struct mwl8k_rate_table {
2429 /* 1 to allow specified rate and below */
2430 __le32 allow_rate_drop;
2432 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2433 } __attribute__((packed));
2435 struct mwl8k_cmd_use_fixed_rate {
2436 struct mwl8k_cmd_pkt header;
2438 struct mwl8k_rate_table rate_table;
2440 /* Unicast, Broadcast or Multicast */
2444 } __attribute__((packed));
2446 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2447 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2449 struct mwl8k_cmd_use_fixed_rate *cmd;
2453 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2457 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2458 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2460 cmd->action = cpu_to_le32(action);
2461 cmd->rate_type = cpu_to_le32(rate_type);
2463 if (rate_table != NULL) {
2465 * Copy over each field manually so that endian
2466 * conversion can be done.
2468 cmd->rate_table.allow_rate_drop =
2469 cpu_to_le32(rate_table->allow_rate_drop);
2470 cmd->rate_table.num_rates =
2471 cpu_to_le32(rate_table->num_rates);
2473 for (count = 0; count < rate_table->num_rates; count++) {
2474 struct mwl8k_rate_entry *dst =
2475 &cmd->rate_table.rate_entry[count];
2476 struct mwl8k_rate_entry *src =
2477 &rate_table->rate_entry[count];
2479 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2480 dst->enable_retry = cpu_to_le32(src->enable_retry);
2481 dst->rate = cpu_to_le32(src->rate);
2482 dst->retry_count = cpu_to_le32(src->retry_count);
2486 rc = mwl8k_post_cmd(hw, &cmd->header);
2493 * CMD_ENABLE_SNIFFER.
2495 struct mwl8k_cmd_enable_sniffer {
2496 struct mwl8k_cmd_pkt header;
2498 } __attribute__((packed));
2500 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2502 struct mwl8k_cmd_enable_sniffer *cmd;
2505 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2509 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2510 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2511 cmd->action = cpu_to_le32(!!enable);
2513 rc = mwl8k_post_cmd(hw, &cmd->header);
2522 struct mwl8k_cmd_set_mac_addr {
2523 struct mwl8k_cmd_pkt header;
2527 __u8 mac_addr[ETH_ALEN];
2529 __u8 mac_addr[ETH_ALEN];
2531 } __attribute__((packed));
2533 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2535 struct mwl8k_priv *priv = hw->priv;
2536 struct mwl8k_cmd_set_mac_addr *cmd;
2539 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2543 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2544 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2546 cmd->mbss.mac_type = 0;
2547 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2549 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2552 rc = mwl8k_post_cmd(hw, &cmd->header);
2559 * CMD_SET_RATEADAPT_MODE.
2561 struct mwl8k_cmd_set_rate_adapt_mode {
2562 struct mwl8k_cmd_pkt header;
2565 } __attribute__((packed));
2567 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2569 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2572 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2576 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2577 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2578 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2579 cmd->mode = cpu_to_le16(mode);
2581 rc = mwl8k_post_cmd(hw, &cmd->header);
2590 struct ewc_ht_info {
2594 } __attribute__((packed));
2596 struct peer_capability_info {
2597 /* Peer type - AP vs. STA. */
2600 /* Basic 802.11 capabilities from assoc resp. */
2603 /* Set if peer supports 802.11n high throughput (HT). */
2606 /* Valid if HT is supported. */
2608 __u8 extended_ht_caps;
2609 struct ewc_ht_info ewc_info;
2611 /* Legacy rate table. Intersection of our rates and peer rates. */
2612 __u8 legacy_rates[12];
2614 /* HT rate table. Intersection of our rates and peer rates. */
2618 /* If set, interoperability mode, no proprietary extensions. */
2622 __le16 amsdu_enabled;
2623 } __attribute__((packed));
2625 struct mwl8k_cmd_update_stadb {
2626 struct mwl8k_cmd_pkt header;
2628 /* See STADB_ACTION_TYPE */
2631 /* Peer MAC address */
2632 __u8 peer_addr[ETH_ALEN];
2636 /* Peer info - valid during add/update. */
2637 struct peer_capability_info peer_info;
2638 } __attribute__((packed));
2640 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2641 #define MWL8K_STA_DB_DEL_ENTRY 2
2643 /* Peer Entry flags - used to define the type of the peer node */
2644 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2646 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2647 struct ieee80211_vif *vif, u8 *addr)
2649 struct mwl8k_cmd_update_stadb *cmd;
2650 struct peer_capability_info *p;
2653 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2657 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2658 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2659 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2660 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2662 p = &cmd->peer_info;
2663 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2664 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2665 memcpy(p->legacy_rates, mwl8k_rateids, sizeof(mwl8k_rateids));
2667 p->amsdu_enabled = 0;
2669 rc = mwl8k_post_cmd(hw, &cmd->header);
2672 return rc ? rc : p->station_id;
2675 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2676 struct ieee80211_vif *vif, u8 *addr)
2678 struct mwl8k_cmd_update_stadb *cmd;
2681 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2685 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2686 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2687 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2688 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2690 rc = mwl8k_post_cmd(hw, &cmd->header);
2698 * Interrupt handling.
2700 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2702 struct ieee80211_hw *hw = dev_id;
2703 struct mwl8k_priv *priv = hw->priv;
2706 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2707 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2712 if (status & MWL8K_A2H_INT_TX_DONE)
2713 tasklet_schedule(&priv->tx_reclaim_task);
2715 if (status & MWL8K_A2H_INT_RX_READY) {
2716 while (rxq_process(hw, 0, 1))
2717 rxq_refill(hw, 0, 1);
2720 if (status & MWL8K_A2H_INT_OPC_DONE) {
2721 if (priv->hostcmd_wait != NULL)
2722 complete(priv->hostcmd_wait);
2725 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2726 if (!mutex_is_locked(&priv->fw_mutex) &&
2727 priv->radio_on && priv->pending_tx_pkts)
2728 mwl8k_tx_start(priv);
2736 * Core driver operations.
2738 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2740 struct mwl8k_priv *priv = hw->priv;
2741 int index = skb_get_queue_mapping(skb);
2744 if (priv->current_channel == NULL) {
2745 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2746 "disabled\n", wiphy_name(hw->wiphy));
2748 return NETDEV_TX_OK;
2751 rc = mwl8k_txq_xmit(hw, index, skb);
2756 static int mwl8k_start(struct ieee80211_hw *hw)
2758 struct mwl8k_priv *priv = hw->priv;
2761 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
2762 IRQF_SHARED, MWL8K_NAME, hw);
2764 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2765 wiphy_name(hw->wiphy));
2769 /* Enable tx reclaim tasklet */
2770 tasklet_enable(&priv->tx_reclaim_task);
2772 /* Enable interrupts */
2773 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2775 rc = mwl8k_fw_lock(hw);
2777 rc = mwl8k_cmd_radio_enable(hw);
2781 rc = mwl8k_cmd_enable_sniffer(hw, 0);
2784 rc = mwl8k_cmd_set_pre_scan(hw);
2787 rc = mwl8k_cmd_set_post_scan(hw,
2788 "\x00\x00\x00\x00\x00\x00");
2792 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
2795 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
2797 mwl8k_fw_unlock(hw);
2801 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2802 free_irq(priv->pdev->irq, hw);
2803 tasklet_disable(&priv->tx_reclaim_task);
2809 static void mwl8k_stop(struct ieee80211_hw *hw)
2811 struct mwl8k_priv *priv = hw->priv;
2814 mwl8k_cmd_radio_disable(hw);
2816 ieee80211_stop_queues(hw);
2818 /* Disable interrupts */
2819 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2820 free_irq(priv->pdev->irq, hw);
2822 /* Stop finalize join worker */
2823 cancel_work_sync(&priv->finalize_join_worker);
2824 if (priv->beacon_skb != NULL)
2825 dev_kfree_skb(priv->beacon_skb);
2827 /* Stop tx reclaim tasklet */
2828 tasklet_disable(&priv->tx_reclaim_task);
2830 /* Return all skbs to mac80211 */
2831 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2832 mwl8k_txq_reclaim(hw, i, 1);
2835 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2836 struct ieee80211_vif *vif)
2838 struct mwl8k_priv *priv = hw->priv;
2839 struct mwl8k_vif *mwl8k_vif;
2842 * We only support one active interface at a time.
2844 if (priv->vif != NULL)
2848 * We only support managed interfaces for now.
2850 if (vif->type != NL80211_IFTYPE_STATION)
2854 * Reject interface creation if sniffer mode is active, as
2855 * STA operation is mutually exclusive with hardware sniffer
2858 if (priv->sniffer_enabled) {
2859 printk(KERN_INFO "%s: unable to create STA "
2860 "interface due to sniffer mode being enabled\n",
2861 wiphy_name(hw->wiphy));
2865 /* Clean out driver private area */
2866 mwl8k_vif = MWL8K_VIF(vif);
2867 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2869 /* Set and save the mac address */
2870 mwl8k_cmd_set_mac_addr(hw, vif->addr);
2871 memcpy(mwl8k_vif->mac_addr, vif->addr, ETH_ALEN);
2873 /* Set Initial sequence number to zero */
2874 mwl8k_vif->seqno = 0;
2877 priv->current_channel = NULL;
2882 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2883 struct ieee80211_vif *vif)
2885 struct mwl8k_priv *priv = hw->priv;
2887 if (priv->vif == NULL)
2890 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2895 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2897 struct ieee80211_conf *conf = &hw->conf;
2898 struct mwl8k_priv *priv = hw->priv;
2901 if (conf->flags & IEEE80211_CONF_IDLE) {
2902 mwl8k_cmd_radio_disable(hw);
2903 priv->current_channel = NULL;
2907 rc = mwl8k_fw_lock(hw);
2911 rc = mwl8k_cmd_radio_enable(hw);
2915 rc = mwl8k_cmd_set_rf_channel(hw, conf->channel);
2919 priv->current_channel = conf->channel;
2921 if (conf->power_level > 18)
2922 conf->power_level = 18;
2923 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
2928 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
2930 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
2932 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
2936 mwl8k_fw_unlock(hw);
2941 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2942 struct ieee80211_vif *vif,
2943 struct ieee80211_bss_conf *info,
2946 struct mwl8k_priv *priv = hw->priv;
2949 if ((changed & BSS_CHANGED_ASSOC) == 0)
2952 priv->capture_beacon = false;
2954 rc = mwl8k_fw_lock(hw);
2958 if (vif->bss_conf.assoc) {
2960 rc = mwl8k_cmd_set_rate(hw, vif);
2964 /* Turn on rate adaptation */
2965 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2966 MWL8K_UCAST_RATE, NULL);
2970 /* Set radio preamble */
2971 rc = mwl8k_set_radio_preamble(hw,
2972 vif->bss_conf.use_short_preamble);
2977 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
2982 rc = mwl8k_cmd_set_aid(hw, vif);
2987 * Finalize the join. Tell rx handler to process
2988 * next beacon from our BSSID.
2990 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
2991 priv->capture_beacon = true;
2995 mwl8k_fw_unlock(hw);
2998 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
2999 int mc_count, struct dev_addr_list *mclist)
3001 struct mwl8k_cmd_pkt *cmd;
3004 * Synthesize and return a command packet that programs the
3005 * hardware multicast address filter. At this point we don't
3006 * know whether FIF_ALLMULTI is being requested, but if it is,
3007 * we'll end up throwing this packet away and creating a new
3008 * one in mwl8k_configure_filter().
3010 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3012 return (unsigned long)cmd;
3016 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3017 unsigned int changed_flags,
3018 unsigned int *total_flags)
3020 struct mwl8k_priv *priv = hw->priv;
3023 * Hardware sniffer mode is mutually exclusive with STA
3024 * operation, so refuse to enable sniffer mode if a STA
3025 * interface is active.
3027 if (priv->vif != NULL) {
3028 if (net_ratelimit())
3029 printk(KERN_INFO "%s: not enabling sniffer "
3030 "mode because STA interface is active\n",
3031 wiphy_name(hw->wiphy));
3035 if (!priv->sniffer_enabled) {
3036 if (mwl8k_cmd_enable_sniffer(hw, 1))
3038 priv->sniffer_enabled = true;
3041 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3042 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3048 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3049 unsigned int changed_flags,
3050 unsigned int *total_flags,
3053 struct mwl8k_priv *priv = hw->priv;
3054 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3057 * AP firmware doesn't allow fine-grained control over
3058 * the receive filter.
3061 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3067 * Enable hardware sniffer mode if FIF_CONTROL or
3068 * FIF_OTHER_BSS is requested.
3070 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3071 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3076 /* Clear unsupported feature flags */
3077 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3079 if (mwl8k_fw_lock(hw))
3082 if (priv->sniffer_enabled) {
3083 mwl8k_cmd_enable_sniffer(hw, 0);
3084 priv->sniffer_enabled = false;
3087 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3088 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3090 * Disable the BSS filter.
3092 mwl8k_cmd_set_pre_scan(hw);
3097 * Enable the BSS filter.
3099 * If there is an active STA interface, use that
3100 * interface's BSSID, otherwise use a dummy one
3101 * (where the OUI part needs to be nonzero for
3102 * the BSSID to be accepted by POST_SCAN).
3104 bssid = "\x01\x00\x00\x00\x00\x00";
3105 if (priv->vif != NULL)
3106 bssid = priv->vif->bss_conf.bssid;
3108 mwl8k_cmd_set_post_scan(hw, bssid);
3113 * If FIF_ALLMULTI is being requested, throw away the command
3114 * packet that ->prepare_multicast() built and replace it with
3115 * a command packet that enables reception of all multicast
3118 if (*total_flags & FIF_ALLMULTI) {
3120 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3124 mwl8k_post_cmd(hw, cmd);
3128 mwl8k_fw_unlock(hw);
3131 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3133 return mwl8k_cmd_set_rts_threshold(hw, MWL8K_CMD_SET, value);
3136 struct mwl8k_sta_notify_item
3138 struct list_head list;
3139 struct ieee80211_vif *vif;
3140 enum sta_notify_cmd cmd;
3144 static void mwl8k_sta_notify_worker(struct work_struct *work)
3146 struct mwl8k_priv *priv =
3147 container_of(work, struct mwl8k_priv, sta_notify_worker);
3148 struct ieee80211_hw *hw = priv->hw;
3150 spin_lock_bh(&priv->sta_notify_list_lock);
3151 while (!list_empty(&priv->sta_notify_list)) {
3152 struct mwl8k_sta_notify_item *s;
3154 s = list_entry(priv->sta_notify_list.next,
3155 struct mwl8k_sta_notify_item, list);
3158 spin_unlock_bh(&priv->sta_notify_list_lock);
3160 if (s->cmd == STA_NOTIFY_ADD) {
3163 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, s->addr);
3165 struct ieee80211_sta *sta;
3168 sta = ieee80211_find_sta(s->vif, s->addr);
3170 MWL8K_STA(sta)->peer_id = rc;
3174 mwl8k_cmd_update_stadb_del(hw, s->vif, s->addr);
3179 spin_lock_bh(&priv->sta_notify_list_lock);
3181 spin_unlock_bh(&priv->sta_notify_list_lock);
3185 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3186 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3188 struct mwl8k_priv *priv = hw->priv;
3189 struct mwl8k_sta_notify_item *s;
3191 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3194 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3198 memcpy(s->addr, sta->addr, ETH_ALEN);
3200 spin_lock(&priv->sta_notify_list_lock);
3201 list_add_tail(&s->list, &priv->sta_notify_list);
3202 spin_unlock(&priv->sta_notify_list_lock);
3204 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3208 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3209 const struct ieee80211_tx_queue_params *params)
3211 struct mwl8k_priv *priv = hw->priv;
3214 rc = mwl8k_fw_lock(hw);
3216 if (!priv->wmm_enabled)
3217 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3220 rc = mwl8k_cmd_set_edca_params(hw, queue,
3226 mwl8k_fw_unlock(hw);
3232 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3233 struct ieee80211_tx_queue_stats *stats)
3235 struct mwl8k_priv *priv = hw->priv;
3236 struct mwl8k_tx_queue *txq;
3239 spin_lock_bh(&priv->tx_lock);
3240 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3241 txq = priv->txq + index;
3242 memcpy(&stats[index], &txq->stats,
3243 sizeof(struct ieee80211_tx_queue_stats));
3245 spin_unlock_bh(&priv->tx_lock);
3250 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3251 struct ieee80211_low_level_stats *stats)
3253 return mwl8k_cmd_get_stat(hw, stats);
3256 static const struct ieee80211_ops mwl8k_ops = {
3258 .start = mwl8k_start,
3260 .add_interface = mwl8k_add_interface,
3261 .remove_interface = mwl8k_remove_interface,
3262 .config = mwl8k_config,
3263 .bss_info_changed = mwl8k_bss_info_changed,
3264 .prepare_multicast = mwl8k_prepare_multicast,
3265 .configure_filter = mwl8k_configure_filter,
3266 .set_rts_threshold = mwl8k_set_rts_threshold,
3267 .sta_notify = mwl8k_sta_notify,
3268 .conf_tx = mwl8k_conf_tx,
3269 .get_tx_stats = mwl8k_get_tx_stats,
3270 .get_stats = mwl8k_get_stats,
3273 static void mwl8k_tx_reclaim_handler(unsigned long data)
3276 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3277 struct mwl8k_priv *priv = hw->priv;
3279 spin_lock_bh(&priv->tx_lock);
3280 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3281 mwl8k_txq_reclaim(hw, i, 0);
3283 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
3284 complete(priv->tx_wait);
3285 priv->tx_wait = NULL;
3287 spin_unlock_bh(&priv->tx_lock);
3290 static void mwl8k_finalize_join_worker(struct work_struct *work)
3292 struct mwl8k_priv *priv =
3293 container_of(work, struct mwl8k_priv, finalize_join_worker);
3294 struct sk_buff *skb = priv->beacon_skb;
3296 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3297 priv->vif->bss_conf.dtim_period);
3300 priv->beacon_skb = NULL;
3308 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3310 .part_name = "88w8687",
3311 .helper_image = "mwl8k/helper_8687.fw",
3312 .fw_image = "mwl8k/fmimage_8687.fw",
3315 .part_name = "88w8366",
3316 .helper_image = "mwl8k/helper_8366.fw",
3317 .fw_image = "mwl8k/fmimage_8366.fw",
3318 .ap_rxd_ops = &rxd_8366_ap_ops,
3322 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3323 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3324 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3325 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3328 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3330 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3331 const struct pci_device_id *id)
3333 static int printed_version = 0;
3334 struct ieee80211_hw *hw;
3335 struct mwl8k_priv *priv;
3339 if (!printed_version) {
3340 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3341 printed_version = 1;
3345 rc = pci_enable_device(pdev);
3347 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3352 rc = pci_request_regions(pdev, MWL8K_NAME);
3354 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3356 goto err_disable_device;
3359 pci_set_master(pdev);
3362 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3364 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3369 SET_IEEE80211_DEV(hw, &pdev->dev);
3370 pci_set_drvdata(pdev, hw);
3375 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3378 priv->sram = pci_iomap(pdev, 0, 0x10000);
3379 if (priv->sram == NULL) {
3380 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3381 wiphy_name(hw->wiphy));
3386 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3387 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3389 priv->regs = pci_iomap(pdev, 1, 0x10000);
3390 if (priv->regs == NULL) {
3391 priv->regs = pci_iomap(pdev, 2, 0x10000);
3392 if (priv->regs == NULL) {
3393 printk(KERN_ERR "%s: Cannot map device registers\n",
3394 wiphy_name(hw->wiphy));
3400 /* Reset firmware and hardware */
3401 mwl8k_hw_reset(priv);
3403 /* Ask userland hotplug daemon for the device firmware */
3404 rc = mwl8k_request_firmware(priv);
3406 printk(KERN_ERR "%s: Firmware files not found\n",
3407 wiphy_name(hw->wiphy));
3408 goto err_stop_firmware;
3411 /* Load firmware into hardware */
3412 rc = mwl8k_load_firmware(hw);
3414 printk(KERN_ERR "%s: Cannot start firmware\n",
3415 wiphy_name(hw->wiphy));
3416 goto err_stop_firmware;
3419 /* Reclaim memory once firmware is successfully loaded */
3420 mwl8k_release_firmware(priv);
3424 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3425 if (priv->rxd_ops == NULL) {
3426 printk(KERN_ERR "%s: Driver does not have AP "
3427 "firmware image support for this hardware\n",
3428 wiphy_name(hw->wiphy));
3429 goto err_stop_firmware;
3432 priv->rxd_ops = &rxd_sta_ops;
3435 priv->sniffer_enabled = false;
3436 priv->wmm_enabled = false;
3437 priv->pending_tx_pkts = 0;
3440 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3441 priv->band.band = IEEE80211_BAND_2GHZ;
3442 priv->band.channels = priv->channels;
3443 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3444 priv->band.bitrates = priv->rates;
3445 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3446 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3448 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3449 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3452 * Extra headroom is the size of the required DMA header
3453 * minus the size of the smallest 802.11 frame (CTS frame).
3455 hw->extra_tx_headroom =
3456 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3458 hw->channel_change_time = 10;
3460 hw->queues = MWL8K_TX_QUEUES;
3462 /* Set rssi and noise values to dBm */
3463 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3464 hw->vif_data_size = sizeof(struct mwl8k_vif);
3465 hw->sta_data_size = sizeof(struct mwl8k_sta);
3468 /* Set default radio state and preamble */
3470 priv->radio_short_preamble = 0;
3472 /* Station database handling */
3473 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3474 spin_lock_init(&priv->sta_notify_list_lock);
3475 INIT_LIST_HEAD(&priv->sta_notify_list);
3477 /* Finalize join worker */
3478 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3480 /* TX reclaim tasklet */
3481 tasklet_init(&priv->tx_reclaim_task,
3482 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3483 tasklet_disable(&priv->tx_reclaim_task);
3485 /* Power management cookie */
3486 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3487 if (priv->cookie == NULL)
3488 goto err_stop_firmware;
3490 rc = mwl8k_rxq_init(hw, 0);
3492 goto err_free_cookie;
3493 rxq_refill(hw, 0, INT_MAX);
3495 mutex_init(&priv->fw_mutex);
3496 priv->fw_mutex_owner = NULL;
3497 priv->fw_mutex_depth = 0;
3498 priv->hostcmd_wait = NULL;
3500 spin_lock_init(&priv->tx_lock);
3502 priv->tx_wait = NULL;
3504 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3505 rc = mwl8k_txq_init(hw, i);
3507 goto err_free_queues;
3510 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3511 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3512 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3513 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3515 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3516 IRQF_SHARED, MWL8K_NAME, hw);
3518 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3519 wiphy_name(hw->wiphy));
3520 goto err_free_queues;
3524 * Temporarily enable interrupts. Initial firmware host
3525 * commands use interrupts and avoids polling. Disable
3526 * interrupts when done.
3528 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3530 /* Get config data, mac addrs etc */
3532 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3534 rc = mwl8k_cmd_set_hw_spec(hw);
3536 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3538 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3541 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3542 wiphy_name(hw->wiphy));
3546 /* Turn radio off */
3547 rc = mwl8k_cmd_radio_disable(hw);
3549 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3553 /* Clear MAC address */
3554 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3556 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3557 wiphy_name(hw->wiphy));
3561 /* Disable interrupts */
3562 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3563 free_irq(priv->pdev->irq, hw);
3565 rc = ieee80211_register_hw(hw);
3567 printk(KERN_ERR "%s: Cannot register device\n",
3568 wiphy_name(hw->wiphy));
3569 goto err_free_queues;
3572 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3573 wiphy_name(hw->wiphy), priv->device_info->part_name,
3574 priv->hw_rev, hw->wiphy->perm_addr,
3575 priv->ap_fw ? "AP" : "STA",
3576 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3577 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3582 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3583 free_irq(priv->pdev->irq, hw);
3586 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3587 mwl8k_txq_deinit(hw, i);
3588 mwl8k_rxq_deinit(hw, 0);
3591 if (priv->cookie != NULL)
3592 pci_free_consistent(priv->pdev, 4,
3593 priv->cookie, priv->cookie_dma);
3596 mwl8k_hw_reset(priv);
3597 mwl8k_release_firmware(priv);
3600 if (priv->regs != NULL)
3601 pci_iounmap(pdev, priv->regs);
3603 if (priv->sram != NULL)
3604 pci_iounmap(pdev, priv->sram);
3606 pci_set_drvdata(pdev, NULL);
3607 ieee80211_free_hw(hw);
3610 pci_release_regions(pdev);
3613 pci_disable_device(pdev);
3618 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3620 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3623 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3625 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3626 struct mwl8k_priv *priv;
3633 ieee80211_stop_queues(hw);
3635 ieee80211_unregister_hw(hw);
3637 /* Remove tx reclaim tasklet */
3638 tasklet_kill(&priv->tx_reclaim_task);
3641 mwl8k_hw_reset(priv);
3643 /* Return all skbs to mac80211 */
3644 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3645 mwl8k_txq_reclaim(hw, i, 1);
3647 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3648 mwl8k_txq_deinit(hw, i);
3650 mwl8k_rxq_deinit(hw, 0);
3652 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3654 pci_iounmap(pdev, priv->regs);
3655 pci_iounmap(pdev, priv->sram);
3656 pci_set_drvdata(pdev, NULL);
3657 ieee80211_free_hw(hw);
3658 pci_release_regions(pdev);
3659 pci_disable_device(pdev);
3662 static struct pci_driver mwl8k_driver = {
3664 .id_table = mwl8k_pci_id_table,
3665 .probe = mwl8k_probe,
3666 .remove = __devexit_p(mwl8k_remove),
3667 .shutdown = __devexit_p(mwl8k_shutdown),
3670 static int __init mwl8k_init(void)
3672 return pci_register_driver(&mwl8k_driver);
3675 static void __exit mwl8k_exit(void)
3677 pci_unregister_driver(&mwl8k_driver);
3680 module_init(mwl8k_init);
3681 module_exit(mwl8k_exit);
3683 MODULE_DESCRIPTION(MWL8K_DESC);
3684 MODULE_VERSION(MWL8K_VERSION);
3685 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3686 MODULE_LICENSE("GPL");