2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status);
90 struct mwl8k_device_info {
94 struct rxd_ops *rxd_ops;
97 struct mwl8k_rx_queue {
100 /* hw receives here */
103 /* refill descs here */
110 DECLARE_PCI_UNMAP_ADDR(dma)
114 struct mwl8k_tx_queue {
115 /* hw transmits here */
118 /* sw appends here */
121 struct ieee80211_tx_queue_stats stats;
122 struct mwl8k_tx_desc *txd;
124 struct sk_buff **skb;
127 /* Pointers to the firmware data and meta information about it. */
128 struct mwl8k_firmware {
129 /* Boot helper code */
130 struct firmware *helper;
133 struct firmware *ucode;
139 struct ieee80211_hw *hw;
141 struct pci_dev *pdev;
143 struct mwl8k_device_info *device_info;
145 struct rxd_ops *rxd_ops;
147 /* firmware files and meta data */
148 struct mwl8k_firmware fw;
150 /* firmware access */
151 struct mutex fw_mutex;
152 struct task_struct *fw_mutex_owner;
154 struct completion *hostcmd_wait;
156 /* lock held over TX and TX reap */
159 /* TX quiesce completion, protected by fw_mutex and tx_lock */
160 struct completion *tx_wait;
162 struct ieee80211_vif *vif;
164 struct ieee80211_channel *current_channel;
166 /* power management status cookie from firmware */
168 dma_addr_t cookie_dma;
175 * Running count of TX packets in flight, to avoid
176 * iterating over the transmit rings each time.
180 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
181 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
184 struct ieee80211_supported_band band;
185 struct ieee80211_channel channels[14];
186 struct ieee80211_rate rates[13];
189 bool radio_short_preamble;
190 bool sniffer_enabled;
193 /* XXX need to convert this to handle multiple interfaces */
195 u8 capture_bssid[ETH_ALEN];
196 struct sk_buff *beacon_skb;
199 * This FJ worker has to be global as it is scheduled from the
200 * RX handler. At this point we don't know which interface it
201 * belongs to until the list of bssids waiting to complete join
204 struct work_struct finalize_join_worker;
206 /* Tasklet to reclaim TX descriptors and buffers after tx */
207 struct tasklet_struct tx_reclaim_task;
210 /* Per interface specific private data */
212 /* backpointer to parent config block */
213 struct mwl8k_priv *priv;
215 /* BSS config of AP or IBSS from mac80211*/
216 struct ieee80211_bss_conf bss_info;
218 /* BSSID of AP or IBSS */
220 u8 mac_addr[ETH_ALEN];
223 * Subset of supported legacy rates.
224 * Intersection of AP and STA supported rates.
226 struct ieee80211_rate legacy_rates[13];
228 /* number of supported legacy rates */
231 /* Index into station database.Returned by update_sta_db call */
234 /* Non AMPDU sequence number assigned by driver */
238 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
240 static const struct ieee80211_channel mwl8k_channels[] = {
241 { .center_freq = 2412, .hw_value = 1, },
242 { .center_freq = 2417, .hw_value = 2, },
243 { .center_freq = 2422, .hw_value = 3, },
244 { .center_freq = 2427, .hw_value = 4, },
245 { .center_freq = 2432, .hw_value = 5, },
246 { .center_freq = 2437, .hw_value = 6, },
247 { .center_freq = 2442, .hw_value = 7, },
248 { .center_freq = 2447, .hw_value = 8, },
249 { .center_freq = 2452, .hw_value = 9, },
250 { .center_freq = 2457, .hw_value = 10, },
251 { .center_freq = 2462, .hw_value = 11, },
254 static const struct ieee80211_rate mwl8k_rates[] = {
255 { .bitrate = 10, .hw_value = 2, },
256 { .bitrate = 20, .hw_value = 4, },
257 { .bitrate = 55, .hw_value = 11, },
258 { .bitrate = 110, .hw_value = 22, },
259 { .bitrate = 220, .hw_value = 44, },
260 { .bitrate = 60, .hw_value = 12, },
261 { .bitrate = 90, .hw_value = 18, },
262 { .bitrate = 120, .hw_value = 24, },
263 { .bitrate = 180, .hw_value = 36, },
264 { .bitrate = 240, .hw_value = 48, },
265 { .bitrate = 360, .hw_value = 72, },
266 { .bitrate = 480, .hw_value = 96, },
267 { .bitrate = 540, .hw_value = 108, },
270 /* Set or get info from Firmware */
271 #define MWL8K_CMD_SET 0x0001
272 #define MWL8K_CMD_GET 0x0000
274 /* Firmware command codes */
275 #define MWL8K_CMD_CODE_DNLD 0x0001
276 #define MWL8K_CMD_GET_HW_SPEC 0x0003
277 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
278 #define MWL8K_CMD_GET_STAT 0x0014
279 #define MWL8K_CMD_RADIO_CONTROL 0x001c
280 #define MWL8K_CMD_RF_TX_POWER 0x001e
281 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
282 #define MWL8K_CMD_SET_POST_SCAN 0x0108
283 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
284 #define MWL8K_CMD_SET_AID 0x010d
285 #define MWL8K_CMD_SET_RATE 0x0110
286 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
287 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
288 #define MWL8K_CMD_SET_SLOT 0x0114
289 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
290 #define MWL8K_CMD_SET_WMM_MODE 0x0123
291 #define MWL8K_CMD_MIMO_CONFIG 0x0125
292 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
293 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
294 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
295 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
296 #define MWL8K_CMD_UPDATE_STADB 0x1123
298 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
300 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
301 snprintf(buf, bufsize, "%s", #x);\
304 switch (cmd & ~0x8000) {
305 MWL8K_CMDNAME(CODE_DNLD);
306 MWL8K_CMDNAME(GET_HW_SPEC);
307 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
308 MWL8K_CMDNAME(GET_STAT);
309 MWL8K_CMDNAME(RADIO_CONTROL);
310 MWL8K_CMDNAME(RF_TX_POWER);
311 MWL8K_CMDNAME(SET_PRE_SCAN);
312 MWL8K_CMDNAME(SET_POST_SCAN);
313 MWL8K_CMDNAME(SET_RF_CHANNEL);
314 MWL8K_CMDNAME(SET_AID);
315 MWL8K_CMDNAME(SET_RATE);
316 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
317 MWL8K_CMDNAME(RTS_THRESHOLD);
318 MWL8K_CMDNAME(SET_SLOT);
319 MWL8K_CMDNAME(SET_EDCA_PARAMS);
320 MWL8K_CMDNAME(SET_WMM_MODE);
321 MWL8K_CMDNAME(MIMO_CONFIG);
322 MWL8K_CMDNAME(USE_FIXED_RATE);
323 MWL8K_CMDNAME(ENABLE_SNIFFER);
324 MWL8K_CMDNAME(SET_MAC_ADDR);
325 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
326 MWL8K_CMDNAME(UPDATE_STADB);
328 snprintf(buf, bufsize, "0x%x", cmd);
335 /* Hardware and firmware reset */
336 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
338 iowrite32(MWL8K_H2A_INT_RESET,
339 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
340 iowrite32(MWL8K_H2A_INT_RESET,
341 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
345 /* Release fw image */
346 static void mwl8k_release_fw(struct firmware **fw)
350 release_firmware(*fw);
354 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
356 mwl8k_release_fw(&priv->fw.ucode);
357 mwl8k_release_fw(&priv->fw.helper);
360 /* Request fw image */
361 static int mwl8k_request_fw(struct mwl8k_priv *priv,
362 const char *fname, struct firmware **fw)
364 /* release current image */
366 mwl8k_release_fw(fw);
368 return request_firmware((const struct firmware **)fw,
369 fname, &priv->pdev->dev);
372 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
374 struct mwl8k_device_info *di = priv->device_info;
377 if (di->helper_image != NULL) {
378 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw.helper);
380 printk(KERN_ERR "%s: Error requesting helper "
381 "firmware file %s\n", pci_name(priv->pdev),
387 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw.ucode);
389 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
390 pci_name(priv->pdev), di->fw_image);
391 mwl8k_release_fw(&priv->fw.helper);
398 struct mwl8k_cmd_pkt {
404 } __attribute__((packed));
410 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
412 void __iomem *regs = priv->regs;
416 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
417 if (pci_dma_mapping_error(priv->pdev, dma_addr))
420 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
421 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
422 iowrite32(MWL8K_H2A_INT_DOORBELL,
423 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
424 iowrite32(MWL8K_H2A_INT_DUMMY,
425 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
431 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
432 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
433 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
441 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
443 return loops ? 0 : -ETIMEDOUT;
446 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
447 const u8 *data, size_t length)
449 struct mwl8k_cmd_pkt *cmd;
453 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
457 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
463 int block_size = length > 256 ? 256 : length;
465 memcpy(cmd->payload, data + done, block_size);
466 cmd->length = cpu_to_le16(block_size);
468 rc = mwl8k_send_fw_load_cmd(priv, cmd,
469 sizeof(*cmd) + block_size);
474 length -= block_size;
479 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
487 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
488 const u8 *data, size_t length)
490 unsigned char *buffer;
491 int may_continue, rc = 0;
492 u32 done, prev_block_size;
494 buffer = kmalloc(1024, GFP_KERNEL);
501 while (may_continue > 0) {
504 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
505 if (block_size & 1) {
509 done += prev_block_size;
510 length -= prev_block_size;
513 if (block_size > 1024 || block_size > length) {
523 if (block_size == 0) {
530 prev_block_size = block_size;
531 memcpy(buffer, data + done, block_size);
533 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
538 if (!rc && length != 0)
546 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
548 struct mwl8k_priv *priv = hw->priv;
549 struct firmware *fw = priv->fw.ucode;
550 struct mwl8k_device_info *di = priv->device_info;
554 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
555 struct firmware *helper = priv->fw.helper;
557 if (helper == NULL) {
558 printk(KERN_ERR "%s: helper image needed but none "
559 "given\n", pci_name(priv->pdev));
563 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
565 printk(KERN_ERR "%s: unable to load firmware "
566 "helper image\n", pci_name(priv->pdev));
571 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
573 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
577 printk(KERN_ERR "%s: unable to load firmware image\n",
578 pci_name(priv->pdev));
582 if (di->modes & BIT(NL80211_IFTYPE_AP))
583 iowrite32(MWL8K_MODE_AP, priv->regs + MWL8K_HIU_GEN_PTR);
585 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
592 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
593 if (ready_code == MWL8K_FWAP_READY) {
596 } else if (ready_code == MWL8K_FWSTA_READY) {
605 return loops ? 0 : -ETIMEDOUT;
610 * Defines shared between transmission and reception.
612 /* HT control fields for firmware */
617 } __attribute__((packed));
619 /* Firmware Station database operations */
620 #define MWL8K_STA_DB_ADD_ENTRY 0
621 #define MWL8K_STA_DB_MODIFY_ENTRY 1
622 #define MWL8K_STA_DB_DEL_ENTRY 2
623 #define MWL8K_STA_DB_FLUSH 3
625 /* Peer Entry flags - used to define the type of the peer node */
626 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
628 #define MWL8K_IEEE_LEGACY_DATA_RATES 13
629 #define MWL8K_MCS_BITMAP_SIZE 16
631 struct peer_capability_info {
632 /* Peer type - AP vs. STA. */
635 /* Basic 802.11 capabilities from assoc resp. */
638 /* Set if peer supports 802.11n high throughput (HT). */
641 /* Valid if HT is supported. */
643 __u8 extended_ht_caps;
644 struct ewc_ht_info ewc_info;
646 /* Legacy rate table. Intersection of our rates and peer rates. */
647 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
649 /* HT rate table. Intersection of our rates and peer rates. */
650 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
653 /* If set, interoperability mode, no proprietary extensions. */
657 __le16 amsdu_enabled;
658 } __attribute__((packed));
660 /* Inline functions to manipulate QoS field in data descriptor. */
661 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
663 u16 val_mask = 1 << 4;
665 /* End of Service Period Bit 4 */
666 return qos | val_mask;
669 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
673 u16 qos_mask = ~(val_mask << shift);
675 /* Ack Policy Bit 5-6 */
676 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
679 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
681 u16 val_mask = 1 << 7;
683 /* AMSDU present Bit 7 */
684 return qos | val_mask;
687 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
691 u16 qos_mask = ~(val_mask << shift);
693 /* Queue Length Bits 8-15 */
694 return (qos & qos_mask) | ((len & val_mask) << shift);
697 /* DMA header used by firmware and hardware. */
698 struct mwl8k_dma_data {
700 struct ieee80211_hdr wh;
701 } __attribute__((packed));
703 /* Routines to add/remove DMA header from skb. */
704 static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
706 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data;
707 void *dst, *src = &tr->wh;
708 int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
709 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
711 dst = (void *)tr + space;
713 memmove(dst, src, hdrlen);
714 skb_pull(skb, space);
718 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
720 struct ieee80211_hdr *wh;
722 struct mwl8k_dma_data *tr;
724 wh = (struct ieee80211_hdr *)skb->data;
725 hdrlen = ieee80211_hdrlen(wh->frame_control);
729 * Copy up/down the 802.11 header; the firmware requires
730 * we present a 2-byte payload length followed by a
731 * 4-address header (w/o QoS), followed (optionally) by
732 * any WEP/ExtIV header (but only filled in for CCMP).
734 if (hdrlen != sizeof(struct mwl8k_dma_data))
735 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
737 tr = (struct mwl8k_dma_data *)skb->data;
739 memmove(&tr->wh, wh, hdrlen);
742 memset(tr->wh.addr4, 0, ETH_ALEN);
745 * Firmware length is the length of the fully formed "802.11
746 * payload". That is, everything except for the 802.11 header.
747 * This includes all crypto material including the MIC.
749 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
756 struct mwl8k_rxd_8687 {
760 __le32 pkt_phys_addr;
761 __le32 next_rxd_phys_addr;
771 } __attribute__((packed));
773 #define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
774 #define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
775 #define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
776 #define MWL8K_8687_RATE_INFO_40MHZ 0x0004
777 #define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
778 #define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
780 #define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
782 static void mwl8k_rxd_8687_init(void *_rxd, dma_addr_t next_dma_addr)
784 struct mwl8k_rxd_8687 *rxd = _rxd;
786 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
787 rxd->rx_ctrl = MWL8K_8687_RX_CTRL_OWNED_BY_HOST;
790 static void mwl8k_rxd_8687_refill(void *_rxd, dma_addr_t addr, int len)
792 struct mwl8k_rxd_8687 *rxd = _rxd;
794 rxd->pkt_len = cpu_to_le16(len);
795 rxd->pkt_phys_addr = cpu_to_le32(addr);
801 mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status)
803 struct mwl8k_rxd_8687 *rxd = _rxd;
806 if (!(rxd->rx_ctrl & MWL8K_8687_RX_CTRL_OWNED_BY_HOST))
810 rate_info = le16_to_cpu(rxd->rate_info);
812 memset(status, 0, sizeof(*status));
814 status->signal = -rxd->rssi;
815 status->noise = -rxd->noise_level;
816 status->qual = rxd->link_quality;
817 status->antenna = MWL8K_8687_RATE_INFO_ANTSELECT(rate_info);
818 status->rate_idx = MWL8K_8687_RATE_INFO_RATEID(rate_info);
820 if (rate_info & MWL8K_8687_RATE_INFO_SHORTPRE)
821 status->flag |= RX_FLAG_SHORTPRE;
822 if (rate_info & MWL8K_8687_RATE_INFO_40MHZ)
823 status->flag |= RX_FLAG_40MHZ;
824 if (rate_info & MWL8K_8687_RATE_INFO_SHORTGI)
825 status->flag |= RX_FLAG_SHORT_GI;
826 if (rate_info & MWL8K_8687_RATE_INFO_MCS_FORMAT)
827 status->flag |= RX_FLAG_HT;
829 status->band = IEEE80211_BAND_2GHZ;
830 status->freq = ieee80211_channel_to_frequency(rxd->channel);
832 return le16_to_cpu(rxd->pkt_len);
835 static struct rxd_ops rxd_8687_ops = {
836 .rxd_size = sizeof(struct mwl8k_rxd_8687),
837 .rxd_init = mwl8k_rxd_8687_init,
838 .rxd_refill = mwl8k_rxd_8687_refill,
839 .rxd_process = mwl8k_rxd_8687_process,
843 #define MWL8K_RX_DESCS 256
844 #define MWL8K_RX_MAXSZ 3800
846 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
848 struct mwl8k_priv *priv = hw->priv;
849 struct mwl8k_rx_queue *rxq = priv->rxq + index;
857 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
859 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
860 if (rxq->rxd == NULL) {
861 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
862 wiphy_name(hw->wiphy));
865 memset(rxq->rxd, 0, size);
867 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
868 if (rxq->buf == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
870 wiphy_name(hw->wiphy));
871 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
874 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
876 for (i = 0; i < MWL8K_RX_DESCS; i++) {
880 dma_addr_t next_dma_addr;
882 desc_size = priv->rxd_ops->rxd_size;
883 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
886 if (nexti == MWL8K_RX_DESCS)
888 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
890 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
896 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
898 struct mwl8k_priv *priv = hw->priv;
899 struct mwl8k_rx_queue *rxq = priv->rxq + index;
903 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
909 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
913 addr = pci_map_single(priv->pdev, skb->data,
914 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
918 if (rxq->tail == MWL8K_RX_DESCS)
920 rxq->buf[rx].skb = skb;
921 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
923 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
924 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
932 /* Must be called only when the card's reception is completely halted */
933 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
935 struct mwl8k_priv *priv = hw->priv;
936 struct mwl8k_rx_queue *rxq = priv->rxq + index;
939 for (i = 0; i < MWL8K_RX_DESCS; i++) {
940 if (rxq->buf[i].skb != NULL) {
941 pci_unmap_single(priv->pdev,
942 pci_unmap_addr(&rxq->buf[i], dma),
943 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
944 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
946 kfree_skb(rxq->buf[i].skb);
947 rxq->buf[i].skb = NULL;
954 pci_free_consistent(priv->pdev,
955 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
956 rxq->rxd, rxq->rxd_dma);
962 * Scan a list of BSSIDs to process for finalize join.
963 * Allows for extension to process multiple BSSIDs.
966 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
968 return priv->capture_beacon &&
969 ieee80211_is_beacon(wh->frame_control) &&
970 !compare_ether_addr(wh->addr3, priv->capture_bssid);
973 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
976 struct mwl8k_priv *priv = hw->priv;
978 priv->capture_beacon = false;
979 memset(priv->capture_bssid, 0, ETH_ALEN);
982 * Use GFP_ATOMIC as rxq_process is called from
983 * the primary interrupt handler, memory allocation call
986 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
987 if (priv->beacon_skb != NULL)
988 ieee80211_queue_work(hw, &priv->finalize_join_worker);
991 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
993 struct mwl8k_priv *priv = hw->priv;
994 struct mwl8k_rx_queue *rxq = priv->rxq + index;
998 while (rxq->rxd_count && limit--) {
1002 struct ieee80211_rx_status status;
1004 skb = rxq->buf[rxq->head].skb;
1008 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1010 pkt_len = priv->rxd_ops->rxd_process(rxd, &status);
1014 rxq->buf[rxq->head].skb = NULL;
1016 pci_unmap_single(priv->pdev,
1017 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1018 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1019 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1022 if (rxq->head == MWL8K_RX_DESCS)
1027 skb_put(skb, pkt_len);
1028 mwl8k_remove_dma_header(skb);
1031 * Check for a pending join operation. Save a
1032 * copy of the beacon and schedule a tasklet to
1033 * send a FINALIZE_JOIN command to the firmware.
1035 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1036 mwl8k_save_beacon(hw, skb);
1038 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1039 ieee80211_rx_irqsafe(hw, skb);
1049 * Packet transmission.
1052 /* Transmit packet ACK policy */
1053 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1054 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1056 #define MWL8K_TXD_STATUS_OK 0x00000001
1057 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1058 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1059 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1060 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1062 struct mwl8k_tx_desc {
1067 __le32 pkt_phys_addr;
1069 __u8 dest_MAC_addr[ETH_ALEN];
1070 __le32 next_txd_phys_addr;
1075 } __attribute__((packed));
1077 #define MWL8K_TX_DESCS 128
1079 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1081 struct mwl8k_priv *priv = hw->priv;
1082 struct mwl8k_tx_queue *txq = priv->txq + index;
1086 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1087 txq->stats.limit = MWL8K_TX_DESCS;
1091 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1093 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1094 if (txq->txd == NULL) {
1095 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1096 wiphy_name(hw->wiphy));
1099 memset(txq->txd, 0, size);
1101 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1102 if (txq->skb == NULL) {
1103 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1104 wiphy_name(hw->wiphy));
1105 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1108 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1110 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1111 struct mwl8k_tx_desc *tx_desc;
1114 tx_desc = txq->txd + i;
1115 nexti = (i + 1) % MWL8K_TX_DESCS;
1117 tx_desc->status = 0;
1118 tx_desc->next_txd_phys_addr =
1119 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1125 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1127 iowrite32(MWL8K_H2A_INT_PPA_READY,
1128 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1129 iowrite32(MWL8K_H2A_INT_DUMMY,
1130 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1131 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1134 struct mwl8k_txq_info {
1143 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1144 struct mwl8k_txq_info *txinfo)
1146 int count, desc, status;
1147 struct mwl8k_tx_queue *txq;
1148 struct mwl8k_tx_desc *tx_desc;
1151 memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info));
1153 for (count = 0; count < MWL8K_TX_QUEUES; count++) {
1154 txq = priv->txq + count;
1155 txinfo[count].len = txq->stats.len;
1156 txinfo[count].head = txq->head;
1157 txinfo[count].tail = txq->tail;
1158 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1159 tx_desc = txq->txd + desc;
1160 status = le32_to_cpu(tx_desc->status);
1162 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1163 txinfo[count].fw_owned++;
1165 txinfo[count].drv_owned++;
1167 if (tx_desc->pkt_len == 0)
1168 txinfo[count].unused++;
1176 * Must be called with priv->fw_mutex held and tx queues stopped.
1178 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1180 struct mwl8k_priv *priv = hw->priv;
1181 DECLARE_COMPLETION_ONSTACK(tx_wait);
1183 unsigned long timeout;
1187 spin_lock_bh(&priv->tx_lock);
1188 count = priv->pending_tx_pkts;
1190 priv->tx_wait = &tx_wait;
1191 spin_unlock_bh(&priv->tx_lock);
1194 struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES];
1198 timeout = wait_for_completion_timeout(&tx_wait,
1199 msecs_to_jiffies(5000));
1203 spin_lock_bh(&priv->tx_lock);
1204 priv->tx_wait = NULL;
1205 newcount = priv->pending_tx_pkts;
1206 mwl8k_scan_tx_ring(priv, txinfo);
1207 spin_unlock_bh(&priv->tx_lock);
1209 printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1210 __func__, __LINE__, count, newcount);
1212 for (index = 0; index < MWL8K_TX_QUEUES; index++)
1213 printk(KERN_ERR "TXQ:%u L:%u H:%u T:%u FW:%u "
1219 txinfo[index].fw_owned,
1220 txinfo[index].drv_owned,
1221 txinfo[index].unused);
1229 #define MWL8K_TXD_SUCCESS(status) \
1230 ((status) & (MWL8K_TXD_STATUS_OK | \
1231 MWL8K_TXD_STATUS_OK_RETRY | \
1232 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1234 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1236 struct mwl8k_priv *priv = hw->priv;
1237 struct mwl8k_tx_queue *txq = priv->txq + index;
1240 while (txq->stats.len > 0) {
1242 struct mwl8k_tx_desc *tx_desc;
1245 struct sk_buff *skb;
1246 struct ieee80211_tx_info *info;
1250 tx_desc = txq->txd + tx;
1252 status = le32_to_cpu(tx_desc->status);
1254 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1258 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1261 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1262 BUG_ON(txq->stats.len == 0);
1264 priv->pending_tx_pkts--;
1266 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1267 size = le16_to_cpu(tx_desc->pkt_len);
1269 txq->skb[tx] = NULL;
1271 BUG_ON(skb == NULL);
1272 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1274 mwl8k_remove_dma_header(skb);
1276 /* Mark descriptor as unused */
1277 tx_desc->pkt_phys_addr = 0;
1278 tx_desc->pkt_len = 0;
1280 info = IEEE80211_SKB_CB(skb);
1281 ieee80211_tx_info_clear_status(info);
1282 if (MWL8K_TXD_SUCCESS(status))
1283 info->flags |= IEEE80211_TX_STAT_ACK;
1285 ieee80211_tx_status_irqsafe(hw, skb);
1290 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1291 ieee80211_wake_queue(hw, index);
1294 /* must be called only when the card's transmit is completely halted */
1295 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1297 struct mwl8k_priv *priv = hw->priv;
1298 struct mwl8k_tx_queue *txq = priv->txq + index;
1300 mwl8k_txq_reclaim(hw, index, 1);
1305 pci_free_consistent(priv->pdev,
1306 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1307 txq->txd, txq->txd_dma);
1312 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1314 struct mwl8k_priv *priv = hw->priv;
1315 struct ieee80211_tx_info *tx_info;
1316 struct mwl8k_vif *mwl8k_vif;
1317 struct ieee80211_hdr *wh;
1318 struct mwl8k_tx_queue *txq;
1319 struct mwl8k_tx_desc *tx;
1325 wh = (struct ieee80211_hdr *)skb->data;
1326 if (ieee80211_is_data_qos(wh->frame_control))
1327 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1331 mwl8k_add_dma_header(skb);
1332 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1334 tx_info = IEEE80211_SKB_CB(skb);
1335 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1337 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1338 u16 seqno = mwl8k_vif->seqno;
1340 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1341 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1342 mwl8k_vif->seqno = seqno++ % 4096;
1345 /* Setup firmware control bit fields for each frame type. */
1348 if (ieee80211_is_mgmt(wh->frame_control) ||
1349 ieee80211_is_ctl(wh->frame_control)) {
1351 qos = mwl8k_qos_setbit_eosp(qos);
1352 /* Set Queue size to unspecified */
1353 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1354 } else if (ieee80211_is_data(wh->frame_control)) {
1356 if (is_multicast_ether_addr(wh->addr1))
1357 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1359 /* Send pkt in an aggregate if AMPDU frame. */
1360 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1361 qos = mwl8k_qos_setbit_ack(qos,
1362 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1364 qos = mwl8k_qos_setbit_ack(qos,
1365 MWL8K_TXD_ACK_POLICY_NORMAL);
1367 if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
1368 qos = mwl8k_qos_setbit_amsdu(qos);
1371 dma = pci_map_single(priv->pdev, skb->data,
1372 skb->len, PCI_DMA_TODEVICE);
1374 if (pci_dma_mapping_error(priv->pdev, dma)) {
1375 printk(KERN_DEBUG "%s: failed to dma map skb, "
1376 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1378 return NETDEV_TX_OK;
1381 spin_lock_bh(&priv->tx_lock);
1383 txq = priv->txq + index;
1385 BUG_ON(txq->skb[txq->tail] != NULL);
1386 txq->skb[txq->tail] = skb;
1388 tx = txq->txd + txq->tail;
1389 tx->data_rate = txdatarate;
1390 tx->tx_priority = index;
1391 tx->qos_control = cpu_to_le16(qos);
1392 tx->pkt_phys_addr = cpu_to_le32(dma);
1393 tx->pkt_len = cpu_to_le16(skb->len);
1395 tx->peer_id = mwl8k_vif->peer_id;
1397 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1401 priv->pending_tx_pkts++;
1404 if (txq->tail == MWL8K_TX_DESCS)
1407 if (txq->head == txq->tail)
1408 ieee80211_stop_queue(hw, index);
1410 mwl8k_tx_start(priv);
1412 spin_unlock_bh(&priv->tx_lock);
1414 return NETDEV_TX_OK;
1421 * We have the following requirements for issuing firmware commands:
1422 * - Some commands require that the packet transmit path is idle when
1423 * the command is issued. (For simplicity, we'll just quiesce the
1424 * transmit path for every command.)
1425 * - There are certain sequences of commands that need to be issued to
1426 * the hardware sequentially, with no other intervening commands.
1428 * This leads to an implementation of a "firmware lock" as a mutex that
1429 * can be taken recursively, and which is taken by both the low-level
1430 * command submission function (mwl8k_post_cmd) as well as any users of
1431 * that function that require issuing of an atomic sequence of commands,
1432 * and quiesces the transmit path whenever it's taken.
1434 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1436 struct mwl8k_priv *priv = hw->priv;
1438 if (priv->fw_mutex_owner != current) {
1441 mutex_lock(&priv->fw_mutex);
1442 ieee80211_stop_queues(hw);
1444 rc = mwl8k_tx_wait_empty(hw);
1446 ieee80211_wake_queues(hw);
1447 mutex_unlock(&priv->fw_mutex);
1452 priv->fw_mutex_owner = current;
1455 priv->fw_mutex_depth++;
1460 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1462 struct mwl8k_priv *priv = hw->priv;
1464 if (!--priv->fw_mutex_depth) {
1465 ieee80211_wake_queues(hw);
1466 priv->fw_mutex_owner = NULL;
1467 mutex_unlock(&priv->fw_mutex);
1473 * Command processing.
1476 /* Timeout firmware commands after 2000ms */
1477 #define MWL8K_CMD_TIMEOUT_MS 2000
1479 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1481 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1482 struct mwl8k_priv *priv = hw->priv;
1483 void __iomem *regs = priv->regs;
1484 dma_addr_t dma_addr;
1485 unsigned int dma_size;
1487 unsigned long timeout = 0;
1490 cmd->result = 0xffff;
1491 dma_size = le16_to_cpu(cmd->length);
1492 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1493 PCI_DMA_BIDIRECTIONAL);
1494 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1497 rc = mwl8k_fw_lock(hw);
1499 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1500 PCI_DMA_BIDIRECTIONAL);
1504 priv->hostcmd_wait = &cmd_wait;
1505 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1506 iowrite32(MWL8K_H2A_INT_DOORBELL,
1507 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1508 iowrite32(MWL8K_H2A_INT_DUMMY,
1509 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1511 timeout = wait_for_completion_timeout(&cmd_wait,
1512 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1514 priv->hostcmd_wait = NULL;
1516 mwl8k_fw_unlock(hw);
1518 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1519 PCI_DMA_BIDIRECTIONAL);
1522 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1523 wiphy_name(hw->wiphy),
1524 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1525 MWL8K_CMD_TIMEOUT_MS);
1528 rc = cmd->result ? -EINVAL : 0;
1530 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1531 wiphy_name(hw->wiphy),
1532 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1533 le16_to_cpu(cmd->result));
1542 struct mwl8k_cmd_get_hw_spec {
1543 struct mwl8k_cmd_pkt header;
1545 __u8 host_interface;
1547 __u8 perm_addr[ETH_ALEN];
1552 __u8 mcs_bitmap[16];
1553 __le32 rx_queue_ptr;
1554 __le32 num_tx_queues;
1555 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1557 __le32 num_tx_desc_per_queue;
1559 } __attribute__((packed));
1561 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1563 struct mwl8k_priv *priv = hw->priv;
1564 struct mwl8k_cmd_get_hw_spec *cmd;
1568 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1572 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1573 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1575 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1576 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1577 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1578 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1579 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1580 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1581 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1582 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1584 rc = mwl8k_post_cmd(hw, &cmd->header);
1587 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1588 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1589 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1590 priv->hw_rev = cmd->hw_rev;
1598 * CMD_MAC_MULTICAST_ADR.
1600 struct mwl8k_cmd_mac_multicast_adr {
1601 struct mwl8k_cmd_pkt header;
1604 __u8 addr[0][ETH_ALEN];
1607 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1608 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1609 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1610 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1612 static struct mwl8k_cmd_pkt *
1613 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1614 int mc_count, struct dev_addr_list *mclist)
1616 struct mwl8k_priv *priv = hw->priv;
1617 struct mwl8k_cmd_mac_multicast_adr *cmd;
1620 if (allmulti || mc_count > priv->num_mcaddrs) {
1625 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1627 cmd = kzalloc(size, GFP_ATOMIC);
1631 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1632 cmd->header.length = cpu_to_le16(size);
1633 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1634 MWL8K_ENABLE_RX_BROADCAST);
1637 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1638 } else if (mc_count) {
1641 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1642 cmd->numaddr = cpu_to_le16(mc_count);
1643 for (i = 0; i < mc_count && mclist; i++) {
1644 if (mclist->da_addrlen != ETH_ALEN) {
1648 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1649 mclist = mclist->next;
1653 return &cmd->header;
1657 * CMD_802_11_GET_STAT.
1659 struct mwl8k_cmd_802_11_get_stat {
1660 struct mwl8k_cmd_pkt header;
1662 } __attribute__((packed));
1664 #define MWL8K_STAT_ACK_FAILURE 9
1665 #define MWL8K_STAT_RTS_FAILURE 12
1666 #define MWL8K_STAT_FCS_ERROR 24
1667 #define MWL8K_STAT_RTS_SUCCESS 11
1669 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1670 struct ieee80211_low_level_stats *stats)
1672 struct mwl8k_cmd_802_11_get_stat *cmd;
1675 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1679 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1680 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1682 rc = mwl8k_post_cmd(hw, &cmd->header);
1684 stats->dot11ACKFailureCount =
1685 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1686 stats->dot11RTSFailureCount =
1687 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1688 stats->dot11FCSErrorCount =
1689 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1690 stats->dot11RTSSuccessCount =
1691 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1699 * CMD_802_11_RADIO_CONTROL.
1701 struct mwl8k_cmd_802_11_radio_control {
1702 struct mwl8k_cmd_pkt header;
1706 } __attribute__((packed));
1709 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1711 struct mwl8k_priv *priv = hw->priv;
1712 struct mwl8k_cmd_802_11_radio_control *cmd;
1715 if (enable == priv->radio_on && !force)
1718 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1722 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1723 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1724 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1725 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1726 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1728 rc = mwl8k_post_cmd(hw, &cmd->header);
1732 priv->radio_on = enable;
1737 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1739 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1742 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1744 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1748 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1750 struct mwl8k_priv *priv;
1752 if (hw == NULL || hw->priv == NULL)
1756 priv->radio_short_preamble = short_preamble;
1758 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1762 * CMD_802_11_RF_TX_POWER.
1764 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1766 struct mwl8k_cmd_802_11_rf_tx_power {
1767 struct mwl8k_cmd_pkt header;
1769 __le16 support_level;
1770 __le16 current_level;
1772 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1773 } __attribute__((packed));
1775 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1777 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1780 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1784 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1785 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1786 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1787 cmd->support_level = cpu_to_le16(dBm);
1789 rc = mwl8k_post_cmd(hw, &cmd->header);
1798 struct mwl8k_cmd_set_pre_scan {
1799 struct mwl8k_cmd_pkt header;
1800 } __attribute__((packed));
1802 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1804 struct mwl8k_cmd_set_pre_scan *cmd;
1807 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1811 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1812 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1814 rc = mwl8k_post_cmd(hw, &cmd->header);
1821 * CMD_SET_POST_SCAN.
1823 struct mwl8k_cmd_set_post_scan {
1824 struct mwl8k_cmd_pkt header;
1826 __u8 bssid[ETH_ALEN];
1827 } __attribute__((packed));
1830 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1832 struct mwl8k_cmd_set_post_scan *cmd;
1835 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1839 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1840 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1842 memcpy(cmd->bssid, mac, ETH_ALEN);
1844 rc = mwl8k_post_cmd(hw, &cmd->header);
1851 * CMD_SET_RF_CHANNEL.
1853 struct mwl8k_cmd_set_rf_channel {
1854 struct mwl8k_cmd_pkt header;
1856 __u8 current_channel;
1857 __le32 channel_flags;
1858 } __attribute__((packed));
1860 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1861 struct ieee80211_channel *channel)
1863 struct mwl8k_cmd_set_rf_channel *cmd;
1866 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1870 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1871 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1872 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1873 cmd->current_channel = channel->hw_value;
1874 if (channel->band == IEEE80211_BAND_2GHZ)
1875 cmd->channel_flags = cpu_to_le32(0x00000081);
1877 cmd->channel_flags = cpu_to_le32(0x00000000);
1879 rc = mwl8k_post_cmd(hw, &cmd->header);
1888 struct mwl8k_cmd_set_slot {
1889 struct mwl8k_cmd_pkt header;
1892 } __attribute__((packed));
1894 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1896 struct mwl8k_cmd_set_slot *cmd;
1899 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1903 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1904 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1905 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1906 cmd->short_slot = short_slot_time;
1908 rc = mwl8k_post_cmd(hw, &cmd->header);
1917 struct mwl8k_cmd_mimo_config {
1918 struct mwl8k_cmd_pkt header;
1920 __u8 rx_antenna_map;
1921 __u8 tx_antenna_map;
1922 } __attribute__((packed));
1924 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1926 struct mwl8k_cmd_mimo_config *cmd;
1929 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1933 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1934 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1935 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1936 cmd->rx_antenna_map = rx;
1937 cmd->tx_antenna_map = tx;
1939 rc = mwl8k_post_cmd(hw, &cmd->header);
1946 * CMD_ENABLE_SNIFFER.
1948 struct mwl8k_cmd_enable_sniffer {
1949 struct mwl8k_cmd_pkt header;
1951 } __attribute__((packed));
1953 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1955 struct mwl8k_cmd_enable_sniffer *cmd;
1958 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1962 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1963 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1964 cmd->action = cpu_to_le32(!!enable);
1966 rc = mwl8k_post_cmd(hw, &cmd->header);
1975 struct mwl8k_cmd_set_mac_addr {
1976 struct mwl8k_cmd_pkt header;
1977 __u8 mac_addr[ETH_ALEN];
1978 } __attribute__((packed));
1980 static int mwl8k_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
1982 struct mwl8k_cmd_set_mac_addr *cmd;
1985 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1989 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
1990 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1991 memcpy(cmd->mac_addr, mac, ETH_ALEN);
1993 rc = mwl8k_post_cmd(hw, &cmd->header);
2001 * CMD_SET_RATEADAPT_MODE.
2003 struct mwl8k_cmd_set_rate_adapt_mode {
2004 struct mwl8k_cmd_pkt header;
2007 } __attribute__((packed));
2009 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2011 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2014 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2018 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2019 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2020 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2021 cmd->mode = cpu_to_le16(mode);
2023 rc = mwl8k_post_cmd(hw, &cmd->header);
2032 struct mwl8k_cmd_set_wmm {
2033 struct mwl8k_cmd_pkt header;
2035 } __attribute__((packed));
2037 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2039 struct mwl8k_priv *priv = hw->priv;
2040 struct mwl8k_cmd_set_wmm *cmd;
2043 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2047 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2048 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2049 cmd->action = cpu_to_le16(!!enable);
2051 rc = mwl8k_post_cmd(hw, &cmd->header);
2055 priv->wmm_enabled = enable;
2061 * CMD_SET_RTS_THRESHOLD.
2063 struct mwl8k_cmd_rts_threshold {
2064 struct mwl8k_cmd_pkt header;
2067 } __attribute__((packed));
2069 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2070 u16 action, u16 threshold)
2072 struct mwl8k_cmd_rts_threshold *cmd;
2075 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2079 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2080 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2081 cmd->action = cpu_to_le16(action);
2082 cmd->threshold = cpu_to_le16(threshold);
2084 rc = mwl8k_post_cmd(hw, &cmd->header);
2091 * CMD_SET_EDCA_PARAMS.
2093 struct mwl8k_cmd_set_edca_params {
2094 struct mwl8k_cmd_pkt header;
2096 /* See MWL8K_SET_EDCA_XXX below */
2099 /* TX opportunity in units of 32 us */
2102 /* Log exponent of max contention period: 0...15*/
2105 /* Log exponent of min contention period: 0...15 */
2108 /* Adaptive interframe spacing in units of 32us */
2111 /* TX queue to configure */
2113 } __attribute__((packed));
2115 #define MWL8K_SET_EDCA_CW 0x01
2116 #define MWL8K_SET_EDCA_TXOP 0x02
2117 #define MWL8K_SET_EDCA_AIFS 0x04
2119 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2120 MWL8K_SET_EDCA_TXOP | \
2121 MWL8K_SET_EDCA_AIFS)
2124 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2125 __u16 cw_min, __u16 cw_max,
2126 __u8 aifs, __u16 txop)
2128 struct mwl8k_cmd_set_edca_params *cmd;
2131 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2136 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2139 qnum ^= !(qnum >> 1);
2141 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2142 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2143 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2144 cmd->txop = cpu_to_le16(txop);
2145 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
2146 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2150 rc = mwl8k_post_cmd(hw, &cmd->header);
2157 * CMD_FINALIZE_JOIN.
2160 /* FJ beacon buffer size is compiled into the firmware. */
2161 #define MWL8K_FJ_BEACON_MAXLEN 128
2163 struct mwl8k_cmd_finalize_join {
2164 struct mwl8k_cmd_pkt header;
2165 __le32 sleep_interval; /* Number of beacon periods to sleep */
2166 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2167 } __attribute__((packed));
2169 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2170 __u16 framelen, __u16 dtim)
2172 struct mwl8k_cmd_finalize_join *cmd;
2173 struct ieee80211_mgmt *payload = frame;
2181 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2185 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2186 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2187 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2189 hdrlen = ieee80211_hdrlen(payload->frame_control);
2191 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2193 /* XXX TBD Might just have to abort and return an error */
2194 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2195 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2196 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2197 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2199 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2200 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2202 if (payload && payload_len)
2203 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2205 rc = mwl8k_post_cmd(hw, &cmd->header);
2213 struct mwl8k_cmd_update_sta_db {
2214 struct mwl8k_cmd_pkt header;
2216 /* See STADB_ACTION_TYPE */
2219 /* Peer MAC address */
2220 __u8 peer_addr[ETH_ALEN];
2224 /* Peer info - valid during add/update. */
2225 struct peer_capability_info peer_info;
2226 } __attribute__((packed));
2228 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2229 struct ieee80211_vif *vif, __u32 action)
2231 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2232 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2233 struct mwl8k_cmd_update_sta_db *cmd;
2234 struct peer_capability_info *peer_info;
2235 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2239 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2243 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2244 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2246 cmd->action = cpu_to_le32(action);
2247 peer_info = &cmd->peer_info;
2248 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2251 case MWL8K_STA_DB_ADD_ENTRY:
2252 case MWL8K_STA_DB_MODIFY_ENTRY:
2253 /* Build peer_info block */
2254 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2255 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2256 peer_info->interop = 1;
2257 peer_info->amsdu_enabled = 0;
2259 rates = peer_info->legacy_rates;
2260 for (count = 0; count < mv_vif->legacy_nrates; count++)
2261 rates[count] = bitrates[count].hw_value;
2263 rc = mwl8k_post_cmd(hw, &cmd->header);
2265 mv_vif->peer_id = peer_info->station_id;
2269 case MWL8K_STA_DB_DEL_ENTRY:
2270 case MWL8K_STA_DB_FLUSH:
2272 rc = mwl8k_post_cmd(hw, &cmd->header);
2274 mv_vif->peer_id = 0;
2285 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2287 #define MWL8K_FRAME_PROT_DISABLED 0x00
2288 #define MWL8K_FRAME_PROT_11G 0x07
2289 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2290 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2292 struct mwl8k_cmd_update_set_aid {
2293 struct mwl8k_cmd_pkt header;
2296 /* AP's MAC address (BSSID) */
2297 __u8 bssid[ETH_ALEN];
2298 __le16 protection_mode;
2299 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2300 } __attribute__((packed));
2302 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2303 struct ieee80211_vif *vif)
2305 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2306 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2307 struct mwl8k_cmd_update_set_aid *cmd;
2308 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2313 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2317 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2318 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2319 cmd->aid = cpu_to_le16(info->aid);
2321 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2323 if (info->use_cts_prot) {
2324 prot_mode = MWL8K_FRAME_PROT_11G;
2326 switch (info->ht_operation_mode &
2327 IEEE80211_HT_OP_MODE_PROTECTION) {
2328 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2329 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2331 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2332 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2335 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2339 cmd->protection_mode = cpu_to_le16(prot_mode);
2341 for (count = 0; count < mv_vif->legacy_nrates; count++)
2342 cmd->supp_rates[count] = bitrates[count].hw_value;
2344 rc = mwl8k_post_cmd(hw, &cmd->header);
2353 struct mwl8k_cmd_update_rateset {
2354 struct mwl8k_cmd_pkt header;
2355 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2357 /* Bitmap for supported MCS codes. */
2358 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2359 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2360 } __attribute__((packed));
2362 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2363 struct ieee80211_vif *vif)
2365 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2366 struct mwl8k_cmd_update_rateset *cmd;
2367 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2371 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2375 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2376 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2378 for (count = 0; count < mv_vif->legacy_nrates; count++)
2379 cmd->legacy_rates[count] = bitrates[count].hw_value;
2381 rc = mwl8k_post_cmd(hw, &cmd->header);
2388 * CMD_USE_FIXED_RATE.
2390 #define MWL8K_RATE_TABLE_SIZE 8
2391 #define MWL8K_UCAST_RATE 0
2392 #define MWL8K_USE_AUTO_RATE 0x0002
2394 struct mwl8k_rate_entry {
2395 /* Set to 1 if HT rate, 0 if legacy. */
2398 /* Set to 1 to use retry_count field. */
2399 __le32 enable_retry;
2401 /* Specified legacy rate or MCS. */
2404 /* Number of allowed retries. */
2406 } __attribute__((packed));
2408 struct mwl8k_rate_table {
2409 /* 1 to allow specified rate and below */
2410 __le32 allow_rate_drop;
2412 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2413 } __attribute__((packed));
2415 struct mwl8k_cmd_use_fixed_rate {
2416 struct mwl8k_cmd_pkt header;
2418 struct mwl8k_rate_table rate_table;
2420 /* Unicast, Broadcast or Multicast */
2424 } __attribute__((packed));
2426 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2427 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2429 struct mwl8k_cmd_use_fixed_rate *cmd;
2433 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2437 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2438 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2440 cmd->action = cpu_to_le32(action);
2441 cmd->rate_type = cpu_to_le32(rate_type);
2443 if (rate_table != NULL) {
2445 * Copy over each field manually so that endian
2446 * conversion can be done.
2448 cmd->rate_table.allow_rate_drop =
2449 cpu_to_le32(rate_table->allow_rate_drop);
2450 cmd->rate_table.num_rates =
2451 cpu_to_le32(rate_table->num_rates);
2453 for (count = 0; count < rate_table->num_rates; count++) {
2454 struct mwl8k_rate_entry *dst =
2455 &cmd->rate_table.rate_entry[count];
2456 struct mwl8k_rate_entry *src =
2457 &rate_table->rate_entry[count];
2459 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2460 dst->enable_retry = cpu_to_le32(src->enable_retry);
2461 dst->rate = cpu_to_le32(src->rate);
2462 dst->retry_count = cpu_to_le32(src->retry_count);
2466 rc = mwl8k_post_cmd(hw, &cmd->header);
2474 * Interrupt handling.
2476 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2478 struct ieee80211_hw *hw = dev_id;
2479 struct mwl8k_priv *priv = hw->priv;
2482 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2483 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2488 if (status & MWL8K_A2H_INT_TX_DONE)
2489 tasklet_schedule(&priv->tx_reclaim_task);
2491 if (status & MWL8K_A2H_INT_RX_READY) {
2492 while (rxq_process(hw, 0, 1))
2493 rxq_refill(hw, 0, 1);
2496 if (status & MWL8K_A2H_INT_OPC_DONE) {
2497 if (priv->hostcmd_wait != NULL)
2498 complete(priv->hostcmd_wait);
2501 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2502 if (!mutex_is_locked(&priv->fw_mutex) &&
2503 priv->radio_on && priv->pending_tx_pkts)
2504 mwl8k_tx_start(priv);
2512 * Core driver operations.
2514 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2516 struct mwl8k_priv *priv = hw->priv;
2517 int index = skb_get_queue_mapping(skb);
2520 if (priv->current_channel == NULL) {
2521 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2522 "disabled\n", wiphy_name(hw->wiphy));
2524 return NETDEV_TX_OK;
2527 rc = mwl8k_txq_xmit(hw, index, skb);
2532 static int mwl8k_start(struct ieee80211_hw *hw)
2534 struct mwl8k_priv *priv = hw->priv;
2537 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2538 IRQF_SHARED, MWL8K_NAME, hw);
2540 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2541 wiphy_name(hw->wiphy));
2545 /* Enable tx reclaim tasklet */
2546 tasklet_enable(&priv->tx_reclaim_task);
2548 /* Enable interrupts */
2549 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2551 rc = mwl8k_fw_lock(hw);
2553 rc = mwl8k_cmd_802_11_radio_enable(hw);
2556 rc = mwl8k_cmd_set_pre_scan(hw);
2559 rc = mwl8k_cmd_set_post_scan(hw,
2560 "\x00\x00\x00\x00\x00\x00");
2563 rc = mwl8k_cmd_setrateadaptmode(hw, 0);
2566 rc = mwl8k_set_wmm(hw, 0);
2569 rc = mwl8k_enable_sniffer(hw, 0);
2571 mwl8k_fw_unlock(hw);
2575 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2576 free_irq(priv->pdev->irq, hw);
2577 tasklet_disable(&priv->tx_reclaim_task);
2583 static void mwl8k_stop(struct ieee80211_hw *hw)
2585 struct mwl8k_priv *priv = hw->priv;
2588 mwl8k_cmd_802_11_radio_disable(hw);
2590 ieee80211_stop_queues(hw);
2592 /* Disable interrupts */
2593 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2594 free_irq(priv->pdev->irq, hw);
2596 /* Stop finalize join worker */
2597 cancel_work_sync(&priv->finalize_join_worker);
2598 if (priv->beacon_skb != NULL)
2599 dev_kfree_skb(priv->beacon_skb);
2601 /* Stop tx reclaim tasklet */
2602 tasklet_disable(&priv->tx_reclaim_task);
2604 /* Return all skbs to mac80211 */
2605 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2606 mwl8k_txq_reclaim(hw, i, 1);
2609 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2610 struct ieee80211_if_init_conf *conf)
2612 struct mwl8k_priv *priv = hw->priv;
2613 struct mwl8k_vif *mwl8k_vif;
2616 * We only support one active interface at a time.
2618 if (priv->vif != NULL)
2622 * We only support managed interfaces for now.
2624 if (conf->type != NL80211_IFTYPE_STATION)
2628 * Reject interface creation if sniffer mode is active, as
2629 * STA operation is mutually exclusive with hardware sniffer
2632 if (priv->sniffer_enabled) {
2633 printk(KERN_INFO "%s: unable to create STA "
2634 "interface due to sniffer mode being enabled\n",
2635 wiphy_name(hw->wiphy));
2639 /* Clean out driver private area */
2640 mwl8k_vif = MWL8K_VIF(conf->vif);
2641 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2643 /* Set and save the mac address */
2644 mwl8k_set_mac_addr(hw, conf->mac_addr);
2645 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2647 /* Back pointer to parent config block */
2648 mwl8k_vif->priv = priv;
2650 /* Setup initial PHY parameters */
2651 memcpy(mwl8k_vif->legacy_rates,
2652 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2653 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2655 /* Set Initial sequence number to zero */
2656 mwl8k_vif->seqno = 0;
2658 priv->vif = conf->vif;
2659 priv->current_channel = NULL;
2664 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2665 struct ieee80211_if_init_conf *conf)
2667 struct mwl8k_priv *priv = hw->priv;
2669 if (priv->vif == NULL)
2672 mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2677 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2679 struct ieee80211_conf *conf = &hw->conf;
2680 struct mwl8k_priv *priv = hw->priv;
2683 if (conf->flags & IEEE80211_CONF_IDLE) {
2684 mwl8k_cmd_802_11_radio_disable(hw);
2685 priv->current_channel = NULL;
2689 rc = mwl8k_fw_lock(hw);
2693 rc = mwl8k_cmd_802_11_radio_enable(hw);
2697 rc = mwl8k_cmd_set_rf_channel(hw, conf->channel);
2701 priv->current_channel = conf->channel;
2703 if (conf->power_level > 18)
2704 conf->power_level = 18;
2705 rc = mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level);
2709 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2713 mwl8k_fw_unlock(hw);
2718 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2719 struct ieee80211_vif *vif,
2720 struct ieee80211_bss_conf *info,
2723 struct mwl8k_priv *priv = hw->priv;
2724 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2727 if (changed & BSS_CHANGED_BSSID)
2728 memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN);
2730 if ((changed & BSS_CHANGED_ASSOC) == 0)
2733 priv->capture_beacon = false;
2735 rc = mwl8k_fw_lock(hw);
2740 memcpy(&mwl8k_vif->bss_info, info,
2741 sizeof(struct ieee80211_bss_conf));
2744 rc = mwl8k_update_rateset(hw, vif);
2748 /* Turn on rate adaptation */
2749 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2750 MWL8K_UCAST_RATE, NULL);
2754 /* Set radio preamble */
2755 rc = mwl8k_set_radio_preamble(hw, info->use_short_preamble);
2760 rc = mwl8k_cmd_set_slot(hw, info->use_short_slot);
2764 /* Update peer rate info */
2765 rc = mwl8k_cmd_update_sta_db(hw, vif,
2766 MWL8K_STA_DB_MODIFY_ENTRY);
2771 rc = mwl8k_cmd_set_aid(hw, vif);
2776 * Finalize the join. Tell rx handler to process
2777 * next beacon from our BSSID.
2779 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
2780 priv->capture_beacon = true;
2782 rc = mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2783 memset(&mwl8k_vif->bss_info, 0,
2784 sizeof(struct ieee80211_bss_conf));
2785 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2789 mwl8k_fw_unlock(hw);
2792 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
2793 int mc_count, struct dev_addr_list *mclist)
2795 struct mwl8k_cmd_pkt *cmd;
2798 * Synthesize and return a command packet that programs the
2799 * hardware multicast address filter. At this point we don't
2800 * know whether FIF_ALLMULTI is being requested, but if it is,
2801 * we'll end up throwing this packet away and creating a new
2802 * one in mwl8k_configure_filter().
2804 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
2806 return (unsigned long)cmd;
2810 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
2811 unsigned int changed_flags,
2812 unsigned int *total_flags)
2814 struct mwl8k_priv *priv = hw->priv;
2817 * Hardware sniffer mode is mutually exclusive with STA
2818 * operation, so refuse to enable sniffer mode if a STA
2819 * interface is active.
2821 if (priv->vif != NULL) {
2822 if (net_ratelimit())
2823 printk(KERN_INFO "%s: not enabling sniffer "
2824 "mode because STA interface is active\n",
2825 wiphy_name(hw->wiphy));
2829 if (!priv->sniffer_enabled) {
2830 if (mwl8k_enable_sniffer(hw, 1))
2832 priv->sniffer_enabled = true;
2835 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
2836 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
2842 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
2843 unsigned int changed_flags,
2844 unsigned int *total_flags,
2847 struct mwl8k_priv *priv = hw->priv;
2848 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
2851 * Enable hardware sniffer mode if FIF_CONTROL or
2852 * FIF_OTHER_BSS is requested.
2854 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
2855 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
2860 /* Clear unsupported feature flags */
2861 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
2863 if (mwl8k_fw_lock(hw))
2866 if (priv->sniffer_enabled) {
2867 mwl8k_enable_sniffer(hw, 0);
2868 priv->sniffer_enabled = false;
2871 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2872 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
2874 * Disable the BSS filter.
2876 mwl8k_cmd_set_pre_scan(hw);
2881 * Enable the BSS filter.
2883 * If there is an active STA interface, use that
2884 * interface's BSSID, otherwise use a dummy one
2885 * (where the OUI part needs to be nonzero for
2886 * the BSSID to be accepted by POST_SCAN).
2888 bssid = "\x01\x00\x00\x00\x00\x00";
2889 if (priv->vif != NULL)
2890 bssid = MWL8K_VIF(priv->vif)->bssid;
2892 mwl8k_cmd_set_post_scan(hw, bssid);
2897 * If FIF_ALLMULTI is being requested, throw away the command
2898 * packet that ->prepare_multicast() built and replace it with
2899 * a command packet that enables reception of all multicast
2902 if (*total_flags & FIF_ALLMULTI) {
2904 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
2908 mwl8k_post_cmd(hw, cmd);
2912 mwl8k_fw_unlock(hw);
2915 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2917 return mwl8k_rts_threshold(hw, MWL8K_CMD_SET, value);
2920 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2921 const struct ieee80211_tx_queue_params *params)
2923 struct mwl8k_priv *priv = hw->priv;
2926 rc = mwl8k_fw_lock(hw);
2928 if (!priv->wmm_enabled)
2929 rc = mwl8k_set_wmm(hw, 1);
2932 rc = mwl8k_set_edca_params(hw, queue,
2938 mwl8k_fw_unlock(hw);
2944 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
2945 struct ieee80211_tx_queue_stats *stats)
2947 struct mwl8k_priv *priv = hw->priv;
2948 struct mwl8k_tx_queue *txq;
2951 spin_lock_bh(&priv->tx_lock);
2952 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
2953 txq = priv->txq + index;
2954 memcpy(&stats[index], &txq->stats,
2955 sizeof(struct ieee80211_tx_queue_stats));
2957 spin_unlock_bh(&priv->tx_lock);
2962 static int mwl8k_get_stats(struct ieee80211_hw *hw,
2963 struct ieee80211_low_level_stats *stats)
2965 return mwl8k_cmd_802_11_get_stat(hw, stats);
2968 static const struct ieee80211_ops mwl8k_ops = {
2970 .start = mwl8k_start,
2972 .add_interface = mwl8k_add_interface,
2973 .remove_interface = mwl8k_remove_interface,
2974 .config = mwl8k_config,
2975 .bss_info_changed = mwl8k_bss_info_changed,
2976 .prepare_multicast = mwl8k_prepare_multicast,
2977 .configure_filter = mwl8k_configure_filter,
2978 .set_rts_threshold = mwl8k_set_rts_threshold,
2979 .conf_tx = mwl8k_conf_tx,
2980 .get_tx_stats = mwl8k_get_tx_stats,
2981 .get_stats = mwl8k_get_stats,
2984 static void mwl8k_tx_reclaim_handler(unsigned long data)
2987 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
2988 struct mwl8k_priv *priv = hw->priv;
2990 spin_lock_bh(&priv->tx_lock);
2991 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2992 mwl8k_txq_reclaim(hw, i, 0);
2994 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
2995 complete(priv->tx_wait);
2996 priv->tx_wait = NULL;
2998 spin_unlock_bh(&priv->tx_lock);
3001 static void mwl8k_finalize_join_worker(struct work_struct *work)
3003 struct mwl8k_priv *priv =
3004 container_of(work, struct mwl8k_priv, finalize_join_worker);
3005 struct sk_buff *skb = priv->beacon_skb;
3006 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3008 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3011 priv->beacon_skb = NULL;
3014 static struct mwl8k_device_info di_8687 = {
3015 .part_name = "88w8687",
3016 .helper_image = "mwl8k/helper_8687.fw",
3017 .fw_image = "mwl8k/fmimage_8687.fw",
3018 .rxd_ops = &rxd_8687_ops,
3021 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3023 PCI_VDEVICE(MARVELL, 0x2a2b),
3024 .driver_data = (unsigned long)&di_8687,
3026 PCI_VDEVICE(MARVELL, 0x2a30),
3027 .driver_data = (unsigned long)&di_8687,
3031 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3033 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3034 const struct pci_device_id *id)
3036 static int printed_version = 0;
3037 struct ieee80211_hw *hw;
3038 struct mwl8k_priv *priv;
3042 if (!printed_version) {
3043 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3044 printed_version = 1;
3047 rc = pci_enable_device(pdev);
3049 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3054 rc = pci_request_regions(pdev, MWL8K_NAME);
3056 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3061 pci_set_master(pdev);
3063 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3065 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3073 priv->device_info = (void *)id->driver_data;
3074 priv->rxd_ops = priv->device_info->rxd_ops;
3075 priv->sniffer_enabled = false;
3076 priv->wmm_enabled = false;
3077 priv->pending_tx_pkts = 0;
3079 SET_IEEE80211_DEV(hw, &pdev->dev);
3080 pci_set_drvdata(pdev, hw);
3082 priv->sram = pci_iomap(pdev, 0, 0x10000);
3083 if (priv->sram == NULL) {
3084 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3085 wiphy_name(hw->wiphy));
3090 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3091 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3093 priv->regs = pci_iomap(pdev, 1, 0x10000);
3094 if (priv->regs == NULL) {
3095 priv->regs = pci_iomap(pdev, 2, 0x10000);
3096 if (priv->regs == NULL) {
3097 printk(KERN_ERR "%s: Cannot map device registers\n",
3098 wiphy_name(hw->wiphy));
3103 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3104 priv->band.band = IEEE80211_BAND_2GHZ;
3105 priv->band.channels = priv->channels;
3106 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3107 priv->band.bitrates = priv->rates;
3108 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3109 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3111 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3112 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3115 * Extra headroom is the size of the required DMA header
3116 * minus the size of the smallest 802.11 frame (CTS frame).
3118 hw->extra_tx_headroom =
3119 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3121 hw->channel_change_time = 10;
3123 hw->queues = MWL8K_TX_QUEUES;
3125 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3127 /* Set rssi and noise values to dBm */
3128 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3129 hw->vif_data_size = sizeof(struct mwl8k_vif);
3132 /* Set default radio state and preamble */
3134 priv->radio_short_preamble = 0;
3136 /* Finalize join worker */
3137 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3139 /* TX reclaim tasklet */
3140 tasklet_init(&priv->tx_reclaim_task,
3141 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3142 tasklet_disable(&priv->tx_reclaim_task);
3144 /* Power management cookie */
3145 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3146 if (priv->cookie == NULL)
3149 rc = mwl8k_rxq_init(hw, 0);
3152 rxq_refill(hw, 0, INT_MAX);
3154 mutex_init(&priv->fw_mutex);
3155 priv->fw_mutex_owner = NULL;
3156 priv->fw_mutex_depth = 0;
3157 priv->hostcmd_wait = NULL;
3159 spin_lock_init(&priv->tx_lock);
3161 priv->tx_wait = NULL;
3163 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3164 rc = mwl8k_txq_init(hw, i);
3166 goto err_free_queues;
3169 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3170 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3171 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3172 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3174 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3175 IRQF_SHARED, MWL8K_NAME, hw);
3177 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3178 wiphy_name(hw->wiphy));
3179 goto err_free_queues;
3182 /* Reset firmware and hardware */
3183 mwl8k_hw_reset(priv);
3185 /* Ask userland hotplug daemon for the device firmware */
3186 rc = mwl8k_request_firmware(priv);
3188 printk(KERN_ERR "%s: Firmware files not found\n",
3189 wiphy_name(hw->wiphy));
3193 /* Load firmware into hardware */
3194 rc = mwl8k_load_firmware(hw);
3196 printk(KERN_ERR "%s: Cannot start firmware\n",
3197 wiphy_name(hw->wiphy));
3198 goto err_stop_firmware;
3201 /* Reclaim memory once firmware is successfully loaded */
3202 mwl8k_release_firmware(priv);
3205 * Temporarily enable interrupts. Initial firmware host
3206 * commands use interrupts and avoids polling. Disable
3207 * interrupts when done.
3209 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3211 /* Get config data, mac addrs etc */
3212 rc = mwl8k_cmd_get_hw_spec(hw);
3214 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3215 wiphy_name(hw->wiphy));
3216 goto err_stop_firmware;
3219 /* Turn radio off */
3220 rc = mwl8k_cmd_802_11_radio_disable(hw);
3222 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3223 goto err_stop_firmware;
3226 /* Clear MAC address */
3227 rc = mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3229 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3230 wiphy_name(hw->wiphy));
3231 goto err_stop_firmware;
3234 /* Disable interrupts */
3235 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3236 free_irq(priv->pdev->irq, hw);
3238 rc = ieee80211_register_hw(hw);
3240 printk(KERN_ERR "%s: Cannot register device\n",
3241 wiphy_name(hw->wiphy));
3242 goto err_stop_firmware;
3245 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3246 wiphy_name(hw->wiphy), priv->device_info->part_name,
3247 priv->hw_rev, hw->wiphy->perm_addr,
3248 priv->ap_fw ? "AP" : "STA",
3249 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3250 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3255 mwl8k_hw_reset(priv);
3256 mwl8k_release_firmware(priv);
3259 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3260 free_irq(priv->pdev->irq, hw);
3263 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3264 mwl8k_txq_deinit(hw, i);
3265 mwl8k_rxq_deinit(hw, 0);
3268 if (priv->cookie != NULL)
3269 pci_free_consistent(priv->pdev, 4,
3270 priv->cookie, priv->cookie_dma);
3272 if (priv->regs != NULL)
3273 pci_iounmap(pdev, priv->regs);
3275 if (priv->sram != NULL)
3276 pci_iounmap(pdev, priv->sram);
3278 pci_set_drvdata(pdev, NULL);
3279 ieee80211_free_hw(hw);
3282 pci_release_regions(pdev);
3283 pci_disable_device(pdev);
3288 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3290 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3293 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3295 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3296 struct mwl8k_priv *priv;
3303 ieee80211_stop_queues(hw);
3305 ieee80211_unregister_hw(hw);
3307 /* Remove tx reclaim tasklet */
3308 tasklet_kill(&priv->tx_reclaim_task);
3311 mwl8k_hw_reset(priv);
3313 /* Return all skbs to mac80211 */
3314 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3315 mwl8k_txq_reclaim(hw, i, 1);
3317 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3318 mwl8k_txq_deinit(hw, i);
3320 mwl8k_rxq_deinit(hw, 0);
3322 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3324 pci_iounmap(pdev, priv->regs);
3325 pci_iounmap(pdev, priv->sram);
3326 pci_set_drvdata(pdev, NULL);
3327 ieee80211_free_hw(hw);
3328 pci_release_regions(pdev);
3329 pci_disable_device(pdev);
3332 static struct pci_driver mwl8k_driver = {
3334 .id_table = mwl8k_pci_id_table,
3335 .probe = mwl8k_probe,
3336 .remove = __devexit_p(mwl8k_remove),
3337 .shutdown = __devexit_p(mwl8k_shutdown),
3340 static int __init mwl8k_init(void)
3342 return pci_register_driver(&mwl8k_driver);
3345 static void __exit mwl8k_exit(void)
3347 pci_unregister_driver(&mwl8k_driver);
3350 module_init(mwl8k_init);
3351 module_exit(mwl8k_exit);
3353 MODULE_DESCRIPTION(MWL8K_DESC);
3354 MODULE_VERSION(MWL8K_VERSION);
3355 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3356 MODULE_LICENSE("GPL");