1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
47 #include <asm/div64.h>
49 #define DRV_NAME "iwl3945"
51 #include "iwl-commands.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-helpers.h"
58 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
59 struct iwl3945_tx_queue *txq);
61 /******************************************************************************
65 ******************************************************************************/
67 /* module parameters */
68 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
69 static u32 iwl3945_param_debug; /* def: 0 = minimal debug log messages */
70 static int iwl3945_param_disable; /* def: 0 = enable radio */
71 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
72 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
73 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
76 * module name, copyright, version, etc.
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82 #ifdef CONFIG_IWL3945_DEBUG
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
94 #define IWL39_VERSION "1.2.26k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
96 #define DRV_AUTHOR "<ilw@linux.intel.com>"
97 #define DRV_VERSION IWL39_VERSION
100 MODULE_DESCRIPTION(DRV_DESCRIPTION);
101 MODULE_VERSION(DRV_VERSION);
102 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
103 MODULE_LICENSE("GPL");
105 static const struct ieee80211_supported_band *iwl3945_get_band(
106 struct iwl_priv *priv, enum ieee80211_band band)
108 return priv->hw->wiphy->bands[band];
111 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
114 * Theory of operation
116 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
117 * of buffer descriptors, each of which points to one or more data buffers for
118 * the device to read from or fill. Driver and device exchange status of each
119 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
120 * entries in each circular buffer, to protect against confusing empty and full
123 * The device reads or writes the data in the queues via the device's several
124 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
126 * For Tx queue, there are low mark and high mark limits. If, after queuing
127 * the packet for Tx, free space become < low mark, Tx queue stopped. When
128 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
131 * The 3945 operates with six queues: One receive queue, one transmit queue
132 * (#4) for sending commands to the device firmware, and four transmit queues
133 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
134 ***************************************************/
136 int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
138 return q->write_ptr > q->read_ptr ?
139 (i >= q->read_ptr && i < q->write_ptr) :
140 !(i < q->read_ptr && i >= q->write_ptr);
144 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
146 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
147 int count, int slots_num, u32 id)
150 q->n_window = slots_num;
153 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
154 * and iwl_queue_dec_wrap are broken. */
155 BUG_ON(!is_power_of_2(count));
157 /* slots_num must be power-of-two size, otherwise
158 * get_cmd_index is broken. */
159 BUG_ON(!is_power_of_2(slots_num));
161 q->low_mark = q->n_window / 4;
165 q->high_mark = q->n_window / 8;
166 if (q->high_mark < 2)
169 q->write_ptr = q->read_ptr = 0;
175 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
177 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
178 struct iwl3945_tx_queue *txq, u32 id)
180 struct pci_dev *dev = priv->pci_dev;
182 /* Driver private data, only for Tx (not command) queues,
183 * not shared with device. */
184 if (id != IWL_CMD_QUEUE_NUM) {
185 txq->txb = kmalloc(sizeof(txq->txb[0]) *
186 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
188 IWL_ERROR("kmalloc for auxiliary BD "
189 "structures failed\n");
195 /* Circular buffer of transmit frame descriptors (TFDs),
196 * shared with device */
197 txq->bd = pci_alloc_consistent(dev,
198 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
202 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
203 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
218 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
220 int iwl3945_tx_queue_init(struct iwl_priv *priv,
221 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
223 struct pci_dev *dev = priv->pci_dev;
228 * Alloc buffer array for commands (Tx or other types of commands).
229 * For the command queue (#4), allocate command space + one big
230 * command for scan, since scan command is very huge; the system will
231 * not have two scans at the same time, so only one is needed.
232 * For data Tx queues (all other queues), no super-size command
235 len = sizeof(struct iwl3945_cmd) * slots_num;
236 if (txq_id == IWL_CMD_QUEUE_NUM)
237 len += IWL_MAX_SCAN_SIZE;
238 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
242 /* Alloc driver data array and TFD circular buffer */
243 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
245 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
249 txq->need_update = 0;
251 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
252 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
253 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
255 /* Initialize queue high/low-water, head/tail indexes */
256 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
258 /* Tell device where to find queue, enable DMA channel. */
259 iwl3945_hw_tx_queue_init(priv, txq);
265 * iwl3945_tx_queue_free - Deallocate DMA queue.
266 * @txq: Transmit queue to deallocate.
268 * Empty queue by removing and destroying all BD's.
270 * 0-fill, but do not free "txq" descriptor structure.
272 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl3945_tx_queue *txq)
274 struct iwl_queue *q = &txq->q;
275 struct pci_dev *dev = priv->pci_dev;
281 /* first, empty all BD's */
282 for (; q->write_ptr != q->read_ptr;
283 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
284 iwl3945_hw_txq_free_tfd(priv, txq);
286 len = sizeof(struct iwl3945_cmd) * q->n_window;
287 if (q->id == IWL_CMD_QUEUE_NUM)
288 len += IWL_MAX_SCAN_SIZE;
290 /* De-alloc array of command/tx buffers */
291 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
293 /* De-alloc circular buffer of TFDs */
295 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
296 txq->q.n_bd, txq->bd, txq->q.dma_addr);
298 /* De-alloc array of per-TFD driver data */
302 /* 0-fill queue descriptor structure */
303 memset(txq, 0, sizeof(*txq));
306 /*************** STATION TABLE MANAGEMENT ****
307 * mac80211 should be examined to determine if sta_info is duplicating
308 * the functionality provided here
311 /**************************************************************/
312 #if 0 /* temporary disable till we add real remove station */
314 * iwl3945_remove_station - Remove driver's knowledge of station.
316 * NOTE: This does not remove station from device's station table.
318 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
320 int index = IWL_INVALID_STATION;
324 spin_lock_irqsave(&priv->sta_lock, flags);
328 else if (is_broadcast_ether_addr(addr))
329 index = priv->hw_params.bcast_sta_id;
331 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
332 if (priv->stations_39[i].used &&
333 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
339 if (unlikely(index == IWL_INVALID_STATION))
342 if (priv->stations_39[index].used) {
343 priv->stations_39[index].used = 0;
344 priv->num_stations--;
347 BUG_ON(priv->num_stations < 0);
350 spin_unlock_irqrestore(&priv->sta_lock, flags);
356 * iwl3945_clear_stations_table - Clear the driver's station table
358 * NOTE: This does not clear or otherwise alter the device's station table.
360 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
364 spin_lock_irqsave(&priv->sta_lock, flags);
366 priv->num_stations = 0;
367 memset(priv->stations_39, 0, sizeof(priv->stations_39));
369 spin_unlock_irqrestore(&priv->sta_lock, flags);
373 * iwl3945_add_station - Add station to station tables in driver and device
375 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
378 int index = IWL_INVALID_STATION;
379 struct iwl3945_station_entry *station;
380 unsigned long flags_spin;
383 spin_lock_irqsave(&priv->sta_lock, flags_spin);
386 else if (is_broadcast_ether_addr(addr))
387 index = priv->hw_params.bcast_sta_id;
389 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
390 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
396 if (!priv->stations_39[i].used &&
397 index == IWL_INVALID_STATION)
401 /* These two conditions has the same outcome but keep them separate
402 since they have different meaning */
403 if (unlikely(index == IWL_INVALID_STATION)) {
404 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
408 if (priv->stations_39[index].used &&
409 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
410 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
414 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
415 station = &priv->stations_39[index];
417 priv->num_stations++;
419 /* Set up the REPLY_ADD_STA command to send to device */
420 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
421 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
422 station->sta.mode = 0;
423 station->sta.sta.sta_id = index;
424 station->sta.station_flags = 0;
426 if (priv->band == IEEE80211_BAND_5GHZ)
427 rate = IWL_RATE_6M_PLCP;
429 rate = IWL_RATE_1M_PLCP;
431 /* Turn on both antennas for the station... */
432 station->sta.rate_n_flags =
433 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
435 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
437 /* Add station to device's station table */
438 iwl3945_send_add_station(priv, &station->sta, flags);
443 /*************** DRIVER STATUS FUNCTIONS *****/
445 static inline int iwl3945_is_ready(struct iwl_priv *priv)
447 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
448 * set but EXIT_PENDING is not */
449 return test_bit(STATUS_READY, &priv->status) &&
450 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
451 !test_bit(STATUS_EXIT_PENDING, &priv->status);
454 static inline int iwl3945_is_alive(struct iwl_priv *priv)
456 return test_bit(STATUS_ALIVE, &priv->status);
459 static inline int iwl3945_is_init(struct iwl_priv *priv)
461 return test_bit(STATUS_INIT, &priv->status);
464 static inline int iwl3945_is_rfkill_sw(struct iwl_priv *priv)
466 return test_bit(STATUS_RF_KILL_SW, &priv->status);
469 static inline int iwl3945_is_rfkill_hw(struct iwl_priv *priv)
471 return test_bit(STATUS_RF_KILL_HW, &priv->status);
474 static inline int iwl3945_is_rfkill(struct iwl_priv *priv)
476 return iwl3945_is_rfkill_hw(priv) ||
477 iwl3945_is_rfkill_sw(priv);
480 static inline int iwl3945_is_ready_rf(struct iwl_priv *priv)
483 if (iwl3945_is_rfkill(priv))
486 return iwl3945_is_ready(priv);
489 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
491 #define IWL_CMD(x) case x: return #x
492 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
495 * iwl3945_enqueue_hcmd - enqueue a uCode command
496 * @priv: device private data point
497 * @cmd: a point to the ucode command structure
499 * The function returns < 0 values to indicate the operation is
500 * failed. On success, it turns the index (> 0) of command in the
503 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
505 struct iwl3945_tx_queue *txq = &priv->txq39[IWL_CMD_QUEUE_NUM];
506 struct iwl_queue *q = &txq->q;
507 struct iwl3945_tfd_frame *tfd;
509 struct iwl3945_cmd *out_cmd;
511 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
512 dma_addr_t phys_addr;
518 /* If any of the command structures end up being larger than
519 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
520 * we will need to increase the size of the TFD entries */
521 BUG_ON((fix_size > TFD39_MAX_PAYLOAD_SIZE) &&
522 !(cmd->meta.flags & CMD_SIZE_HUGE));
525 if (iwl3945_is_rfkill(priv)) {
526 IWL_DEBUG_INFO("Not sending command - RF KILL");
530 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
531 IWL_ERROR("No space for Tx\n");
535 spin_lock_irqsave(&priv->hcmd_lock, flags);
537 tfd = &txq->bd[q->write_ptr];
538 memset(tfd, 0, sizeof(*tfd));
540 control_flags = (u32 *) tfd;
542 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
543 out_cmd = &txq->cmd[idx];
545 out_cmd->hdr.cmd = cmd->id;
546 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
547 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
549 /* At this point, the out_cmd now has all of the incoming cmd
552 out_cmd->hdr.flags = 0;
553 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
554 INDEX_TO_SEQ(q->write_ptr));
555 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
556 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
558 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
559 offsetof(struct iwl3945_cmd, hdr);
560 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
562 pad = U32_PAD(cmd->len);
563 count = TFD_CTL_COUNT_GET(*control_flags);
564 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
566 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
567 "%d bytes at %d[%d]:%d\n",
568 get_cmd_string(out_cmd->hdr.cmd),
569 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
570 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
572 txq->need_update = 1;
574 /* Increment and update queue's write index */
575 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
576 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
578 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
579 return ret ? ret : idx;
582 static int iwl3945_send_cmd_async(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
586 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
588 /* An asynchronous command can not expect an SKB to be set. */
589 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
591 /* An asynchronous command MUST have a callback. */
592 BUG_ON(!cmd->meta.u.callback);
594 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
597 ret = iwl3945_enqueue_hcmd(priv, cmd);
599 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
600 get_cmd_string(cmd->id), ret);
606 static int iwl3945_send_cmd_sync(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
611 BUG_ON(cmd->meta.flags & CMD_ASYNC);
613 /* A synchronous command can not have a callback set. */
614 BUG_ON(cmd->meta.u.callback != NULL);
616 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
617 IWL_ERROR("Error sending %s: Already sending a host command\n",
618 get_cmd_string(cmd->id));
623 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
625 if (cmd->meta.flags & CMD_WANT_SKB)
626 cmd->meta.source = &cmd->meta;
628 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
631 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
632 get_cmd_string(cmd->id), ret);
636 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
637 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
638 HOST_COMPLETE_TIMEOUT);
640 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
641 IWL_ERROR("Error sending %s: time out after %dms.\n",
642 get_cmd_string(cmd->id),
643 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
645 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
651 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
652 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
653 get_cmd_string(cmd->id));
657 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
658 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
659 get_cmd_string(cmd->id));
663 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
664 IWL_ERROR("Error: Response NULL in '%s'\n",
665 get_cmd_string(cmd->id));
674 if (cmd->meta.flags & CMD_WANT_SKB) {
675 struct iwl3945_cmd *qcmd;
677 /* Cancel the CMD_WANT_SKB flag for the cmd in the
678 * TX cmd queue. Otherwise in case the cmd comes
679 * in later, it will possibly set an invalid
680 * address (cmd->meta.source). */
681 qcmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
682 qcmd->meta.flags &= ~CMD_WANT_SKB;
685 if (cmd->meta.u.skb) {
686 dev_kfree_skb_any(cmd->meta.u.skb);
687 cmd->meta.u.skb = NULL;
690 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
694 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl3945_host_cmd *cmd)
696 if (cmd->meta.flags & CMD_ASYNC)
697 return iwl3945_send_cmd_async(priv, cmd);
699 return iwl3945_send_cmd_sync(priv, cmd);
702 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
704 struct iwl3945_host_cmd cmd = {
710 return iwl3945_send_cmd_sync(priv, &cmd);
713 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
715 struct iwl3945_host_cmd cmd = {
721 return iwl3945_send_cmd_sync(priv, &cmd);
724 int iwl3945_send_statistics_request(struct iwl_priv *priv)
726 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
730 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
731 * @band: 2.4 or 5 GHz band
732 * @channel: Any channel valid for the requested band
734 * In addition to setting the staging RXON, priv->band is also set.
736 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
737 * in the staging RXON flag structure based on the band
739 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
740 enum ieee80211_band band,
743 if (!iwl3945_get_channel_info(priv, band, channel)) {
744 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
749 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
750 (priv->band == band))
753 priv->staging39_rxon.channel = cpu_to_le16(channel);
754 if (band == IEEE80211_BAND_5GHZ)
755 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
757 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
761 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
767 * iwl3945_check_rxon_cmd - validate RXON structure is valid
769 * NOTE: This is really only useful during development and can eventually
770 * be #ifdef'd out once the driver is stable and folks aren't actively
773 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
777 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
779 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
780 error |= le32_to_cpu(rxon->flags &
781 (RXON_FLG_TGJ_NARROW_BAND_MSK |
782 RXON_FLG_RADAR_DETECT_MSK));
784 IWL_WARN(priv, "check 24G fields %d | %d\n",
787 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
788 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
790 IWL_WARN(priv, "check 52 fields %d | %d\n",
792 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
794 IWL_WARN(priv, "check 52 CCK %d | %d\n",
797 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
799 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
801 /* make sure basic rates 6Mbps and 1Mbps are supported */
802 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
803 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
805 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
807 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
809 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
811 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
812 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
814 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
817 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
818 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
820 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
823 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
824 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
826 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
829 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
830 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
831 RXON_FLG_ANT_A_MSK)) == 0);
833 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
836 IWL_WARN(priv, "Tuning to channel %d\n",
837 le16_to_cpu(rxon->channel));
840 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
847 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
848 * @priv: staging_rxon is compared to active_rxon
850 * If the RXON structure is changing enough to require a new tune,
851 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
852 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
854 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
857 /* These items are only settable from the full RXON command */
858 if (!(iwl3945_is_associated(priv)) ||
859 compare_ether_addr(priv->staging39_rxon.bssid_addr,
860 priv->active39_rxon.bssid_addr) ||
861 compare_ether_addr(priv->staging39_rxon.node_addr,
862 priv->active39_rxon.node_addr) ||
863 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
864 priv->active39_rxon.wlap_bssid_addr) ||
865 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
866 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
867 (priv->staging39_rxon.air_propagation !=
868 priv->active39_rxon.air_propagation) ||
869 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
872 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
873 * be updated with the RXON_ASSOC command -- however only some
874 * flag transitions are allowed using RXON_ASSOC */
876 /* Check if we are not switching bands */
877 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
878 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
881 /* Check if we are switching association toggle */
882 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
883 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
889 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
892 struct iwl_rx_packet *res = NULL;
893 struct iwl3945_rxon_assoc_cmd rxon_assoc;
894 struct iwl3945_host_cmd cmd = {
895 .id = REPLY_RXON_ASSOC,
896 .len = sizeof(rxon_assoc),
897 .meta.flags = CMD_WANT_SKB,
900 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
901 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
903 if ((rxon1->flags == rxon2->flags) &&
904 (rxon1->filter_flags == rxon2->filter_flags) &&
905 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
906 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
907 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
911 rxon_assoc.flags = priv->staging39_rxon.flags;
912 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
913 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
914 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
915 rxon_assoc.reserved = 0;
917 rc = iwl3945_send_cmd_sync(priv, &cmd);
921 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
922 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
923 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
927 priv->alloc_rxb_skb--;
928 dev_kfree_skb_any(cmd.meta.u.skb);
934 * iwl3945_commit_rxon - commit staging_rxon to hardware
936 * The RXON command in staging_rxon is committed to the hardware and
937 * the active_rxon structure is updated with the new data. This
938 * function correctly transitions out of the RXON_ASSOC_MSK state if
939 * a HW tune is required based on the RXON structure changes.
941 static int iwl3945_commit_rxon(struct iwl_priv *priv)
943 /* cast away the const for active_rxon in this function */
944 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
947 if (!iwl3945_is_alive(priv))
950 /* always get timestamp with Rx frame */
951 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
954 priv->staging39_rxon.flags &=
955 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
956 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
958 rc = iwl3945_check_rxon_cmd(priv);
960 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
964 /* If we don't need to send a full RXON, we can use
965 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
966 * and other flags for the current radio configuration. */
967 if (!iwl3945_full_rxon_required(priv)) {
968 rc = iwl3945_send_rxon_assoc(priv);
970 IWL_ERROR("Error setting RXON_ASSOC "
971 "configuration (%d).\n", rc);
975 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
980 /* If we are currently associated and the new config requires
981 * an RXON_ASSOC and the new config wants the associated mask enabled,
982 * we must clear the associated from the active configuration
983 * before we apply the new config */
984 if (iwl3945_is_associated(priv) &&
985 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
986 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
987 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
989 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
990 sizeof(struct iwl3945_rxon_cmd),
991 &priv->active39_rxon);
993 /* If the mask clearing failed then we set
994 * active_rxon back to what it was previously */
996 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
997 IWL_ERROR("Error clearing ASSOC_MSK on current "
998 "configuration (%d).\n", rc);
1003 IWL_DEBUG_INFO("Sending RXON\n"
1004 "* with%s RXON_FILTER_ASSOC_MSK\n"
1007 ((priv->staging39_rxon.filter_flags &
1008 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1009 le16_to_cpu(priv->staging39_rxon.channel),
1010 priv->staging_rxon.bssid_addr);
1012 /* Apply the new configuration */
1013 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1014 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
1016 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1020 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
1022 iwl3945_clear_stations_table(priv);
1024 /* If we issue a new RXON command which required a tune then we must
1025 * send a new TXPOWER command or we won't be able to Tx any frames */
1026 rc = iwl3945_hw_reg_send_txpower(priv);
1028 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1032 /* Add the broadcast address so we can send broadcast frames */
1033 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
1034 IWL_INVALID_STATION) {
1035 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1039 /* If we have set the ASSOC_MSK and we are in BSS mode then
1040 * add the IWL_AP_ID to the station rate table */
1041 if (iwl3945_is_associated(priv) &&
1042 (priv->iw_mode == NL80211_IFTYPE_STATION))
1043 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
1044 == IWL_INVALID_STATION) {
1045 IWL_ERROR("Error adding AP address for transmit.\n");
1049 /* Init the hardware's rate fallback order based on the band */
1050 rc = iwl3945_init_hw_rate_table(priv);
1052 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1059 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1061 struct iwl_bt_cmd bt_cmd = {
1069 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1070 sizeof(bt_cmd), &bt_cmd);
1073 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1076 struct iwl_rx_packet *res;
1077 struct iwl3945_host_cmd cmd = {
1078 .id = REPLY_SCAN_ABORT_CMD,
1079 .meta.flags = CMD_WANT_SKB,
1082 /* If there isn't a scan actively going on in the hardware
1083 * then we are in between scan bands and not actually
1084 * actively scanning, so don't send the abort command */
1085 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1086 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1090 rc = iwl3945_send_cmd_sync(priv, &cmd);
1092 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1096 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1097 if (res->u.status != CAN_ABORT_STATUS) {
1098 /* The scan abort will return 1 for success or
1099 * 2 for "failure". A failure condition can be
1100 * due to simply not being in an active scan which
1101 * can occur if we send the scan abort before we
1102 * the microcode has notified us that a scan is
1104 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1105 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1106 clear_bit(STATUS_SCAN_HW, &priv->status);
1109 dev_kfree_skb_any(cmd.meta.u.skb);
1114 static int iwl3945_card_state_sync_callback(struct iwl_priv *priv,
1115 struct iwl3945_cmd *cmd,
1116 struct sk_buff *skb)
1124 * Use: Sets the device's internal card state to enable, disable, or halt
1126 * When in the 'enable' state the card operates as normal.
1127 * When in the 'disable' state, the card enters into a low power mode.
1128 * When in the 'halt' state, the card is shut down and must be fully
1129 * restarted to come back on.
1131 static int iwl3945_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1133 struct iwl3945_host_cmd cmd = {
1134 .id = REPLY_CARD_STATE_CMD,
1137 .meta.flags = meta_flag,
1140 if (meta_flag & CMD_ASYNC)
1141 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1143 return iwl3945_send_cmd(priv, &cmd);
1146 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1147 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1149 struct iwl_rx_packet *res = NULL;
1152 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1156 res = (struct iwl_rx_packet *)skb->data;
1157 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1158 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1163 switch (res->u.add_sta.status) {
1164 case ADD_STA_SUCCESS_MSK:
1170 /* We didn't cache the SKB; let the caller free it */
1174 int iwl3945_send_add_station(struct iwl_priv *priv,
1175 struct iwl3945_addsta_cmd *sta, u8 flags)
1177 struct iwl_rx_packet *res = NULL;
1179 struct iwl3945_host_cmd cmd = {
1180 .id = REPLY_ADD_STA,
1181 .len = sizeof(struct iwl3945_addsta_cmd),
1182 .meta.flags = flags,
1186 if (flags & CMD_ASYNC)
1187 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1189 cmd.meta.flags |= CMD_WANT_SKB;
1191 rc = iwl3945_send_cmd(priv, &cmd);
1193 if (rc || (flags & CMD_ASYNC))
1196 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1197 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1198 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1204 switch (res->u.add_sta.status) {
1205 case ADD_STA_SUCCESS_MSK:
1206 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1210 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1215 priv->alloc_rxb_skb--;
1216 dev_kfree_skb_any(cmd.meta.u.skb);
1221 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1222 struct ieee80211_key_conf *keyconf,
1225 unsigned long flags;
1226 __le16 key_flags = 0;
1228 switch (keyconf->alg) {
1230 key_flags |= STA_KEY_FLG_CCMP;
1231 key_flags |= cpu_to_le16(
1232 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1233 key_flags &= ~STA_KEY_FLG_INVALID;
1240 spin_lock_irqsave(&priv->sta_lock, flags);
1241 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1242 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1243 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1246 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1248 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1249 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1250 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1252 spin_unlock_irqrestore(&priv->sta_lock, flags);
1254 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1255 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1259 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1261 unsigned long flags;
1263 spin_lock_irqsave(&priv->sta_lock, flags);
1264 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1265 memset(&priv->stations_39[sta_id].sta.key, 0,
1266 sizeof(struct iwl4965_keyinfo));
1267 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1268 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1269 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1270 spin_unlock_irqrestore(&priv->sta_lock, flags);
1272 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1273 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1277 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1279 struct list_head *element;
1281 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1282 priv->frames_count);
1284 while (!list_empty(&priv->free_frames)) {
1285 element = priv->free_frames.next;
1287 kfree(list_entry(element, struct iwl3945_frame, list));
1288 priv->frames_count--;
1291 if (priv->frames_count) {
1292 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
1293 priv->frames_count);
1294 priv->frames_count = 0;
1298 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1300 struct iwl3945_frame *frame;
1301 struct list_head *element;
1302 if (list_empty(&priv->free_frames)) {
1303 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1305 IWL_ERROR("Could not allocate frame!\n");
1309 priv->frames_count++;
1313 element = priv->free_frames.next;
1315 return list_entry(element, struct iwl3945_frame, list);
1318 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1320 memset(frame, 0, sizeof(*frame));
1321 list_add(&frame->list, &priv->free_frames);
1324 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1325 struct ieee80211_hdr *hdr,
1329 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1330 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1331 (priv->iw_mode != NL80211_IFTYPE_AP)))
1334 if (priv->ibss_beacon->len > left)
1337 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1339 return priv->ibss_beacon->len;
1342 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1348 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1349 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1351 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1353 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1354 i = iwl3945_rates[i].next_ieee) {
1355 if (rate_mask & (1 << i))
1356 return iwl3945_rates[i].plcp;
1359 /* No valid rate was found. Assign the lowest one */
1360 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1361 return IWL_RATE_1M_PLCP;
1363 return IWL_RATE_6M_PLCP;
1366 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1368 struct iwl3945_frame *frame;
1369 unsigned int frame_size;
1373 frame = iwl3945_get_free_frame(priv);
1376 IWL_ERROR("Could not obtain free frame buffer for beacon "
1381 rate = iwl3945_rate_get_lowest_plcp(priv);
1383 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1385 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1388 iwl3945_free_frame(priv, frame);
1393 /******************************************************************************
1395 * EEPROM related functions
1397 ******************************************************************************/
1399 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1401 memcpy(mac, priv->eeprom39.mac_address, 6);
1405 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1406 * embedded controller) as EEPROM reader; each read is a series of pulses
1407 * to/from the EEPROM chip, not a single event, so even reads could conflict
1408 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1409 * simply claims ownership, which should be safe when this function is called
1410 * (i.e. before loading uCode!).
1412 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1414 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1419 * iwl3945_eeprom_init - read EEPROM contents
1421 * Load the EEPROM contents from adapter into priv->eeprom39
1423 * NOTE: This routine uses the non-debug IO access functions.
1425 int iwl3945_eeprom_init(struct iwl_priv *priv)
1427 u16 *e = (u16 *)&priv->eeprom39;
1428 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1429 int sz = sizeof(priv->eeprom39);
1433 /* The EEPROM structure has several padding buffers within it
1434 * and when adding new EEPROM maps is subject to programmer errors
1435 * which may be very difficult to identify without explicitly
1436 * checking the resulting size of the eeprom map. */
1437 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1439 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1440 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1444 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1445 ret = iwl3945_eeprom_acquire_semaphore(priv);
1447 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1451 /* eeprom is an array of 16bit values */
1452 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1455 _iwl_write32(priv, CSR_EEPROM_REG,
1456 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1457 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1458 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1459 CSR_EEPROM_REG_READ_VALID_MSK,
1460 IWL_EEPROM_ACCESS_TIMEOUT);
1462 IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
1466 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1467 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1473 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1475 if (priv->shared_virt)
1476 pci_free_consistent(priv->pci_dev,
1477 sizeof(struct iwl3945_shared),
1483 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1485 * return : set the bit for each supported rate insert in ie
1487 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1488 u16 basic_rate, int *left)
1490 u16 ret_rates = 0, bit;
1495 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1496 if (bit & supported_rate) {
1498 rates[*cnt] = iwl3945_rates[i].ieee |
1499 ((bit & basic_rate) ? 0x80 : 0x00);
1503 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1512 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1514 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1515 struct ieee80211_mgmt *frame,
1520 u16 active_rates, ret_rates, cck_rates;
1522 /* Make sure there is enough space for the probe request,
1523 * two mandatory IEs and the data */
1529 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1530 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1531 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1532 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1533 frame->seq_ctrl = 0;
1535 /* fill in our indirect SSID IE */
1542 pos = &(frame->u.probe_req.variable[0]);
1543 *pos++ = WLAN_EID_SSID;
1546 /* fill in supported rate */
1552 /* ... fill it in... */
1553 *pos++ = WLAN_EID_SUPP_RATES;
1556 priv->active_rate = priv->rates_mask;
1557 active_rates = priv->active_rate;
1558 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1560 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1561 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1562 priv->active_rate_basic, &left);
1563 active_rates &= ~ret_rates;
1565 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1566 priv->active_rate_basic, &left);
1567 active_rates &= ~ret_rates;
1571 if (active_rates == 0)
1574 /* fill in supported extended rate */
1579 /* ... fill it in... */
1580 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1582 iwl3945_supported_rate_to_ie(pos, active_rates,
1583 priv->active_rate_basic, &left);
1594 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1595 struct iwl_qosparam_cmd *qos)
1598 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1599 sizeof(struct iwl_qosparam_cmd), qos);
1602 static void iwl3945_reset_qos(struct iwl_priv *priv)
1608 unsigned long flags;
1611 spin_lock_irqsave(&priv->lock, flags);
1612 priv->qos_data.qos_active = 0;
1614 /* QoS always active in AP and ADHOC mode
1615 * In STA mode wait for association
1617 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1618 priv->iw_mode == NL80211_IFTYPE_AP)
1619 priv->qos_data.qos_active = 1;
1621 priv->qos_data.qos_active = 0;
1624 /* check for legacy mode */
1625 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1626 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
1627 (priv->iw_mode == NL80211_IFTYPE_STATION &&
1628 (priv->staging39_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
1633 if (priv->qos_data.qos_active)
1636 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1637 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1638 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1639 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1640 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1642 if (priv->qos_data.qos_active) {
1644 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1645 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1646 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1647 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1648 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1651 priv->qos_data.def_qos_parm.ac[i].cw_min =
1652 cpu_to_le16((cw_min + 1) / 2 - 1);
1653 priv->qos_data.def_qos_parm.ac[i].cw_max =
1654 cpu_to_le16(cw_max);
1655 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1657 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1660 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1662 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1665 priv->qos_data.def_qos_parm.ac[i].cw_min =
1666 cpu_to_le16((cw_min + 1) / 4 - 1);
1667 priv->qos_data.def_qos_parm.ac[i].cw_max =
1668 cpu_to_le16((cw_max + 1) / 2 - 1);
1669 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1670 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1672 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1675 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1678 for (i = 1; i < 4; i++) {
1679 priv->qos_data.def_qos_parm.ac[i].cw_min =
1680 cpu_to_le16(cw_min);
1681 priv->qos_data.def_qos_parm.ac[i].cw_max =
1682 cpu_to_le16(cw_max);
1683 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1684 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1685 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1688 IWL_DEBUG_QOS("set QoS to default \n");
1690 spin_unlock_irqrestore(&priv->lock, flags);
1693 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1695 unsigned long flags;
1697 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1700 spin_lock_irqsave(&priv->lock, flags);
1701 priv->qos_data.def_qos_parm.qos_flags = 0;
1703 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1704 !priv->qos_data.qos_cap.q_AP.txop_request)
1705 priv->qos_data.def_qos_parm.qos_flags |=
1706 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1708 if (priv->qos_data.qos_active)
1709 priv->qos_data.def_qos_parm.qos_flags |=
1710 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1712 spin_unlock_irqrestore(&priv->lock, flags);
1714 if (force || iwl3945_is_associated(priv)) {
1715 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1716 priv->qos_data.qos_active);
1718 iwl3945_send_qos_params_command(priv,
1719 &(priv->qos_data.def_qos_parm));
1724 * Power management (not Tx power!) functions
1726 #define MSEC_TO_USEC 1024
1729 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1730 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1731 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1732 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1733 __constant_cpu_to_le32(X1), \
1734 __constant_cpu_to_le32(X2), \
1735 __constant_cpu_to_le32(X3), \
1736 __constant_cpu_to_le32(X4)}
1738 /* default power management (not Tx power) table values */
1740 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1741 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1742 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1743 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1744 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1745 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1746 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1750 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1751 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1752 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1753 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1754 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1755 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1756 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1757 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1758 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1759 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1760 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1763 int iwl3945_power_init_handle(struct iwl_priv *priv)
1766 struct iwl3945_power_mgr *pow_data;
1767 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1770 IWL_DEBUG_POWER("Initialize power \n");
1772 pow_data = &(priv->power_data_39);
1774 memset(pow_data, 0, sizeof(*pow_data));
1776 pow_data->active_index = IWL_POWER_RANGE_0;
1777 pow_data->dtim_val = 0xffff;
1779 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1780 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1782 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1786 struct iwl_powertable_cmd *cmd;
1788 IWL_DEBUG_POWER("adjust power command flags\n");
1790 for (i = 0; i < IWL39_POWER_AC; i++) {
1791 cmd = &pow_data->pwr_range_0[i].cmd;
1794 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1796 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1802 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1803 struct iwl_powertable_cmd *cmd, u32 mode)
1808 struct iwl_power_vec_entry *range;
1810 struct iwl3945_power_mgr *pow_data;
1812 if (mode > IWL_POWER_INDEX_5) {
1813 IWL_DEBUG_POWER("Error invalid power mode \n");
1816 pow_data = &(priv->power_data_39);
1818 if (pow_data->active_index == IWL_POWER_RANGE_0)
1819 range = &pow_data->pwr_range_0[0];
1821 range = &pow_data->pwr_range_1[1];
1823 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1825 #ifdef IWL_MAC80211_DISABLE
1826 if (priv->assoc_network != NULL) {
1827 unsigned long flags;
1829 period = priv->assoc_network->tim.tim_period;
1831 #endif /*IWL_MAC80211_DISABLE */
1832 skip = range[mode].no_dtim;
1841 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1843 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1844 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1845 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1848 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1849 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1850 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1853 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1854 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1855 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1856 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1857 le32_to_cpu(cmd->sleep_interval[0]),
1858 le32_to_cpu(cmd->sleep_interval[1]),
1859 le32_to_cpu(cmd->sleep_interval[2]),
1860 le32_to_cpu(cmd->sleep_interval[3]),
1861 le32_to_cpu(cmd->sleep_interval[4]));
1866 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1868 u32 uninitialized_var(final_mode);
1870 struct iwl_powertable_cmd cmd;
1872 /* If on battery, set to 3,
1873 * if plugged into AC power, set to CAM ("continuously aware mode"),
1874 * else user level */
1876 case IWL39_POWER_BATTERY:
1877 final_mode = IWL_POWER_INDEX_3;
1879 case IWL39_POWER_AC:
1880 final_mode = IWL_POWER_MODE_CAM;
1887 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1889 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1890 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1891 sizeof(struct iwl3945_powertable_cmd), &cmd);
1893 if (final_mode == IWL_POWER_MODE_CAM)
1894 clear_bit(STATUS_POWER_PMI, &priv->status);
1896 set_bit(STATUS_POWER_PMI, &priv->status);
1902 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1904 * NOTE: priv->mutex is not required before calling this function
1906 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1908 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1909 clear_bit(STATUS_SCANNING, &priv->status);
1913 if (test_bit(STATUS_SCANNING, &priv->status)) {
1914 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1915 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1916 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1917 queue_work(priv->workqueue, &priv->abort_scan);
1920 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1922 return test_bit(STATUS_SCANNING, &priv->status);
1929 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1930 * @ms: amount of time to wait (in milliseconds) for scan to abort
1932 * NOTE: priv->mutex must be held before calling this function
1934 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1936 unsigned long now = jiffies;
1939 ret = iwl3945_scan_cancel(priv);
1941 mutex_unlock(&priv->mutex);
1942 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1943 test_bit(STATUS_SCANNING, &priv->status))
1945 mutex_lock(&priv->mutex);
1947 return test_bit(STATUS_SCANNING, &priv->status);
1953 #define MAX_UCODE_BEACON_INTERVAL 1024
1954 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1956 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1959 u16 beacon_factor = 0;
1962 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1963 / MAX_UCODE_BEACON_INTERVAL;
1964 new_val = beacon_val / beacon_factor;
1966 return cpu_to_le16(new_val);
1969 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1971 u64 interval_tm_unit;
1973 unsigned long flags;
1974 struct ieee80211_conf *conf = NULL;
1977 conf = ieee80211_get_hw_conf(priv->hw);
1979 spin_lock_irqsave(&priv->lock, flags);
1980 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1981 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1983 tsf = priv->timestamp;
1985 beacon_int = priv->beacon_int;
1986 spin_unlock_irqrestore(&priv->lock, flags);
1988 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1989 if (beacon_int == 0) {
1990 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1991 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1993 priv->rxon_timing.beacon_interval =
1994 cpu_to_le16(beacon_int);
1995 priv->rxon_timing.beacon_interval =
1996 iwl3945_adjust_beacon_interval(
1997 le16_to_cpu(priv->rxon_timing.beacon_interval));
2000 priv->rxon_timing.atim_window = 0;
2002 priv->rxon_timing.beacon_interval =
2003 iwl3945_adjust_beacon_interval(conf->beacon_int);
2004 /* TODO: we need to get atim_window from upper stack
2005 * for now we set to 0 */
2006 priv->rxon_timing.atim_window = 0;
2010 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2011 result = do_div(tsf, interval_tm_unit);
2012 priv->rxon_timing.beacon_init_val =
2013 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2016 ("beacon interval %d beacon timer %d beacon tim %d\n",
2017 le16_to_cpu(priv->rxon_timing.beacon_interval),
2018 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2019 le16_to_cpu(priv->rxon_timing.atim_window));
2022 static int iwl3945_scan_initiate(struct iwl_priv *priv)
2024 if (!iwl3945_is_ready_rf(priv)) {
2025 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2029 if (test_bit(STATUS_SCANNING, &priv->status)) {
2030 IWL_DEBUG_SCAN("Scan already in progress.\n");
2034 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2035 IWL_DEBUG_SCAN("Scan request while abort pending. "
2040 IWL_DEBUG_INFO("Starting scan...\n");
2041 if (priv->cfg->sku & IWL_SKU_G)
2042 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2043 if (priv->cfg->sku & IWL_SKU_A)
2044 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2045 set_bit(STATUS_SCANNING, &priv->status);
2046 priv->scan_start = jiffies;
2047 priv->scan_pass_start = priv->scan_start;
2049 queue_work(priv->workqueue, &priv->request_scan);
2054 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
2056 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
2059 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2061 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2066 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
2067 enum ieee80211_band band)
2069 if (band == IEEE80211_BAND_5GHZ) {
2070 priv->staging39_rxon.flags &=
2071 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2072 | RXON_FLG_CCK_MSK);
2073 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2075 /* Copied from iwl3945_bg_post_associate() */
2076 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2077 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2079 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2081 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2082 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2084 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2085 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2086 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
2091 * initialize rxon structure with default values from eeprom
2093 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
2096 const struct iwl_channel_info *ch_info;
2098 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
2101 case NL80211_IFTYPE_AP:
2102 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
2105 case NL80211_IFTYPE_STATION:
2106 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
2107 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2110 case NL80211_IFTYPE_ADHOC:
2111 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2112 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2113 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2114 RXON_FILTER_ACCEPT_GRP_MSK;
2117 case NL80211_IFTYPE_MONITOR:
2118 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2119 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2120 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2123 IWL_ERROR("Unsupported interface type %d\n", mode);
2128 /* TODO: Figure out when short_preamble would be set and cache from
2130 if (!hw_to_local(priv->hw)->short_preamble)
2131 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2133 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2136 ch_info = iwl3945_get_channel_info(priv, priv->band,
2137 le16_to_cpu(priv->active39_rxon.channel));
2140 ch_info = &priv->channel_info[0];
2143 * in some case A channels are all non IBSS
2144 * in this case force B/G channel
2146 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2147 ch_info = &priv->channel_info[0];
2149 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
2150 if (is_channel_a_band(ch_info))
2151 priv->band = IEEE80211_BAND_5GHZ;
2153 priv->band = IEEE80211_BAND_2GHZ;
2155 iwl3945_set_flags_for_phymode(priv, priv->band);
2157 priv->staging39_rxon.ofdm_basic_rates =
2158 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2159 priv->staging39_rxon.cck_basic_rates =
2160 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2163 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
2165 if (mode == NL80211_IFTYPE_ADHOC) {
2166 const struct iwl_channel_info *ch_info;
2168 ch_info = iwl3945_get_channel_info(priv,
2170 le16_to_cpu(priv->staging39_rxon.channel));
2172 if (!ch_info || !is_channel_ibss(ch_info)) {
2173 IWL_ERROR("channel %d not IBSS channel\n",
2174 le16_to_cpu(priv->staging39_rxon.channel));
2179 iwl3945_connection_init_rx_config(priv, mode);
2180 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2182 iwl3945_clear_stations_table(priv);
2184 /* don't commit rxon if rf-kill is on*/
2185 if (!iwl3945_is_ready_rf(priv))
2188 cancel_delayed_work(&priv->scan_check);
2189 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2190 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2191 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2195 iwl3945_commit_rxon(priv);
2200 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2201 struct ieee80211_tx_info *info,
2202 struct iwl3945_cmd *cmd,
2203 struct sk_buff *skb_frag,
2206 struct iwl3945_hw_key *keyinfo =
2207 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2209 switch (keyinfo->alg) {
2211 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2212 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2213 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2218 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2221 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2224 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2229 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2230 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2232 if (keyinfo->keylen == 13)
2233 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2235 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2237 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2238 "with key %d\n", info->control.hw_key->hw_key_idx);
2242 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2248 * handle build REPLY_TX command notification.
2250 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2251 struct iwl3945_cmd *cmd,
2252 struct ieee80211_tx_info *info,
2253 struct ieee80211_hdr *hdr,
2254 int is_unicast, u8 std_id)
2256 __le16 fc = hdr->frame_control;
2257 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2258 u8 rc_flags = info->control.rates[0].flags;
2260 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2261 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2262 tx_flags |= TX_CMD_FLG_ACK_MSK;
2263 if (ieee80211_is_mgmt(fc))
2264 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2265 if (ieee80211_is_probe_resp(fc) &&
2266 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2267 tx_flags |= TX_CMD_FLG_TSF_MSK;
2269 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2270 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2273 cmd->cmd.tx.sta_id = std_id;
2274 if (ieee80211_has_morefrags(fc))
2275 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2277 if (ieee80211_is_data_qos(fc)) {
2278 u8 *qc = ieee80211_get_qos_ctl(hdr);
2279 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2280 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2282 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2285 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2286 tx_flags |= TX_CMD_FLG_RTS_MSK;
2287 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2288 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2289 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2290 tx_flags |= TX_CMD_FLG_CTS_MSK;
2293 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2294 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2296 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2297 if (ieee80211_is_mgmt(fc)) {
2298 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2299 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2301 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2303 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2304 #ifdef CONFIG_IWL3945_LEDS
2305 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2309 cmd->cmd.tx.driver_txop = 0;
2310 cmd->cmd.tx.tx_flags = tx_flags;
2311 cmd->cmd.tx.next_frame_len = 0;
2315 * iwl3945_get_sta_id - Find station's index within station table
2317 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2320 u16 fc = le16_to_cpu(hdr->frame_control);
2322 /* If this frame is broadcast or management, use broadcast station id */
2323 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2324 is_multicast_ether_addr(hdr->addr1))
2325 return priv->hw_params.bcast_sta_id;
2327 switch (priv->iw_mode) {
2329 /* If we are a client station in a BSS network, use the special
2330 * AP station entry (that's the only station we communicate with) */
2331 case NL80211_IFTYPE_STATION:
2334 /* If we are an AP, then find the station, or use BCAST */
2335 case NL80211_IFTYPE_AP:
2336 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2337 if (sta_id != IWL_INVALID_STATION)
2339 return priv->hw_params.bcast_sta_id;
2341 /* If this frame is going out to an IBSS network, find the station,
2342 * or create a new station table entry */
2343 case NL80211_IFTYPE_ADHOC: {
2344 /* Create new station table entry */
2345 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2346 if (sta_id != IWL_INVALID_STATION)
2349 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2351 if (sta_id != IWL_INVALID_STATION)
2354 IWL_DEBUG_DROP("Station %pM not in station map. "
2355 "Defaulting to broadcast...\n",
2357 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2358 return priv->hw_params.bcast_sta_id;
2360 /* If we are in monitor mode, use BCAST. This is required for
2361 * packet injection. */
2362 case NL80211_IFTYPE_MONITOR:
2363 return priv->hw_params.bcast_sta_id;
2366 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2368 return priv->hw_params.bcast_sta_id;
2373 * start REPLY_TX command process
2375 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2377 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2378 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2379 struct iwl3945_tfd_frame *tfd;
2381 int txq_id = skb_get_queue_mapping(skb);
2382 struct iwl3945_tx_queue *txq = NULL;
2383 struct iwl_queue *q = NULL;
2384 dma_addr_t phys_addr;
2385 dma_addr_t txcmd_phys;
2386 struct iwl3945_cmd *out_cmd = NULL;
2387 u16 len, idx, len_org, hdr_len;
2394 u8 wait_write_ptr = 0;
2396 unsigned long flags;
2399 spin_lock_irqsave(&priv->lock, flags);
2400 if (iwl3945_is_rfkill(priv)) {
2401 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2405 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2406 IWL_ERROR("ERROR: No TX rate available.\n");
2410 unicast = !is_multicast_ether_addr(hdr->addr1);
2413 fc = hdr->frame_control;
2415 #ifdef CONFIG_IWL3945_DEBUG
2416 if (ieee80211_is_auth(fc))
2417 IWL_DEBUG_TX("Sending AUTH frame\n");
2418 else if (ieee80211_is_assoc_req(fc))
2419 IWL_DEBUG_TX("Sending ASSOC frame\n");
2420 else if (ieee80211_is_reassoc_req(fc))
2421 IWL_DEBUG_TX("Sending REASSOC frame\n");
2424 /* drop all data frame if we are not associated */
2425 if (ieee80211_is_data(fc) &&
2426 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2427 (!iwl3945_is_associated(priv) ||
2428 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2429 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2433 spin_unlock_irqrestore(&priv->lock, flags);
2435 hdr_len = ieee80211_hdrlen(fc);
2437 /* Find (or create) index into station table for destination station */
2438 sta_id = iwl3945_get_sta_id(priv, hdr);
2439 if (sta_id == IWL_INVALID_STATION) {
2440 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2445 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2447 if (ieee80211_is_data_qos(fc)) {
2448 qc = ieee80211_get_qos_ctl(hdr);
2449 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2450 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2452 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2454 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2458 /* Descriptor for chosen Tx queue */
2459 txq = &priv->txq39[txq_id];
2462 spin_lock_irqsave(&priv->lock, flags);
2464 /* Set up first empty TFD within this queue's circular TFD buffer */
2465 tfd = &txq->bd[q->write_ptr];
2466 memset(tfd, 0, sizeof(*tfd));
2467 control_flags = (u32 *) tfd;
2468 idx = get_cmd_index(q, q->write_ptr, 0);
2470 /* Set up driver data for this TFD */
2471 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2472 txq->txb[q->write_ptr].skb[0] = skb;
2474 /* Init first empty entry in queue's array of Tx/cmd buffers */
2475 out_cmd = &txq->cmd[idx];
2476 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2477 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2480 * Set up the Tx-command (not MAC!) header.
2481 * Store the chosen Tx queue and TFD index within the sequence field;
2482 * after Tx, uCode's Tx response will return this value so driver can
2483 * locate the frame within the tx queue and do post-tx processing.
2485 out_cmd->hdr.cmd = REPLY_TX;
2486 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2487 INDEX_TO_SEQ(q->write_ptr)));
2489 /* Copy MAC header from skb into command buffer */
2490 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2493 * Use the first empty entry in this queue's command buffer array
2494 * to contain the Tx command and MAC header concatenated together
2495 * (payload data will be in another buffer).
2496 * Size of this varies, due to varying MAC header length.
2497 * If end is not dword aligned, we'll have 2 extra bytes at the end
2498 * of the MAC header (device reads on dword boundaries).
2499 * We'll tell device about this padding later.
2501 len = sizeof(struct iwl3945_tx_cmd) +
2502 sizeof(struct iwl_cmd_header) + hdr_len;
2505 len = (len + 3) & ~3;
2512 /* Physical address of this Tx command's header (not MAC header!),
2513 * within command buffer array. */
2514 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2515 offsetof(struct iwl3945_cmd, hdr);
2517 /* Add buffer containing Tx command and MAC(!) header to TFD's
2519 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2521 if (info->control.hw_key)
2522 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2524 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2525 * if any (802.11 null frames have no payload). */
2526 len = skb->len - hdr_len;
2528 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2529 len, PCI_DMA_TODEVICE);
2530 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2534 /* If there is no payload, then we use only one Tx buffer */
2535 *control_flags = TFD_CTL_COUNT_SET(1);
2537 /* Else use 2 buffers.
2538 * Tell 3945 about any padding after MAC header */
2539 *control_flags = TFD_CTL_COUNT_SET(2) |
2540 TFD_CTL_PAD_SET(U32_PAD(len));
2542 /* Total # bytes to be transmitted */
2543 len = (u16)skb->len;
2544 out_cmd->cmd.tx.len = cpu_to_le16(len);
2546 /* TODO need this for burst mode later on */
2547 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2549 /* set is_hcca to 0; it probably will never be implemented */
2550 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2552 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2553 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2555 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2556 txq->need_update = 1;
2558 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2561 txq->need_update = 0;
2564 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2565 sizeof(out_cmd->cmd.tx));
2567 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2568 ieee80211_hdrlen(fc));
2570 /* Tell device the write index *just past* this latest filled TFD */
2571 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2572 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2573 spin_unlock_irqrestore(&priv->lock, flags);
2578 if ((iwl_queue_space(q) < q->high_mark)
2579 && priv->mac80211_registered) {
2580 if (wait_write_ptr) {
2581 spin_lock_irqsave(&priv->lock, flags);
2582 txq->need_update = 1;
2583 iwl3945_tx_queue_update_write_ptr(priv, txq);
2584 spin_unlock_irqrestore(&priv->lock, flags);
2587 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2593 spin_unlock_irqrestore(&priv->lock, flags);
2598 static void iwl3945_set_rate(struct iwl_priv *priv)
2600 const struct ieee80211_supported_band *sband = NULL;
2601 struct ieee80211_rate *rate;
2604 sband = iwl3945_get_band(priv, priv->band);
2606 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2610 priv->active_rate = 0;
2611 priv->active_rate_basic = 0;
2613 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2614 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2616 for (i = 0; i < sband->n_bitrates; i++) {
2617 rate = &sband->bitrates[i];
2618 if ((rate->hw_value < IWL_RATE_COUNT) &&
2619 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2620 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2621 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2622 priv->active_rate |= (1 << rate->hw_value);
2626 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2627 priv->active_rate, priv->active_rate_basic);
2630 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2631 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2634 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2635 priv->staging39_rxon.cck_basic_rates =
2636 ((priv->active_rate_basic &
2637 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2639 priv->staging39_rxon.cck_basic_rates =
2640 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2642 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2643 priv->staging39_rxon.ofdm_basic_rates =
2644 ((priv->active_rate_basic &
2645 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2646 IWL_FIRST_OFDM_RATE) & 0xFF;
2648 priv->staging39_rxon.ofdm_basic_rates =
2649 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2652 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2654 unsigned long flags;
2656 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2659 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2660 disable_radio ? "OFF" : "ON");
2662 if (disable_radio) {
2663 iwl3945_scan_cancel(priv);
2664 /* FIXME: This is a workaround for AP */
2665 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2666 spin_lock_irqsave(&priv->lock, flags);
2667 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2668 CSR_UCODE_SW_BIT_RFKILL);
2669 spin_unlock_irqrestore(&priv->lock, flags);
2670 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2671 set_bit(STATUS_RF_KILL_SW, &priv->status);
2676 spin_lock_irqsave(&priv->lock, flags);
2677 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2679 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2680 spin_unlock_irqrestore(&priv->lock, flags);
2685 spin_lock_irqsave(&priv->lock, flags);
2686 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2687 if (!iwl_grab_nic_access(priv))
2688 iwl_release_nic_access(priv);
2689 spin_unlock_irqrestore(&priv->lock, flags);
2691 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2692 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2693 "disabled by HW switch\n");
2698 queue_work(priv->workqueue, &priv->restart);
2702 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2703 u32 decrypt_res, struct ieee80211_rx_status *stats)
2706 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2708 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2711 if (!(fc & IEEE80211_FCTL_PROTECTED))
2714 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2715 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2716 case RX_RES_STATUS_SEC_TYPE_TKIP:
2717 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2718 RX_RES_STATUS_BAD_ICV_MIC)
2719 stats->flag |= RX_FLAG_MMIC_ERROR;
2720 case RX_RES_STATUS_SEC_TYPE_WEP:
2721 case RX_RES_STATUS_SEC_TYPE_CCMP:
2722 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2723 RX_RES_STATUS_DECRYPT_OK) {
2724 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2725 stats->flag |= RX_FLAG_DECRYPTED;
2734 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2736 #include "iwl-spectrum.h"
2738 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2739 #define BEACON_TIME_MASK_HIGH 0xFF000000
2740 #define TIME_UNIT 1024
2743 * extended beacon time format
2744 * time in usec will be changed into a 32-bit value in 8:24 format
2745 * the high 1 byte is the beacon counts
2746 * the lower 3 bytes is the time in usec within one beacon interval
2749 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2753 u32 interval = beacon_interval * 1024;
2755 if (!interval || !usec)
2758 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2759 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2761 return (quot << 24) + rem;
2764 /* base is usually what we get from ucode with each received frame,
2765 * the same as HW timer counter counting down
2768 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2770 u32 base_low = base & BEACON_TIME_MASK_LOW;
2771 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2772 u32 interval = beacon_interval * TIME_UNIT;
2773 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2774 (addon & BEACON_TIME_MASK_HIGH);
2776 if (base_low > addon_low)
2777 res += base_low - addon_low;
2778 else if (base_low < addon_low) {
2779 res += interval + base_low - addon_low;
2784 return cpu_to_le32(res);
2787 static int iwl3945_get_measurement(struct iwl_priv *priv,
2788 struct ieee80211_measurement_params *params,
2791 struct iwl_spectrum_cmd spectrum;
2792 struct iwl_rx_packet *res;
2793 struct iwl3945_host_cmd cmd = {
2794 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2795 .data = (void *)&spectrum,
2796 .meta.flags = CMD_WANT_SKB,
2798 u32 add_time = le64_to_cpu(params->start_time);
2800 int spectrum_resp_status;
2801 int duration = le16_to_cpu(params->duration);
2803 if (iwl3945_is_associated(priv))
2805 iwl3945_usecs_to_beacons(
2806 le64_to_cpu(params->start_time) - priv->last_tsf,
2807 le16_to_cpu(priv->rxon_timing.beacon_interval));
2809 memset(&spectrum, 0, sizeof(spectrum));
2811 spectrum.channel_count = cpu_to_le16(1);
2813 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2814 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2815 cmd.len = sizeof(spectrum);
2816 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2818 if (iwl3945_is_associated(priv))
2819 spectrum.start_time =
2820 iwl3945_add_beacon_time(priv->last_beacon_time,
2822 le16_to_cpu(priv->rxon_timing.beacon_interval));
2824 spectrum.start_time = 0;
2826 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2827 spectrum.channels[0].channel = params->channel;
2828 spectrum.channels[0].type = type;
2829 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2830 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2831 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2833 rc = iwl3945_send_cmd_sync(priv, &cmd);
2837 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2838 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2839 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2843 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2844 switch (spectrum_resp_status) {
2845 case 0: /* Command will be handled */
2846 if (res->u.spectrum.id != 0xff) {
2847 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2848 res->u.spectrum.id);
2849 priv->measurement_status &= ~MEASUREMENT_READY;
2851 priv->measurement_status |= MEASUREMENT_ACTIVE;
2855 case 1: /* Command will not be handled */
2860 dev_kfree_skb_any(cmd.meta.u.skb);
2866 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2867 struct iwl_rx_mem_buffer *rxb)
2869 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2870 struct iwl_alive_resp *palive;
2871 struct delayed_work *pwork;
2873 palive = &pkt->u.alive_frame;
2875 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2877 palive->is_valid, palive->ver_type,
2878 palive->ver_subtype);
2880 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2881 IWL_DEBUG_INFO("Initialization Alive received.\n");
2882 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2883 sizeof(struct iwl_alive_resp));
2884 pwork = &priv->init_alive_start;
2886 IWL_DEBUG_INFO("Runtime Alive received.\n");
2887 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2888 sizeof(struct iwl_alive_resp));
2889 pwork = &priv->alive_start;
2890 iwl3945_disable_events(priv);
2893 /* We delay the ALIVE response by 5ms to
2894 * give the HW RF Kill time to activate... */
2895 if (palive->is_valid == UCODE_VALID_OK)
2896 queue_delayed_work(priv->workqueue, pwork,
2897 msecs_to_jiffies(5));
2899 IWL_WARN(priv, "uCode did not respond OK.\n");
2902 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2903 struct iwl_rx_mem_buffer *rxb)
2905 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2907 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2911 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2912 struct iwl_rx_mem_buffer *rxb)
2914 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2916 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
2917 "seq 0x%04X ser 0x%08X\n",
2918 le32_to_cpu(pkt->u.err_resp.error_type),
2919 get_cmd_string(pkt->u.err_resp.cmd_id),
2920 pkt->u.err_resp.cmd_id,
2921 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2922 le32_to_cpu(pkt->u.err_resp.error_info));
2925 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2927 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2929 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2930 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2931 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2932 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2933 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2934 rxon->channel = csa->channel;
2935 priv->staging39_rxon.channel = csa->channel;
2938 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2939 struct iwl_rx_mem_buffer *rxb)
2941 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2942 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2943 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2945 if (!report->state) {
2946 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2947 "Spectrum Measure Notification: Start\n");
2951 memcpy(&priv->measure_report, report, sizeof(*report));
2952 priv->measurement_status |= MEASUREMENT_READY;
2956 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2957 struct iwl_rx_mem_buffer *rxb)
2959 #ifdef CONFIG_IWL3945_DEBUG
2960 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2961 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2962 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2963 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2967 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2968 struct iwl_rx_mem_buffer *rxb)
2970 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2971 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2972 "notification for %s:\n",
2973 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2974 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2975 le32_to_cpu(pkt->len));
2978 static void iwl3945_bg_beacon_update(struct work_struct *work)
2980 struct iwl_priv *priv =
2981 container_of(work, struct iwl_priv, beacon_update);
2982 struct sk_buff *beacon;
2984 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2985 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2988 IWL_ERROR("update beacon failed\n");
2992 mutex_lock(&priv->mutex);
2993 /* new beacon skb is allocated every time; dispose previous.*/
2994 if (priv->ibss_beacon)
2995 dev_kfree_skb(priv->ibss_beacon);
2997 priv->ibss_beacon = beacon;
2998 mutex_unlock(&priv->mutex);
3000 iwl3945_send_beacon_cmd(priv);
3003 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
3004 struct iwl_rx_mem_buffer *rxb)
3006 #ifdef CONFIG_IWL3945_DEBUG
3007 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3008 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3009 u8 rate = beacon->beacon_notify_hdr.rate;
3011 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3012 "tsf %d %d rate %d\n",
3013 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3014 beacon->beacon_notify_hdr.failure_frame,
3015 le32_to_cpu(beacon->ibss_mgr_status),
3016 le32_to_cpu(beacon->high_tsf),
3017 le32_to_cpu(beacon->low_tsf), rate);
3020 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3021 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3022 queue_work(priv->workqueue, &priv->beacon_update);
3025 /* Service response to REPLY_SCAN_CMD (0x80) */
3026 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
3027 struct iwl_rx_mem_buffer *rxb)
3029 #ifdef CONFIG_IWL3945_DEBUG
3030 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3031 struct iwl_scanreq_notification *notif =
3032 (struct iwl_scanreq_notification *)pkt->u.raw;
3034 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3038 /* Service SCAN_START_NOTIFICATION (0x82) */
3039 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
3040 struct iwl_rx_mem_buffer *rxb)
3042 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3043 struct iwl_scanstart_notification *notif =
3044 (struct iwl_scanstart_notification *)pkt->u.raw;
3045 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3046 IWL_DEBUG_SCAN("Scan start: "
3048 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3050 notif->band ? "bg" : "a",
3052 notif->tsf_low, notif->status, notif->beacon_timer);
3055 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3056 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
3057 struct iwl_rx_mem_buffer *rxb)
3059 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3060 struct iwl_scanresults_notification *notif =
3061 (struct iwl_scanresults_notification *)pkt->u.raw;
3063 IWL_DEBUG_SCAN("Scan ch.res: "
3065 "(TSF: 0x%08X:%08X) - %d "
3066 "elapsed=%lu usec (%dms since last)\n",
3068 notif->band ? "bg" : "a",
3069 le32_to_cpu(notif->tsf_high),
3070 le32_to_cpu(notif->tsf_low),
3071 le32_to_cpu(notif->statistics[0]),
3072 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3073 jiffies_to_msecs(elapsed_jiffies
3074 (priv->last_scan_jiffies, jiffies)));
3076 priv->last_scan_jiffies = jiffies;
3077 priv->next_scan_jiffies = 0;
3080 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3081 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
3082 struct iwl_rx_mem_buffer *rxb)
3084 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3085 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3087 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3088 scan_notif->scanned_channels,
3089 scan_notif->tsf_low,
3090 scan_notif->tsf_high, scan_notif->status);
3092 /* The HW is no longer scanning */
3093 clear_bit(STATUS_SCAN_HW, &priv->status);
3095 /* The scan completion notification came in, so kill that timer... */
3096 cancel_delayed_work(&priv->scan_check);
3098 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3099 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3101 jiffies_to_msecs(elapsed_jiffies
3102 (priv->scan_pass_start, jiffies)));
3104 /* Remove this scanned band from the list of pending
3105 * bands to scan, band G precedes A in order of scanning
3106 * as seen in iwl3945_bg_request_scan */
3107 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3108 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3109 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3110 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3112 /* If a request to abort was given, or the scan did not succeed
3113 * then we reset the scan state machine and terminate,
3114 * re-queuing another scan if one has been requested */
3115 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3116 IWL_DEBUG_INFO("Aborted scan completed.\n");
3117 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3119 /* If there are more bands on this scan pass reschedule */
3120 if (priv->scan_bands > 0)
3124 priv->last_scan_jiffies = jiffies;
3125 priv->next_scan_jiffies = 0;
3126 IWL_DEBUG_INFO("Setting scan to off\n");
3128 clear_bit(STATUS_SCANNING, &priv->status);
3130 IWL_DEBUG_INFO("Scan took %dms\n",
3131 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3133 queue_work(priv->workqueue, &priv->scan_completed);
3138 priv->scan_pass_start = jiffies;
3139 queue_work(priv->workqueue, &priv->request_scan);
3142 /* Handle notification from uCode that card's power state is changing
3143 * due to software, hardware, or critical temperature RFKILL */
3144 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
3145 struct iwl_rx_mem_buffer *rxb)
3147 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3148 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3149 unsigned long status = priv->status;
3151 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3152 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3153 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3155 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3156 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3158 if (flags & HW_CARD_DISABLED)
3159 set_bit(STATUS_RF_KILL_HW, &priv->status);
3161 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3164 if (flags & SW_CARD_DISABLED)
3165 set_bit(STATUS_RF_KILL_SW, &priv->status);
3167 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3169 iwl3945_scan_cancel(priv);
3171 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3172 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3173 (test_bit(STATUS_RF_KILL_SW, &status) !=
3174 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3175 queue_work(priv->workqueue, &priv->rf_kill);
3177 wake_up_interruptible(&priv->wait_command_queue);
3181 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3183 * Setup the RX handlers for each of the reply types sent from the uCode
3186 * This function chains into the hardware specific files for them to setup
3187 * any hardware specific handlers as well.
3189 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3191 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3192 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3193 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3194 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3195 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3196 iwl3945_rx_spectrum_measure_notif;
3197 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3198 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3199 iwl3945_rx_pm_debug_statistics_notif;
3200 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3203 * The same handler is used for both the REPLY to a discrete
3204 * statistics request from the host as well as for the periodic
3205 * statistics notifications (after received beacons) from the uCode.
3207 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3208 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3210 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3211 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3212 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3213 iwl3945_rx_scan_results_notif;
3214 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3215 iwl3945_rx_scan_complete_notif;
3216 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3218 /* Set up hardware specific Rx handlers */
3219 iwl3945_hw_rx_handler_setup(priv);
3223 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3224 * When FW advances 'R' index, all entries between old and new 'R' index
3225 * need to be reclaimed.
3227 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3228 int txq_id, int index)
3230 struct iwl3945_tx_queue *txq = &priv->txq39[txq_id];
3231 struct iwl_queue *q = &txq->q;
3234 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3235 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3236 "is out of range [0-%d] %d %d.\n", txq_id,
3237 index, q->n_bd, q->write_ptr, q->read_ptr);
3241 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3242 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3244 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3245 q->write_ptr, q->read_ptr);
3246 queue_work(priv->workqueue, &priv->restart);
3255 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3256 * @rxb: Rx buffer to reclaim
3258 * If an Rx buffer has an async callback associated with it the callback
3259 * will be executed. The attached skb (if present) will only be freed
3260 * if the callback returns 1
3262 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3263 struct iwl_rx_mem_buffer *rxb)
3265 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3266 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3267 int txq_id = SEQ_TO_QUEUE(sequence);
3268 int index = SEQ_TO_INDEX(sequence);
3269 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3271 struct iwl3945_cmd *cmd;
3273 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3275 cmd_index = get_cmd_index(&priv->txq39[IWL_CMD_QUEUE_NUM].q, index, huge);
3276 cmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3278 /* Input error checking is done when commands are added to queue. */
3279 if (cmd->meta.flags & CMD_WANT_SKB) {
3280 cmd->meta.source->u.skb = rxb->skb;
3282 } else if (cmd->meta.u.callback &&
3283 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3286 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3288 if (!(cmd->meta.flags & CMD_ASYNC)) {
3289 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3290 wake_up_interruptible(&priv->wait_command_queue);
3294 /************************** RX-FUNCTIONS ****************************/
3296 * Rx theory of operation
3298 * The host allocates 32 DMA target addresses and passes the host address
3299 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3303 * The host/firmware share two index registers for managing the Rx buffers.
3305 * The READ index maps to the first position that the firmware may be writing
3306 * to -- the driver can read up to (but not including) this position and get
3308 * The READ index is managed by the firmware once the card is enabled.
3310 * The WRITE index maps to the last position the driver has read from -- the
3311 * position preceding WRITE is the last slot the firmware can place a packet.
3313 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3316 * During initialization, the host sets up the READ queue position to the first
3317 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3319 * When the firmware places a packet in a buffer, it will advance the READ index
3320 * and fire the RX interrupt. The driver can then query the READ index and
3321 * process as many packets as possible, moving the WRITE index forward as it
3322 * resets the Rx queue buffers with new memory.
3324 * The management in the driver is as follows:
3325 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3326 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3327 * to replenish the iwl->rxq->rx_free.
3328 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3329 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3330 * 'processed' and 'read' driver indexes as well)
3331 * + A received packet is processed and handed to the kernel network stack,
3332 * detached from the iwl->rxq. The driver 'processed' index is updated.
3333 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3334 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3335 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3336 * were enough free buffers and RX_STALLED is set it is cleared.
3341 * iwl3945_rx_queue_alloc() Allocates rx_free
3342 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3343 * iwl3945_rx_queue_restock
3344 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3345 * queue, updates firmware pointers, and updates
3346 * the WRITE index. If insufficient rx_free buffers
3347 * are available, schedules iwl3945_rx_replenish
3349 * -- enable interrupts --
3350 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3351 * READ INDEX, detaching the SKB from the pool.
3352 * Moves the packet buffer from queue to rx_used.
3353 * Calls iwl3945_rx_queue_restock to refill any empty
3360 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3362 static int iwl3945_rx_queue_space(const struct iwl_rx_queue *q)
3364 int s = q->read - q->write;
3367 /* keep some buffer to not confuse full and empty queue */
3375 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3377 int iwl3945_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
3381 unsigned long flags;
3383 spin_lock_irqsave(&q->lock, flags);
3385 if (q->need_update == 0)
3388 /* If power-saving is in use, make sure device is awake */
3389 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3390 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3392 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3393 iwl_set_bit(priv, CSR_GP_CNTRL,
3394 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3398 rc = iwl_grab_nic_access(priv);
3402 /* Device expects a multiple of 8 */
3403 iwl_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3405 iwl_release_nic_access(priv);
3407 /* Else device is assumed to be awake */
3409 /* Device expects a multiple of 8 */
3410 iwl_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3416 spin_unlock_irqrestore(&q->lock, flags);
3421 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3423 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3424 dma_addr_t dma_addr)
3426 return cpu_to_le32((u32)dma_addr);
3430 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3432 * If there are slots in the RX queue that need to be restocked,
3433 * and we have free pre-allocated buffers, fill the ranks as much
3434 * as we can, pulling from rx_free.
3436 * This moves the 'write' index forward to catch up with 'processed', and
3437 * also updates the memory address in the firmware to reference the new
3440 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3442 struct iwl_rx_queue *rxq = &priv->rxq;
3443 struct list_head *element;
3444 struct iwl_rx_mem_buffer *rxb;
3445 unsigned long flags;
3448 spin_lock_irqsave(&rxq->lock, flags);
3449 write = rxq->write & ~0x7;
3450 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3451 /* Get next free Rx buffer, remove from free list */
3452 element = rxq->rx_free.next;
3453 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3456 /* Point to Rx buffer via next RBD in circular buffer */
3457 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3458 rxq->queue[rxq->write] = rxb;
3459 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3462 spin_unlock_irqrestore(&rxq->lock, flags);
3463 /* If the pre-allocated buffer pool is dropping low, schedule to
3465 if (rxq->free_count <= RX_LOW_WATERMARK)
3466 queue_work(priv->workqueue, &priv->rx_replenish);
3469 /* If we've added more space for the firmware to place data, tell it.
3470 * Increment device's write pointer in multiples of 8. */
3471 if ((write != (rxq->write & ~0x7))
3472 || (abs(rxq->write - rxq->read) > 7)) {
3473 spin_lock_irqsave(&rxq->lock, flags);
3474 rxq->need_update = 1;
3475 spin_unlock_irqrestore(&rxq->lock, flags);
3476 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3485 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3487 * When moving to rx_free an SKB is allocated for the slot.
3489 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3490 * This is called as a scheduled work item (except for during initialization)
3492 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3494 struct iwl_rx_queue *rxq = &priv->rxq;
3495 struct list_head *element;
3496 struct iwl_rx_mem_buffer *rxb;
3497 unsigned long flags;
3498 spin_lock_irqsave(&rxq->lock, flags);
3499 while (!list_empty(&rxq->rx_used)) {
3500 element = rxq->rx_used.next;
3501 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3503 /* Alloc a new receive buffer */
3505 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3507 if (net_ratelimit())
3508 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3509 /* We don't reschedule replenish work here -- we will
3510 * call the restock method and if it still needs
3511 * more buffers it will schedule replenish */
3515 /* If radiotap head is required, reserve some headroom here.
3516 * The physical head count is a variable rx_stats->phy_count.
3517 * We reserve 4 bytes here. Plus these extra bytes, the
3518 * headroom of the physical head should be enough for the
3519 * radiotap head that iwl3945 supported. See iwl3945_rt.
3521 skb_reserve(rxb->skb, 4);
3523 priv->alloc_rxb_skb++;
3526 /* Get physical address of RB/SKB */
3527 rxb->real_dma_addr =
3528 pci_map_single(priv->pci_dev, rxb->skb->data,
3529 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3530 list_add_tail(&rxb->list, &rxq->rx_free);
3533 spin_unlock_irqrestore(&rxq->lock, flags);
3537 * this should be called while priv->lock is locked
3539 static void __iwl3945_rx_replenish(void *data)
3541 struct iwl_priv *priv = data;
3543 iwl3945_rx_allocate(priv);
3544 iwl3945_rx_queue_restock(priv);
3548 void iwl3945_rx_replenish(void *data)
3550 struct iwl_priv *priv = data;
3551 unsigned long flags;
3553 iwl3945_rx_allocate(priv);
3555 spin_lock_irqsave(&priv->lock, flags);
3556 iwl3945_rx_queue_restock(priv);
3557 spin_unlock_irqrestore(&priv->lock, flags);
3560 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3561 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3562 * This free routine walks the list of POOL entries and if SKB is set to
3563 * non NULL it is unmapped and freed
3565 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3568 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3569 if (rxq->pool[i].skb != NULL) {
3570 pci_unmap_single(priv->pci_dev,
3571 rxq->pool[i].real_dma_addr,
3572 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3573 dev_kfree_skb(rxq->pool[i].skb);
3577 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3582 int iwl3945_rx_queue_alloc(struct iwl_priv *priv)
3584 struct iwl_rx_queue *rxq = &priv->rxq;
3585 struct pci_dev *dev = priv->pci_dev;
3588 spin_lock_init(&rxq->lock);
3589 INIT_LIST_HEAD(&rxq->rx_free);
3590 INIT_LIST_HEAD(&rxq->rx_used);
3592 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3593 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3597 /* Fill the rx_used queue with _all_ of the Rx buffers */
3598 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3599 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3601 /* Set us so that we have processed and used all buffers, but have
3602 * not restocked the Rx queue with fresh buffers */
3603 rxq->read = rxq->write = 0;
3604 rxq->free_count = 0;
3605 rxq->need_update = 0;
3609 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3611 unsigned long flags;
3613 spin_lock_irqsave(&rxq->lock, flags);
3614 INIT_LIST_HEAD(&rxq->rx_free);
3615 INIT_LIST_HEAD(&rxq->rx_used);
3616 /* Fill the rx_used queue with _all_ of the Rx buffers */
3617 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3618 /* In the reset function, these buffers may have been allocated
3619 * to an SKB, so we need to unmap and free potential storage */
3620 if (rxq->pool[i].skb != NULL) {
3621 pci_unmap_single(priv->pci_dev,
3622 rxq->pool[i].real_dma_addr,
3623 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3624 priv->alloc_rxb_skb--;
3625 dev_kfree_skb(rxq->pool[i].skb);
3626 rxq->pool[i].skb = NULL;
3628 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3631 /* Set us so that we have processed and used all buffers, but have
3632 * not restocked the Rx queue with fresh buffers */
3633 rxq->read = rxq->write = 0;
3634 rxq->free_count = 0;
3635 spin_unlock_irqrestore(&rxq->lock, flags);
3638 /* Convert linear signal-to-noise ratio into dB */
3639 static u8 ratio2dB[100] = {
3640 /* 0 1 2 3 4 5 6 7 8 9 */
3641 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3642 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3643 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3644 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3645 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3646 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3647 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3648 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3649 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3650 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3653 /* Calculates a relative dB value from a ratio of linear
3654 * (i.e. not dB) signal levels.
3655 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3656 int iwl3945_calc_db_from_ratio(int sig_ratio)
3658 /* 1000:1 or higher just report as 60 dB */
3659 if (sig_ratio >= 1000)
3662 /* 100:1 or higher, divide by 10 and use table,
3663 * add 20 dB to make up for divide by 10 */
3664 if (sig_ratio >= 100)
3665 return 20 + (int)ratio2dB[sig_ratio/10];
3667 /* We shouldn't see this */
3671 /* Use table for ratios 1:1 - 99:1 */
3672 return (int)ratio2dB[sig_ratio];
3675 #define PERFECT_RSSI (-20) /* dBm */
3676 #define WORST_RSSI (-95) /* dBm */
3677 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3679 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3680 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3681 * about formulas used below. */
3682 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3685 int degradation = PERFECT_RSSI - rssi_dbm;
3687 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3688 * as indicator; formula is (signal dbm - noise dbm).
3689 * SNR at or above 40 is a great signal (100%).
3690 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3691 * Weakest usable signal is usually 10 - 15 dB SNR. */
3693 if (rssi_dbm - noise_dbm >= 40)
3695 else if (rssi_dbm < noise_dbm)
3697 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3699 /* Else use just the signal level.
3700 * This formula is a least squares fit of data points collected and
3701 * compared with a reference system that had a percentage (%) display
3702 * for signal quality. */
3704 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3705 (15 * RSSI_RANGE + 62 * degradation)) /
3706 (RSSI_RANGE * RSSI_RANGE);
3710 else if (sig_qual < 1)
3717 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3719 * Uses the priv->rx_handlers callback function array to invoke
3720 * the appropriate handlers, including command responses,
3721 * frame-received notifications, and other notifications.
3723 static void iwl3945_rx_handle(struct iwl_priv *priv)
3725 struct iwl_rx_mem_buffer *rxb;
3726 struct iwl_rx_packet *pkt;
3727 struct iwl_rx_queue *rxq = &priv->rxq;
3730 unsigned long flags;
3734 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3735 * buffer that the driver may process (last buffer filled by ucode). */
3736 r = iwl3945_hw_get_rx_read(priv);
3739 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3741 /* Rx interrupt, but nothing sent from uCode */
3743 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3746 rxb = rxq->queue[i];
3748 /* If an RXB doesn't have a Rx queue slot associated with it,
3749 * then a bug has been introduced in the queue refilling
3750 * routines -- catch it here */
3751 BUG_ON(rxb == NULL);
3753 rxq->queue[i] = NULL;
3755 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3757 PCI_DMA_FROMDEVICE);
3758 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3760 /* Reclaim a command buffer only if this packet is a response
3761 * to a (driver-originated) command.
3762 * If the packet (e.g. Rx frame) originated from uCode,
3763 * there is no command buffer to reclaim.
3764 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3765 * but apparently a few don't get set; catch them here. */
3766 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3767 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3768 (pkt->hdr.cmd != REPLY_TX);
3770 /* Based on type of command response or notification,
3771 * handle those that need handling via function in
3772 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3773 if (priv->rx_handlers[pkt->hdr.cmd]) {
3774 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3775 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3776 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3777 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3779 /* No handling needed */
3780 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3781 "r %d i %d No handler needed for %s, 0x%02x\n",
3782 r, i, get_cmd_string(pkt->hdr.cmd),
3787 /* Invoke any callbacks, transfer the skb to caller, and
3788 * fire off the (possibly) blocking iwl3945_send_cmd()
3789 * as we reclaim the driver command queue */
3790 if (rxb && rxb->skb)
3791 iwl3945_tx_cmd_complete(priv, rxb);
3793 IWL_WARN(priv, "Claim null rxb?\n");
3796 /* For now we just don't re-use anything. We can tweak this
3797 * later to try and re-use notification packets and SKBs that
3798 * fail to Rx correctly */
3799 if (rxb->skb != NULL) {
3800 priv->alloc_rxb_skb--;
3801 dev_kfree_skb_any(rxb->skb);
3805 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3806 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3807 spin_lock_irqsave(&rxq->lock, flags);
3808 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3809 spin_unlock_irqrestore(&rxq->lock, flags);
3810 i = (i + 1) & RX_QUEUE_MASK;
3811 /* If there are a lot of unused frames,
3812 * restock the Rx queue so ucode won't assert. */
3817 __iwl3945_rx_replenish(priv);
3823 /* Backtrack one entry */
3825 iwl3945_rx_queue_restock(priv);
3829 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3831 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3832 struct iwl3945_tx_queue *txq)
3836 int txq_id = txq->q.id;
3838 if (txq->need_update == 0)
3841 /* if we're trying to save power */
3842 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3843 /* wake up nic if it's powered down ...
3844 * uCode will wake up, and interrupt us again, so next
3845 * time we'll skip this part. */
3846 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3848 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3849 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3850 iwl_set_bit(priv, CSR_GP_CNTRL,
3851 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3855 /* restore this queue's parameters in nic hardware. */
3856 rc = iwl_grab_nic_access(priv);
3859 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3860 txq->q.write_ptr | (txq_id << 8));
3861 iwl_release_nic_access(priv);
3863 /* else not in power-save mode, uCode will never sleep when we're
3864 * trying to tx (during RFKILL, we're not trying to tx). */
3866 iwl_write32(priv, HBUS_TARG_WRPTR,
3867 txq->q.write_ptr | (txq_id << 8));
3869 txq->need_update = 0;
3874 #ifdef CONFIG_IWL3945_DEBUG
3875 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3876 struct iwl3945_rxon_cmd *rxon)
3878 IWL_DEBUG_RADIO("RX CONFIG:\n");
3879 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3880 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3881 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3882 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3883 le32_to_cpu(rxon->filter_flags));
3884 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3885 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3886 rxon->ofdm_basic_rates);
3887 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3888 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3889 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3890 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3894 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3896 IWL_DEBUG_ISR("Enabling interrupts\n");
3897 set_bit(STATUS_INT_ENABLED, &priv->status);
3898 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3902 /* call this function to flush any scheduled tasklet */
3903 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3905 /* wait to make sure we flush pending tasklet*/
3906 synchronize_irq(priv->pci_dev->irq);
3907 tasklet_kill(&priv->irq_tasklet);
3911 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3913 clear_bit(STATUS_INT_ENABLED, &priv->status);
3915 /* disable interrupts from uCode/NIC to host */
3916 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3918 /* acknowledge/clear/reset any interrupts still pending
3919 * from uCode or flow handler (Rx/Tx DMA) */
3920 iwl_write32(priv, CSR_INT, 0xffffffff);
3921 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3922 IWL_DEBUG_ISR("Disabled interrupts\n");
3925 static const char *desc_lookup(int i)
3933 return "BAD_CHECKSUM";
3935 return "NMI_INTERRUPT";
3939 return "FATAL_ERROR";
3945 #define ERROR_START_OFFSET (1 * sizeof(u32))
3946 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3948 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3951 u32 desc, time, count, base, data1;
3952 u32 blink1, blink2, ilink1, ilink2;
3955 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3957 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3958 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
3962 rc = iwl_grab_nic_access(priv);
3964 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3968 count = iwl_read_targ_mem(priv, base);
3970 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3971 IWL_ERROR("Start IWL Error Log Dump:\n");
3972 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
3975 IWL_ERROR("Desc Time asrtPC blink2 "
3976 "ilink1 nmiPC Line\n");
3977 for (i = ERROR_START_OFFSET;
3978 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3979 i += ERROR_ELEM_SIZE) {
3980 desc = iwl_read_targ_mem(priv, base + i);
3982 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3984 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3986 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3988 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3990 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3992 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3995 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3996 desc_lookup(desc), desc, time, blink1, blink2,
3997 ilink1, ilink2, data1);
4000 iwl_release_nic_access(priv);
4004 #define EVENT_START_OFFSET (6 * sizeof(u32))
4007 * iwl3945_print_event_log - Dump error event log to syslog
4009 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
4011 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
4012 u32 num_events, u32 mode)
4015 u32 base; /* SRAM byte address of event log header */
4016 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4017 u32 ptr; /* SRAM byte address of log data */
4018 u32 ev, time, data; /* event log data */
4020 if (num_events == 0)
4023 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4026 event_size = 2 * sizeof(u32);
4028 event_size = 3 * sizeof(u32);
4030 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4032 /* "time" is actually "data" for mode 0 (no timestamp).
4033 * place event id # at far right for easier visual parsing. */
4034 for (i = 0; i < num_events; i++) {
4035 ev = iwl_read_targ_mem(priv, ptr);
4037 time = iwl_read_targ_mem(priv, ptr);
4040 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4042 data = iwl_read_targ_mem(priv, ptr);
4044 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4049 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
4052 u32 base; /* SRAM byte address of event log header */
4053 u32 capacity; /* event log capacity in # entries */
4054 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4055 u32 num_wraps; /* # times uCode wrapped to top of log */
4056 u32 next_entry; /* index of next entry to be written by uCode */
4057 u32 size; /* # entries that we'll print */
4059 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4060 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4061 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4065 rc = iwl_grab_nic_access(priv);
4067 IWL_WARN(priv, "Can not read from adapter at this time.\n");
4071 /* event log header */
4072 capacity = iwl_read_targ_mem(priv, base);
4073 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4074 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4075 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
4077 size = num_wraps ? capacity : next_entry;
4079 /* bail out if nothing in log */
4081 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4082 iwl_release_nic_access(priv);
4086 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4089 /* if uCode has wrapped back to top of log, start at the oldest entry,
4090 * i.e the next one that uCode would fill. */
4092 iwl3945_print_event_log(priv, next_entry,
4093 capacity - next_entry, mode);
4095 /* (then/else) start at top of log */
4096 iwl3945_print_event_log(priv, 0, next_entry, mode);
4098 iwl_release_nic_access(priv);
4102 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4104 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
4106 /* Set the FW error flag -- cleared on iwl3945_down */
4107 set_bit(STATUS_FW_ERROR, &priv->status);
4109 /* Cancel currently queued command. */
4110 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4112 #ifdef CONFIG_IWL3945_DEBUG
4113 if (priv->debug_level & IWL_DL_FW_ERRORS) {
4114 iwl3945_dump_nic_error_log(priv);
4115 iwl3945_dump_nic_event_log(priv);
4116 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
4120 wake_up_interruptible(&priv->wait_command_queue);
4122 /* Keep the restart process from trying to send host
4123 * commands by clearing the INIT status bit */
4124 clear_bit(STATUS_READY, &priv->status);
4126 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4127 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4128 "Restarting adapter due to uCode error.\n");
4130 if (iwl3945_is_associated(priv)) {
4131 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
4132 sizeof(priv->recovery39_rxon));
4133 priv->error_recovering = 1;
4135 queue_work(priv->workqueue, &priv->restart);
4139 static void iwl3945_error_recovery(struct iwl_priv *priv)
4141 unsigned long flags;
4143 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
4144 sizeof(priv->staging39_rxon));
4145 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4146 iwl3945_commit_rxon(priv);
4148 iwl3945_add_station(priv, priv->bssid, 1, 0);
4150 spin_lock_irqsave(&priv->lock, flags);
4151 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
4152 priv->error_recovering = 0;
4153 spin_unlock_irqrestore(&priv->lock, flags);
4156 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
4158 u32 inta, handled = 0;
4160 unsigned long flags;
4161 #ifdef CONFIG_IWL3945_DEBUG
4165 spin_lock_irqsave(&priv->lock, flags);
4167 /* Ack/clear/reset pending uCode interrupts.
4168 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4169 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4170 inta = iwl_read32(priv, CSR_INT);
4171 iwl_write32(priv, CSR_INT, inta);
4173 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4174 * Any new interrupts that happen after this, either while we're
4175 * in this tasklet, or later, will show up in next ISR/tasklet. */
4176 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4177 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4179 #ifdef CONFIG_IWL3945_DEBUG
4180 if (priv->debug_level & IWL_DL_ISR) {
4181 /* just for debug */
4182 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4183 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4184 inta, inta_mask, inta_fh);
4188 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4189 * atomic, make sure that inta covers all the interrupts that
4190 * we've discovered, even if FH interrupt came in just after
4191 * reading CSR_INT. */
4192 if (inta_fh & CSR39_FH_INT_RX_MASK)
4193 inta |= CSR_INT_BIT_FH_RX;
4194 if (inta_fh & CSR39_FH_INT_TX_MASK)
4195 inta |= CSR_INT_BIT_FH_TX;
4197 /* Now service all interrupt bits discovered above. */
4198 if (inta & CSR_INT_BIT_HW_ERR) {
4199 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4201 /* Tell the device to stop sending interrupts */
4202 iwl3945_disable_interrupts(priv);
4204 iwl3945_irq_handle_error(priv);
4206 handled |= CSR_INT_BIT_HW_ERR;
4208 spin_unlock_irqrestore(&priv->lock, flags);
4213 #ifdef CONFIG_IWL3945_DEBUG
4214 if (priv->debug_level & (IWL_DL_ISR)) {
4215 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4216 if (inta & CSR_INT_BIT_SCD)
4217 IWL_DEBUG_ISR("Scheduler finished to transmit "
4218 "the frame/frames.\n");
4220 /* Alive notification via Rx interrupt will do the real work */
4221 if (inta & CSR_INT_BIT_ALIVE)
4222 IWL_DEBUG_ISR("Alive interrupt\n");
4225 /* Safely ignore these bits for debug checks below */
4226 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4228 /* Error detected by uCode */
4229 if (inta & CSR_INT_BIT_SW_ERR) {
4230 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4232 iwl3945_irq_handle_error(priv);
4233 handled |= CSR_INT_BIT_SW_ERR;
4236 /* uCode wakes up after power-down sleep */
4237 if (inta & CSR_INT_BIT_WAKEUP) {
4238 IWL_DEBUG_ISR("Wakeup interrupt\n");
4239 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4240 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[0]);
4241 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[1]);
4242 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[2]);
4243 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[3]);
4244 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[4]);
4245 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[5]);
4247 handled |= CSR_INT_BIT_WAKEUP;
4250 /* All uCode command responses, including Tx command responses,
4251 * Rx "responses" (frame-received notification), and other
4252 * notifications from uCode come through here*/
4253 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4254 iwl3945_rx_handle(priv);
4255 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4258 if (inta & CSR_INT_BIT_FH_TX) {
4259 IWL_DEBUG_ISR("Tx interrupt\n");
4261 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4262 if (!iwl_grab_nic_access(priv)) {
4263 iwl_write_direct32(priv, FH39_TCSR_CREDIT
4264 (FH39_SRVC_CHNL), 0x0);
4265 iwl_release_nic_access(priv);
4267 handled |= CSR_INT_BIT_FH_TX;
4270 if (inta & ~handled)
4271 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4273 if (inta & ~CSR_INI_SET_MASK) {
4274 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
4275 inta & ~CSR_INI_SET_MASK);
4276 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
4279 /* Re-enable all interrupts */
4280 /* only Re-enable if disabled by irq */
4281 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4282 iwl3945_enable_interrupts(priv);
4284 #ifdef CONFIG_IWL3945_DEBUG
4285 if (priv->debug_level & (IWL_DL_ISR)) {
4286 inta = iwl_read32(priv, CSR_INT);
4287 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4288 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4289 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4290 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4293 spin_unlock_irqrestore(&priv->lock, flags);
4296 static irqreturn_t iwl3945_isr(int irq, void *data)
4298 struct iwl_priv *priv = data;
4299 u32 inta, inta_mask;
4304 spin_lock(&priv->lock);
4306 /* Disable (but don't clear!) interrupts here to avoid
4307 * back-to-back ISRs and sporadic interrupts from our NIC.
4308 * If we have something to service, the tasklet will re-enable ints.
4309 * If we *don't* have something, we'll re-enable before leaving here. */
4310 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4311 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4313 /* Discover which interrupts are active/pending */
4314 inta = iwl_read32(priv, CSR_INT);
4315 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4317 /* Ignore interrupt if there's nothing in NIC to service.
4318 * This may be due to IRQ shared with another device,
4319 * or due to sporadic interrupts thrown from our NIC. */
4320 if (!inta && !inta_fh) {
4321 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4325 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4326 /* Hardware disappeared */
4327 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
4331 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4332 inta, inta_mask, inta_fh);
4334 inta &= ~CSR_INT_BIT_SCD;
4336 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4337 if (likely(inta || inta_fh))
4338 tasklet_schedule(&priv->irq_tasklet);
4340 spin_unlock(&priv->lock);
4345 /* re-enable interrupts here since we don't have anything to service. */
4346 /* only Re-enable if disabled by irq */
4347 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4348 iwl3945_enable_interrupts(priv);
4349 spin_unlock(&priv->lock);
4353 /************************** EEPROM BANDS ****************************
4355 * The iwl3945_eeprom_band definitions below provide the mapping from the
4356 * EEPROM contents to the specific channel number supported for each
4359 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4360 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4361 * The specific geography and calibration information for that channel
4362 * is contained in the eeprom map itself.
4364 * During init, we copy the eeprom information and channel map
4365 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4367 * channel_map_24/52 provides the index in the channel_info array for a
4368 * given channel. We have to have two separate maps as there is channel
4369 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4372 * A value of 0xff stored in the channel_map indicates that the channel
4373 * is not supported by the hardware at all.
4375 * A value of 0xfe in the channel_map indicates that the channel is not
4376 * valid for Tx with the current hardware. This means that
4377 * while the system can tune and receive on a given channel, it may not
4378 * be able to associate or transmit any frames on that
4379 * channel. There is no corresponding channel information for that
4382 *********************************************************************/
4385 static const u8 iwl3945_eeprom_band_1[14] = {
4386 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4390 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4391 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4394 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4395 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4398 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4399 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4402 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4403 145, 149, 153, 157, 161, 165
4406 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4407 int *eeprom_ch_count,
4408 const struct iwl_eeprom_channel
4410 const u8 **eeprom_ch_index)
4413 case 1: /* 2.4GHz band */
4414 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4415 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4416 *eeprom_ch_index = iwl3945_eeprom_band_1;
4418 case 2: /* 4.9GHz band */
4419 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4420 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4421 *eeprom_ch_index = iwl3945_eeprom_band_2;
4423 case 3: /* 5.2GHz band */
4424 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4425 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4426 *eeprom_ch_index = iwl3945_eeprom_band_3;
4428 case 4: /* 5.5GHz band */
4429 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4430 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4431 *eeprom_ch_index = iwl3945_eeprom_band_4;
4433 case 5: /* 5.7GHz band */
4434 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4435 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4436 *eeprom_ch_index = iwl3945_eeprom_band_5;
4445 * iwl3945_get_channel_info - Find driver's private channel info
4447 * Based on band and channel number.
4449 const struct iwl_channel_info *
4450 iwl3945_get_channel_info(const struct iwl_priv *priv,
4451 enum ieee80211_band band, u16 channel)
4456 case IEEE80211_BAND_5GHZ:
4457 for (i = 14; i < priv->channel_count; i++) {
4458 if (priv->channel_info[i].channel == channel)
4459 return &priv->channel_info[i];
4463 case IEEE80211_BAND_2GHZ:
4464 if (channel >= 1 && channel <= 14)
4465 return &priv->channel_info[channel - 1];
4467 case IEEE80211_NUM_BANDS:
4474 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4478 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4480 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4482 int eeprom_ch_count = 0;
4483 const u8 *eeprom_ch_index = NULL;
4484 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4486 struct iwl_channel_info *ch_info;
4488 if (priv->channel_count) {
4489 IWL_DEBUG_INFO("Channel map already initialized.\n");
4493 if (priv->eeprom39.version < 0x2f) {
4494 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4495 priv->eeprom39.version);
4499 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4501 priv->channel_count =
4502 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4503 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4504 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4505 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4506 ARRAY_SIZE(iwl3945_eeprom_band_5);
4508 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4510 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4511 priv->channel_count, GFP_KERNEL);
4512 if (!priv->channel_info) {
4513 IWL_ERROR("Could not allocate channel_info\n");
4514 priv->channel_count = 0;
4518 ch_info = priv->channel_info;
4520 /* Loop through the 5 EEPROM bands adding them in order to the
4521 * channel map we maintain (that contains additional information than
4522 * what just in the EEPROM) */
4523 for (band = 1; band <= 5; band++) {
4525 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4526 &eeprom_ch_info, &eeprom_ch_index);
4528 /* Loop through each band adding each of the channels */
4529 for (ch = 0; ch < eeprom_ch_count; ch++) {
4530 ch_info->channel = eeprom_ch_index[ch];
4531 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4532 IEEE80211_BAND_5GHZ;
4534 /* permanently store EEPROM's channel regulatory flags
4535 * and max power in channel info database. */
4536 ch_info->eeprom = eeprom_ch_info[ch];
4538 /* Copy the run-time flags so they are there even on
4539 * invalid channels */
4540 ch_info->flags = eeprom_ch_info[ch].flags;
4542 if (!(is_channel_valid(ch_info))) {
4543 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4547 is_channel_a_band(ch_info) ?
4553 /* Initialize regulatory-based run-time data */
4554 ch_info->max_power_avg = ch_info->curr_txpow =
4555 eeprom_ch_info[ch].max_power_avg;
4556 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4557 ch_info->min_power = 0;
4559 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4560 " %ddBm): Ad-Hoc %ssupported\n",
4562 is_channel_a_band(ch_info) ?
4564 CHECK_AND_PRINT(VALID),
4565 CHECK_AND_PRINT(IBSS),
4566 CHECK_AND_PRINT(ACTIVE),
4567 CHECK_AND_PRINT(RADAR),
4568 CHECK_AND_PRINT(WIDE),
4569 CHECK_AND_PRINT(DFS),
4570 eeprom_ch_info[ch].flags,
4571 eeprom_ch_info[ch].max_power_avg,
4572 ((eeprom_ch_info[ch].
4573 flags & EEPROM_CHANNEL_IBSS)
4574 && !(eeprom_ch_info[ch].
4575 flags & EEPROM_CHANNEL_RADAR))
4578 /* Set the user_txpower_limit to the highest power
4579 * supported by any channel */
4580 if (eeprom_ch_info[ch].max_power_avg >
4581 priv->user_txpower_limit)
4582 priv->user_txpower_limit =
4583 eeprom_ch_info[ch].max_power_avg;
4589 /* Set up txpower settings in driver for all channels */
4590 if (iwl3945_txpower_set_from_eeprom(priv))
4597 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4599 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4601 kfree(priv->channel_info);
4602 priv->channel_count = 0;
4605 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4606 * sending probe req. This should be set long enough to hear probe responses
4607 * from more than one AP. */
4608 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4609 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4611 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4612 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4614 /* For faster active scanning, scan will move to the next channel if fewer than
4615 * PLCP_QUIET_THRESH packets are heard on this channel within
4616 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4617 * time if it's a quiet channel (nothing responded to our probe, and there's
4618 * no other traffic).
4619 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4620 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4621 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4623 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4624 * Must be set longer than active dwell time.
4625 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4626 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4627 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4628 #define IWL_PASSIVE_DWELL_BASE (100)
4629 #define IWL_CHANNEL_TUNE_TIME 5
4631 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4633 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4634 enum ieee80211_band band,
4637 if (band == IEEE80211_BAND_5GHZ)
4638 return IWL_ACTIVE_DWELL_TIME_52 +
4639 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4641 return IWL_ACTIVE_DWELL_TIME_24 +
4642 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4645 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4646 enum ieee80211_band band)
4648 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4649 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4650 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4652 if (iwl3945_is_associated(priv)) {
4653 /* If we're associated, we clamp the maximum passive
4654 * dwell time to be 98% of the beacon interval (minus
4655 * 2 * channel tune time) */
4656 passive = priv->beacon_int;
4657 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4658 passive = IWL_PASSIVE_DWELL_BASE;
4659 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4665 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4666 enum ieee80211_band band,
4667 u8 is_active, u8 n_probes,
4668 struct iwl3945_scan_channel *scan_ch)
4670 const struct ieee80211_channel *channels = NULL;
4671 const struct ieee80211_supported_band *sband;
4672 const struct iwl_channel_info *ch_info;
4673 u16 passive_dwell = 0;
4674 u16 active_dwell = 0;
4677 sband = iwl3945_get_band(priv, band);
4681 channels = sband->channels;
4683 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4684 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4686 if (passive_dwell <= active_dwell)
4687 passive_dwell = active_dwell + 1;
4689 for (i = 0, added = 0; i < sband->n_channels; i++) {
4690 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4693 scan_ch->channel = channels[i].hw_value;
4695 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4696 if (!is_channel_valid(ch_info)) {
4697 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4702 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4703 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4704 /* If passive , set up for auto-switch
4705 * and use long active_dwell time.
4707 if (!is_active || is_channel_passive(ch_info) ||
4708 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4709 scan_ch->type = 0; /* passive */
4710 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4711 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4713 scan_ch->type = 1; /* active */
4716 /* Set direct probe bits. These may be used both for active
4717 * scan channels (probes gets sent right away),
4718 * or for passive channels (probes get se sent only after
4719 * hearing clear Rx packet).*/
4720 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4722 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4724 /* uCode v1 does not allow setting direct probe bits on
4725 * passive channel. */
4726 if ((scan_ch->type & 1) && n_probes)
4727 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4730 /* Set txpower levels to defaults */
4731 scan_ch->tpc.dsp_atten = 110;
4732 /* scan_pwr_info->tpc.dsp_atten; */
4734 /*scan_pwr_info->tpc.tx_gain; */
4735 if (band == IEEE80211_BAND_5GHZ)
4736 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4738 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4739 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4741 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4745 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4747 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4748 (scan_ch->type & 1) ?
4749 active_dwell : passive_dwell);
4755 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4759 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4760 struct ieee80211_rate *rates)
4764 for (i = 0; i < IWL_RATE_COUNT; i++) {
4765 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4766 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4767 rates[i].hw_value_short = i;
4769 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4771 * If CCK != 1M then set short preamble rate flag.
4773 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4774 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4780 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4782 static int iwl3945_init_geos(struct iwl_priv *priv)
4784 struct iwl_channel_info *ch;
4785 struct ieee80211_supported_band *sband;
4786 struct ieee80211_channel *channels;
4787 struct ieee80211_channel *geo_ch;
4788 struct ieee80211_rate *rates;
4791 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4792 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4793 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4794 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4798 channels = kzalloc(sizeof(struct ieee80211_channel) *
4799 priv->channel_count, GFP_KERNEL);
4803 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4810 /* 5.2GHz channels start after the 2.4GHz channels */
4811 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4812 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4814 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4815 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4817 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4818 sband->channels = channels;
4820 sband->bitrates = rates;
4821 sband->n_bitrates = IWL_RATE_COUNT;
4823 priv->ieee_channels = channels;
4824 priv->ieee_rates = rates;
4826 iwl3945_init_hw_rates(priv, rates);
4828 for (i = 0; i < priv->channel_count; i++) {
4829 ch = &priv->channel_info[i];
4831 /* FIXME: might be removed if scan is OK*/
4832 if (!is_channel_valid(ch))
4835 if (is_channel_a_band(ch))
4836 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4838 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4840 geo_ch = &sband->channels[sband->n_channels++];
4842 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4843 geo_ch->max_power = ch->max_power_avg;
4844 geo_ch->max_antenna_gain = 0xff;
4845 geo_ch->hw_value = ch->channel;
4847 if (is_channel_valid(ch)) {
4848 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4849 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4851 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4852 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4854 if (ch->flags & EEPROM_CHANNEL_RADAR)
4855 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4857 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4858 priv->max_channel_txpower_limit =
4861 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4864 /* Save flags for reg domain usage */
4865 geo_ch->orig_flags = geo_ch->flags;
4867 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4868 ch->channel, geo_ch->center_freq,
4869 is_channel_a_band(ch) ? "5.2" : "2.4",
4870 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4871 "restricted" : "valid",
4875 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4876 priv->cfg->sku & IWL_SKU_A) {
4877 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4878 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4879 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4880 priv->cfg->sku &= ~IWL_SKU_A;
4883 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4884 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4885 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4887 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4888 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4889 &priv->bands[IEEE80211_BAND_2GHZ];
4890 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4891 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4892 &priv->bands[IEEE80211_BAND_5GHZ];
4894 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4900 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4902 static void iwl3945_free_geos(struct iwl_priv *priv)
4904 kfree(priv->ieee_channels);
4905 kfree(priv->ieee_rates);
4906 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4909 /******************************************************************************
4911 * uCode download functions
4913 ******************************************************************************/
4915 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4917 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4918 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4919 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4920 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4921 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4922 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4926 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4927 * looking at all data.
4929 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4936 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4938 rc = iwl_grab_nic_access(priv);
4942 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4943 IWL39_RTC_INST_LOWER_BOUND);
4946 for (; len > 0; len -= sizeof(u32), image++) {
4947 /* read data comes through single port, auto-incr addr */
4948 /* NOTE: Use the debugless read so we don't flood kernel log
4949 * if IWL_DL_IO is set */
4950 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4951 if (val != le32_to_cpu(*image)) {
4952 IWL_ERROR("uCode INST section is invalid at "
4953 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4954 save_len - len, val, le32_to_cpu(*image));
4962 iwl_release_nic_access(priv);
4965 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4972 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4973 * using sample data 100 bytes apart. If these sample points are good,
4974 * it's a pretty good bet that everything between them is good, too.
4976 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4983 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4985 rc = iwl_grab_nic_access(priv);
4989 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4990 /* read data comes through single port, auto-incr addr */
4991 /* NOTE: Use the debugless read so we don't flood kernel log
4992 * if IWL_DL_IO is set */
4993 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4994 i + IWL39_RTC_INST_LOWER_BOUND);
4995 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4996 if (val != le32_to_cpu(*image)) {
4997 #if 0 /* Enable this if you want to see details */
4998 IWL_ERROR("uCode INST section is invalid at "
4999 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5009 iwl_release_nic_access(priv);
5016 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5017 * and verify its contents
5019 static int iwl3945_verify_ucode(struct iwl_priv *priv)
5026 image = (__le32 *)priv->ucode_boot.v_addr;
5027 len = priv->ucode_boot.len;
5028 rc = iwl3945_verify_inst_sparse(priv, image, len);
5030 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5034 /* Try initialize */
5035 image = (__le32 *)priv->ucode_init.v_addr;
5036 len = priv->ucode_init.len;
5037 rc = iwl3945_verify_inst_sparse(priv, image, len);
5039 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5043 /* Try runtime/protocol */
5044 image = (__le32 *)priv->ucode_code.v_addr;
5045 len = priv->ucode_code.len;
5046 rc = iwl3945_verify_inst_sparse(priv, image, len);
5048 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5052 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5054 /* Since nothing seems to match, show first several data entries in
5055 * instruction SRAM, so maybe visual inspection will give a clue.
5056 * Selection of bootstrap image (vs. other images) is arbitrary. */
5057 image = (__le32 *)priv->ucode_boot.v_addr;
5058 len = priv->ucode_boot.len;
5059 rc = iwl3945_verify_inst_full(priv, image, len);
5065 /* check contents of special bootstrap uCode SRAM */
5066 static int iwl3945_verify_bsm(struct iwl_priv *priv)
5068 __le32 *image = priv->ucode_boot.v_addr;
5069 u32 len = priv->ucode_boot.len;
5073 IWL_DEBUG_INFO("Begin verify bsm\n");
5075 /* verify BSM SRAM contents */
5076 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
5077 for (reg = BSM_SRAM_LOWER_BOUND;
5078 reg < BSM_SRAM_LOWER_BOUND + len;
5079 reg += sizeof(u32), image++) {
5080 val = iwl_read_prph(priv, reg);
5081 if (val != le32_to_cpu(*image)) {
5082 IWL_ERROR("BSM uCode verification failed at "
5083 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5084 BSM_SRAM_LOWER_BOUND,
5085 reg - BSM_SRAM_LOWER_BOUND, len,
5086 val, le32_to_cpu(*image));
5091 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5097 * iwl3945_load_bsm - Load bootstrap instructions
5101 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5102 * in special SRAM that does not power down during RFKILL. When powering back
5103 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5104 * the bootstrap program into the on-board processor, and starts it.
5106 * The bootstrap program loads (via DMA) instructions and data for a new
5107 * program from host DRAM locations indicated by the host driver in the
5108 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5111 * When initializing the NIC, the host driver points the BSM to the
5112 * "initialize" uCode image. This uCode sets up some internal data, then
5113 * notifies host via "initialize alive" that it is complete.
5115 * The host then replaces the BSM_DRAM_* pointer values to point to the
5116 * normal runtime uCode instructions and a backup uCode data cache buffer
5117 * (filled initially with starting data values for the on-board processor),
5118 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5119 * which begins normal operation.
5121 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5122 * the backup data cache in DRAM before SRAM is powered down.
5124 * When powering back up, the BSM loads the bootstrap program. This reloads
5125 * the runtime uCode instructions and the backup data cache into SRAM,
5126 * and re-launches the runtime uCode from where it left off.
5128 static int iwl3945_load_bsm(struct iwl_priv *priv)
5130 __le32 *image = priv->ucode_boot.v_addr;
5131 u32 len = priv->ucode_boot.len;
5141 IWL_DEBUG_INFO("Begin load bsm\n");
5143 /* make sure bootstrap program is no larger than BSM's SRAM size */
5144 if (len > IWL39_MAX_BSM_SIZE)
5147 /* Tell bootstrap uCode where to find the "Initialize" uCode
5148 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5149 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5150 * after the "initialize" uCode has run, to point to
5151 * runtime/protocol instructions and backup data cache. */
5152 pinst = priv->ucode_init.p_addr;
5153 pdata = priv->ucode_init_data.p_addr;
5154 inst_len = priv->ucode_init.len;
5155 data_len = priv->ucode_init_data.len;
5157 rc = iwl_grab_nic_access(priv);
5161 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5162 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5163 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5164 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5166 /* Fill BSM memory with bootstrap instructions */
5167 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5168 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5169 reg_offset += sizeof(u32), image++)
5170 _iwl_write_prph(priv, reg_offset,
5171 le32_to_cpu(*image));
5173 rc = iwl3945_verify_bsm(priv);
5175 iwl_release_nic_access(priv);
5179 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5180 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5181 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
5182 IWL39_RTC_INST_LOWER_BOUND);
5183 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5185 /* Load bootstrap code into instruction SRAM now,
5186 * to prepare to load "initialize" uCode */
5187 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5188 BSM_WR_CTRL_REG_BIT_START);
5190 /* Wait for load of bootstrap uCode to finish */
5191 for (i = 0; i < 100; i++) {
5192 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
5193 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5198 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5200 IWL_ERROR("BSM write did not complete!\n");
5204 /* Enable future boot loads whenever power management unit triggers it
5205 * (e.g. when powering back up after power-save shutdown) */
5206 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5207 BSM_WR_CTRL_REG_BIT_START_EN);
5209 iwl_release_nic_access(priv);
5214 static void iwl3945_nic_start(struct iwl_priv *priv)
5216 /* Remove all resets to allow NIC to operate */
5217 iwl_write32(priv, CSR_RESET, 0);
5221 * iwl3945_read_ucode - Read uCode images from disk file.
5223 * Copy into buffers for card to fetch via bus-mastering
5225 static int iwl3945_read_ucode(struct iwl_priv *priv)
5227 struct iwl_ucode *ucode;
5228 int ret = -EINVAL, index;
5229 const struct firmware *ucode_raw;
5230 /* firmware file name contains uCode/driver compatibility version */
5231 const char *name_pre = priv->cfg->fw_name_pre;
5232 const unsigned int api_max = priv->cfg->ucode_api_max;
5233 const unsigned int api_min = priv->cfg->ucode_api_min;
5237 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5239 /* Ask kernel firmware_class module to get the boot firmware off disk.
5240 * request_firmware() is synchronous, file is in memory on return. */
5241 for (index = api_max; index >= api_min; index--) {
5242 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5243 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5245 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5252 if (index < api_max)
5253 IWL_ERROR("Loaded firmware %s, which is deprecated. Please use API v%u instead.\n",
5255 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5256 buf, ucode_raw->size);
5264 /* Make sure that we got at least our header! */
5265 if (ucode_raw->size < sizeof(*ucode)) {
5266 IWL_ERROR("File size way too small!\n");
5271 /* Data from ucode file: header followed by uCode images */
5272 ucode = (void *)ucode_raw->data;
5274 priv->ucode_ver = le32_to_cpu(ucode->ver);
5275 api_ver = IWL_UCODE_API(priv->ucode_ver);
5276 inst_size = le32_to_cpu(ucode->inst_size);
5277 data_size = le32_to_cpu(ucode->data_size);
5278 init_size = le32_to_cpu(ucode->init_size);
5279 init_data_size = le32_to_cpu(ucode->init_data_size);
5280 boot_size = le32_to_cpu(ucode->boot_size);
5282 /* api_ver should match the api version forming part of the
5283 * firmware filename ... but we don't check for that and only rely
5284 * on the API version read from firware header from here on forward */
5286 if (api_ver < api_min || api_ver > api_max) {
5287 IWL_ERROR("Driver unable to support your firmware API. "
5288 "Driver supports v%u, firmware is v%u.\n",
5290 priv->ucode_ver = 0;
5294 if (api_ver != api_max)
5295 IWL_ERROR("Firmware has old API version. Expected %u, "
5296 "got %u. New firmware can be obtained "
5297 "from http://www.intellinuxwireless.org.\n",
5300 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
5301 IWL_UCODE_MAJOR(priv->ucode_ver),
5302 IWL_UCODE_MINOR(priv->ucode_ver),
5303 IWL_UCODE_API(priv->ucode_ver),
5304 IWL_UCODE_SERIAL(priv->ucode_ver));
5306 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5308 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5309 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5310 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5311 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5312 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5315 /* Verify size of file vs. image size info in file's header */
5316 if (ucode_raw->size < sizeof(*ucode) +
5317 inst_size + data_size + init_size +
5318 init_data_size + boot_size) {
5320 IWL_DEBUG_INFO("uCode file size %d too small\n",
5321 (int)ucode_raw->size);
5326 /* Verify that uCode images will fit in card's SRAM */
5327 if (inst_size > IWL39_MAX_INST_SIZE) {
5328 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5334 if (data_size > IWL39_MAX_DATA_SIZE) {
5335 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5340 if (init_size > IWL39_MAX_INST_SIZE) {
5341 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5346 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5347 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5352 if (boot_size > IWL39_MAX_BSM_SIZE) {
5353 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5359 /* Allocate ucode buffers for card's bus-master loading ... */
5361 /* Runtime instructions and 2 copies of data:
5362 * 1) unmodified from disk
5363 * 2) backup cache for save/restore during power-downs */
5364 priv->ucode_code.len = inst_size;
5365 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5367 priv->ucode_data.len = data_size;
5368 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5370 priv->ucode_data_backup.len = data_size;
5371 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5373 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5374 !priv->ucode_data_backup.v_addr)
5377 /* Initialization instructions and data */
5378 if (init_size && init_data_size) {
5379 priv->ucode_init.len = init_size;
5380 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5382 priv->ucode_init_data.len = init_data_size;
5383 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5385 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5389 /* Bootstrap (instructions only, no data) */
5391 priv->ucode_boot.len = boot_size;
5392 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5394 if (!priv->ucode_boot.v_addr)
5398 /* Copy images into buffers for card's bus-master reads ... */
5400 /* Runtime instructions (first block of data in file) */
5401 src = &ucode->data[0];
5402 len = priv->ucode_code.len;
5403 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5404 memcpy(priv->ucode_code.v_addr, src, len);
5405 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5406 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5408 /* Runtime data (2nd block)
5409 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5410 src = &ucode->data[inst_size];
5411 len = priv->ucode_data.len;
5412 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5413 memcpy(priv->ucode_data.v_addr, src, len);
5414 memcpy(priv->ucode_data_backup.v_addr, src, len);
5416 /* Initialization instructions (3rd block) */
5418 src = &ucode->data[inst_size + data_size];
5419 len = priv->ucode_init.len;
5420 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5422 memcpy(priv->ucode_init.v_addr, src, len);
5425 /* Initialization data (4th block) */
5426 if (init_data_size) {
5427 src = &ucode->data[inst_size + data_size + init_size];
5428 len = priv->ucode_init_data.len;
5429 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5431 memcpy(priv->ucode_init_data.v_addr, src, len);
5434 /* Bootstrap instructions (5th block) */
5435 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5436 len = priv->ucode_boot.len;
5437 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5439 memcpy(priv->ucode_boot.v_addr, src, len);
5441 /* We have our copies now, allow OS release its copies */
5442 release_firmware(ucode_raw);
5446 IWL_ERROR("failed to allocate pci memory\n");
5448 iwl3945_dealloc_ucode_pci(priv);
5451 release_firmware(ucode_raw);
5459 * iwl3945_set_ucode_ptrs - Set uCode address location
5461 * Tell initialization uCode where to find runtime uCode.
5463 * BSM registers initially contain pointers to initialization uCode.
5464 * We need to replace them to load runtime uCode inst and data,
5465 * and to save runtime data when powering down.
5467 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5472 unsigned long flags;
5474 /* bits 31:0 for 3945 */
5475 pinst = priv->ucode_code.p_addr;
5476 pdata = priv->ucode_data_backup.p_addr;
5478 spin_lock_irqsave(&priv->lock, flags);
5479 rc = iwl_grab_nic_access(priv);
5481 spin_unlock_irqrestore(&priv->lock, flags);
5485 /* Tell bootstrap uCode where to find image to load */
5486 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5487 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5488 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5489 priv->ucode_data.len);
5491 /* Inst byte count must be last to set up, bit 31 signals uCode
5492 * that all new ptr/size info is in place */
5493 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5494 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5496 iwl_release_nic_access(priv);
5498 spin_unlock_irqrestore(&priv->lock, flags);
5500 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5506 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5508 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5510 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5512 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5514 /* Check alive response for "valid" sign from uCode */
5515 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5516 /* We had an error bringing up the hardware, so take it
5517 * all the way back down so we can try again */
5518 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5522 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5523 * This is a paranoid check, because we would not have gotten the
5524 * "initialize" alive if code weren't properly loaded. */
5525 if (iwl3945_verify_ucode(priv)) {
5526 /* Runtime instruction load was bad;
5527 * take it all the way back down so we can try again */
5528 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5532 /* Send pointers to protocol/runtime uCode image ... init code will
5533 * load and launch runtime uCode, which will send us another "Alive"
5535 IWL_DEBUG_INFO("Initialization Alive received.\n");
5536 if (iwl3945_set_ucode_ptrs(priv)) {
5537 /* Runtime instruction load won't happen;
5538 * take it all the way back down so we can try again */
5539 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5545 queue_work(priv->workqueue, &priv->restart);
5550 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5551 struct sk_buff *skb);
5554 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5555 * from protocol/runtime uCode (initialization uCode's
5556 * Alive gets handled by iwl3945_init_alive_start()).
5558 static void iwl3945_alive_start(struct iwl_priv *priv)
5561 int thermal_spin = 0;
5564 IWL_DEBUG_INFO("Runtime Alive received.\n");
5566 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5567 /* We had an error bringing up the hardware, so take it
5568 * all the way back down so we can try again */
5569 IWL_DEBUG_INFO("Alive failed.\n");
5573 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5574 * This is a paranoid check, because we would not have gotten the
5575 * "runtime" alive if code weren't properly loaded. */
5576 if (iwl3945_verify_ucode(priv)) {
5577 /* Runtime instruction load was bad;
5578 * take it all the way back down so we can try again */
5579 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5583 iwl3945_clear_stations_table(priv);
5585 rc = iwl_grab_nic_access(priv);
5587 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5591 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5592 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5593 iwl_release_nic_access(priv);
5596 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5597 /* if RFKILL is not on, then wait for thermal
5598 * sensor in adapter to kick in */
5599 while (iwl3945_hw_get_temperature(priv) == 0) {
5605 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5608 set_bit(STATUS_RF_KILL_HW, &priv->status);
5610 /* After the ALIVE response, we can send commands to 3945 uCode */
5611 set_bit(STATUS_ALIVE, &priv->status);
5613 /* Clear out the uCode error bit if it is set */
5614 clear_bit(STATUS_FW_ERROR, &priv->status);
5616 if (iwl3945_is_rfkill(priv))
5619 ieee80211_wake_queues(priv->hw);
5621 priv->active_rate = priv->rates_mask;
5622 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5624 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5626 if (iwl3945_is_associated(priv)) {
5627 struct iwl3945_rxon_cmd *active_rxon =
5628 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5630 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5631 sizeof(priv->staging39_rxon));
5632 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5634 /* Initialize our rx_config data */
5635 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5636 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5639 /* Configure Bluetooth device coexistence support */
5640 iwl3945_send_bt_config(priv);
5642 /* Configure the adapter for unassociated operation */
5643 iwl3945_commit_rxon(priv);
5645 iwl3945_reg_txpower_periodic(priv);
5647 iwl3945_led_register(priv);
5649 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5650 set_bit(STATUS_READY, &priv->status);
5651 wake_up_interruptible(&priv->wait_command_queue);
5653 if (priv->error_recovering)
5654 iwl3945_error_recovery(priv);
5656 /* reassociate for ADHOC mode */
5657 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5658 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5661 iwl3945_mac_beacon_update(priv->hw, beacon);
5667 queue_work(priv->workqueue, &priv->restart);
5670 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5672 static void __iwl3945_down(struct iwl_priv *priv)
5674 unsigned long flags;
5675 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5676 struct ieee80211_conf *conf = NULL;
5678 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5680 conf = ieee80211_get_hw_conf(priv->hw);
5683 set_bit(STATUS_EXIT_PENDING, &priv->status);
5685 iwl3945_led_unregister(priv);
5686 iwl3945_clear_stations_table(priv);
5688 /* Unblock any waiting calls */
5689 wake_up_interruptible_all(&priv->wait_command_queue);
5691 /* Wipe out the EXIT_PENDING status bit if we are not actually
5692 * exiting the module */
5694 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5696 /* stop and reset the on-board processor */
5697 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5699 /* tell the device to stop sending interrupts */
5700 spin_lock_irqsave(&priv->lock, flags);
5701 iwl3945_disable_interrupts(priv);
5702 spin_unlock_irqrestore(&priv->lock, flags);
5703 iwl_synchronize_irq(priv);
5705 if (priv->mac80211_registered)
5706 ieee80211_stop_queues(priv->hw);
5708 /* If we have not previously called iwl3945_init() then
5709 * clear all bits but the RF Kill and SUSPEND bits and return */
5710 if (!iwl3945_is_init(priv)) {
5711 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5713 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5715 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5716 STATUS_GEO_CONFIGURED |
5717 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5719 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5720 STATUS_EXIT_PENDING;
5724 /* ...otherwise clear out all the status bits but the RF Kill and
5725 * SUSPEND bits and continue taking the NIC down. */
5726 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5728 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5730 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5731 STATUS_GEO_CONFIGURED |
5732 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5734 test_bit(STATUS_FW_ERROR, &priv->status) <<
5736 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5737 STATUS_EXIT_PENDING;
5739 spin_lock_irqsave(&priv->lock, flags);
5740 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5741 spin_unlock_irqrestore(&priv->lock, flags);
5743 iwl3945_hw_txq_ctx_stop(priv);
5744 iwl3945_hw_rxq_stop(priv);
5746 spin_lock_irqsave(&priv->lock, flags);
5747 if (!iwl_grab_nic_access(priv)) {
5748 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5749 APMG_CLK_VAL_DMA_CLK_RQT);
5750 iwl_release_nic_access(priv);
5752 spin_unlock_irqrestore(&priv->lock, flags);
5756 iwl3945_hw_nic_stop_master(priv);
5757 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5758 iwl3945_hw_nic_reset(priv);
5761 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5763 if (priv->ibss_beacon)
5764 dev_kfree_skb(priv->ibss_beacon);
5765 priv->ibss_beacon = NULL;
5767 /* clear out any free frames */
5768 iwl3945_clear_free_frames(priv);
5771 static void iwl3945_down(struct iwl_priv *priv)
5773 mutex_lock(&priv->mutex);
5774 __iwl3945_down(priv);
5775 mutex_unlock(&priv->mutex);
5777 iwl3945_cancel_deferred_work(priv);
5780 #define MAX_HW_RESTARTS 5
5782 static int __iwl3945_up(struct iwl_priv *priv)
5786 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5787 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5791 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5792 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5797 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5798 IWL_ERROR("ucode not available for device bring up\n");
5802 /* If platform's RF_KILL switch is NOT set to KILL */
5803 if (iwl_read32(priv, CSR_GP_CNTRL) &
5804 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5805 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5807 set_bit(STATUS_RF_KILL_HW, &priv->status);
5808 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5809 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5814 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5816 rc = iwl3945_hw_nic_init(priv);
5818 IWL_ERROR("Unable to int nic\n");
5822 /* make sure rfkill handshake bits are cleared */
5823 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5824 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5825 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5827 /* clear (again), then enable host interrupts */
5828 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5829 iwl3945_enable_interrupts(priv);
5831 /* really make sure rfkill handshake bits are cleared */
5832 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5833 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5835 /* Copy original ucode data image from disk into backup cache.
5836 * This will be used to initialize the on-board processor's
5837 * data SRAM for a clean start when the runtime program first loads. */
5838 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5839 priv->ucode_data.len);
5841 /* We return success when we resume from suspend and rf_kill is on. */
5842 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5845 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5847 iwl3945_clear_stations_table(priv);
5849 /* load bootstrap state machine,
5850 * load bootstrap program into processor's memory,
5851 * prepare to load the "initialize" uCode */
5852 rc = iwl3945_load_bsm(priv);
5855 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5859 /* start card; "initialize" will load runtime ucode */
5860 iwl3945_nic_start(priv);
5862 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5867 set_bit(STATUS_EXIT_PENDING, &priv->status);
5868 __iwl3945_down(priv);
5869 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5871 /* tried to restart and config the device for as long as our
5872 * patience could withstand */
5873 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5878 /*****************************************************************************
5880 * Workqueue callbacks
5882 *****************************************************************************/
5884 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5886 struct iwl_priv *priv =
5887 container_of(data, struct iwl_priv, init_alive_start.work);
5889 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5892 mutex_lock(&priv->mutex);
5893 iwl3945_init_alive_start(priv);
5894 mutex_unlock(&priv->mutex);
5897 static void iwl3945_bg_alive_start(struct work_struct *data)
5899 struct iwl_priv *priv =
5900 container_of(data, struct iwl_priv, alive_start.work);
5902 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5905 mutex_lock(&priv->mutex);
5906 iwl3945_alive_start(priv);
5907 mutex_unlock(&priv->mutex);
5910 static void iwl3945_bg_rf_kill(struct work_struct *work)
5912 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5914 wake_up_interruptible(&priv->wait_command_queue);
5916 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5919 mutex_lock(&priv->mutex);
5921 if (!iwl3945_is_rfkill(priv)) {
5922 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5923 "HW and/or SW RF Kill no longer active, restarting "
5925 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5926 queue_work(priv->workqueue, &priv->restart);
5929 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5930 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5931 "disabled by SW switch\n");
5933 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5934 "Kill switch must be turned off for "
5935 "wireless networking to work.\n");
5938 mutex_unlock(&priv->mutex);
5939 iwl3945_rfkill_set_hw_state(priv);
5942 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5944 static void iwl3945_bg_scan_check(struct work_struct *data)
5946 struct iwl_priv *priv =
5947 container_of(data, struct iwl_priv, scan_check.work);
5949 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5952 mutex_lock(&priv->mutex);
5953 if (test_bit(STATUS_SCANNING, &priv->status) ||
5954 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5955 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5956 "Scan completion watchdog resetting adapter (%dms)\n",
5957 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5959 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5960 iwl3945_send_scan_abort(priv);
5962 mutex_unlock(&priv->mutex);
5965 static void iwl3945_bg_request_scan(struct work_struct *data)
5967 struct iwl_priv *priv =
5968 container_of(data, struct iwl_priv, request_scan);
5969 struct iwl3945_host_cmd cmd = {
5970 .id = REPLY_SCAN_CMD,
5971 .len = sizeof(struct iwl3945_scan_cmd),
5972 .meta.flags = CMD_SIZE_HUGE,
5975 struct iwl3945_scan_cmd *scan;
5976 struct ieee80211_conf *conf = NULL;
5978 enum ieee80211_band band;
5979 DECLARE_SSID_BUF(ssid);
5981 conf = ieee80211_get_hw_conf(priv->hw);
5983 mutex_lock(&priv->mutex);
5985 if (!iwl3945_is_ready(priv)) {
5986 IWL_WARN(priv, "request scan called when driver not ready.\n");
5990 /* Make sure the scan wasn't canceled before this queued work
5991 * was given the chance to run... */
5992 if (!test_bit(STATUS_SCANNING, &priv->status))
5995 /* This should never be called or scheduled if there is currently
5996 * a scan active in the hardware. */
5997 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5998 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5999 "Ignoring second request.\n");
6004 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6005 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6009 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6010 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6014 if (iwl3945_is_rfkill(priv)) {
6015 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6019 if (!test_bit(STATUS_READY, &priv->status)) {
6020 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6024 if (!priv->scan_bands) {
6025 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6029 if (!priv->scan39) {
6030 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6031 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6032 if (!priv->scan39) {
6037 scan = priv->scan39;
6038 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6040 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6041 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6043 if (iwl3945_is_associated(priv)) {
6046 u32 suspend_time = 100;
6047 u32 scan_suspend_time = 100;
6048 unsigned long flags;
6050 IWL_DEBUG_INFO("Scanning while associated...\n");
6052 spin_lock_irqsave(&priv->lock, flags);
6053 interval = priv->beacon_int;
6054 spin_unlock_irqrestore(&priv->lock, flags);
6056 scan->suspend_time = 0;
6057 scan->max_out_time = cpu_to_le32(200 * 1024);
6059 interval = suspend_time;
6061 * suspend time format:
6062 * 0-19: beacon interval in usec (time before exec.)
6064 * 24-31: number of beacons (suspend between channels)
6067 extra = (suspend_time / interval) << 24;
6068 scan_suspend_time = 0xFF0FFFFF &
6069 (extra | ((suspend_time % interval) * 1024));
6071 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6072 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6073 scan_suspend_time, interval);
6076 /* We should add the ability for user to lock to PASSIVE ONLY */
6077 if (priv->one_direct_scan) {
6079 ("Kicking off one direct scan for '%s'\n",
6080 print_ssid(ssid, priv->direct_ssid,
6081 priv->direct_ssid_len));
6082 scan->direct_scan[0].id = WLAN_EID_SSID;
6083 scan->direct_scan[0].len = priv->direct_ssid_len;
6084 memcpy(scan->direct_scan[0].ssid,
6085 priv->direct_ssid, priv->direct_ssid_len);
6088 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6090 /* We don't build a direct scan probe request; the uCode will do
6091 * that based on the direct_mask added to each channel entry */
6092 scan->tx_cmd.len = cpu_to_le16(
6093 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6094 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6095 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6096 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
6097 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6099 /* flags + rate selection */
6101 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6102 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6103 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6104 scan->good_CRC_th = 0;
6105 band = IEEE80211_BAND_2GHZ;
6106 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6107 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6108 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6109 band = IEEE80211_BAND_5GHZ;
6111 IWL_WARN(priv, "Invalid scan band count\n");
6115 /* select Rx antennas */
6116 scan->flags |= iwl3945_get_antenna_flags(priv);
6118 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6119 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6121 scan->channel_count =
6122 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6124 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6126 if (scan->channel_count == 0) {
6127 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6131 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6132 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6134 scan->len = cpu_to_le16(cmd.len);
6136 set_bit(STATUS_SCAN_HW, &priv->status);
6137 rc = iwl3945_send_cmd_sync(priv, &cmd);
6141 queue_delayed_work(priv->workqueue, &priv->scan_check,
6142 IWL_SCAN_CHECK_WATCHDOG);
6144 mutex_unlock(&priv->mutex);
6148 /* can not perform scan make sure we clear scanning
6149 * bits from status so next scan request can be performed.
6150 * if we dont clear scanning status bit here all next scan
6153 clear_bit(STATUS_SCAN_HW, &priv->status);
6154 clear_bit(STATUS_SCANNING, &priv->status);
6156 /* inform mac80211 scan aborted */
6157 queue_work(priv->workqueue, &priv->scan_completed);
6158 mutex_unlock(&priv->mutex);
6161 static void iwl3945_bg_up(struct work_struct *data)
6163 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
6165 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6168 mutex_lock(&priv->mutex);
6170 mutex_unlock(&priv->mutex);
6171 iwl3945_rfkill_set_hw_state(priv);
6174 static void iwl3945_bg_restart(struct work_struct *data)
6176 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
6178 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6182 queue_work(priv->workqueue, &priv->up);
6185 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6187 struct iwl_priv *priv =
6188 container_of(data, struct iwl_priv, rx_replenish);
6190 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6193 mutex_lock(&priv->mutex);
6194 iwl3945_rx_replenish(priv);
6195 mutex_unlock(&priv->mutex);
6198 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6200 static void iwl3945_post_associate(struct iwl_priv *priv)
6203 struct ieee80211_conf *conf = NULL;
6205 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6206 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
6211 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6212 priv->assoc_id, priv->active39_rxon.bssid_addr);
6214 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6217 if (!priv->vif || !priv->is_open)
6220 iwl3945_scan_cancel_timeout(priv, 200);
6222 conf = ieee80211_get_hw_conf(priv->hw);
6224 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6225 iwl3945_commit_rxon(priv);
6227 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6228 iwl3945_setup_rxon_timing(priv);
6229 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6230 sizeof(priv->rxon_timing), &priv->rxon_timing);
6232 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6233 "Attempting to continue.\n");
6235 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6237 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6239 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6240 priv->assoc_id, priv->beacon_int);
6242 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6243 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6245 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6247 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6248 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6249 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6251 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6253 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6254 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6258 iwl3945_commit_rxon(priv);
6260 switch (priv->iw_mode) {
6261 case NL80211_IFTYPE_STATION:
6262 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6265 case NL80211_IFTYPE_ADHOC:
6268 iwl3945_add_station(priv, priv->bssid, 0, 0);
6269 iwl3945_sync_sta(priv, IWL_STA_ID,
6270 (priv->band == IEEE80211_BAND_5GHZ) ?
6271 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6273 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6274 iwl3945_send_beacon_cmd(priv);
6279 IWL_ERROR("%s Should not be called in %d mode\n",
6280 __func__, priv->iw_mode);
6284 iwl3945_activate_qos(priv, 0);
6286 /* we have just associated, don't start scan too early */
6287 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6290 static void iwl3945_bg_abort_scan(struct work_struct *work)
6292 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
6294 if (!iwl3945_is_ready(priv))
6297 mutex_lock(&priv->mutex);
6299 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6300 iwl3945_send_scan_abort(priv);
6302 mutex_unlock(&priv->mutex);
6305 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6307 static void iwl3945_bg_scan_completed(struct work_struct *work)
6309 struct iwl_priv *priv =
6310 container_of(work, struct iwl_priv, scan_completed);
6312 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6314 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6317 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6318 iwl3945_mac_config(priv->hw, 0);
6320 ieee80211_scan_completed(priv->hw);
6322 /* Since setting the TXPOWER may have been deferred while
6323 * performing the scan, fire one off */
6324 mutex_lock(&priv->mutex);
6325 iwl3945_hw_reg_send_txpower(priv);
6326 mutex_unlock(&priv->mutex);
6329 /*****************************************************************************
6331 * mac80211 entry point functions
6333 *****************************************************************************/
6335 #define UCODE_READY_TIMEOUT (2 * HZ)
6337 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6339 struct iwl_priv *priv = hw->priv;
6342 IWL_DEBUG_MAC80211("enter\n");
6344 if (pci_enable_device(priv->pci_dev)) {
6345 IWL_ERROR("Fail to pci_enable_device\n");
6348 pci_restore_state(priv->pci_dev);
6349 pci_enable_msi(priv->pci_dev);
6351 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6354 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6355 goto out_disable_msi;
6358 /* we should be verifying the device is ready to be opened */
6359 mutex_lock(&priv->mutex);
6361 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6362 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6363 * ucode filename and max sizes are card-specific. */
6365 if (!priv->ucode_code.len) {
6366 ret = iwl3945_read_ucode(priv);
6368 IWL_ERROR("Could not read microcode: %d\n", ret);
6369 mutex_unlock(&priv->mutex);
6370 goto out_release_irq;
6374 ret = __iwl3945_up(priv);
6376 mutex_unlock(&priv->mutex);
6378 iwl3945_rfkill_set_hw_state(priv);
6381 goto out_release_irq;
6383 IWL_DEBUG_INFO("Start UP work.\n");
6385 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6388 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6389 * mac80211 will not be run successfully. */
6390 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6391 test_bit(STATUS_READY, &priv->status),
6392 UCODE_READY_TIMEOUT);
6394 if (!test_bit(STATUS_READY, &priv->status)) {
6395 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6396 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6398 goto out_release_irq;
6403 IWL_DEBUG_MAC80211("leave\n");
6407 free_irq(priv->pci_dev->irq, priv);
6409 pci_disable_msi(priv->pci_dev);
6410 pci_disable_device(priv->pci_dev);
6412 IWL_DEBUG_MAC80211("leave - failed\n");
6416 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6418 struct iwl_priv *priv = hw->priv;
6420 IWL_DEBUG_MAC80211("enter\n");
6422 if (!priv->is_open) {
6423 IWL_DEBUG_MAC80211("leave - skip\n");
6429 if (iwl3945_is_ready_rf(priv)) {
6430 /* stop mac, cancel any scan request and clear
6431 * RXON_FILTER_ASSOC_MSK BIT
6433 mutex_lock(&priv->mutex);
6434 iwl3945_scan_cancel_timeout(priv, 100);
6435 mutex_unlock(&priv->mutex);
6440 flush_workqueue(priv->workqueue);
6441 free_irq(priv->pci_dev->irq, priv);
6442 pci_disable_msi(priv->pci_dev);
6443 pci_save_state(priv->pci_dev);
6444 pci_disable_device(priv->pci_dev);
6446 IWL_DEBUG_MAC80211("leave\n");
6449 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6451 struct iwl_priv *priv = hw->priv;
6453 IWL_DEBUG_MAC80211("enter\n");
6455 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6456 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6458 if (iwl3945_tx_skb(priv, skb))
6459 dev_kfree_skb_any(skb);
6461 IWL_DEBUG_MAC80211("leave\n");
6462 return NETDEV_TX_OK;
6465 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6466 struct ieee80211_if_init_conf *conf)
6468 struct iwl_priv *priv = hw->priv;
6469 unsigned long flags;
6471 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6474 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6478 spin_lock_irqsave(&priv->lock, flags);
6479 priv->vif = conf->vif;
6480 priv->iw_mode = conf->type;
6482 spin_unlock_irqrestore(&priv->lock, flags);
6484 mutex_lock(&priv->mutex);
6486 if (conf->mac_addr) {
6487 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6488 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6491 if (iwl3945_is_ready(priv))
6492 iwl3945_set_mode(priv, conf->type);
6494 mutex_unlock(&priv->mutex);
6496 IWL_DEBUG_MAC80211("leave\n");
6501 * iwl3945_mac_config - mac80211 config callback
6503 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6504 * be set inappropriately and the driver currently sets the hardware up to
6505 * use it whenever needed.
6507 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6509 struct iwl_priv *priv = hw->priv;
6510 const struct iwl_channel_info *ch_info;
6511 struct ieee80211_conf *conf = &hw->conf;
6512 unsigned long flags;
6515 mutex_lock(&priv->mutex);
6516 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6518 if (!iwl3945_is_ready(priv)) {
6519 IWL_DEBUG_MAC80211("leave - not ready\n");
6524 if (unlikely(!iwl3945_param_disable_hw_scan &&
6525 test_bit(STATUS_SCANNING, &priv->status))) {
6526 IWL_DEBUG_MAC80211("leave - scanning\n");
6527 set_bit(STATUS_CONF_PENDING, &priv->status);
6528 mutex_unlock(&priv->mutex);
6532 spin_lock_irqsave(&priv->lock, flags);
6534 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6535 conf->channel->hw_value);
6536 if (!is_channel_valid(ch_info)) {
6537 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6538 conf->channel->hw_value, conf->channel->band);
6539 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6540 spin_unlock_irqrestore(&priv->lock, flags);
6545 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6547 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6549 /* The list of supported rates and rate mask can be different
6550 * for each phymode; since the phymode may have changed, reset
6551 * the rate mask to what mac80211 lists */
6552 iwl3945_set_rate(priv);
6554 spin_unlock_irqrestore(&priv->lock, flags);
6556 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6557 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6558 iwl3945_hw_channel_switch(priv, conf->channel);
6563 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6565 if (!conf->radio_enabled) {
6566 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6570 if (iwl3945_is_rfkill(priv)) {
6571 IWL_DEBUG_MAC80211("leave - RF kill\n");
6576 iwl3945_set_rate(priv);
6578 if (memcmp(&priv->active39_rxon,
6579 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6580 iwl3945_commit_rxon(priv);
6582 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6584 IWL_DEBUG_MAC80211("leave\n");
6587 clear_bit(STATUS_CONF_PENDING, &priv->status);
6588 mutex_unlock(&priv->mutex);
6592 static void iwl3945_config_ap(struct iwl_priv *priv)
6596 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6599 /* The following should be done only at AP bring up */
6600 if (!(iwl3945_is_associated(priv))) {
6602 /* RXON - unassoc (to set timing command) */
6603 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6604 iwl3945_commit_rxon(priv);
6607 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6608 iwl3945_setup_rxon_timing(priv);
6609 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6610 sizeof(priv->rxon_timing), &priv->rxon_timing);
6612 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6613 "Attempting to continue.\n");
6615 /* FIXME: what should be the assoc_id for AP? */
6616 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6617 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6618 priv->staging39_rxon.flags |=
6619 RXON_FLG_SHORT_PREAMBLE_MSK;
6621 priv->staging39_rxon.flags &=
6622 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6624 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6625 if (priv->assoc_capability &
6626 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6627 priv->staging39_rxon.flags |=
6628 RXON_FLG_SHORT_SLOT_MSK;
6630 priv->staging39_rxon.flags &=
6631 ~RXON_FLG_SHORT_SLOT_MSK;
6633 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6634 priv->staging39_rxon.flags &=
6635 ~RXON_FLG_SHORT_SLOT_MSK;
6637 /* restore RXON assoc */
6638 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6639 iwl3945_commit_rxon(priv);
6640 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6642 iwl3945_send_beacon_cmd(priv);
6644 /* FIXME - we need to add code here to detect a totally new
6645 * configuration, reset the AP, unassoc, rxon timing, assoc,
6646 * clear sta table, add BCAST sta... */
6649 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6650 struct ieee80211_vif *vif,
6651 struct ieee80211_if_conf *conf)
6653 struct iwl_priv *priv = hw->priv;
6659 if (priv->vif != vif) {
6660 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6664 /* handle this temporarily here */
6665 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6666 conf->changed & IEEE80211_IFCC_BEACON) {
6667 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6670 mutex_lock(&priv->mutex);
6671 rc = iwl3945_mac_beacon_update(hw, beacon);
6672 mutex_unlock(&priv->mutex);
6677 if (!iwl3945_is_alive(priv))
6680 mutex_lock(&priv->mutex);
6683 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6686 * very dubious code was here; the probe filtering flag is never set:
6688 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6689 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6692 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6694 conf->bssid = priv->mac_addr;
6695 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6696 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6699 if (priv->ibss_beacon)
6700 dev_kfree_skb(priv->ibss_beacon);
6702 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6705 if (iwl3945_is_rfkill(priv))
6708 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6709 !is_multicast_ether_addr(conf->bssid)) {
6710 /* If there is currently a HW scan going on in the background
6711 * then we need to cancel it else the RXON below will fail. */
6712 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6713 IWL_WARN(priv, "Aborted scan still in progress "
6715 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6716 mutex_unlock(&priv->mutex);
6719 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6721 /* TODO: Audit driver for usage of these members and see
6722 * if mac80211 deprecates them (priv->bssid looks like it
6723 * shouldn't be there, but I haven't scanned the IBSS code
6724 * to verify) - jpk */
6725 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6727 if (priv->iw_mode == NL80211_IFTYPE_AP)
6728 iwl3945_config_ap(priv);
6730 rc = iwl3945_commit_rxon(priv);
6731 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6732 iwl3945_add_station(priv,
6733 priv->active39_rxon.bssid_addr, 1, 0);
6737 iwl3945_scan_cancel_timeout(priv, 100);
6738 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6739 iwl3945_commit_rxon(priv);
6743 IWL_DEBUG_MAC80211("leave\n");
6744 mutex_unlock(&priv->mutex);
6749 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6750 unsigned int changed_flags,
6751 unsigned int *total_flags,
6752 int mc_count, struct dev_addr_list *mc_list)
6754 struct iwl_priv *priv = hw->priv;
6755 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6757 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6758 changed_flags, *total_flags);
6760 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6761 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6762 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6764 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6766 if (changed_flags & FIF_ALLMULTI) {
6767 if (*total_flags & FIF_ALLMULTI)
6768 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6770 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6772 if (changed_flags & FIF_CONTROL) {
6773 if (*total_flags & FIF_CONTROL)
6774 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6776 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6778 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6779 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6780 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6782 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6785 /* We avoid iwl_commit_rxon here to commit the new filter flags
6786 * since mac80211 will call ieee80211_hw_config immediately.
6787 * (mc_list is not supported at this time). Otherwise, we need to
6788 * queue a background iwl_commit_rxon work.
6791 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6792 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6795 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6796 struct ieee80211_if_init_conf *conf)
6798 struct iwl_priv *priv = hw->priv;
6800 IWL_DEBUG_MAC80211("enter\n");
6802 mutex_lock(&priv->mutex);
6804 if (iwl3945_is_ready_rf(priv)) {
6805 iwl3945_scan_cancel_timeout(priv, 100);
6806 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6807 iwl3945_commit_rxon(priv);
6809 if (priv->vif == conf->vif) {
6811 memset(priv->bssid, 0, ETH_ALEN);
6813 mutex_unlock(&priv->mutex);
6815 IWL_DEBUG_MAC80211("leave\n");
6818 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6820 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6821 struct ieee80211_vif *vif,
6822 struct ieee80211_bss_conf *bss_conf,
6825 struct iwl_priv *priv = hw->priv;
6827 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6829 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6830 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6831 bss_conf->use_short_preamble);
6832 if (bss_conf->use_short_preamble)
6833 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6835 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6838 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6839 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6840 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6841 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6843 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6846 if (changes & BSS_CHANGED_ASSOC) {
6847 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6848 /* This should never happen as this function should
6849 * never be called from interrupt context. */
6850 if (WARN_ON_ONCE(in_interrupt()))
6852 if (bss_conf->assoc) {
6853 priv->assoc_id = bss_conf->aid;
6854 priv->beacon_int = bss_conf->beacon_int;
6855 priv->timestamp = bss_conf->timestamp;
6856 priv->assoc_capability = bss_conf->assoc_capability;
6857 priv->next_scan_jiffies = jiffies +
6858 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6859 mutex_lock(&priv->mutex);
6860 iwl3945_post_associate(priv);
6861 mutex_unlock(&priv->mutex);
6864 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6866 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6867 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6868 iwl3945_send_rxon_assoc(priv);
6873 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6876 unsigned long flags;
6877 struct iwl_priv *priv = hw->priv;
6878 DECLARE_SSID_BUF(ssid_buf);
6880 IWL_DEBUG_MAC80211("enter\n");
6882 mutex_lock(&priv->mutex);
6883 spin_lock_irqsave(&priv->lock, flags);
6885 if (!iwl3945_is_ready_rf(priv)) {
6887 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6891 /* we don't schedule scan within next_scan_jiffies period */
6892 if (priv->next_scan_jiffies &&
6893 time_after(priv->next_scan_jiffies, jiffies)) {
6897 /* if we just finished scan ask for delay for a broadcast scan */
6898 if ((len == 0) && priv->last_scan_jiffies &&
6899 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6905 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6906 print_ssid(ssid_buf, ssid, len), (int)len);
6908 priv->one_direct_scan = 1;
6909 priv->direct_ssid_len = (u8)
6910 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6911 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6913 priv->one_direct_scan = 0;
6915 rc = iwl3945_scan_initiate(priv);
6917 IWL_DEBUG_MAC80211("leave\n");
6920 spin_unlock_irqrestore(&priv->lock, flags);
6921 mutex_unlock(&priv->mutex);
6926 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6927 const u8 *local_addr, const u8 *addr,
6928 struct ieee80211_key_conf *key)
6930 struct iwl_priv *priv = hw->priv;
6934 IWL_DEBUG_MAC80211("enter\n");
6936 if (!iwl3945_param_hwcrypto) {
6937 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6941 if (is_zero_ether_addr(addr))
6942 /* only support pairwise keys */
6945 sta_id = iwl3945_hw_find_station(priv, addr);
6946 if (sta_id == IWL_INVALID_STATION) {
6947 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6952 mutex_lock(&priv->mutex);
6954 iwl3945_scan_cancel_timeout(priv, 100);
6958 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
6960 iwl3945_set_rxon_hwcrypto(priv, 1);
6961 iwl3945_commit_rxon(priv);
6962 key->hw_key_idx = sta_id;
6963 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6964 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6968 rc = iwl3945_clear_sta_key_info(priv, sta_id);
6970 iwl3945_set_rxon_hwcrypto(priv, 0);
6971 iwl3945_commit_rxon(priv);
6972 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6979 IWL_DEBUG_MAC80211("leave\n");
6980 mutex_unlock(&priv->mutex);
6985 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6986 const struct ieee80211_tx_queue_params *params)
6988 struct iwl_priv *priv = hw->priv;
6989 unsigned long flags;
6992 IWL_DEBUG_MAC80211("enter\n");
6994 if (!iwl3945_is_ready_rf(priv)) {
6995 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6999 if (queue >= AC_NUM) {
7000 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7004 q = AC_NUM - 1 - queue;
7006 spin_lock_irqsave(&priv->lock, flags);
7008 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7009 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7010 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7011 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7012 cpu_to_le16((params->txop * 32));
7014 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7015 priv->qos_data.qos_active = 1;
7017 spin_unlock_irqrestore(&priv->lock, flags);
7019 mutex_lock(&priv->mutex);
7020 if (priv->iw_mode == NL80211_IFTYPE_AP)
7021 iwl3945_activate_qos(priv, 1);
7022 else if (priv->assoc_id && iwl3945_is_associated(priv))
7023 iwl3945_activate_qos(priv, 0);
7025 mutex_unlock(&priv->mutex);
7027 IWL_DEBUG_MAC80211("leave\n");
7031 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7032 struct ieee80211_tx_queue_stats *stats)
7034 struct iwl_priv *priv = hw->priv;
7036 struct iwl3945_tx_queue *txq;
7037 struct iwl_queue *q;
7038 unsigned long flags;
7040 IWL_DEBUG_MAC80211("enter\n");
7042 if (!iwl3945_is_ready_rf(priv)) {
7043 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7047 spin_lock_irqsave(&priv->lock, flags);
7049 for (i = 0; i < AC_NUM; i++) {
7050 txq = &priv->txq39[i];
7052 avail = iwl_queue_space(q);
7054 stats[i].len = q->n_window - avail;
7055 stats[i].limit = q->n_window - q->high_mark;
7056 stats[i].count = q->n_window;
7059 spin_unlock_irqrestore(&priv->lock, flags);
7061 IWL_DEBUG_MAC80211("leave\n");
7066 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7068 struct iwl_priv *priv = hw->priv;
7069 unsigned long flags;
7071 mutex_lock(&priv->mutex);
7072 IWL_DEBUG_MAC80211("enter\n");
7074 iwl3945_reset_qos(priv);
7076 spin_lock_irqsave(&priv->lock, flags);
7078 priv->assoc_capability = 0;
7079 priv->call_post_assoc_from_beacon = 0;
7081 /* new association get rid of ibss beacon skb */
7082 if (priv->ibss_beacon)
7083 dev_kfree_skb(priv->ibss_beacon);
7085 priv->ibss_beacon = NULL;
7087 priv->beacon_int = priv->hw->conf.beacon_int;
7088 priv->timestamp = 0;
7089 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7090 priv->beacon_int = 0;
7092 spin_unlock_irqrestore(&priv->lock, flags);
7094 if (!iwl3945_is_ready_rf(priv)) {
7095 IWL_DEBUG_MAC80211("leave - not ready\n");
7096 mutex_unlock(&priv->mutex);
7100 /* we are restarting association process
7101 * clear RXON_FILTER_ASSOC_MSK bit
7103 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7104 iwl3945_scan_cancel_timeout(priv, 100);
7105 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7106 iwl3945_commit_rxon(priv);
7109 /* Per mac80211.h: This is only used in IBSS mode... */
7110 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7112 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7113 mutex_unlock(&priv->mutex);
7117 iwl3945_set_rate(priv);
7119 mutex_unlock(&priv->mutex);
7121 IWL_DEBUG_MAC80211("leave\n");
7125 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7127 struct iwl_priv *priv = hw->priv;
7128 unsigned long flags;
7130 IWL_DEBUG_MAC80211("enter\n");
7132 if (!iwl3945_is_ready_rf(priv)) {
7133 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7137 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7138 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7142 spin_lock_irqsave(&priv->lock, flags);
7144 if (priv->ibss_beacon)
7145 dev_kfree_skb(priv->ibss_beacon);
7147 priv->ibss_beacon = skb;
7151 IWL_DEBUG_MAC80211("leave\n");
7152 spin_unlock_irqrestore(&priv->lock, flags);
7154 iwl3945_reset_qos(priv);
7156 iwl3945_post_associate(priv);
7162 /*****************************************************************************
7166 *****************************************************************************/
7168 #ifdef CONFIG_IWL3945_DEBUG
7171 * The following adds a new attribute to the sysfs representation
7172 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7173 * used for controlling the debug level.
7175 * See the level definitions in iwl for details.
7177 static ssize_t show_debug_level(struct device *d,
7178 struct device_attribute *attr, char *buf)
7180 struct iwl_priv *priv = d->driver_data;
7182 return sprintf(buf, "0x%08X\n", priv->debug_level);
7184 static ssize_t store_debug_level(struct device *d,
7185 struct device_attribute *attr,
7186 const char *buf, size_t count)
7188 struct iwl_priv *priv = d->driver_data;
7192 ret = strict_strtoul(buf, 0, &val);
7194 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
7196 priv->debug_level = val;
7198 return strnlen(buf, count);
7201 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
7202 show_debug_level, store_debug_level);
7204 #endif /* CONFIG_IWL3945_DEBUG */
7206 static ssize_t show_temperature(struct device *d,
7207 struct device_attribute *attr, char *buf)
7209 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7211 if (!iwl3945_is_alive(priv))
7214 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7217 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7219 static ssize_t show_tx_power(struct device *d,
7220 struct device_attribute *attr, char *buf)
7222 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7223 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7226 static ssize_t store_tx_power(struct device *d,
7227 struct device_attribute *attr,
7228 const char *buf, size_t count)
7230 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7231 char *p = (char *)buf;
7234 val = simple_strtoul(p, &p, 10);
7236 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
7238 iwl3945_hw_reg_set_txpower(priv, val);
7243 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7245 static ssize_t show_flags(struct device *d,
7246 struct device_attribute *attr, char *buf)
7248 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7250 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
7253 static ssize_t store_flags(struct device *d,
7254 struct device_attribute *attr,
7255 const char *buf, size_t count)
7257 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7258 u32 flags = simple_strtoul(buf, NULL, 0);
7260 mutex_lock(&priv->mutex);
7261 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
7262 /* Cancel any currently running scans... */
7263 if (iwl3945_scan_cancel_timeout(priv, 100))
7264 IWL_WARN(priv, "Could not cancel scan.\n");
7266 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7268 priv->staging39_rxon.flags = cpu_to_le32(flags);
7269 iwl3945_commit_rxon(priv);
7272 mutex_unlock(&priv->mutex);
7277 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7279 static ssize_t show_filter_flags(struct device *d,
7280 struct device_attribute *attr, char *buf)
7282 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7284 return sprintf(buf, "0x%04X\n",
7285 le32_to_cpu(priv->active39_rxon.filter_flags));
7288 static ssize_t store_filter_flags(struct device *d,
7289 struct device_attribute *attr,
7290 const char *buf, size_t count)
7292 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7293 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7295 mutex_lock(&priv->mutex);
7296 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
7297 /* Cancel any currently running scans... */
7298 if (iwl3945_scan_cancel_timeout(priv, 100))
7299 IWL_WARN(priv, "Could not cancel scan.\n");
7301 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7302 "0x%04X\n", filter_flags);
7303 priv->staging39_rxon.filter_flags =
7304 cpu_to_le32(filter_flags);
7305 iwl3945_commit_rxon(priv);
7308 mutex_unlock(&priv->mutex);
7313 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7314 store_filter_flags);
7316 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7318 static ssize_t show_measurement(struct device *d,
7319 struct device_attribute *attr, char *buf)
7321 struct iwl_priv *priv = dev_get_drvdata(d);
7322 struct iwl_spectrum_notification measure_report;
7323 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7324 u8 *data = (u8 *)&measure_report;
7325 unsigned long flags;
7327 spin_lock_irqsave(&priv->lock, flags);
7328 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7329 spin_unlock_irqrestore(&priv->lock, flags);
7332 memcpy(&measure_report, &priv->measure_report, size);
7333 priv->measurement_status = 0;
7334 spin_unlock_irqrestore(&priv->lock, flags);
7336 while (size && (PAGE_SIZE - len)) {
7337 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7338 PAGE_SIZE - len, 1);
7340 if (PAGE_SIZE - len)
7344 size -= min(size, 16U);
7350 static ssize_t store_measurement(struct device *d,
7351 struct device_attribute *attr,
7352 const char *buf, size_t count)
7354 struct iwl_priv *priv = dev_get_drvdata(d);
7355 struct ieee80211_measurement_params params = {
7356 .channel = le16_to_cpu(priv->active39_rxon.channel),
7357 .start_time = cpu_to_le64(priv->last_tsf),
7358 .duration = cpu_to_le16(1),
7360 u8 type = IWL_MEASURE_BASIC;
7366 strncpy(buffer, buf, min(sizeof(buffer), count));
7367 channel = simple_strtoul(p, NULL, 0);
7369 params.channel = channel;
7372 while (*p && *p != ' ')
7375 type = simple_strtoul(p + 1, NULL, 0);
7378 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7379 "channel %d (for '%s')\n", type, params.channel, buf);
7380 iwl3945_get_measurement(priv, ¶ms, type);
7385 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7386 show_measurement, store_measurement);
7387 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7389 static ssize_t store_retry_rate(struct device *d,
7390 struct device_attribute *attr,
7391 const char *buf, size_t count)
7393 struct iwl_priv *priv = dev_get_drvdata(d);
7395 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7396 if (priv->retry_rate <= 0)
7397 priv->retry_rate = 1;
7402 static ssize_t show_retry_rate(struct device *d,
7403 struct device_attribute *attr, char *buf)
7405 struct iwl_priv *priv = dev_get_drvdata(d);
7406 return sprintf(buf, "%d", priv->retry_rate);
7409 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7412 static ssize_t store_power_level(struct device *d,
7413 struct device_attribute *attr,
7414 const char *buf, size_t count)
7416 struct iwl_priv *priv = dev_get_drvdata(d);
7420 mode = simple_strtoul(buf, NULL, 0);
7421 mutex_lock(&priv->mutex);
7423 if (!iwl3945_is_ready(priv)) {
7428 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7429 (mode == IWL39_POWER_AC))
7430 mode = IWL39_POWER_AC;
7432 mode |= IWL_POWER_ENABLED;
7434 if (mode != priv->power_mode) {
7435 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7437 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7440 priv->power_mode = mode;
7446 mutex_unlock(&priv->mutex);
7450 #define MAX_WX_STRING 80
7452 /* Values are in microsecond */
7453 static const s32 timeout_duration[] = {
7460 static const s32 period_duration[] = {
7468 static ssize_t show_power_level(struct device *d,
7469 struct device_attribute *attr, char *buf)
7471 struct iwl_priv *priv = dev_get_drvdata(d);
7472 int level = IWL_POWER_LEVEL(priv->power_mode);
7475 p += sprintf(p, "%d ", level);
7477 case IWL_POWER_MODE_CAM:
7478 case IWL39_POWER_AC:
7479 p += sprintf(p, "(AC)");
7481 case IWL39_POWER_BATTERY:
7482 p += sprintf(p, "(BATTERY)");
7486 "(Timeout %dms, Period %dms)",
7487 timeout_duration[level - 1] / 1000,
7488 period_duration[level - 1] / 1000);
7491 if (!(priv->power_mode & IWL_POWER_ENABLED))
7492 p += sprintf(p, " OFF\n");
7494 p += sprintf(p, " \n");
7500 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7503 static ssize_t show_channels(struct device *d,
7504 struct device_attribute *attr, char *buf)
7506 /* all this shit doesn't belong into sysfs anyway */
7510 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7512 static ssize_t show_statistics(struct device *d,
7513 struct device_attribute *attr, char *buf)
7515 struct iwl_priv *priv = dev_get_drvdata(d);
7516 u32 size = sizeof(struct iwl3945_notif_statistics);
7517 u32 len = 0, ofs = 0;
7518 u8 *data = (u8 *)&priv->statistics_39;
7521 if (!iwl3945_is_alive(priv))
7524 mutex_lock(&priv->mutex);
7525 rc = iwl3945_send_statistics_request(priv);
7526 mutex_unlock(&priv->mutex);
7530 "Error sending statistics request: 0x%08X\n", rc);
7534 while (size && (PAGE_SIZE - len)) {
7535 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7536 PAGE_SIZE - len, 1);
7538 if (PAGE_SIZE - len)
7542 size -= min(size, 16U);
7548 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7550 static ssize_t show_antenna(struct device *d,
7551 struct device_attribute *attr, char *buf)
7553 struct iwl_priv *priv = dev_get_drvdata(d);
7555 if (!iwl3945_is_alive(priv))
7558 return sprintf(buf, "%d\n", priv->antenna);
7561 static ssize_t store_antenna(struct device *d,
7562 struct device_attribute *attr,
7563 const char *buf, size_t count)
7566 struct iwl_priv *priv = dev_get_drvdata(d);
7571 if (sscanf(buf, "%1i", &ant) != 1) {
7572 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7576 if ((ant >= 0) && (ant <= 2)) {
7577 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7578 priv->antenna = (enum iwl3945_antenna)ant;
7580 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7586 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7588 static ssize_t show_status(struct device *d,
7589 struct device_attribute *attr, char *buf)
7591 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7592 if (!iwl3945_is_alive(priv))
7594 return sprintf(buf, "0x%08x\n", (int)priv->status);
7597 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7599 static ssize_t dump_error_log(struct device *d,
7600 struct device_attribute *attr,
7601 const char *buf, size_t count)
7603 char *p = (char *)buf;
7606 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7608 return strnlen(buf, count);
7611 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7613 static ssize_t dump_event_log(struct device *d,
7614 struct device_attribute *attr,
7615 const char *buf, size_t count)
7617 char *p = (char *)buf;
7620 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7622 return strnlen(buf, count);
7625 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7627 /*****************************************************************************
7629 * driver setup and tear down
7631 *****************************************************************************/
7633 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7635 priv->workqueue = create_workqueue(DRV_NAME);
7637 init_waitqueue_head(&priv->wait_command_queue);
7639 INIT_WORK(&priv->up, iwl3945_bg_up);
7640 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7641 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7642 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7643 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7644 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7645 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7646 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7647 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7648 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7649 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7651 iwl3945_hw_setup_deferred_work(priv);
7653 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7654 iwl3945_irq_tasklet, (unsigned long)priv);
7657 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7659 iwl3945_hw_cancel_deferred_work(priv);
7661 cancel_delayed_work_sync(&priv->init_alive_start);
7662 cancel_delayed_work(&priv->scan_check);
7663 cancel_delayed_work(&priv->alive_start);
7664 cancel_work_sync(&priv->beacon_update);
7667 static struct attribute *iwl3945_sysfs_entries[] = {
7668 &dev_attr_antenna.attr,
7669 &dev_attr_channels.attr,
7670 &dev_attr_dump_errors.attr,
7671 &dev_attr_dump_events.attr,
7672 &dev_attr_flags.attr,
7673 &dev_attr_filter_flags.attr,
7674 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7675 &dev_attr_measurement.attr,
7677 &dev_attr_power_level.attr,
7678 &dev_attr_retry_rate.attr,
7679 &dev_attr_statistics.attr,
7680 &dev_attr_status.attr,
7681 &dev_attr_temperature.attr,
7682 &dev_attr_tx_power.attr,
7683 #ifdef CONFIG_IWL3945_DEBUG
7684 &dev_attr_debug_level.attr,
7689 static struct attribute_group iwl3945_attribute_group = {
7690 .name = NULL, /* put in device directory */
7691 .attrs = iwl3945_sysfs_entries,
7694 static struct ieee80211_ops iwl3945_hw_ops = {
7695 .tx = iwl3945_mac_tx,
7696 .start = iwl3945_mac_start,
7697 .stop = iwl3945_mac_stop,
7698 .add_interface = iwl3945_mac_add_interface,
7699 .remove_interface = iwl3945_mac_remove_interface,
7700 .config = iwl3945_mac_config,
7701 .config_interface = iwl3945_mac_config_interface,
7702 .configure_filter = iwl3945_configure_filter,
7703 .set_key = iwl3945_mac_set_key,
7704 .get_tx_stats = iwl3945_mac_get_tx_stats,
7705 .conf_tx = iwl3945_mac_conf_tx,
7706 .reset_tsf = iwl3945_mac_reset_tsf,
7707 .bss_info_changed = iwl3945_bss_info_changed,
7708 .hw_scan = iwl3945_mac_hw_scan
7711 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7714 struct iwl_priv *priv;
7715 struct ieee80211_hw *hw;
7716 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7717 unsigned long flags;
7719 /***********************
7720 * 1. Allocating HW data
7721 * ********************/
7723 /* mac80211 allocates memory for this device instance, including
7724 * space for this driver's private structure */
7725 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl3945_hw_ops);
7727 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7732 SET_IEEE80211_DEV(hw, &pdev->dev);
7736 priv->pci_dev = pdev;
7739 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7740 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7741 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7742 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7747 /* Disabling hardware scan means that mac80211 will perform scans
7748 * "the hard way", rather than using device's scan. */
7749 if (iwl3945_param_disable_hw_scan) {
7750 IWL_DEBUG_INFO("Disabling hw_scan\n");
7751 iwl3945_hw_ops.hw_scan = NULL;
7754 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7755 hw->rate_control_algorithm = "iwl-3945-rs";
7756 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7758 /* Select antenna (may be helpful if only one antenna is connected) */
7759 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7760 #ifdef CONFIG_IWL3945_DEBUG
7761 priv->debug_level = iwl3945_param_debug;
7762 atomic_set(&priv->restrict_refcnt, 0);
7765 /* Tell mac80211 our characteristics */
7766 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7767 IEEE80211_HW_NOISE_DBM;
7769 hw->wiphy->interface_modes =
7770 BIT(NL80211_IFTYPE_STATION) |
7771 BIT(NL80211_IFTYPE_ADHOC);
7773 hw->wiphy->fw_handles_regulatory = true;
7775 /* 4 EDCA QOS priorities */
7778 /***************************
7779 * 2. Initializing PCI bus
7780 * *************************/
7781 if (pci_enable_device(pdev)) {
7783 goto out_ieee80211_free_hw;
7786 pci_set_master(pdev);
7788 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7790 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7792 IWL_WARN(priv, "No suitable DMA available.\n");
7793 goto out_pci_disable_device;
7796 pci_set_drvdata(pdev, priv);
7797 err = pci_request_regions(pdev, DRV_NAME);
7799 goto out_pci_disable_device;
7801 /***********************
7802 * 3. Read REV Register
7803 * ********************/
7804 priv->hw_base = pci_iomap(pdev, 0, 0);
7805 if (!priv->hw_base) {
7807 goto out_pci_release_regions;
7810 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7811 (unsigned long long) pci_resource_len(pdev, 0));
7812 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7814 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7815 * PCI Tx retries from interfering with C3 CPU state */
7816 pci_write_config_byte(pdev, 0x41, 0x00);
7819 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7820 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7822 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7823 err = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
7824 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7826 IWL_DEBUG_INFO("Failed to init the card\n");
7827 goto out_remove_sysfs;
7830 /***********************
7832 * ********************/
7833 /* Read the EEPROM */
7834 err = iwl3945_eeprom_init(priv);
7836 IWL_ERROR("Unable to init EEPROM\n");
7837 goto out_remove_sysfs;
7839 /* MAC Address location in EEPROM same for 3945/4965 */
7840 get_eeprom_mac(priv, priv->mac_addr);
7841 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7842 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7844 /***********************
7845 * 5. Setup HW Constants
7846 * ********************/
7847 /* Device-specific setup */
7848 if (iwl3945_hw_set_hw_params(priv)) {
7849 IWL_ERROR("failed to set hw settings\n");
7853 /***********************
7855 * ********************/
7856 priv->retry_rate = 1;
7857 priv->ibss_beacon = NULL;
7859 spin_lock_init(&priv->lock);
7860 spin_lock_init(&priv->power_data_39.lock);
7861 spin_lock_init(&priv->sta_lock);
7862 spin_lock_init(&priv->hcmd_lock);
7864 INIT_LIST_HEAD(&priv->free_frames);
7865 mutex_init(&priv->mutex);
7867 /* Clear the driver's (not device's) station table */
7868 iwl3945_clear_stations_table(priv);
7870 priv->data_retry_limit = -1;
7871 priv->ieee_channels = NULL;
7872 priv->ieee_rates = NULL;
7873 priv->band = IEEE80211_BAND_2GHZ;
7875 priv->iw_mode = NL80211_IFTYPE_STATION;
7877 iwl3945_reset_qos(priv);
7879 priv->qos_data.qos_active = 0;
7880 priv->qos_data.qos_cap.val = 0;
7883 priv->rates_mask = IWL_RATES_MASK;
7884 /* If power management is turned on, default to AC mode */
7885 priv->power_mode = IWL39_POWER_AC;
7886 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7888 err = iwl3945_init_channel_map(priv);
7890 IWL_ERROR("initializing regulatory failed: %d\n", err);
7891 goto out_release_irq;
7894 err = iwl3945_init_geos(priv);
7896 IWL_ERROR("initializing geos failed: %d\n", err);
7897 goto out_free_channel_map;
7900 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7903 /***********************************
7904 * 7. Initialize Module Parameters
7905 * **********************************/
7907 /* Initialize module parameter values here */
7908 /* Disable radio (SW RF KILL) via parameter when loading driver */
7909 if (iwl3945_param_disable) {
7910 set_bit(STATUS_RF_KILL_SW, &priv->status);
7911 IWL_DEBUG_INFO("Radio disabled.\n");
7915 /***********************
7917 * ********************/
7919 spin_lock_irqsave(&priv->lock, flags);
7920 iwl3945_disable_interrupts(priv);
7921 spin_unlock_irqrestore(&priv->lock, flags);
7923 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7925 IWL_ERROR("failed to create sysfs device attributes\n");
7929 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7930 iwl3945_setup_deferred_work(priv);
7931 iwl3945_setup_rx_handlers(priv);
7933 /***********************
7935 * ********************/
7936 pci_save_state(pdev);
7937 pci_disable_device(pdev);
7939 /*********************************
7940 * 10. Setup and Register mac80211
7941 * *******************************/
7943 err = ieee80211_register_hw(priv->hw);
7945 IWL_ERROR("Failed to register network device (error %d)\n", err);
7946 goto out_remove_sysfs;
7949 priv->hw->conf.beacon_int = 100;
7950 priv->mac80211_registered = 1;
7953 err = iwl3945_rfkill_init(priv);
7955 IWL_ERROR("Unable to initialize RFKILL system. "
7956 "Ignoring error: %d\n", err);
7961 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7963 iwl3945_free_geos(priv);
7964 out_free_channel_map:
7965 iwl3945_free_channel_map(priv);
7969 destroy_workqueue(priv->workqueue);
7970 priv->workqueue = NULL;
7971 iwl3945_unset_hw_params(priv);
7974 pci_iounmap(pdev, priv->hw_base);
7975 out_pci_release_regions:
7976 pci_release_regions(pdev);
7977 out_pci_disable_device:
7978 pci_disable_device(pdev);
7979 pci_set_drvdata(pdev, NULL);
7980 out_ieee80211_free_hw:
7981 ieee80211_free_hw(priv->hw);
7986 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7988 struct iwl_priv *priv = pci_get_drvdata(pdev);
7989 unsigned long flags;
7994 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7996 set_bit(STATUS_EXIT_PENDING, &priv->status);
8000 /* make sure we flush any pending irq or
8001 * tasklet for the driver
8003 spin_lock_irqsave(&priv->lock, flags);
8004 iwl3945_disable_interrupts(priv);
8005 spin_unlock_irqrestore(&priv->lock, flags);
8007 iwl_synchronize_irq(priv);
8009 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8011 iwl3945_rfkill_unregister(priv);
8012 iwl3945_dealloc_ucode_pci(priv);
8015 iwl3945_rx_queue_free(priv, &priv->rxq);
8016 iwl3945_hw_txq_ctx_free(priv);
8018 iwl3945_unset_hw_params(priv);
8019 iwl3945_clear_stations_table(priv);
8021 if (priv->mac80211_registered)
8022 ieee80211_unregister_hw(priv->hw);
8024 /*netif_stop_queue(dev); */
8025 flush_workqueue(priv->workqueue);
8027 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8028 * priv->workqueue... so we can't take down the workqueue
8030 destroy_workqueue(priv->workqueue);
8031 priv->workqueue = NULL;
8033 pci_iounmap(pdev, priv->hw_base);
8034 pci_release_regions(pdev);
8035 pci_disable_device(pdev);
8036 pci_set_drvdata(pdev, NULL);
8038 iwl3945_free_channel_map(priv);
8039 iwl3945_free_geos(priv);
8040 kfree(priv->scan39);
8041 if (priv->ibss_beacon)
8042 dev_kfree_skb(priv->ibss_beacon);
8044 ieee80211_free_hw(priv->hw);
8049 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8051 struct iwl_priv *priv = pci_get_drvdata(pdev);
8053 if (priv->is_open) {
8054 set_bit(STATUS_IN_SUSPEND, &priv->status);
8055 iwl3945_mac_stop(priv->hw);
8059 pci_set_power_state(pdev, PCI_D3hot);
8064 static int iwl3945_pci_resume(struct pci_dev *pdev)
8066 struct iwl_priv *priv = pci_get_drvdata(pdev);
8068 pci_set_power_state(pdev, PCI_D0);
8071 iwl3945_mac_start(priv->hw);
8073 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8077 #endif /* CONFIG_PM */
8079 /*************** RFKILL FUNCTIONS **********/
8080 #ifdef CONFIG_IWL3945_RFKILL
8081 /* software rf-kill from user */
8082 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8084 struct iwl_priv *priv = data;
8090 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8093 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8094 mutex_lock(&priv->mutex);
8097 case RFKILL_STATE_UNBLOCKED:
8098 if (iwl3945_is_rfkill_hw(priv)) {
8102 iwl3945_radio_kill_sw(priv, 0);
8104 case RFKILL_STATE_SOFT_BLOCKED:
8105 iwl3945_radio_kill_sw(priv, 1);
8108 IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
8112 mutex_unlock(&priv->mutex);
8117 int iwl3945_rfkill_init(struct iwl_priv *priv)
8119 struct device *device = wiphy_dev(priv->hw->wiphy);
8122 BUG_ON(device == NULL);
8124 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8125 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8126 if (!priv->rfkill) {
8127 IWL_ERROR("Unable to allocate rfkill device.\n");
8132 priv->rfkill->name = priv->cfg->name;
8133 priv->rfkill->data = priv;
8134 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8135 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8136 priv->rfkill->user_claim_unsupported = 1;
8138 priv->rfkill->dev.class->suspend = NULL;
8139 priv->rfkill->dev.class->resume = NULL;
8141 ret = rfkill_register(priv->rfkill);
8143 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8147 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8151 if (priv->rfkill != NULL)
8152 rfkill_free(priv->rfkill);
8153 priv->rfkill = NULL;
8156 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8160 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
8163 rfkill_unregister(priv->rfkill);
8165 priv->rfkill = NULL;
8168 /* set rf-kill to the right state. */
8169 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
8175 if (iwl3945_is_rfkill_hw(priv)) {
8176 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8180 if (!iwl3945_is_rfkill_sw(priv))
8181 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8183 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8187 /*****************************************************************************
8189 * driver and module entry point
8191 *****************************************************************************/
8193 static struct pci_driver iwl3945_driver = {
8195 .id_table = iwl3945_hw_card_ids,
8196 .probe = iwl3945_pci_probe,
8197 .remove = __devexit_p(iwl3945_pci_remove),
8199 .suspend = iwl3945_pci_suspend,
8200 .resume = iwl3945_pci_resume,
8204 static int __init iwl3945_init(void)
8208 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8209 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8211 ret = iwl3945_rate_control_register();
8213 printk(KERN_ERR DRV_NAME
8214 "Unable to register rate control algorithm: %d\n", ret);
8218 ret = pci_register_driver(&iwl3945_driver);
8220 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
8221 goto error_register;
8227 iwl3945_rate_control_unregister();
8231 static void __exit iwl3945_exit(void)
8233 pci_unregister_driver(&iwl3945_driver);
8234 iwl3945_rate_control_unregister();
8237 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8239 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8240 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8241 module_param_named(disable, iwl3945_param_disable, int, 0444);
8242 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8243 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8244 MODULE_PARM_DESC(hwcrypto,
8245 "using hardware crypto engine (default 0 [software])\n");
8246 module_param_named(debug, iwl3945_param_debug, uint, 0444);
8247 MODULE_PARM_DESC(debug, "debug output mask");
8248 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8249 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8251 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8252 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8254 module_exit(iwl3945_exit);
8255 module_init(iwl3945_init);