SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-rx.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/etherdevice.h>
  31 #include <net/mac80211.h>
  32 #include <asm/unaligned.h>
  33 #include "iwl-eeprom.h"
  34 #include "iwl-dev.h"
  35 #include "iwl-core.h"
  36 #include "iwl-sta.h"
  37 #include "iwl-io.h"
  38 #include "iwl-calib.h"
  39 #include "iwl-helpers.h"
  40 /************************** RX-FUNCTIONS ****************************/
  41 /*
  42  * Rx theory of operation
  43  *
  44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  45  * each of which point to Receive Buffers to be filled by the NIC.  These get
  46  * used not only for Rx frames, but for any command response or notification
  47  * from the NIC.  The driver and NIC manage the Rx buffers by means
  48  * of indexes into the circular buffer.
  49  *
  50  * Rx Queue Indexes
  51  * The host/firmware share two index registers for managing the Rx buffers.
  52  *
  53  * The READ index maps to the first position that the firmware may be writing
  54  * to -- the driver can read up to (but not including) this position and get
  55  * good data.
  56  * The READ index is managed by the firmware once the card is enabled.
  57  *
  58  * The WRITE index maps to the last position the driver has read from -- the
  59  * position preceding WRITE is the last slot the firmware can place a packet.
  60  *
  61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  62  * WRITE = READ.
  63  *
  64  * During initialization, the host sets up the READ queue position to the first
  65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
  66  *
  67  * When the firmware places a packet in a buffer, it will advance the READ index
  68  * and fire the RX interrupt.  The driver can then query the READ index and
  69  * process as many packets as possible, moving the WRITE index forward as it
  70  * resets the Rx queue buffers with new memory.
  71  *
  72  * The management in the driver is as follows:
  73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
  74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  75  *   to replenish the iwl->rxq->rx_free.
  76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
  78  *   'processed' and 'read' driver indexes as well)
  79  * + A received packet is processed and handed to the kernel network stack,
  80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
  81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
  84  *   were enough free buffers and RX_STALLED is set it is cleared.
  85  *
  86  *
  87  * Driver sequence:
  88  *
  89  * iwl_rx_queue_alloc()   Allocates rx_free
  90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
  91  *                            iwl_rx_queue_restock
  92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  93  *                            queue, updates firmware pointers, and updates
  94  *                            the WRITE index.  If insufficient rx_free buffers
  95  *                            are available, schedules iwl_rx_replenish
  96  *
  97  * -- enable interrupts --
  98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
  99  *                            READ INDEX, detaching the SKB from the pool.
 100  *                            Moves the packet buffer from queue to rx_used.
 101  *                            Calls iwl_rx_queue_restock to refill any empty
 102  *                            slots.
 103  * ...
 104  *
 105  */
 106
 107 /**
 108  * iwl_rx_queue_space - Return number of free slots available in queue.
 109  */
 110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
 111 {
 112         int s = q->read - q->write;
 113         if (s <= 0)
 114                 s += RX_QUEUE_SIZE;
 115         /* keep some buffer to not confuse full and empty queue */
 116         s -= 2;
 117         if (s < 0)
 118                 s = 0;
 119         return s;
 120 }
 121 EXPORT_SYMBOL(iwl_rx_queue_space);
 122
 123 /**
 124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
 125  */
 126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
 127 {
 128         unsigned long flags;
 129         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
 130         u32 reg;
 131         int ret = 0;
 132
 133         spin_lock_irqsave(&q->lock, flags);
 134
 135         if (q->need_update == 0)
 136                 goto exit_unlock;
 137
 138         /* If power-saving is in use, make sure device is awake */
 139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
 140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
 141
 142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
 143                         IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
 144                                       reg);
 145                         iwl_set_bit(priv, CSR_GP_CNTRL,
 146                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 147                         goto exit_unlock;
 148                 }
 149
 150                 q->write_actual = (q->write & ~0x7);
 151                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
 152
 153         /* Else device is assumed to be awake */
 154         } else {
 155                 /* Device expects a multiple of 8 */
 156                 q->write_actual = (q->write & ~0x7);
 157                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
 158         }
 159
 160         q->need_update = 0;
 161
 162  exit_unlock:
 163         spin_unlock_irqrestore(&q->lock, flags);
 164         return ret;
 165 }
 166 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
 167 /**
 168  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 169  */
 170 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
 171                                           dma_addr_t dma_addr)
 172 {
 173         return cpu_to_le32((u32)(dma_addr >> 8));
 174 }
 175
 176 /**
 177  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
 178  *
 179  * If there are slots in the RX queue that need to be restocked,
 180  * and we have free pre-allocated buffers, fill the ranks as much
 181  * as we can, pulling from rx_free.
 182  *
 183  * This moves the 'write' index forward to catch up with 'processed', and
 184  * also updates the memory address in the firmware to reference the new
 185  * target buffer.
 186  */
 187 int iwl_rx_queue_restock(struct iwl_priv *priv)
 188 {
 189         struct iwl_rx_queue *rxq = &priv->rxq;
 190         struct list_head *element;
 191         struct iwl_rx_mem_buffer *rxb;
 192         unsigned long flags;
 193         int write;
 194         int ret = 0;
 195
 196         spin_lock_irqsave(&rxq->lock, flags);
 197         write = rxq->write & ~0x7;
 198         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 199                 /* Get next free Rx buffer, remove from free list */
 200                 element = rxq->rx_free.next;
 201                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 202                 list_del(element);
 203
 204                 /* Point to Rx buffer via next RBD in circular buffer */
 205                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
 206                 rxq->queue[rxq->write] = rxb;
 207                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 208                 rxq->free_count--;
 209         }
 210         spin_unlock_irqrestore(&rxq->lock, flags);
 211         /* If the pre-allocated buffer pool is dropping low, schedule to
 212          * refill it */
 213         if (rxq->free_count <= RX_LOW_WATERMARK)
 214                 queue_work(priv->workqueue, &priv->rx_replenish);
 215
 216
 217         /* If we've added more space for the firmware to place data, tell it.
 218          * Increment device's write pointer in multiples of 8. */
 219         if (rxq->write_actual != (rxq->write & ~0x7)) {
 220                 spin_lock_irqsave(&rxq->lock, flags);
 221                 rxq->need_update = 1;
 222                 spin_unlock_irqrestore(&rxq->lock, flags);
 223                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
 224         }
 225
 226         return ret;
 227 }
 228 EXPORT_SYMBOL(iwl_rx_queue_restock);
 229
 230
 231 /**
 232  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
 233  *
 234  * When moving to rx_free an SKB is allocated for the slot.
 235  *
 236  * Also restock the Rx queue via iwl_rx_queue_restock.
 237  * This is called as a scheduled work item (except for during initialization)
 238  */
 239 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
 240 {
 241         struct iwl_rx_queue *rxq = &priv->rxq;
 242         struct list_head *element;
 243         struct iwl_rx_mem_buffer *rxb;
 244         struct page *page;
 245         unsigned long flags;
 246         gfp_t gfp_mask = priority;
 247
 248         while (1) {
 249                 spin_lock_irqsave(&rxq->lock, flags);
 250                 if (list_empty(&rxq->rx_used)) {
 251                         spin_unlock_irqrestore(&rxq->lock, flags);
 252                         return;
 253                 }
 254                 spin_unlock_irqrestore(&rxq->lock, flags);
 255
 256                 if (rxq->free_count > RX_LOW_WATERMARK)
 257                         gfp_mask |= __GFP_NOWARN;
 258
 259                 if (priv->hw_params.rx_page_order > 0)
 260                         gfp_mask |= __GFP_COMP;
 261
 262                 /* Alloc a new receive buffer */
 263                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
 264                 if (!page) {
 265                         if (net_ratelimit())
 266                                 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
 267                                                "order: %d\n",
 268                                                priv->hw_params.rx_page_order);
 269
 270                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
 271                             net_ratelimit())
 272                                 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
 273                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
 274                                          rxq->free_count);
 275                         /* We don't reschedule replenish work here -- we will
 276                          * call the restock method and if it still needs
 277                          * more buffers it will schedule replenish */
 278                         return;
 279                 }
 280
 281                 spin_lock_irqsave(&rxq->lock, flags);
 282
 283                 if (list_empty(&rxq->rx_used)) {
 284                         spin_unlock_irqrestore(&rxq->lock, flags);
 285                         __free_pages(page, priv->hw_params.rx_page_order);
 286                         return;
 287                 }
 288                 element = rxq->rx_used.next;
 289                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 290                 list_del(element);
 291
 292                 spin_unlock_irqrestore(&rxq->lock, flags);
 293
 294                 rxb->page = page;
 295                 /* Get physical address of the RB */
 296                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
 297                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 298                                 PCI_DMA_FROMDEVICE);
 299                 /* dma address must be no more than 36 bits */
 300                 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
 301                 /* and also 256 byte aligned! */
 302                 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
 303
 304                 spin_lock_irqsave(&rxq->lock, flags);
 305
 306                 list_add_tail(&rxb->list, &rxq->rx_free);
 307                 rxq->free_count++;
 308                 priv->alloc_rxb_page++;
 309
 310                 spin_unlock_irqrestore(&rxq->lock, flags);
 311         }
 312 }
 313
 314 void iwl_rx_replenish(struct iwl_priv *priv)
 315 {
 316         unsigned long flags;
 317
 318         iwl_rx_allocate(priv, GFP_KERNEL);
 319
 320         spin_lock_irqsave(&priv->lock, flags);
 321         iwl_rx_queue_restock(priv);
 322         spin_unlock_irqrestore(&priv->lock, flags);
 323 }
 324 EXPORT_SYMBOL(iwl_rx_replenish);
 325
 326 void iwl_rx_replenish_now(struct iwl_priv *priv)
 327 {
 328         iwl_rx_allocate(priv, GFP_ATOMIC);
 329
 330         iwl_rx_queue_restock(priv);
 331 }
 332 EXPORT_SYMBOL(iwl_rx_replenish_now);
 333
 334
 335 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 336  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
 337  * This free routine walks the list of POOL entries and if SKB is set to
 338  * non NULL it is unmapped and freed
 339  */
 340 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 341 {
 342         int i;
 343         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
 344                 if (rxq->pool[i].page != NULL) {
 345                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
 346                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 347                                 PCI_DMA_FROMDEVICE);
 348                         __iwl_free_pages(priv, rxq->pool[i].page);
 349                         rxq->pool[i].page = NULL;
 350                 }
 351         }
 352
 353         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 354                             rxq->dma_addr);
 355         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
 356                             rxq->rb_stts, rxq->rb_stts_dma);
 357         rxq->bd = NULL;
 358         rxq->rb_stts  = NULL;
 359 }
 360 EXPORT_SYMBOL(iwl_rx_queue_free);
 361
 362 int iwl_rx_queue_alloc(struct iwl_priv *priv)
 363 {
 364         struct iwl_rx_queue *rxq = &priv->rxq;
 365         struct pci_dev *dev = priv->pci_dev;
 366         int i;
 367
 368         spin_lock_init(&rxq->lock);
 369         INIT_LIST_HEAD(&rxq->rx_free);
 370         INIT_LIST_HEAD(&rxq->rx_used);
 371
 372         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
 373         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
 374         if (!rxq->bd)
 375                 goto err_bd;
 376
 377         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
 378                                         &rxq->rb_stts_dma);
 379         if (!rxq->rb_stts)
 380                 goto err_rb;
 381
 382         /* Fill the rx_used queue with _all_ of the Rx buffers */
 383         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
 384                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 385
 386         /* Set us so that we have processed and used all buffers, but have
 387          * not restocked the Rx queue with fresh buffers */
 388         rxq->read = rxq->write = 0;
 389         rxq->write_actual = 0;
 390         rxq->free_count = 0;
 391         rxq->need_update = 0;
 392         return 0;
 393
 394 err_rb:
 395         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 396                             rxq->dma_addr);
 397 err_bd:
 398         return -ENOMEM;
 399 }
 400 EXPORT_SYMBOL(iwl_rx_queue_alloc);
 401
 402 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 403 {
 404         unsigned long flags;
 405         int i;
 406         spin_lock_irqsave(&rxq->lock, flags);
 407         INIT_LIST_HEAD(&rxq->rx_free);
 408         INIT_LIST_HEAD(&rxq->rx_used);
 409         /* Fill the rx_used queue with _all_ of the Rx buffers */
 410         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
 411                 /* In the reset function, these buffers may have been allocated
 412                  * to an SKB, so we need to unmap and free potential storage */
 413                 if (rxq->pool[i].page != NULL) {
 414                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
 415                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 416                                 PCI_DMA_FROMDEVICE);
 417                         __iwl_free_pages(priv, rxq->pool[i].page);
 418                         rxq->pool[i].page = NULL;
 419                 }
 420                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 421         }
 422
 423         /* Set us so that we have processed and used all buffers, but have
 424          * not restocked the Rx queue with fresh buffers */
 425         rxq->read = rxq->write = 0;
 426         rxq->write_actual = 0;
 427         rxq->free_count = 0;
 428         spin_unlock_irqrestore(&rxq->lock, flags);
 429 }
 430
 431 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 432 {
 433         u32 rb_size;
 434         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
 435         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
 436
 437         if (!priv->cfg->use_isr_legacy)
 438                 rb_timeout = RX_RB_TIMEOUT;
 439
 440         if (priv->cfg->mod_params->amsdu_size_8K)
 441                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 442         else
 443                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 444
 445         /* Stop Rx DMA */
 446         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 447
 448         /* Reset driver's Rx queue write index */
 449         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 450
 451         /* Tell device where to find RBD circular buffer in DRAM */
 452         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 453                            (u32)(rxq->dma_addr >> 8));
 454
 455         /* Tell device where in DRAM to update its Rx status */
 456         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 457                            rxq->rb_stts_dma >> 4);
 458
 459         /* Enable Rx DMA
 460          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
 461          *      the credit mechanism in 5000 HW RX FIFO
 462          * Direct rx interrupts to hosts
 463          * Rx buffer size 4 or 8k
 464          * RB timeout 0x10
 465          * 256 RBDs
 466          */
 467         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 468                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 469                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
 470                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 471                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
 472                            rb_size|
 473                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 474                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 475
 476         /* Set interrupt coalescing timer to default (2048 usecs) */
 477         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
 478
 479         return 0;
 480 }
 481
 482 int iwl_rxq_stop(struct iwl_priv *priv)
 483 {
 484
 485         /* stop Rx DMA */
 486         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 487         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 488                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
 489
 490         return 0;
 491 }
 492 EXPORT_SYMBOL(iwl_rxq_stop);
 493
 494 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
 495                                 struct iwl_rx_mem_buffer *rxb)
 496
 497 {
 498         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 499         struct iwl_missed_beacon_notif *missed_beacon;
 500
 501         missed_beacon = &pkt->u.missed_beacon;
 502         if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
 503             priv->missed_beacon_threshold) {
 504                 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
 505                     le32_to_cpu(missed_beacon->consecutive_missed_beacons),
 506                     le32_to_cpu(missed_beacon->total_missed_becons),
 507                     le32_to_cpu(missed_beacon->num_recvd_beacons),
 508                     le32_to_cpu(missed_beacon->num_expected_beacons));
 509                 if (!test_bit(STATUS_SCANNING, &priv->status))
 510                         iwl_init_sensitivity(priv);
 511         }
 512 }
 513 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
 514
 515
 516 /* Calculate noise level, based on measurements during network silence just
 517  *   before arriving beacon.  This measurement can be done only if we know
 518  *   exactly when to expect beacons, therefore only when we're associated. */
 519 static void iwl_rx_calc_noise(struct iwl_priv *priv)
 520 {
 521         struct statistics_rx_non_phy *rx_info
 522                                 = &(priv->statistics.rx.general);
 523         int num_active_rx = 0;
 524         int total_silence = 0;
 525         int bcn_silence_a =
 526                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
 527         int bcn_silence_b =
 528                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
 529         int bcn_silence_c =
 530                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
 531
 532         if (bcn_silence_a) {
 533                 total_silence += bcn_silence_a;
 534                 num_active_rx++;
 535         }
 536         if (bcn_silence_b) {
 537                 total_silence += bcn_silence_b;
 538                 num_active_rx++;
 539         }
 540         if (bcn_silence_c) {
 541                 total_silence += bcn_silence_c;
 542                 num_active_rx++;
 543         }
 544
 545         /* Average among active antennas */
 546         if (num_active_rx)
 547                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
 548         else
 549                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 550
 551         IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
 552                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
 553                         priv->last_rx_noise);
 554 }
 555
 556 #ifdef CONFIG_IWLWIFI_DEBUG
 557 /*
 558  *  based on the assumption of all statistics counter are in DWORD
 559  *  FIXME: This function is for debugging, do not deal with
 560  *  the case of counters roll-over.
 561  */
 562 static void iwl_accumulative_statistics(struct iwl_priv *priv,
 563                                         __le32 *stats)
 564 {
 565         int i;
 566         __le32 *prev_stats;
 567         u32 *accum_stats;
 568         u32 *delta, *max_delta;
 569
 570         prev_stats = (__le32 *)&priv->statistics;
 571         accum_stats = (u32 *)&priv->accum_statistics;
 572         delta = (u32 *)&priv->delta_statistics;
 573         max_delta = (u32 *)&priv->max_delta;
 574
 575         for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
 576              i += sizeof(__le32), stats++, prev_stats++, delta++,
 577              max_delta++, accum_stats++) {
 578                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
 579                         *delta = (le32_to_cpu(*stats) -
 580                                 le32_to_cpu(*prev_stats));
 581                         *accum_stats += *delta;
 582                         if (*delta > *max_delta)
 583                                 *max_delta = *delta;
 584                 }
 585         }
 586
 587         /* reset accumulative statistics for "no-counter" type statistics */
 588         priv->accum_statistics.general.temperature =
 589                 priv->statistics.general.temperature;
 590         priv->accum_statistics.general.temperature_m =
 591                 priv->statistics.general.temperature_m;
 592         priv->accum_statistics.general.ttl_timestamp =
 593                 priv->statistics.general.ttl_timestamp;
 594         priv->accum_statistics.tx.tx_power.ant_a =
 595                 priv->statistics.tx.tx_power.ant_a;
 596         priv->accum_statistics.tx.tx_power.ant_b =
 597                 priv->statistics.tx.tx_power.ant_b;
 598         priv->accum_statistics.tx.tx_power.ant_c =
 599                 priv->statistics.tx.tx_power.ant_c;
 600 }
 601 #endif
 602
 603 #define REG_RECALIB_PERIOD (60)
 604
 605 void iwl_rx_statistics(struct iwl_priv *priv,
 606                               struct iwl_rx_mem_buffer *rxb)
 607 {
 608         int change;
 609         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 610
 611         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
 612                      (int)sizeof(priv->statistics),
 613                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 614
 615         change = ((priv->statistics.general.temperature !=
 616                    pkt->u.stats.general.temperature) ||
 617                   ((priv->statistics.flag &
 618                     STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
 619                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
 620
 621 #ifdef CONFIG_IWLWIFI_DEBUG
 622         iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
 623 #endif
 624         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
 625
 626         set_bit(STATUS_STATISTICS, &priv->status);
 627
 628         /* Reschedule the statistics timer to occur in
 629          * REG_RECALIB_PERIOD seconds to ensure we get a
 630          * thermal update even if the uCode doesn't give
 631          * us one */
 632         mod_timer(&priv->statistics_periodic, jiffies +
 633                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
 634
 635         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
 636             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
 637                 iwl_rx_calc_noise(priv);
 638                 queue_work(priv->workqueue, &priv->run_time_calib_work);
 639         }
 640         if (priv->cfg->ops->lib->temp_ops.temperature && change)
 641                 priv->cfg->ops->lib->temp_ops.temperature(priv);
 642 }
 643 EXPORT_SYMBOL(iwl_rx_statistics);
 644
 645 void iwl_reply_statistics(struct iwl_priv *priv,
 646                               struct iwl_rx_mem_buffer *rxb)
 647 {
 648         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 649
 650         if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
 651 #ifdef CONFIG_IWLWIFI_DEBUG
 652                 memset(&priv->accum_statistics, 0,
 653                         sizeof(struct iwl_notif_statistics));
 654                 memset(&priv->delta_statistics, 0,
 655                         sizeof(struct iwl_notif_statistics));
 656                 memset(&priv->max_delta, 0,
 657                         sizeof(struct iwl_notif_statistics));
 658 #endif
 659                 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
 660         }
 661         iwl_rx_statistics(priv, rxb);
 662 }
 663 EXPORT_SYMBOL(iwl_reply_statistics);
 664
 665 /* Calc max signal level (dBm) among 3 possible receivers */
 666 static inline int iwl_calc_rssi(struct iwl_priv *priv,
 667                                 struct iwl_rx_phy_res *rx_resp)
 668 {
 669         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
 670 }
 671
 672 #ifdef CONFIG_IWLWIFI_DEBUG
 673 /**
 674  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
 675  *
 676  * You may hack this function to show different aspects of received frames,
 677  * including selective frame dumps.
 678  * group100 parameter selects whether to show 1 out of 100 good data frames.
 679  *    All beacon and probe response frames are printed.
 680  */
 681 static void iwl_dbg_report_frame(struct iwl_priv *priv,
 682                       struct iwl_rx_phy_res *phy_res, u16 length,
 683                       struct ieee80211_hdr *header, int group100)
 684 {
 685         u32 to_us;
 686         u32 print_summary = 0;
 687         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 688         u32 hundred = 0;
 689         u32 dataframe = 0;
 690         __le16 fc;
 691         u16 seq_ctl;
 692         u16 channel;
 693         u16 phy_flags;
 694         u32 rate_n_flags;
 695         u32 tsf_low;
 696         int rssi;
 697
 698         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
 699                 return;
 700
 701         /* MAC header */
 702         fc = header->frame_control;
 703         seq_ctl = le16_to_cpu(header->seq_ctrl);
 704
 705         /* metadata */
 706         channel = le16_to_cpu(phy_res->channel);
 707         phy_flags = le16_to_cpu(phy_res->phy_flags);
 708         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
 709
 710         /* signal statistics */
 711         rssi = iwl_calc_rssi(priv, phy_res);
 712         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
 713
 714         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 715
 716         /* if data frame is to us and all is good,
 717          *   (optionally) print summary for only 1 out of every 100 */
 718         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 719             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 720                 dataframe = 1;
 721                 if (!group100)
 722                         print_summary = 1;      /* print each frame */
 723                 else if (priv->framecnt_to_us < 100) {
 724                         priv->framecnt_to_us++;
 725                         print_summary = 0;
 726                 } else {
 727                         priv->framecnt_to_us = 0;
 728                         print_summary = 1;
 729                         hundred = 1;
 730                 }
 731         } else {
 732                 /* print summary for all other frames */
 733                 print_summary = 1;
 734         }
 735
 736         if (print_summary) {
 737                 char *title;
 738                 int rate_idx;
 739                 u32 bitrate;
 740
 741                 if (hundred)
 742                         title = "100Frames";
 743                 else if (ieee80211_has_retry(fc))
 744                         title = "Retry";
 745                 else if (ieee80211_is_assoc_resp(fc))
 746                         title = "AscRsp";
 747                 else if (ieee80211_is_reassoc_resp(fc))
 748                         title = "RasRsp";
 749                 else if (ieee80211_is_probe_resp(fc)) {
 750                         title = "PrbRsp";
 751                         print_dump = 1; /* dump frame contents */
 752                 } else if (ieee80211_is_beacon(fc)) {
 753                         title = "Beacon";
 754                         print_dump = 1; /* dump frame contents */
 755                 } else if (ieee80211_is_atim(fc))
 756                         title = "ATIM";
 757                 else if (ieee80211_is_auth(fc))
 758                         title = "Auth";
 759                 else if (ieee80211_is_deauth(fc))
 760                         title = "DeAuth";
 761                 else if (ieee80211_is_disassoc(fc))
 762                         title = "DisAssoc";
 763                 else
 764                         title = "Frame";
 765
 766                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
 767                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
 768                         bitrate = 0;
 769                         WARN_ON_ONCE(1);
 770                 } else {
 771                         bitrate = iwl_rates[rate_idx].ieee / 2;
 772                 }
 773
 774                 /* print frame summary.
 775                  * MAC addresses show just the last byte (for brevity),
 776                  *    but you can hack it to show more, if you'd like to. */
 777                 if (dataframe)
 778                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
 779                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 780                                      title, le16_to_cpu(fc), header->addr1[5],
 781                                      length, rssi, channel, bitrate);
 782                 else {
 783                         /* src/dst addresses assume managed mode */
 784                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
 785                                      "len=%u, rssi=%d, tim=%lu usec, "
 786                                      "phy=0x%02x, chnl=%d\n",
 787                                      title, le16_to_cpu(fc), header->addr1[5],
 788                                      header->addr3[5], length, rssi,
 789                                      tsf_low - priv->scan_start_tsf,
 790                                      phy_flags, channel);
 791                 }
 792         }
 793         if (print_dump)
 794                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
 795 }
 796 #endif
 797
 798 /*
 799  * returns non-zero if packet should be dropped
 800  */
 801 int iwl_set_decrypted_flag(struct iwl_priv *priv,
 802                            struct ieee80211_hdr *hdr,
 803                            u32 decrypt_res,
 804                            struct ieee80211_rx_status *stats)
 805 {
 806         u16 fc = le16_to_cpu(hdr->frame_control);
 807
 808         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
 809                 return 0;
 810
 811         if (!(fc & IEEE80211_FCTL_PROTECTED))
 812                 return 0;
 813
 814         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
 815         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
 816         case RX_RES_STATUS_SEC_TYPE_TKIP:
 817                 /* The uCode has got a bad phase 1 Key, pushes the packet.
 818                  * Decryption will be done in SW. */
 819                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 820                     RX_RES_STATUS_BAD_KEY_TTAK)
 821                         break;
 822
 823         case RX_RES_STATUS_SEC_TYPE_WEP:
 824                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 825                     RX_RES_STATUS_BAD_ICV_MIC) {
 826                         /* bad ICV, the packet is destroyed since the
 827                          * decryption is inplace, drop it */
 828                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
 829                         return -1;
 830                 }
 831         case RX_RES_STATUS_SEC_TYPE_CCMP:
 832                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 833                     RX_RES_STATUS_DECRYPT_OK) {
 834                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
 835                         stats->flag |= RX_FLAG_DECRYPTED;
 836                 }
 837                 break;
 838
 839         default:
 840                 break;
 841         }
 842         return 0;
 843 }
 844 EXPORT_SYMBOL(iwl_set_decrypted_flag);
 845
 846 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
 847 {
 848         u32 decrypt_out = 0;
 849
 850         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
 851                                         RX_RES_STATUS_STATION_FOUND)
 852                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
 853                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
 854
 855         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
 856
 857         /* packet was not encrypted */
 858         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 859                                         RX_RES_STATUS_SEC_TYPE_NONE)
 860                 return decrypt_out;
 861
 862         /* packet was encrypted with unknown alg */
 863         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 864                                         RX_RES_STATUS_SEC_TYPE_ERR)
 865                 return decrypt_out;
 866
 867         /* decryption was not done in HW */
 868         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
 869                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
 870                 return decrypt_out;
 871
 872         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
 873
 874         case RX_RES_STATUS_SEC_TYPE_CCMP:
 875                 /* alg is CCM: check MIC only */
 876                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
 877                         /* Bad MIC */
 878                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 879                 else
 880                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 881
 882                 break;
 883
 884         case RX_RES_STATUS_SEC_TYPE_TKIP:
 885                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
 886                         /* Bad TTAK */
 887                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
 888                         break;
 889                 }
 890                 /* fall through if TTAK OK */
 891         default:
 892                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
 893                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 894                 else
 895                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 896                 break;
 897         };
 898
 899         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
 900                                         decrypt_in, decrypt_out);
 901
 902         return decrypt_out;
 903 }
 904
 905 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
 906                                         struct ieee80211_hdr *hdr,
 907                                         u16 len,
 908                                         u32 ampdu_status,
 909                                         struct iwl_rx_mem_buffer *rxb,
 910                                         struct ieee80211_rx_status *stats)
 911 {
 912         struct sk_buff *skb;
 913         int ret = 0;
 914         __le16 fc = hdr->frame_control;
 915
 916         /* We only process data packets if the interface is open */
 917         if (unlikely(!priv->is_open)) {
 918                 IWL_DEBUG_DROP_LIMIT(priv,
 919                     "Dropping packet while interface is not open.\n");
 920                 return;
 921         }
 922
 923         /* In case of HW accelerated crypto and bad decryption, drop */
 924         if (!priv->cfg->mod_params->sw_crypto &&
 925             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
 926                 return;
 927
 928         skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
 929         if (!skb) {
 930                 IWL_ERR(priv, "alloc_skb failed\n");
 931                 return;
 932         }
 933
 934         skb_reserve(skb, IWL_LINK_HDR_MAX);
 935         skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
 936
 937         /* mac80211 currently doesn't support paged SKB. Convert it to
 938          * linear SKB for management frame and data frame requires
 939          * software decryption or software defragementation. */
 940         if (ieee80211_is_mgmt(fc) ||
 941             ieee80211_has_protected(fc) ||
 942             ieee80211_has_morefrags(fc) ||
 943             le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG)
 944                 ret = skb_linearize(skb);
 945         else
 946                 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
 947                          0 : -ENOMEM;
 948
 949         if (ret) {
 950                 kfree_skb(skb);
 951                 goto out;
 952         }
 953
 954         /*
 955          * XXX: We cannot touch the page and its virtual memory (hdr) after
 956          * here. It might have already been freed by the above skb change.
 957          */
 958
 959         iwl_update_stats(priv, false, fc, len);
 960         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 961
 962         ieee80211_rx(priv->hw, skb);
 963  out:
 964         priv->alloc_rxb_page--;
 965         rxb->page = NULL;
 966 }
 967
 968 /* This is necessary only for a number of statistics, see the caller. */
 969 static int iwl_is_network_packet(struct iwl_priv *priv,
 970                 struct ieee80211_hdr *header)
 971 {
 972         /* Filter incoming packets to determine if they are targeted toward
 973          * this network, discarding packets coming from ourselves */
 974         switch (priv->iw_mode) {
 975         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 976                 /* packets to our IBSS update information */
 977                 return !compare_ether_addr(header->addr3, priv->bssid);
 978         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 979                 /* packets to our IBSS update information */
 980                 return !compare_ether_addr(header->addr2, priv->bssid);
 981         default:
 982                 return 1;
 983         }
 984 }
 985
 986 /* Called for REPLY_RX (legacy ABG frames), or
 987  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
 988 void iwl_rx_reply_rx(struct iwl_priv *priv,
 989                                 struct iwl_rx_mem_buffer *rxb)
 990 {
 991         struct ieee80211_hdr *header;
 992         struct ieee80211_rx_status rx_status;
 993         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 994         struct iwl_rx_phy_res *phy_res;
 995         __le32 rx_pkt_status;
 996         struct iwl4965_rx_mpdu_res_start *amsdu;
 997         u32 len;
 998         u32 ampdu_status;
 999         u32 rate_n_flags;
1000
1001         /**
1002          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
1003          *      REPLY_RX: physical layer info is in this buffer
1004          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
1005          *              command and cached in priv->last_phy_res
1006          *
1007          * Here we set up local variables depending on which command is
1008          * received.
1009          */
1010         if (pkt->hdr.cmd == REPLY_RX) {
1011                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1012                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1013                                 + phy_res->cfg_phy_cnt);
1014
1015                 len = le16_to_cpu(phy_res->byte_count);
1016                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1017                                 phy_res->cfg_phy_cnt + len);
1018                 ampdu_status = le32_to_cpu(rx_pkt_status);
1019         } else {
1020                 if (!priv->last_phy_res[0]) {
1021                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1022                         return;
1023                 }
1024                 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1025                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1026                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1027                 len = le16_to_cpu(amsdu->byte_count);
1028                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1029                 ampdu_status = iwl_translate_rx_status(priv,
1030                                 le32_to_cpu(rx_pkt_status));
1031         }
1032
1033         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1034                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1035                                 phy_res->cfg_phy_cnt);
1036                 return;
1037         }
1038
1039         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1040             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1041                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1042                                 le32_to_cpu(rx_pkt_status));
1043                 return;
1044         }
1045
1046         /* This will be used in several places later */
1047         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1048
1049         /* rx_status carries information about the packet to mac80211 */
1050         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1051         rx_status.freq =
1052                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1053         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1054                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1055         rx_status.rate_idx =
1056                 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1057         rx_status.flag = 0;
1058
1059         /* TSF isn't reliable. In order to allow smooth user experience,
1060          * this W/A doesn't propagate it to the mac80211 */
1061         /*rx_status.flag |= RX_FLAG_TSFT;*/
1062
1063         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1064
1065         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1066         rx_status.signal = iwl_calc_rssi(priv, phy_res);
1067
1068         /* Meaningful noise values are available only from beacon statistics,
1069          *   which are gathered only when associated, and indicate noise
1070          *   only for the associated network channel ...
1071          * Ignore these noise values while scanning (other channels) */
1072         if (iwl_is_associated(priv) &&
1073             !test_bit(STATUS_SCANNING, &priv->status)) {
1074                 rx_status.noise = priv->last_rx_noise;
1075         } else {
1076                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1077         }
1078
1079         /* Reset beacon noise level if not associated. */
1080         if (!iwl_is_associated(priv))
1081                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1082
1083 #ifdef CONFIG_IWLWIFI_DEBUG
1084         /* Set "1" to report good data frames in groups of 100 */
1085         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1086                 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1087 #endif
1088         iwl_dbg_log_rx_data_frame(priv, len, header);
1089         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
1090                 rx_status.signal, rx_status.noise,
1091                 (unsigned long long)rx_status.mactime);
1092
1093         /*
1094          * "antenna number"
1095          *
1096          * It seems that the antenna field in the phy flags value
1097          * is actually a bit field. This is undefined by radiotap,
1098          * it wants an actual antenna number but I always get "7"
1099          * for most legacy frames I receive indicating that the
1100          * same frame was received on all three RX chains.
1101          *
1102          * I think this field should be removed in favor of a
1103          * new 802.11n radiotap field "RX chains" that is defined
1104          * as a bitmask.
1105          */
1106         rx_status.antenna =
1107                 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1108                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1109
1110         /* set the preamble flag if appropriate */
1111         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1112                 rx_status.flag |= RX_FLAG_SHORTPRE;
1113
1114         /* Set up the HT phy flags */
1115         if (rate_n_flags & RATE_MCS_HT_MSK)
1116                 rx_status.flag |= RX_FLAG_HT;
1117         if (rate_n_flags & RATE_MCS_HT40_MSK)
1118                 rx_status.flag |= RX_FLAG_40MHZ;
1119         if (rate_n_flags & RATE_MCS_SGI_MSK)
1120                 rx_status.flag |= RX_FLAG_SHORT_GI;
1121
1122         if (iwl_is_network_packet(priv, header)) {
1123                 priv->last_rx_rssi = rx_status.signal;
1124                 priv->last_beacon_time =  priv->ucode_beacon_time;
1125                 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1126         }
1127
1128         iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1129                                     rxb, &rx_status);
1130 }
1131 EXPORT_SYMBOL(iwl_rx_reply_rx);
1132
1133 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1134  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1135 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1136                                     struct iwl_rx_mem_buffer *rxb)
1137 {
1138         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1139         priv->last_phy_res[0] = 1;
1140         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1141                sizeof(struct iwl_rx_phy_res));
1142 }
1143 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);