1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
42 * Rx theory of operation
44 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45 * each of which point to Receive Buffers to be filled by the NIC. These get
46 * used not only for Rx frames, but for any command response or notification
47 * from the NIC. The driver and NIC manage the Rx buffers by means
48 * of indexes into the circular buffer.
51 * The host/firmware share two index registers for managing the Rx buffers.
53 * The READ index maps to the first position that the firmware may be writing
54 * to -- the driver can read up to (but not including) this position and get
56 * The READ index is managed by the firmware once the card is enabled.
58 * The WRITE index maps to the last position the driver has read from -- the
59 * position preceding WRITE is the last slot the firmware can place a packet.
61 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
64 * During initialization, the host sets up the READ queue position to the first
65 * INDEX position, and WRITE to the last (READ - 1 wrapped)
67 * When the firmware places a packet in a buffer, it will advance the READ index
68 * and fire the RX interrupt. The driver can then query the READ index and
69 * process as many packets as possible, moving the WRITE index forward as it
70 * resets the Rx queue buffers with new memory.
72 * The management in the driver is as follows:
73 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
74 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75 * to replenish the iwl->rxq->rx_free.
76 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77 * iwl->rxq is replenished and the READ INDEX is updated (updating the
78 * 'processed' and 'read' driver indexes as well)
79 * + A received packet is processed and handed to the kernel network stack,
80 * detached from the iwl->rxq. The driver 'processed' index is updated.
81 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
84 * were enough free buffers and RX_STALLED is set it is cleared.
89 * iwl_rx_queue_alloc() Allocates rx_free
90 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
91 * iwl_rx_queue_restock
92 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93 * queue, updates firmware pointers, and updates
94 * the WRITE index. If insufficient rx_free buffers
95 * are available, schedules iwl_rx_replenish
97 * -- enable interrupts --
98 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
99 * READ INDEX, detaching the SKB from the pool.
100 * Moves the packet buffer from queue to rx_used.
101 * Calls iwl_rx_queue_restock to refill any empty
108 * iwl_rx_queue_space - Return number of free slots available in queue.
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
112 int s = q->read - q->write;
115 /* keep some buffer to not confuse full and empty queue */
121 EXPORT_SYMBOL(iwl_rx_queue_space);
124 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
129 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
133 spin_lock_irqsave(&q->lock, flags);
135 if (q->need_update == 0)
138 /* If power-saving is in use, make sure device is awake */
139 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
142 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143 iwl_set_bit(priv, CSR_GP_CNTRL,
144 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
148 q->write_actual = (q->write & ~0x7);
149 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
151 /* Else device is assumed to be awake */
153 /* Device expects a multiple of 8 */
154 q->write_actual = (q->write & ~0x7);
155 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
161 spin_unlock_irqrestore(&q->lock, flags);
164 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
166 * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
168 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
171 return cpu_to_le32((u32)(dma_addr >> 8));
175 * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
177 * If there are slots in the RX queue that need to be restocked,
178 * and we have free pre-allocated buffers, fill the ranks as much
179 * as we can, pulling from rx_free.
181 * This moves the 'write' index forward to catch up with 'processed', and
182 * also updates the memory address in the firmware to reference the new
185 int iwl_rx_queue_restock(struct iwl_priv *priv)
187 struct iwl_rx_queue *rxq = &priv->rxq;
188 struct list_head *element;
189 struct iwl_rx_mem_buffer *rxb;
194 spin_lock_irqsave(&rxq->lock, flags);
195 write = rxq->write & ~0x7;
196 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
197 /* Get next free Rx buffer, remove from free list */
198 element = rxq->rx_free.next;
199 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
202 /* Point to Rx buffer via next RBD in circular buffer */
203 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
204 rxq->queue[rxq->write] = rxb;
205 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
208 spin_unlock_irqrestore(&rxq->lock, flags);
209 /* If the pre-allocated buffer pool is dropping low, schedule to
211 if (rxq->free_count <= RX_LOW_WATERMARK)
212 queue_work(priv->workqueue, &priv->rx_replenish);
215 /* If we've added more space for the firmware to place data, tell it.
216 * Increment device's write pointer in multiples of 8. */
217 if (rxq->write_actual != (rxq->write & ~0x7)) {
218 spin_lock_irqsave(&rxq->lock, flags);
219 rxq->need_update = 1;
220 spin_unlock_irqrestore(&rxq->lock, flags);
221 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
226 EXPORT_SYMBOL(iwl_rx_queue_restock);
230 * iwl_rx_replenish - Move all used packet from rx_used to rx_free
232 * When moving to rx_free an SKB is allocated for the slot.
234 * Also restock the Rx queue via iwl_rx_queue_restock.
235 * This is called as a scheduled work item (except for during initialization)
237 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
239 struct iwl_rx_queue *rxq = &priv->rxq;
240 struct list_head *element;
241 struct iwl_rx_mem_buffer *rxb;
244 gfp_t gfp_mask = priority;
247 spin_lock_irqsave(&rxq->lock, flags);
248 if (list_empty(&rxq->rx_used)) {
249 spin_unlock_irqrestore(&rxq->lock, flags);
252 spin_unlock_irqrestore(&rxq->lock, flags);
254 if (rxq->free_count > RX_LOW_WATERMARK)
255 gfp_mask |= __GFP_NOWARN;
257 if (priv->hw_params.rx_page_order > 0)
258 gfp_mask |= __GFP_COMP;
260 /* Alloc a new receive buffer */
261 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
264 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
266 priv->hw_params.rx_page_order);
268 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
270 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
271 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
273 /* We don't reschedule replenish work here -- we will
274 * call the restock method and if it still needs
275 * more buffers it will schedule replenish */
279 spin_lock_irqsave(&rxq->lock, flags);
281 if (list_empty(&rxq->rx_used)) {
282 spin_unlock_irqrestore(&rxq->lock, flags);
283 __free_pages(page, priv->hw_params.rx_page_order);
286 element = rxq->rx_used.next;
287 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
290 spin_unlock_irqrestore(&rxq->lock, flags);
293 /* Get physical address of the RB */
294 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
295 PAGE_SIZE << priv->hw_params.rx_page_order,
297 /* dma address must be no more than 36 bits */
298 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
299 /* and also 256 byte aligned! */
300 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
302 spin_lock_irqsave(&rxq->lock, flags);
304 list_add_tail(&rxb->list, &rxq->rx_free);
306 priv->alloc_rxb_page++;
308 spin_unlock_irqrestore(&rxq->lock, flags);
312 void iwl_rx_replenish(struct iwl_priv *priv)
316 iwl_rx_allocate(priv, GFP_KERNEL);
318 spin_lock_irqsave(&priv->lock, flags);
319 iwl_rx_queue_restock(priv);
320 spin_unlock_irqrestore(&priv->lock, flags);
322 EXPORT_SYMBOL(iwl_rx_replenish);
324 void iwl_rx_replenish_now(struct iwl_priv *priv)
326 iwl_rx_allocate(priv, GFP_ATOMIC);
328 iwl_rx_queue_restock(priv);
330 EXPORT_SYMBOL(iwl_rx_replenish_now);
333 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
334 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
335 * This free routine walks the list of POOL entries and if SKB is set to
336 * non NULL it is unmapped and freed
338 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
341 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
342 if (rxq->pool[i].page != NULL) {
343 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
344 PAGE_SIZE << priv->hw_params.rx_page_order,
346 __free_pages(rxq->pool[i].page,
347 priv->hw_params.rx_page_order);
348 rxq->pool[i].page = NULL;
349 priv->alloc_rxb_page--;
353 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
355 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
356 rxq->rb_stts, rxq->rb_stts_dma);
360 EXPORT_SYMBOL(iwl_rx_queue_free);
362 int iwl_rx_queue_alloc(struct iwl_priv *priv)
364 struct iwl_rx_queue *rxq = &priv->rxq;
365 struct pci_dev *dev = priv->pci_dev;
368 spin_lock_init(&rxq->lock);
369 INIT_LIST_HEAD(&rxq->rx_free);
370 INIT_LIST_HEAD(&rxq->rx_used);
372 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
373 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
377 rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
382 /* Fill the rx_used queue with _all_ of the Rx buffers */
383 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
384 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
386 /* Set us so that we have processed and used all buffers, but have
387 * not restocked the Rx queue with fresh buffers */
388 rxq->read = rxq->write = 0;
389 rxq->write_actual = 0;
391 rxq->need_update = 0;
395 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
400 EXPORT_SYMBOL(iwl_rx_queue_alloc);
402 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
406 spin_lock_irqsave(&rxq->lock, flags);
407 INIT_LIST_HEAD(&rxq->rx_free);
408 INIT_LIST_HEAD(&rxq->rx_used);
409 /* Fill the rx_used queue with _all_ of the Rx buffers */
410 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
411 /* In the reset function, these buffers may have been allocated
412 * to an SKB, so we need to unmap and free potential storage */
413 if (rxq->pool[i].page != NULL) {
414 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
415 PAGE_SIZE << priv->hw_params.rx_page_order,
417 priv->alloc_rxb_page--;
418 __free_pages(rxq->pool[i].page,
419 priv->hw_params.rx_page_order);
420 rxq->pool[i].page = NULL;
422 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
425 /* Set us so that we have processed and used all buffers, but have
426 * not restocked the Rx queue with fresh buffers */
427 rxq->read = rxq->write = 0;
428 rxq->write_actual = 0;
430 spin_unlock_irqrestore(&rxq->lock, flags);
433 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
436 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
437 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
439 if (!priv->cfg->use_isr_legacy)
440 rb_timeout = RX_RB_TIMEOUT;
442 if (priv->cfg->mod_params->amsdu_size_8K)
443 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
445 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
448 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
450 /* Reset driver's Rx queue write index */
451 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
453 /* Tell device where to find RBD circular buffer in DRAM */
454 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
455 (u32)(rxq->dma_addr >> 8));
457 /* Tell device where in DRAM to update its Rx status */
458 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
459 rxq->rb_stts_dma >> 4);
462 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
463 * the credit mechanism in 5000 HW RX FIFO
464 * Direct rx interrupts to hosts
465 * Rx buffer size 4 or 8k
469 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
470 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
471 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
472 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
473 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
475 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
476 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
478 iwl_write32(priv, CSR_INT_COALESCING, 0x40);
483 int iwl_rxq_stop(struct iwl_priv *priv)
487 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
488 iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
489 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
493 EXPORT_SYMBOL(iwl_rxq_stop);
495 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
496 struct iwl_rx_mem_buffer *rxb)
499 struct iwl_rx_packet *pkt = rxb_addr(rxb);
500 struct iwl_missed_beacon_notif *missed_beacon;
502 missed_beacon = &pkt->u.missed_beacon;
503 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
504 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
505 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
506 le32_to_cpu(missed_beacon->total_missed_becons),
507 le32_to_cpu(missed_beacon->num_recvd_beacons),
508 le32_to_cpu(missed_beacon->num_expected_beacons));
509 if (!test_bit(STATUS_SCANNING, &priv->status))
510 iwl_init_sensitivity(priv);
513 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
516 /* Calculate noise level, based on measurements during network silence just
517 * before arriving beacon. This measurement can be done only if we know
518 * exactly when to expect beacons, therefore only when we're associated. */
519 static void iwl_rx_calc_noise(struct iwl_priv *priv)
521 struct statistics_rx_non_phy *rx_info
522 = &(priv->statistics.rx.general);
523 int num_active_rx = 0;
524 int total_silence = 0;
526 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
528 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
530 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
533 total_silence += bcn_silence_a;
537 total_silence += bcn_silence_b;
541 total_silence += bcn_silence_c;
545 /* Average among active antennas */
547 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
549 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
551 IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
552 bcn_silence_a, bcn_silence_b, bcn_silence_c,
553 priv->last_rx_noise);
556 #ifdef CONFIG_IWLWIFI_DEBUG
558 * based on the assumption of all statistics counter are in DWORD
559 * FIXME: This function is for debugging, do not deal with
560 * the case of counters roll-over.
562 static void iwl_accumulative_statistics(struct iwl_priv *priv,
569 prev_stats = (__le32 *)&priv->statistics;
570 accum_stats = (u32 *)&priv->accum_statistics;
572 for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
573 i += sizeof(__le32), stats++, prev_stats++, accum_stats++)
574 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats))
575 *accum_stats += (le32_to_cpu(*stats) -
576 le32_to_cpu(*prev_stats));
578 /* reset accumulative statistics for "no-counter" type statistics */
579 priv->accum_statistics.general.temperature =
580 priv->statistics.general.temperature;
581 priv->accum_statistics.general.temperature_m =
582 priv->statistics.general.temperature_m;
583 priv->accum_statistics.general.ttl_timestamp =
584 priv->statistics.general.ttl_timestamp;
585 priv->accum_statistics.tx.tx_power.ant_a =
586 priv->statistics.tx.tx_power.ant_a;
587 priv->accum_statistics.tx.tx_power.ant_b =
588 priv->statistics.tx.tx_power.ant_b;
589 priv->accum_statistics.tx.tx_power.ant_c =
590 priv->statistics.tx.tx_power.ant_c;
594 #define REG_RECALIB_PERIOD (60)
596 void iwl_rx_statistics(struct iwl_priv *priv,
597 struct iwl_rx_mem_buffer *rxb)
600 struct iwl_rx_packet *pkt = rxb_addr(rxb);
602 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
603 (int)sizeof(priv->statistics),
604 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
606 change = ((priv->statistics.general.temperature !=
607 pkt->u.stats.general.temperature) ||
608 ((priv->statistics.flag &
609 STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
610 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
612 #ifdef CONFIG_IWLWIFI_DEBUG
613 iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
615 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
617 set_bit(STATUS_STATISTICS, &priv->status);
619 /* Reschedule the statistics timer to occur in
620 * REG_RECALIB_PERIOD seconds to ensure we get a
621 * thermal update even if the uCode doesn't give
623 mod_timer(&priv->statistics_periodic, jiffies +
624 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
626 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
627 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
628 iwl_rx_calc_noise(priv);
629 queue_work(priv->workqueue, &priv->run_time_calib_work);
631 if (priv->cfg->ops->lib->temp_ops.temperature && change)
632 priv->cfg->ops->lib->temp_ops.temperature(priv);
634 EXPORT_SYMBOL(iwl_rx_statistics);
636 #define PERFECT_RSSI (-20) /* dBm */
637 #define WORST_RSSI (-95) /* dBm */
638 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
640 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
641 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
642 * about formulas used below. */
643 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
646 int degradation = PERFECT_RSSI - rssi_dbm;
648 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
649 * as indicator; formula is (signal dbm - noise dbm).
650 * SNR at or above 40 is a great signal (100%).
651 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
652 * Weakest usable signal is usually 10 - 15 dB SNR. */
654 if (rssi_dbm - noise_dbm >= 40)
656 else if (rssi_dbm < noise_dbm)
658 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
660 /* Else use just the signal level.
661 * This formula is a least squares fit of data points collected and
662 * compared with a reference system that had a percentage (%) display
663 * for signal quality. */
665 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
666 (15 * RSSI_RANGE + 62 * degradation)) /
667 (RSSI_RANGE * RSSI_RANGE);
671 else if (sig_qual < 1)
677 /* Calc max signal level (dBm) among 3 possible receivers */
678 static inline int iwl_calc_rssi(struct iwl_priv *priv,
679 struct iwl_rx_phy_res *rx_resp)
681 return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
684 #ifdef CONFIG_IWLWIFI_DEBUG
686 * iwl_dbg_report_frame - dump frame to syslog during debug sessions
688 * You may hack this function to show different aspects of received frames,
689 * including selective frame dumps.
690 * group100 parameter selects whether to show 1 out of 100 good data frames.
691 * All beacon and probe response frames are printed.
693 static void iwl_dbg_report_frame(struct iwl_priv *priv,
694 struct iwl_rx_phy_res *phy_res, u16 length,
695 struct ieee80211_hdr *header, int group100)
698 u32 print_summary = 0;
699 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
710 if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
714 fc = header->frame_control;
715 seq_ctl = le16_to_cpu(header->seq_ctrl);
718 channel = le16_to_cpu(phy_res->channel);
719 phy_flags = le16_to_cpu(phy_res->phy_flags);
720 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
722 /* signal statistics */
723 rssi = iwl_calc_rssi(priv, phy_res);
724 tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
726 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
728 /* if data frame is to us and all is good,
729 * (optionally) print summary for only 1 out of every 100 */
730 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
731 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
734 print_summary = 1; /* print each frame */
735 else if (priv->framecnt_to_us < 100) {
736 priv->framecnt_to_us++;
739 priv->framecnt_to_us = 0;
744 /* print summary for all other frames */
755 else if (ieee80211_has_retry(fc))
757 else if (ieee80211_is_assoc_resp(fc))
759 else if (ieee80211_is_reassoc_resp(fc))
761 else if (ieee80211_is_probe_resp(fc)) {
763 print_dump = 1; /* dump frame contents */
764 } else if (ieee80211_is_beacon(fc)) {
766 print_dump = 1; /* dump frame contents */
767 } else if (ieee80211_is_atim(fc))
769 else if (ieee80211_is_auth(fc))
771 else if (ieee80211_is_deauth(fc))
773 else if (ieee80211_is_disassoc(fc))
778 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
779 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
783 bitrate = iwl_rates[rate_idx].ieee / 2;
786 /* print frame summary.
787 * MAC addresses show just the last byte (for brevity),
788 * but you can hack it to show more, if you'd like to. */
790 IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
791 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
792 title, le16_to_cpu(fc), header->addr1[5],
793 length, rssi, channel, bitrate);
795 /* src/dst addresses assume managed mode */
796 IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
797 "len=%u, rssi=%d, tim=%lu usec, "
798 "phy=0x%02x, chnl=%d\n",
799 title, le16_to_cpu(fc), header->addr1[5],
800 header->addr3[5], length, rssi,
801 tsf_low - priv->scan_start_tsf,
806 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
811 * returns non-zero if packet should be dropped
813 int iwl_set_decrypted_flag(struct iwl_priv *priv,
814 struct ieee80211_hdr *hdr,
816 struct ieee80211_rx_status *stats)
818 u16 fc = le16_to_cpu(hdr->frame_control);
820 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
823 if (!(fc & IEEE80211_FCTL_PROTECTED))
826 IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
827 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
828 case RX_RES_STATUS_SEC_TYPE_TKIP:
829 /* The uCode has got a bad phase 1 Key, pushes the packet.
830 * Decryption will be done in SW. */
831 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
832 RX_RES_STATUS_BAD_KEY_TTAK)
835 case RX_RES_STATUS_SEC_TYPE_WEP:
836 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
837 RX_RES_STATUS_BAD_ICV_MIC) {
838 /* bad ICV, the packet is destroyed since the
839 * decryption is inplace, drop it */
840 IWL_DEBUG_RX(priv, "Packet destroyed\n");
843 case RX_RES_STATUS_SEC_TYPE_CCMP:
844 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
845 RX_RES_STATUS_DECRYPT_OK) {
846 IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
847 stats->flag |= RX_FLAG_DECRYPTED;
856 EXPORT_SYMBOL(iwl_set_decrypted_flag);
858 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
862 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
863 RX_RES_STATUS_STATION_FOUND)
864 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
865 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
867 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
869 /* packet was not encrypted */
870 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
871 RX_RES_STATUS_SEC_TYPE_NONE)
874 /* packet was encrypted with unknown alg */
875 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
876 RX_RES_STATUS_SEC_TYPE_ERR)
879 /* decryption was not done in HW */
880 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
881 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
884 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
886 case RX_RES_STATUS_SEC_TYPE_CCMP:
887 /* alg is CCM: check MIC only */
888 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
890 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
892 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
896 case RX_RES_STATUS_SEC_TYPE_TKIP:
897 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
899 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
902 /* fall through if TTAK OK */
904 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
905 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
907 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
911 IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
912 decrypt_in, decrypt_out);
917 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
918 struct ieee80211_hdr *hdr,
921 struct iwl_rx_mem_buffer *rxb,
922 struct ieee80211_rx_status *stats)
926 __le16 fc = hdr->frame_control;
928 /* We only process data packets if the interface is open */
929 if (unlikely(!priv->is_open)) {
930 IWL_DEBUG_DROP_LIMIT(priv,
931 "Dropping packet while interface is not open.\n");
935 /* In case of HW accelerated crypto and bad decryption, drop */
936 if (!priv->cfg->mod_params->sw_crypto &&
937 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
940 skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
942 IWL_ERR(priv, "alloc_skb failed\n");
946 skb_reserve(skb, IWL_LINK_HDR_MAX);
947 skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
949 /* mac80211 currently doesn't support paged SKB. Convert it to
950 * linear SKB for management frame and data frame requires
951 * software decryption or software defragementation. */
952 if (ieee80211_is_mgmt(fc) ||
953 ieee80211_has_protected(fc) ||
954 ieee80211_has_morefrags(fc) ||
955 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG)
956 ret = skb_linearize(skb);
958 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
967 * XXX: We cannot touch the page and its virtual memory (hdr) after
968 * here. It might have already been freed by the above skb change.
971 iwl_update_stats(priv, false, fc, len);
972 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
974 ieee80211_rx(priv->hw, skb);
976 priv->alloc_rxb_page--;
980 /* This is necessary only for a number of statistics, see the caller. */
981 static int iwl_is_network_packet(struct iwl_priv *priv,
982 struct ieee80211_hdr *header)
984 /* Filter incoming packets to determine if they are targeted toward
985 * this network, discarding packets coming from ourselves */
986 switch (priv->iw_mode) {
987 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
988 /* packets to our IBSS update information */
989 return !compare_ether_addr(header->addr3, priv->bssid);
990 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
991 /* packets to our IBSS update information */
992 return !compare_ether_addr(header->addr2, priv->bssid);
998 /* Called for REPLY_RX (legacy ABG frames), or
999 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1000 void iwl_rx_reply_rx(struct iwl_priv *priv,
1001 struct iwl_rx_mem_buffer *rxb)
1003 struct ieee80211_hdr *header;
1004 struct ieee80211_rx_status rx_status;
1005 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1006 struct iwl_rx_phy_res *phy_res;
1007 __le32 rx_pkt_status;
1008 struct iwl4965_rx_mpdu_res_start *amsdu;
1015 * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
1016 * REPLY_RX: physical layer info is in this buffer
1017 * REPLY_RX_MPDU_CMD: physical layer info was sent in separate
1018 * command and cached in priv->last_phy_res
1020 * Here we set up local variables depending on which command is
1023 if (pkt->hdr.cmd == REPLY_RX) {
1024 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1025 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1026 + phy_res->cfg_phy_cnt);
1028 len = le16_to_cpu(phy_res->byte_count);
1029 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1030 phy_res->cfg_phy_cnt + len);
1031 ampdu_status = le32_to_cpu(rx_pkt_status);
1033 if (!priv->last_phy_res[0]) {
1034 IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1037 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1038 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1039 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1040 len = le16_to_cpu(amsdu->byte_count);
1041 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1042 ampdu_status = iwl_translate_rx_status(priv,
1043 le32_to_cpu(rx_pkt_status));
1046 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1047 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1048 phy_res->cfg_phy_cnt);
1052 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1053 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1054 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1055 le32_to_cpu(rx_pkt_status));
1059 /* This will be used in several places later */
1060 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1062 /* rx_status carries information about the packet to mac80211 */
1063 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1065 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1066 rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1067 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1068 rx_status.rate_idx =
1069 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1072 /* TSF isn't reliable. In order to allow smooth user experience,
1073 * this W/A doesn't propagate it to the mac80211 */
1074 /*rx_status.flag |= RX_FLAG_TSFT;*/
1076 priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1078 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1079 rx_status.signal = iwl_calc_rssi(priv, phy_res);
1081 /* Meaningful noise values are available only from beacon statistics,
1082 * which are gathered only when associated, and indicate noise
1083 * only for the associated network channel ...
1084 * Ignore these noise values while scanning (other channels) */
1085 if (iwl_is_associated(priv) &&
1086 !test_bit(STATUS_SCANNING, &priv->status)) {
1087 rx_status.noise = priv->last_rx_noise;
1088 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1091 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1092 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1095 /* Reset beacon noise level if not associated. */
1096 if (!iwl_is_associated(priv))
1097 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1099 #ifdef CONFIG_IWLWIFI_DEBUG
1100 /* Set "1" to report good data frames in groups of 100 */
1101 if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1102 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1104 iwl_dbg_log_rx_data_frame(priv, len, header);
1105 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n",
1106 rx_status.signal, rx_status.noise, rx_status.qual,
1107 (unsigned long long)rx_status.mactime);
1112 * It seems that the antenna field in the phy flags value
1113 * is actually a bit field. This is undefined by radiotap,
1114 * it wants an actual antenna number but I always get "7"
1115 * for most legacy frames I receive indicating that the
1116 * same frame was received on all three RX chains.
1118 * I think this field should be removed in favor of a
1119 * new 802.11n radiotap field "RX chains" that is defined
1123 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1124 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1126 /* set the preamble flag if appropriate */
1127 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1128 rx_status.flag |= RX_FLAG_SHORTPRE;
1130 /* Set up the HT phy flags */
1131 if (rate_n_flags & RATE_MCS_HT_MSK)
1132 rx_status.flag |= RX_FLAG_HT;
1133 if (rate_n_flags & RATE_MCS_HT40_MSK)
1134 rx_status.flag |= RX_FLAG_40MHZ;
1135 if (rate_n_flags & RATE_MCS_SGI_MSK)
1136 rx_status.flag |= RX_FLAG_SHORT_GI;
1138 if (iwl_is_network_packet(priv, header)) {
1139 priv->last_rx_rssi = rx_status.signal;
1140 priv->last_beacon_time = priv->ucode_beacon_time;
1141 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1144 fc = le16_to_cpu(header->frame_control);
1145 switch (fc & IEEE80211_FCTL_FTYPE) {
1146 case IEEE80211_FTYPE_MGMT:
1147 case IEEE80211_FTYPE_DATA:
1148 if (priv->iw_mode == NL80211_IFTYPE_AP)
1149 iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
1153 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1159 EXPORT_SYMBOL(iwl_rx_reply_rx);
1161 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1162 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1163 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1164 struct iwl_rx_mem_buffer *rxb)
1166 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1167 priv->last_phy_res[0] = 1;
1168 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1169 sizeof(struct iwl_rx_phy_res));
1171 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);