SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/init.h>
  67
  68 #include <net/mac80211.h>
  69
  70 #include "iwl-commands.h"
  71 #include "iwl-dev.h"
  72 #include "iwl-core.h"
  73 #include "iwl-debug.h"
  74 #include "iwl-eeprom.h"
  75 #include "iwl-io.h"
  76
  77 /************************** EEPROM BANDS ****************************
  78  *
  79  * The iwl_eeprom_band definitions below provide the mapping from the
  80  * EEPROM contents to the specific channel number supported for each
  81  * band.
  82  *
  83  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  84  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  85  * The specific geography and calibration information for that channel
  86  * is contained in the eeprom map itself.
  87  *
  88  * During init, we copy the eeprom information and channel map
  89  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  90  *
  91  * channel_map_24/52 provides the index in the channel_info array for a
  92  * given channel.  We have to have two separate maps as there is channel
  93  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  94  * band_2
  95  *
  96  * A value of 0xff stored in the channel_map indicates that the channel
  97  * is not supported by the hardware at all.
  98  *
  99  * A value of 0xfe in the channel_map indicates that the channel is not
 100  * valid for Tx with the current hardware.  This means that
 101  * while the system can tune and receive on a given channel, it may not
 102  * be able to associate or transmit any frames on that
 103  * channel.  There is no corresponding channel information for that
 104  * entry.
 105  *
 106  *********************************************************************/
 107
 108 /* 2.4 GHz */
 109 const u8 iwl_eeprom_band_1[14] = {
 110         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 111 };
 112
 113 /* 5.2 GHz bands */
 114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 115         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 116 };
 117
 118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 119         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 120 };
 121
 122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 123         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 124 };
 125
 126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 127         145, 149, 153, 157, 161, 165
 128 };
 129
 130 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
 131         1, 2, 3, 4, 5, 6, 7
 132 };
 133
 134 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
 135         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 136 };
 137
 138 /**
 139  * struct iwl_txpwr_section: eeprom section information
 140  * @offset: indirect address into eeprom image
 141  * @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
 142  * @band: band type for the section
 143  * @is_common - true: common section, false: channel section
 144  * @is_cck - true: cck section, false: not cck section
 145  * @is_ht_40 - true: all channel in the section are HT40 channel,
 146  *             false: legacy or HT 20 MHz
 147  *             ignore if it is common section
 148  * @iwl_eeprom_section_channel: channel array in the section,
 149  *             ignore if common section
 150  */
 151 struct iwl_txpwr_section {
 152         u32 offset;
 153         u8 count;
 154         enum ieee80211_band band;
 155         bool is_common;
 156         bool is_cck;
 157         bool is_ht40;
 158         u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
 159 };
 160
 161 /**
 162  * section 1 - 3 are regulatory tx power apply to all channels based on
 163  *    modulation: CCK, OFDM
 164  *    Band: 2.4GHz, 5.2GHz
 165  * section 4 - 10 are regulatory tx power apply to specified channels
 166  *    For example:
 167  *      1L - Channel 1 Legacy
 168  *      1HT - Channel 1 HT
 169  *      (1,+1) - Channel 1 HT40 "_above_"
 170  *
 171  * Section 1: all CCK channels
 172  * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
 173  * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
 174  * Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
 175  * Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
 176  * Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
 177  * Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
 178  * Section 8: 2.4 GHz channel: 13L, 13HT
 179  * Section 9: 2.4 GHz channel: 140L, 140HT
 180  * Section 10: 2.4 GHz 40MHz channels: (132,+1)  (44,+1)
 181  *
 182  */
 183 static const struct iwl_txpwr_section enhinfo[] = {
 184         { EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
 185         { EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
 186         { EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
 187         { EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
 188                 false, false, false,
 189                 {1, 1, 2, 2, 10, 10, 11, 11 } },
 190         { EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
 191                 false, false, true,
 192                 { 1, 2, 6, 7, 9 } },
 193         { EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
 194                 false, false, false,
 195                 { 36, 64, 100, 36, 64, 100 } },
 196         { EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
 197                 false, false, true,
 198                 { 36, 60, 100 } },
 199         { EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
 200                 false, false, false,
 201                 { 13, 13 } },
 202         { EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
 203                 false, false, false,
 204                 { 140, 140 } },
 205         { EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
 206                 false, false, true,
 207                 { 132, 44 } },
 208 };
 209
 210 /******************************************************************************
 211  *
 212  * EEPROM related functions
 213  *
 214 ******************************************************************************/
 215
 216 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
 217 {
 218         u32 gp = iwl_read32(priv, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
 219         int ret = 0;
 220
 221         IWL_DEBUG_INFO(priv, "EEPROM signature=0x%08x\n", gp);
 222         switch (gp) {
 223         case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
 224                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
 225                         IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",
 226                                 gp);
 227                         ret = -ENOENT;
 228                 }
 229                 break;
 230         case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
 231         case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
 232                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
 233                         IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);
 234                         ret = -ENOENT;
 235                 }
 236                 break;
 237         case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
 238         default:
 239                 IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "
 240                         "EEPROM_GP=0x%08x\n",
 241                         (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 242                         ? "OTP" : "EEPROM", gp);
 243                 ret = -ENOENT;
 244                 break;
 245         }
 246         return ret;
 247 }
 248 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
 249
 250 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
 251 {
 252         u32 otpgp;
 253
 254         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 255         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
 256                 iwl_clear_bit(priv, CSR_OTP_GP_REG,
 257                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 258         else
 259                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 260                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 261 }
 262
 263 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
 264 {
 265         u32 otpgp;
 266         int nvm_type;
 267
 268         /* OTP only valid for CP/PP and after */
 269         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 270         case CSR_HW_REV_TYPE_NONE:
 271                 IWL_ERR(priv, "Unknown hardware type\n");
 272                 return -ENOENT;
 273         case CSR_HW_REV_TYPE_3945:
 274         case CSR_HW_REV_TYPE_4965:
 275         case CSR_HW_REV_TYPE_5300:
 276         case CSR_HW_REV_TYPE_5350:
 277         case CSR_HW_REV_TYPE_5100:
 278         case CSR_HW_REV_TYPE_5150:
 279                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 280                 break;
 281         default:
 282                 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 283                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 284                         nvm_type = NVM_DEVICE_TYPE_OTP;
 285                 else
 286                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 287                 break;
 288         }
 289         return  nvm_type;
 290 }
 291
 292 /*
 293  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 294  * when accessing the EEPROM; each access is a series of pulses to/from the
 295  * EEPROM chip, not a single event, so even reads could conflict if they
 296  * weren't arbitrated by the semaphore.
 297  */
 298 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
 299 {
 300         u16 count;
 301         int ret;
 302
 303         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 304                 /* Request semaphore */
 305                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 306                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 307
 308                 /* See if we got it */
 309                 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
 310                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 311                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 312                                 EEPROM_SEM_TIMEOUT);
 313                 if (ret >= 0) {
 314                         IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
 315                                 count+1);
 316                         return ret;
 317                 }
 318         }
 319
 320         return ret;
 321 }
 322 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
 323
 324 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
 325 {
 326         iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 327                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 328
 329 }
 330 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
 331
 332 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 333 {
 334         BUG_ON(offset >= priv->cfg->eeprom_size);
 335         return &priv->eeprom[offset];
 336 }
 337 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
 338
 339 static int iwl_init_otp_access(struct iwl_priv *priv)
 340 {
 341         int ret;
 342
 343         /* Enable 40MHz radio clock */
 344         _iwl_write32(priv, CSR_GP_CNTRL,
 345                      _iwl_read32(priv, CSR_GP_CNTRL) |
 346                      CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 347
 348         /* wait for clock to be ready */
 349         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 350                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 351                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 352                                   25000);
 353         if (ret < 0)
 354                 IWL_ERR(priv, "Time out access OTP\n");
 355         else {
 356                 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
 357                                   APMG_PS_CTRL_VAL_RESET_REQ);
 358                 udelay(5);
 359                 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 360                                     APMG_PS_CTRL_VAL_RESET_REQ);
 361         }
 362         return ret;
 363 }
 364
 365 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
 366 {
 367         int ret = 0;
 368         u32 r;
 369         u32 otpgp;
 370
 371         _iwl_write32(priv, CSR_EEPROM_REG,
 372                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 373         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
 374                                   CSR_EEPROM_REG_READ_VALID_MSK,
 375                                   CSR_EEPROM_REG_READ_VALID_MSK,
 376                                   IWL_EEPROM_ACCESS_TIMEOUT);
 377         if (ret < 0) {
 378                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
 379                 return ret;
 380         }
 381         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 382         /* check for ECC errors: */
 383         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 384         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 385                 /* stop in this case */
 386                 /* set the uncorrectable OTP ECC bit for acknowledgement */
 387                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 388                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 389                 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
 390                 return -EINVAL;
 391         }
 392         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 393                 /* continue in this case */
 394                 /* set the correctable OTP ECC bit for acknowledgement */
 395                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 396                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 397                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 398         }
 399         *eeprom_data = le16_to_cpu((__force __le16)(r >> 16));
 400         return 0;
 401 }
 402
 403 /*
 404  * iwl_is_otp_empty: check for empty OTP
 405  */
 406 static bool iwl_is_otp_empty(struct iwl_priv *priv)
 407 {
 408         u16 next_link_addr = 0, link_value;
 409         bool is_empty = false;
 410
 411         /* locate the beginning of OTP link list */
 412         if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
 413                 if (!link_value) {
 414                         IWL_ERR(priv, "OTP is empty\n");
 415                         is_empty = true;
 416                 }
 417         } else {
 418                 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
 419                 is_empty = true;
 420         }
 421
 422         return is_empty;
 423 }
 424
 425
 426 /*
 427  * iwl_find_otp_image: find EEPROM image in OTP
 428  *   finding the OTP block that contains the EEPROM image.
 429  *   the last valid block on the link list (the block _before_ the last block)
 430  *   is the block we should read and used to configure the device.
 431  *   If all the available OTP blocks are full, the last block will be the block
 432  *   we should read and used to configure the device.
 433  *   only perform this operation if shadow RAM is disabled
 434  */
 435 static int iwl_find_otp_image(struct iwl_priv *priv,
 436                                         u16 *validblockaddr)
 437 {
 438         u16 next_link_addr = 0, link_value = 0, valid_addr;
 439         int usedblocks = 0;
 440
 441         /* set addressing mode to absolute to traverse the link list */
 442         iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
 443
 444         /* checking for empty OTP or error */
 445         if (iwl_is_otp_empty(priv))
 446                 return -EINVAL;
 447
 448         /*
 449          * start traverse link list
 450          * until reach the max number of OTP blocks
 451          * different devices have different number of OTP blocks
 452          */
 453         do {
 454                 /* save current valid block address
 455                  * check for more block on the link list
 456                  */
 457                 valid_addr = next_link_addr;
 458                 next_link_addr = link_value * sizeof(u16);
 459                 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
 460                                usedblocks, next_link_addr);
 461                 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
 462                         return -EINVAL;
 463                 if (!link_value) {
 464                         /*
 465                          * reach the end of link list, return success and
 466                          * set address point to the starting address
 467                          * of the image
 468                          */
 469                         *validblockaddr = valid_addr;
 470                         /* skip first 2 bytes (link list pointer) */
 471                         *validblockaddr += 2;
 472                         return 0;
 473                 }
 474                 /* more in the link list, continue */
 475                 usedblocks++;
 476         } while (usedblocks <= priv->cfg->max_ll_items);
 477
 478         /* OTP has no valid blocks */
 479         IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
 480         return -EINVAL;
 481 }
 482
 483 /**
 484  * iwl_eeprom_init - read EEPROM contents
 485  *
 486  * Load the EEPROM contents from adapter into priv->eeprom
 487  *
 488  * NOTE:  This routine uses the non-debug IO access functions.
 489  */
 490 int iwl_eeprom_init(struct iwl_priv *priv)
 491 {
 492         u16 *e;
 493         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 494         int sz;
 495         int ret;
 496         u16 addr;
 497         u16 validblockaddr = 0;
 498         u16 cache_addr = 0;
 499
 500         priv->nvm_device_type = iwlcore_get_nvm_type(priv);
 501         if (priv->nvm_device_type == -ENOENT)
 502                 return -ENOENT;
 503         /* allocate eeprom */
 504         IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
 505         sz = priv->cfg->eeprom_size;
 506         priv->eeprom = kzalloc(sz, GFP_KERNEL);
 507         if (!priv->eeprom) {
 508                 ret = -ENOMEM;
 509                 goto alloc_err;
 510         }
 511         e = (u16 *)priv->eeprom;
 512
 513         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
 514         if (ret < 0) {
 515                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 516                 ret = -ENOENT;
 517                 goto err;
 518         }
 519
 520         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 521         ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
 522         if (ret < 0) {
 523                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 524                 ret = -ENOENT;
 525                 goto err;
 526         }
 527         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 528                 ret = iwl_init_otp_access(priv);
 529                 if (ret) {
 530                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 531                         ret = -ENOENT;
 532                         goto done;
 533                 }
 534                 _iwl_write32(priv, CSR_EEPROM_GP,
 535                              iwl_read32(priv, CSR_EEPROM_GP) &
 536                              ~CSR_EEPROM_GP_IF_OWNER_MSK);
 537
 538                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 539                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 540                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 541                 /* traversing the linked list if no shadow ram supported */
 542                 if (!priv->cfg->shadow_ram_support) {
 543                         if (iwl_find_otp_image(priv, &validblockaddr)) {
 544                                 ret = -ENOENT;
 545                                 goto done;
 546                         }
 547                 }
 548                 for (addr = validblockaddr; addr < validblockaddr + sz;
 549                      addr += sizeof(u16)) {
 550                         u16 eeprom_data;
 551
 552                         ret = iwl_read_otp_word(priv, addr, &eeprom_data);
 553                         if (ret)
 554                                 goto done;
 555                         e[cache_addr / 2] = eeprom_data;
 556                         cache_addr += sizeof(u16);
 557                 }
 558         } else {
 559                 /* eeprom is an array of 16bit values */
 560                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 561                         u32 r;
 562
 563                         _iwl_write32(priv, CSR_EEPROM_REG,
 564                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 565
 566                         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
 567                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 568                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 569                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 570                         if (ret < 0) {
 571                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 572                                 goto done;
 573                         }
 574                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 575                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
 576                 }
 577         }
 578         ret = 0;
 579 done:
 580         priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
 581 err:
 582         if (ret)
 583                 iwl_eeprom_free(priv);
 584 alloc_err:
 585         return ret;
 586 }
 587 EXPORT_SYMBOL(iwl_eeprom_init);
 588
 589 void iwl_eeprom_free(struct iwl_priv *priv)
 590 {
 591         kfree(priv->eeprom);
 592         priv->eeprom = NULL;
 593 }
 594 EXPORT_SYMBOL(iwl_eeprom_free);
 595
 596 int iwl_eeprom_check_version(struct iwl_priv *priv)
 597 {
 598         u16 eeprom_ver;
 599         u16 calib_ver;
 600
 601         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 602         calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
 603
 604         if (eeprom_ver < priv->cfg->eeprom_ver ||
 605             calib_ver < priv->cfg->eeprom_calib_ver)
 606                 goto err;
 607
 608         return 0;
 609 err:
 610         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 611                   eeprom_ver, priv->cfg->eeprom_ver,
 612                   calib_ver,  priv->cfg->eeprom_calib_ver);
 613         return -EINVAL;
 614
 615 }
 616 EXPORT_SYMBOL(iwl_eeprom_check_version);
 617
 618 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 619 {
 620         return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
 621 }
 622 EXPORT_SYMBOL(iwl_eeprom_query_addr);
 623
 624 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
 625 {
 626         if (!priv->eeprom)
 627                 return 0;
 628         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
 629 }
 630 EXPORT_SYMBOL(iwl_eeprom_query16);
 631
 632 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
 633 {
 634         const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
 635                                         EEPROM_MAC_ADDRESS);
 636         memcpy(mac, addr, ETH_ALEN);
 637 }
 638 EXPORT_SYMBOL(iwl_eeprom_get_mac);
 639
 640 static void iwl_init_band_reference(const struct iwl_priv *priv,
 641                         int eep_band, int *eeprom_ch_count,
 642                         const struct iwl_eeprom_channel **eeprom_ch_info,
 643                         const u8 **eeprom_ch_index)
 644 {
 645         u32 offset = priv->cfg->ops->lib->
 646                         eeprom_ops.regulatory_bands[eep_band - 1];
 647         switch (eep_band) {
 648         case 1:         /* 2.4GHz band */
 649                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 650                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 651                                 iwl_eeprom_query_addr(priv, offset);
 652                 *eeprom_ch_index = iwl_eeprom_band_1;
 653                 break;
 654         case 2:         /* 4.9GHz band */
 655                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 656                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 657                                 iwl_eeprom_query_addr(priv, offset);
 658                 *eeprom_ch_index = iwl_eeprom_band_2;
 659                 break;
 660         case 3:         /* 5.2GHz band */
 661                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 662                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 663                                 iwl_eeprom_query_addr(priv, offset);
 664                 *eeprom_ch_index = iwl_eeprom_band_3;
 665                 break;
 666         case 4:         /* 5.5GHz band */
 667                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 668                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 669                                 iwl_eeprom_query_addr(priv, offset);
 670                 *eeprom_ch_index = iwl_eeprom_band_4;
 671                 break;
 672         case 5:         /* 5.7GHz band */
 673                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 674                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 675                                 iwl_eeprom_query_addr(priv, offset);
 676                 *eeprom_ch_index = iwl_eeprom_band_5;
 677                 break;
 678         case 6:         /* 2.4GHz ht40 channels */
 679                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 680                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 681                                 iwl_eeprom_query_addr(priv, offset);
 682                 *eeprom_ch_index = iwl_eeprom_band_6;
 683                 break;
 684         case 7:         /* 5 GHz ht40 channels */
 685                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 686                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 687                                 iwl_eeprom_query_addr(priv, offset);
 688                 *eeprom_ch_index = iwl_eeprom_band_7;
 689                 break;
 690         default:
 691                 BUG();
 692                 return;
 693         }
 694 }
 695
 696 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 697                             ? # x " " : "")
 698
 699 /**
 700  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
 701  *
 702  * Does not set up a command, or touch hardware.
 703  */
 704 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
 705                               enum ieee80211_band band, u16 channel,
 706                               const struct iwl_eeprom_channel *eeprom_ch,
 707                               u8 clear_ht40_extension_channel)
 708 {
 709         struct iwl_channel_info *ch_info;
 710
 711         ch_info = (struct iwl_channel_info *)
 712                         iwl_get_channel_info(priv, band, channel);
 713
 714         if (!is_channel_valid(ch_info))
 715                 return -1;
 716
 717         IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 718                         " Ad-Hoc %ssupported\n",
 719                         ch_info->channel,
 720                         is_channel_a_band(ch_info) ?
 721                         "5.2" : "2.4",
 722                         CHECK_AND_PRINT(IBSS),
 723                         CHECK_AND_PRINT(ACTIVE),
 724                         CHECK_AND_PRINT(RADAR),
 725                         CHECK_AND_PRINT(WIDE),
 726                         CHECK_AND_PRINT(DFS),
 727                         eeprom_ch->flags,
 728                         eeprom_ch->max_power_avg,
 729                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 730                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 731                         "" : "not ");
 732
 733         ch_info->ht40_eeprom = *eeprom_ch;
 734         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
 735         ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
 736         ch_info->ht40_min_power = 0;
 737         ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
 738         ch_info->ht40_flags = eeprom_ch->flags;
 739         ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 740
 741         return 0;
 742 }
 743
 744 /**
 745  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
 746  *     find the highest tx power from all chains for the channel
 747  */
 748 static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
 749                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, int element)
 750 {
 751         s8 max_txpower_avg = 0; /* (dBm) */
 752
 753         IWL_DEBUG_INFO(priv, "%d - "
 754                         "chain_a: %d dB chain_b: %d dB "
 755                         "chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
 756                         element,
 757                         enhanced_txpower[element].chain_a_max >> 1,
 758                         enhanced_txpower[element].chain_b_max >> 1,
 759                         enhanced_txpower[element].chain_c_max >> 1,
 760                         enhanced_txpower[element].mimo2_max >> 1,
 761                         enhanced_txpower[element].mimo3_max >> 1);
 762         /* Take the highest tx power from any valid chains */
 763         if ((priv->cfg->valid_tx_ant & ANT_A) &&
 764             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
 765                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
 766         if ((priv->cfg->valid_tx_ant & ANT_B) &&
 767             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
 768                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
 769         if ((priv->cfg->valid_tx_ant & ANT_C) &&
 770             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
 771                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
 772         if (((priv->cfg->valid_tx_ant == ANT_AB) |
 773             (priv->cfg->valid_tx_ant == ANT_BC) |
 774             (priv->cfg->valid_tx_ant == ANT_AC)) &&
 775             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
 776                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
 777         if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
 778             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
 779                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
 780
 781         /* max. tx power in EEPROM is in 1/2 dBm format
 782          * convert from 1/2 dBm to dBm
 783          */
 784         return max_txpower_avg >> 1;
 785 }
 786
 787 /**
 788  * iwl_update_common_txpower: update channel tx power
 789  *     update tx power per band based on EEPROM enhanced tx power info.
 790  */
 791 static s8 iwl_update_common_txpower(struct iwl_priv *priv,
 792                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 793                 int section, int element)
 794 {
 795         struct iwl_channel_info *ch_info;
 796         int ch;
 797         bool is_ht40 = false;
 798         s8 max_txpower_avg; /* (dBm) */
 799
 800         /* it is common section, contain all type (Legacy, HT and HT40)
 801          * based on the element in the section to determine
 802          * is it HT 40 or not
 803          */
 804         if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
 805                 is_ht40 = true;
 806         max_txpower_avg =
 807                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
 808         ch_info = priv->channel_info;
 809
 810         for (ch = 0; ch < priv->channel_count; ch++) {
 811                 /* find matching band and update tx power if needed */
 812                 if ((ch_info->band == enhinfo[section].band) &&
 813                     (ch_info->max_power_avg < max_txpower_avg) && (!is_ht40)) {
 814                         /* Update regulatory-based run-time data */
 815                         ch_info->max_power_avg = ch_info->curr_txpow =
 816                             max_txpower_avg;
 817                         ch_info->scan_power = max_txpower_avg;
 818                 }
 819                 if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
 820                     ch_info->ht40_max_power_avg &&
 821                     (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 822                         /* Update regulatory-based run-time data */
 823                         ch_info->ht40_max_power_avg = max_txpower_avg;
 824                         ch_info->ht40_curr_txpow = max_txpower_avg;
 825                         ch_info->ht40_scan_power = max_txpower_avg;
 826                 }
 827                 ch_info++;
 828         }
 829         return max_txpower_avg;
 830 }
 831
 832 /**
 833  * iwl_update_channel_txpower: update channel tx power
 834  *      update channel tx power based on EEPROM enhanced tx power info.
 835  */
 836 static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
 837                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 838                 int section, int element)
 839 {
 840         struct iwl_channel_info *ch_info;
 841         int ch;
 842         u8 channel;
 843         s8 max_txpower_avg; /* (dBm) */
 844
 845         channel = enhinfo[section].iwl_eeprom_section_channel[element];
 846         max_txpower_avg =
 847                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
 848
 849         ch_info = priv->channel_info;
 850         for (ch = 0; ch < priv->channel_count; ch++) {
 851                 /* find matching channel and update tx power if needed */
 852                 if (ch_info->channel == channel) {
 853                         if ((ch_info->max_power_avg < max_txpower_avg) &&
 854                             (!enhinfo[section].is_ht40)) {
 855                                 /* Update regulatory-based run-time data */
 856                                 ch_info->max_power_avg = max_txpower_avg;
 857                                 ch_info->curr_txpow = max_txpower_avg;
 858                                 ch_info->scan_power = max_txpower_avg;
 859                         }
 860                         if ((enhinfo[section].is_ht40) &&
 861                             (ch_info->ht40_max_power_avg) &&
 862                             (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 863                                 /* Update regulatory-based run-time data */
 864                                 ch_info->ht40_max_power_avg = max_txpower_avg;
 865                                 ch_info->ht40_curr_txpow = max_txpower_avg;
 866                                 ch_info->ht40_scan_power = max_txpower_avg;
 867                         }
 868                         break;
 869                 }
 870                 ch_info++;
 871         }
 872         return max_txpower_avg;
 873 }
 874
 875 /**
 876  * iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
 877  */
 878 void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
 879 {
 880         int eeprom_section_count = 0;
 881         int section, element;
 882         struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
 883         u32 offset;
 884         s8 max_txpower_avg; /* (dBm) */
 885
 886         /* Loop through all the sections
 887          * adjust bands and channel's max tx power
 888          * Set the tx_power_user_lmt to the highest power
 889          * supported by any channels and chains
 890          */
 891         for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
 892                 eeprom_section_count = enhinfo[section].count;
 893                 offset = enhinfo[section].offset;
 894                 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
 895                                 iwl_eeprom_query_addr(priv, offset);
 896
 897                 for (element = 0; element < eeprom_section_count; element++) {
 898                         if (enhinfo[section].is_common)
 899                                 max_txpower_avg =
 900                                         iwl_update_common_txpower(priv,
 901                                         enhanced_txpower, section, element);
 902                         else
 903                                 max_txpower_avg =
 904                                         iwl_update_channel_txpower(priv,
 905                                         enhanced_txpower, section, element);
 906
 907                         /* Update the tx_power_user_lmt to the highest power
 908                          * supported by any channel */
 909                         if (max_txpower_avg > priv->tx_power_user_lmt)
 910                                 priv->tx_power_user_lmt = max_txpower_avg;
 911                 }
 912         }
 913 }
 914 EXPORT_SYMBOL(iwlcore_eeprom_enhanced_txpower);
 915
 916 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 917                             ? # x " " : "")
 918
 919 /**
 920  * iwl_init_channel_map - Set up driver's info for all possible channels
 921  */
 922 int iwl_init_channel_map(struct iwl_priv *priv)
 923 {
 924         int eeprom_ch_count = 0;
 925         const u8 *eeprom_ch_index = NULL;
 926         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 927         int band, ch;
 928         struct iwl_channel_info *ch_info;
 929
 930         if (priv->channel_count) {
 931                 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
 932                 return 0;
 933         }
 934
 935         IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
 936
 937         priv->channel_count =
 938             ARRAY_SIZE(iwl_eeprom_band_1) +
 939             ARRAY_SIZE(iwl_eeprom_band_2) +
 940             ARRAY_SIZE(iwl_eeprom_band_3) +
 941             ARRAY_SIZE(iwl_eeprom_band_4) +
 942             ARRAY_SIZE(iwl_eeprom_band_5);
 943
 944         IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
 945
 946         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
 947                                      priv->channel_count, GFP_KERNEL);
 948         if (!priv->channel_info) {
 949                 IWL_ERR(priv, "Could not allocate channel_info\n");
 950                 priv->channel_count = 0;
 951                 return -ENOMEM;
 952         }
 953
 954         ch_info = priv->channel_info;
 955
 956         /* Loop through the 5 EEPROM bands adding them in order to the
 957          * channel map we maintain (that contains additional information than
 958          * what just in the EEPROM) */
 959         for (band = 1; band <= 5; band++) {
 960
 961                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 962                                         &eeprom_ch_info, &eeprom_ch_index);
 963
 964                 /* Loop through each band adding each of the channels */
 965                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 966                         ch_info->channel = eeprom_ch_index[ch];
 967                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 968                             IEEE80211_BAND_5GHZ;
 969
 970                         /* permanently store EEPROM's channel regulatory flags
 971                          *   and max power in channel info database. */
 972                         ch_info->eeprom = eeprom_ch_info[ch];
 973
 974                         /* Copy the run-time flags so they are there even on
 975                          * invalid channels */
 976                         ch_info->flags = eeprom_ch_info[ch].flags;
 977                         /* First write that ht40 is not enabled, and then enable
 978                          * one by one */
 979                         ch_info->ht40_extension_channel =
 980                                         IEEE80211_CHAN_NO_HT40;
 981
 982                         if (!(is_channel_valid(ch_info))) {
 983                                 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
 984                                                "No traffic\n",
 985                                                ch_info->channel,
 986                                                ch_info->flags,
 987                                                is_channel_a_band(ch_info) ?
 988                                                "5.2" : "2.4");
 989                                 ch_info++;
 990                                 continue;
 991                         }
 992
 993                         /* Initialize regulatory-based run-time data */
 994                         ch_info->max_power_avg = ch_info->curr_txpow =
 995                             eeprom_ch_info[ch].max_power_avg;
 996                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
 997                         ch_info->min_power = 0;
 998
 999                         IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
1000                                        " Ad-Hoc %ssupported\n",
1001                                        ch_info->channel,
1002                                        is_channel_a_band(ch_info) ?
1003                                        "5.2" : "2.4",
1004                                        CHECK_AND_PRINT_I(VALID),
1005                                        CHECK_AND_PRINT_I(IBSS),
1006                                        CHECK_AND_PRINT_I(ACTIVE),
1007                                        CHECK_AND_PRINT_I(RADAR),
1008                                        CHECK_AND_PRINT_I(WIDE),
1009                                        CHECK_AND_PRINT_I(DFS),
1010                                        eeprom_ch_info[ch].flags,
1011                                        eeprom_ch_info[ch].max_power_avg,
1012                                        ((eeprom_ch_info[ch].
1013                                          flags & EEPROM_CHANNEL_IBSS)
1014                                         && !(eeprom_ch_info[ch].
1015                                              flags & EEPROM_CHANNEL_RADAR))
1016                                        ? "" : "not ");
1017
1018                         /* Set the tx_power_user_lmt to the highest power
1019                          * supported by any channel */
1020                         if (eeprom_ch_info[ch].max_power_avg >
1021                                                 priv->tx_power_user_lmt)
1022                                 priv->tx_power_user_lmt =
1023                                     eeprom_ch_info[ch].max_power_avg;
1024
1025                         ch_info++;
1026                 }
1027         }
1028
1029         /* Check if we do have HT40 channels */
1030         if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
1031             EEPROM_REGULATORY_BAND_NO_HT40 &&
1032             priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
1033             EEPROM_REGULATORY_BAND_NO_HT40)
1034                 return 0;
1035
1036         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1037         for (band = 6; band <= 7; band++) {
1038                 enum ieee80211_band ieeeband;
1039
1040                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1041                                         &eeprom_ch_info, &eeprom_ch_index);
1042
1043                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1044                 ieeeband =
1045                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1046
1047                 /* Loop through each band adding each of the channels */
1048                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1049                         /* Set up driver's info for lower half */
1050                         iwl_mod_ht40_chan_info(priv, ieeeband,
1051                                                 eeprom_ch_index[ch],
1052                                                 &eeprom_ch_info[ch],
1053                                                 IEEE80211_CHAN_NO_HT40PLUS);
1054
1055                         /* Set up driver's info for upper half */
1056                         iwl_mod_ht40_chan_info(priv, ieeeband,
1057                                                 eeprom_ch_index[ch] + 4,
1058                                                 &eeprom_ch_info[ch],
1059                                                 IEEE80211_CHAN_NO_HT40MINUS);
1060                 }
1061         }
1062
1063         /* for newer device (6000 series and up)
1064          * EEPROM contain enhanced tx power information
1065          * driver need to process addition information
1066          * to determine the max channel tx power limits
1067          */
1068         if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower)
1069                 priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv);
1070
1071         return 0;
1072 }
1073 EXPORT_SYMBOL(iwl_init_channel_map);
1074
1075 /*
1076  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1077  */
1078 void iwl_free_channel_map(struct iwl_priv *priv)
1079 {
1080         kfree(priv->channel_info);
1081         priv->channel_count = 0;
1082 }
1083 EXPORT_SYMBOL(iwl_free_channel_map);
1084
1085 /**
1086  * iwl_get_channel_info - Find driver's private channel info
1087  *
1088  * Based on band and channel number.
1089  */
1090 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1091                                         enum ieee80211_band band, u16 channel)
1092 {
1093         int i;
1094
1095         switch (band) {
1096         case IEEE80211_BAND_5GHZ:
1097                 for (i = 14; i < priv->channel_count; i++) {
1098                         if (priv->channel_info[i].channel == channel)
1099                                 return &priv->channel_info[i];
1100                 }
1101                 break;
1102         case IEEE80211_BAND_2GHZ:
1103                 if (channel >= 1 && channel <= 14)
1104                         return &priv->channel_info[channel - 1];
1105                 break;
1106         default:
1107                 BUG();
1108         }
1109
1110         return NULL;
1111 }
1112 EXPORT_SYMBOL(iwl_get_channel_info);
1113