SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/init.h>
  67
  68 #include <net/mac80211.h>
  69
  70 #include "iwl-commands.h"
  71 #include "iwl-dev.h"
  72 #include "iwl-core.h"
  73 #include "iwl-debug.h"
  74 #include "iwl-eeprom.h"
  75 #include "iwl-io.h"
  76
  77 /************************** EEPROM BANDS ****************************
  78  *
  79  * The iwl_eeprom_band definitions below provide the mapping from the
  80  * EEPROM contents to the specific channel number supported for each
  81  * band.
  82  *
  83  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  84  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  85  * The specific geography and calibration information for that channel
  86  * is contained in the eeprom map itself.
  87  *
  88  * During init, we copy the eeprom information and channel map
  89  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  90  *
  91  * channel_map_24/52 provides the index in the channel_info array for a
  92  * given channel.  We have to have two separate maps as there is channel
  93  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  94  * band_2
  95  *
  96  * A value of 0xff stored in the channel_map indicates that the channel
  97  * is not supported by the hardware at all.
  98  *
  99  * A value of 0xfe in the channel_map indicates that the channel is not
 100  * valid for Tx with the current hardware.  This means that
 101  * while the system can tune and receive on a given channel, it may not
 102  * be able to associate or transmit any frames on that
 103  * channel.  There is no corresponding channel information for that
 104  * entry.
 105  *
 106  *********************************************************************/
 107
 108 /* 2.4 GHz */
 109 const u8 iwl_eeprom_band_1[14] = {
 110         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 111 };
 112
 113 /* 5.2 GHz bands */
 114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 115         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 116 };
 117
 118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 119         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 120 };
 121
 122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 123         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 124 };
 125
 126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 127         145, 149, 153, 157, 161, 165
 128 };
 129
 130 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
 131         1, 2, 3, 4, 5, 6, 7
 132 };
 133
 134 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
 135         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 136 };
 137
 138 /**
 139  * struct iwl_txpwr_section: eeprom section information
 140  * @offset: indirect address into eeprom image
 141  * @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
 142  * @band: band type for the section
 143  * @is_common - true: common section, false: channel section
 144  * @is_cck - true: cck section, false: not cck section
 145  * @is_ht_40 - true: all channel in the section are HT40 channel,
 146  *             false: legacy or HT 20 MHz
 147  *             ignore if it is common section
 148  * @iwl_eeprom_section_channel: channel array in the section,
 149  *             ignore if common section
 150  */
 151 struct iwl_txpwr_section {
 152         u32 offset;
 153         u8 count;
 154         enum ieee80211_band band;
 155         bool is_common;
 156         bool is_cck;
 157         bool is_ht40;
 158         u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
 159 };
 160
 161 /**
 162  * section 1 - 3 are regulatory tx power apply to all channels based on
 163  *    modulation: CCK, OFDM
 164  *    Band: 2.4GHz, 5.2GHz
 165  * section 4 - 10 are regulatory tx power apply to specified channels
 166  *    For example:
 167  *      1L - Channel 1 Legacy
 168  *      1HT - Channel 1 HT
 169  *      (1,+1) - Channel 1 HT40 "_above_"
 170  *
 171  * Section 1: all CCK channels
 172  * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
 173  * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
 174  * Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
 175  * Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
 176  * Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
 177  * Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
 178  * Section 8: 2.4 GHz channel: 13L, 13HT
 179  * Section 9: 2.4 GHz channel: 140L, 140HT
 180  * Section 10: 2.4 GHz 40MHz channels: (132,+1)  (44,+1)
 181  *
 182  */
 183 static const struct iwl_txpwr_section enhinfo[] = {
 184         { EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
 185         { EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
 186         { EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
 187         { EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
 188                 false, false, false,
 189                 {1, 1, 2, 2, 10, 10, 11, 11 } },
 190         { EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
 191                 false, false, true,
 192                 { 1, 2, 6, 7, 9 } },
 193         { EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
 194                 false, false, false,
 195                 { 36, 64, 100, 36, 64, 100 } },
 196         { EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
 197                 false, false, true,
 198                 { 36, 60, 100 } },
 199         { EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
 200                 false, false, false,
 201                 { 13, 13 } },
 202         { EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
 203                 false, false, false,
 204                 { 140, 140 } },
 205         { EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
 206                 false, false, true,
 207                 { 132, 44 } },
 208 };
 209
 210 /******************************************************************************
 211  *
 212  * EEPROM related functions
 213  *
 214 ******************************************************************************/
 215
 216 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
 217 {
 218         u32 gp = iwl_read32(priv, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
 219         int ret = 0;
 220
 221         IWL_DEBUG_INFO(priv, "EEPROM signature=0x%08x\n", gp);
 222         switch (gp) {
 223         case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
 224                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
 225                         IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",
 226                                 gp);
 227                         ret = -ENOENT;
 228                 }
 229                 break;
 230         case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
 231         case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
 232                 if (priv->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
 233                         IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);
 234                         ret = -ENOENT;
 235                 }
 236                 break;
 237         case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
 238         default:
 239                 IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "
 240                         "EEPROM_GP=0x%08x\n",
 241                         (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 242                         ? "OTP" : "EEPROM", gp);
 243                 ret = -ENOENT;
 244                 break;
 245         }
 246         return ret;
 247 }
 248 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
 249
 250 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
 251 {
 252         u32 otpgp;
 253
 254         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 255         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
 256                 iwl_clear_bit(priv, CSR_OTP_GP_REG,
 257                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 258         else
 259                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 260                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 261 }
 262
 263 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
 264 {
 265         u32 otpgp;
 266         int nvm_type;
 267
 268         /* OTP only valid for CP/PP and after */
 269         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 270         case CSR_HW_REV_TYPE_NONE:
 271                 IWL_ERR(priv, "Unknown hardware type\n");
 272                 return -ENOENT;
 273         case CSR_HW_REV_TYPE_3945:
 274         case CSR_HW_REV_TYPE_4965:
 275         case CSR_HW_REV_TYPE_5300:
 276         case CSR_HW_REV_TYPE_5350:
 277         case CSR_HW_REV_TYPE_5100:
 278         case CSR_HW_REV_TYPE_5150:
 279                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 280                 break;
 281         default:
 282                 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 283                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 284                         nvm_type = NVM_DEVICE_TYPE_OTP;
 285                 else
 286                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 287                 break;
 288         }
 289         return  nvm_type;
 290 }
 291
 292 /*
 293  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 294  * when accessing the EEPROM; each access is a series of pulses to/from the
 295  * EEPROM chip, not a single event, so even reads could conflict if they
 296  * weren't arbitrated by the semaphore.
 297  */
 298 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
 299 {
 300         u16 count;
 301         int ret;
 302
 303         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 304                 /* Request semaphore */
 305                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 306                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 307
 308                 /* See if we got it */
 309                 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
 310                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 311                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 312                                 EEPROM_SEM_TIMEOUT);
 313                 if (ret >= 0) {
 314                         IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
 315                                 count+1);
 316                         return ret;
 317                 }
 318         }
 319
 320         return ret;
 321 }
 322 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
 323
 324 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
 325 {
 326         iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 327                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 328
 329 }
 330 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
 331
 332 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 333 {
 334         BUG_ON(offset >= priv->cfg->eeprom_size);
 335         return &priv->eeprom[offset];
 336 }
 337 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
 338
 339 static int iwl_init_otp_access(struct iwl_priv *priv)
 340 {
 341         int ret;
 342
 343         /* Enable 40MHz radio clock */
 344         _iwl_write32(priv, CSR_GP_CNTRL,
 345                      _iwl_read32(priv, CSR_GP_CNTRL) |
 346                      CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 347
 348         /* wait for clock to be ready */
 349         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 350                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 351                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 352                                   25000);
 353         if (ret < 0)
 354                 IWL_ERR(priv, "Time out access OTP\n");
 355         else {
 356                 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
 357                                   APMG_PS_CTRL_VAL_RESET_REQ);
 358                 udelay(5);
 359                 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 360                                     APMG_PS_CTRL_VAL_RESET_REQ);
 361
 362                 /*
 363                  * CSR auto clock gate disable bit -
 364                  * this is only applicable for HW with OTP shadow RAM
 365                  */
 366                 if (priv->cfg->shadow_ram_support)
 367                         iwl_set_bit(priv, CSR_DBG_LINK_PWR_MGMT_REG,
 368                                 CSR_RESET_LINK_PWR_MGMT_DISABLED);
 369         }
 370         return ret;
 371 }
 372
 373 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
 374 {
 375         int ret = 0;
 376         u32 r;
 377         u32 otpgp;
 378
 379         _iwl_write32(priv, CSR_EEPROM_REG,
 380                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 381         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
 382                                   CSR_EEPROM_REG_READ_VALID_MSK,
 383                                   CSR_EEPROM_REG_READ_VALID_MSK,
 384                                   IWL_EEPROM_ACCESS_TIMEOUT);
 385         if (ret < 0) {
 386                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
 387                 return ret;
 388         }
 389         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 390         /* check for ECC errors: */
 391         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 392         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 393                 /* stop in this case */
 394                 /* set the uncorrectable OTP ECC bit for acknowledgement */
 395                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 396                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 397                 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
 398                 return -EINVAL;
 399         }
 400         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 401                 /* continue in this case */
 402                 /* set the correctable OTP ECC bit for acknowledgement */
 403                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 404                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 405                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 406         }
 407         *eeprom_data = le16_to_cpu((__force __le16)(r >> 16));
 408         return 0;
 409 }
 410
 411 /*
 412  * iwl_is_otp_empty: check for empty OTP
 413  */
 414 static bool iwl_is_otp_empty(struct iwl_priv *priv)
 415 {
 416         u16 next_link_addr = 0, link_value;
 417         bool is_empty = false;
 418
 419         /* locate the beginning of OTP link list */
 420         if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
 421                 if (!link_value) {
 422                         IWL_ERR(priv, "OTP is empty\n");
 423                         is_empty = true;
 424                 }
 425         } else {
 426                 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
 427                 is_empty = true;
 428         }
 429
 430         return is_empty;
 431 }
 432
 433
 434 /*
 435  * iwl_find_otp_image: find EEPROM image in OTP
 436  *   finding the OTP block that contains the EEPROM image.
 437  *   the last valid block on the link list (the block _before_ the last block)
 438  *   is the block we should read and used to configure the device.
 439  *   If all the available OTP blocks are full, the last block will be the block
 440  *   we should read and used to configure the device.
 441  *   only perform this operation if shadow RAM is disabled
 442  */
 443 static int iwl_find_otp_image(struct iwl_priv *priv,
 444                                         u16 *validblockaddr)
 445 {
 446         u16 next_link_addr = 0, link_value = 0, valid_addr;
 447         int usedblocks = 0;
 448
 449         /* set addressing mode to absolute to traverse the link list */
 450         iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
 451
 452         /* checking for empty OTP or error */
 453         if (iwl_is_otp_empty(priv))
 454                 return -EINVAL;
 455
 456         /*
 457          * start traverse link list
 458          * until reach the max number of OTP blocks
 459          * different devices have different number of OTP blocks
 460          */
 461         do {
 462                 /* save current valid block address
 463                  * check for more block on the link list
 464                  */
 465                 valid_addr = next_link_addr;
 466                 next_link_addr = link_value * sizeof(u16);
 467                 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
 468                                usedblocks, next_link_addr);
 469                 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
 470                         return -EINVAL;
 471                 if (!link_value) {
 472                         /*
 473                          * reach the end of link list, return success and
 474                          * set address point to the starting address
 475                          * of the image
 476                          */
 477                         *validblockaddr = valid_addr;
 478                         /* skip first 2 bytes (link list pointer) */
 479                         *validblockaddr += 2;
 480                         return 0;
 481                 }
 482                 /* more in the link list, continue */
 483                 usedblocks++;
 484         } while (usedblocks <= priv->cfg->max_ll_items);
 485
 486         /* OTP has no valid blocks */
 487         IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
 488         return -EINVAL;
 489 }
 490
 491 /**
 492  * iwl_eeprom_init - read EEPROM contents
 493  *
 494  * Load the EEPROM contents from adapter into priv->eeprom
 495  *
 496  * NOTE:  This routine uses the non-debug IO access functions.
 497  */
 498 int iwl_eeprom_init(struct iwl_priv *priv)
 499 {
 500         u16 *e;
 501         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 502         int sz;
 503         int ret;
 504         u16 addr;
 505         u16 validblockaddr = 0;
 506         u16 cache_addr = 0;
 507
 508         priv->nvm_device_type = iwlcore_get_nvm_type(priv);
 509         if (priv->nvm_device_type == -ENOENT)
 510                 return -ENOENT;
 511         /* allocate eeprom */
 512         IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
 513         sz = priv->cfg->eeprom_size;
 514         priv->eeprom = kzalloc(sz, GFP_KERNEL);
 515         if (!priv->eeprom) {
 516                 ret = -ENOMEM;
 517                 goto alloc_err;
 518         }
 519         e = (u16 *)priv->eeprom;
 520
 521         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
 522         if (ret < 0) {
 523                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 524                 ret = -ENOENT;
 525                 goto err;
 526         }
 527
 528         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 529         ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
 530         if (ret < 0) {
 531                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 532                 ret = -ENOENT;
 533                 goto err;
 534         }
 535         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 536                 ret = iwl_init_otp_access(priv);
 537                 if (ret) {
 538                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 539                         ret = -ENOENT;
 540                         goto done;
 541                 }
 542                 _iwl_write32(priv, CSR_EEPROM_GP,
 543                              iwl_read32(priv, CSR_EEPROM_GP) &
 544                              ~CSR_EEPROM_GP_IF_OWNER_MSK);
 545
 546                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 547                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 548                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 549                 /* traversing the linked list if no shadow ram supported */
 550                 if (!priv->cfg->shadow_ram_support) {
 551                         if (iwl_find_otp_image(priv, &validblockaddr)) {
 552                                 ret = -ENOENT;
 553                                 goto done;
 554                         }
 555                 }
 556                 for (addr = validblockaddr; addr < validblockaddr + sz;
 557                      addr += sizeof(u16)) {
 558                         u16 eeprom_data;
 559
 560                         ret = iwl_read_otp_word(priv, addr, &eeprom_data);
 561                         if (ret)
 562                                 goto done;
 563                         e[cache_addr / 2] = eeprom_data;
 564                         cache_addr += sizeof(u16);
 565                 }
 566         } else {
 567                 /* eeprom is an array of 16bit values */
 568                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 569                         u32 r;
 570
 571                         _iwl_write32(priv, CSR_EEPROM_REG,
 572                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 573
 574                         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
 575                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 576                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 577                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 578                         if (ret < 0) {
 579                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 580                                 goto done;
 581                         }
 582                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 583                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
 584                 }
 585         }
 586         ret = 0;
 587 done:
 588         priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
 589 err:
 590         if (ret)
 591                 iwl_eeprom_free(priv);
 592 alloc_err:
 593         return ret;
 594 }
 595 EXPORT_SYMBOL(iwl_eeprom_init);
 596
 597 void iwl_eeprom_free(struct iwl_priv *priv)
 598 {
 599         kfree(priv->eeprom);
 600         priv->eeprom = NULL;
 601 }
 602 EXPORT_SYMBOL(iwl_eeprom_free);
 603
 604 int iwl_eeprom_check_version(struct iwl_priv *priv)
 605 {
 606         u16 eeprom_ver;
 607         u16 calib_ver;
 608
 609         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 610         calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
 611
 612         if (eeprom_ver < priv->cfg->eeprom_ver ||
 613             calib_ver < priv->cfg->eeprom_calib_ver)
 614                 goto err;
 615
 616         return 0;
 617 err:
 618         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 619                   eeprom_ver, priv->cfg->eeprom_ver,
 620                   calib_ver,  priv->cfg->eeprom_calib_ver);
 621         return -EINVAL;
 622
 623 }
 624 EXPORT_SYMBOL(iwl_eeprom_check_version);
 625
 626 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 627 {
 628         return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
 629 }
 630 EXPORT_SYMBOL(iwl_eeprom_query_addr);
 631
 632 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
 633 {
 634         if (!priv->eeprom)
 635                 return 0;
 636         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
 637 }
 638 EXPORT_SYMBOL(iwl_eeprom_query16);
 639
 640 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
 641 {
 642         const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
 643                                         EEPROM_MAC_ADDRESS);
 644         memcpy(mac, addr, ETH_ALEN);
 645 }
 646 EXPORT_SYMBOL(iwl_eeprom_get_mac);
 647
 648 static void iwl_init_band_reference(const struct iwl_priv *priv,
 649                         int eep_band, int *eeprom_ch_count,
 650                         const struct iwl_eeprom_channel **eeprom_ch_info,
 651                         const u8 **eeprom_ch_index)
 652 {
 653         u32 offset = priv->cfg->ops->lib->
 654                         eeprom_ops.regulatory_bands[eep_band - 1];
 655         switch (eep_band) {
 656         case 1:         /* 2.4GHz band */
 657                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 658                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 659                                 iwl_eeprom_query_addr(priv, offset);
 660                 *eeprom_ch_index = iwl_eeprom_band_1;
 661                 break;
 662         case 2:         /* 4.9GHz band */
 663                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 664                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 665                                 iwl_eeprom_query_addr(priv, offset);
 666                 *eeprom_ch_index = iwl_eeprom_band_2;
 667                 break;
 668         case 3:         /* 5.2GHz band */
 669                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 670                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 671                                 iwl_eeprom_query_addr(priv, offset);
 672                 *eeprom_ch_index = iwl_eeprom_band_3;
 673                 break;
 674         case 4:         /* 5.5GHz band */
 675                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 676                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 677                                 iwl_eeprom_query_addr(priv, offset);
 678                 *eeprom_ch_index = iwl_eeprom_band_4;
 679                 break;
 680         case 5:         /* 5.7GHz band */
 681                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 682                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 683                                 iwl_eeprom_query_addr(priv, offset);
 684                 *eeprom_ch_index = iwl_eeprom_band_5;
 685                 break;
 686         case 6:         /* 2.4GHz ht40 channels */
 687                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 688                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 689                                 iwl_eeprom_query_addr(priv, offset);
 690                 *eeprom_ch_index = iwl_eeprom_band_6;
 691                 break;
 692         case 7:         /* 5 GHz ht40 channels */
 693                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 694                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 695                                 iwl_eeprom_query_addr(priv, offset);
 696                 *eeprom_ch_index = iwl_eeprom_band_7;
 697                 break;
 698         default:
 699                 BUG();
 700                 return;
 701         }
 702 }
 703
 704 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 705                             ? # x " " : "")
 706
 707 /**
 708  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
 709  *
 710  * Does not set up a command, or touch hardware.
 711  */
 712 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
 713                               enum ieee80211_band band, u16 channel,
 714                               const struct iwl_eeprom_channel *eeprom_ch,
 715                               u8 clear_ht40_extension_channel)
 716 {
 717         struct iwl_channel_info *ch_info;
 718
 719         ch_info = (struct iwl_channel_info *)
 720                         iwl_get_channel_info(priv, band, channel);
 721
 722         if (!is_channel_valid(ch_info))
 723                 return -1;
 724
 725         IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 726                         " Ad-Hoc %ssupported\n",
 727                         ch_info->channel,
 728                         is_channel_a_band(ch_info) ?
 729                         "5.2" : "2.4",
 730                         CHECK_AND_PRINT(IBSS),
 731                         CHECK_AND_PRINT(ACTIVE),
 732                         CHECK_AND_PRINT(RADAR),
 733                         CHECK_AND_PRINT(WIDE),
 734                         CHECK_AND_PRINT(DFS),
 735                         eeprom_ch->flags,
 736                         eeprom_ch->max_power_avg,
 737                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 738                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 739                         "" : "not ");
 740
 741         ch_info->ht40_eeprom = *eeprom_ch;
 742         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
 743         ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
 744         ch_info->ht40_min_power = 0;
 745         ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
 746         ch_info->ht40_flags = eeprom_ch->flags;
 747         ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 748
 749         return 0;
 750 }
 751
 752 /**
 753  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
 754  *     find the highest tx power from all chains for the channel
 755  */
 756 static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
 757                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, int element)
 758 {
 759         s8 max_txpower_avg = 0; /* (dBm) */
 760
 761         IWL_DEBUG_INFO(priv, "%d - "
 762                         "chain_a: %d dB chain_b: %d dB "
 763                         "chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
 764                         element,
 765                         enhanced_txpower[element].chain_a_max >> 1,
 766                         enhanced_txpower[element].chain_b_max >> 1,
 767                         enhanced_txpower[element].chain_c_max >> 1,
 768                         enhanced_txpower[element].mimo2_max >> 1,
 769                         enhanced_txpower[element].mimo3_max >> 1);
 770         /* Take the highest tx power from any valid chains */
 771         if ((priv->cfg->valid_tx_ant & ANT_A) &&
 772             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
 773                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
 774         if ((priv->cfg->valid_tx_ant & ANT_B) &&
 775             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
 776                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
 777         if ((priv->cfg->valid_tx_ant & ANT_C) &&
 778             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
 779                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
 780         if (((priv->cfg->valid_tx_ant == ANT_AB) |
 781             (priv->cfg->valid_tx_ant == ANT_BC) |
 782             (priv->cfg->valid_tx_ant == ANT_AC)) &&
 783             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
 784                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
 785         if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
 786             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
 787                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
 788
 789         /* max. tx power in EEPROM is in 1/2 dBm format
 790          * convert from 1/2 dBm to dBm
 791          */
 792         return max_txpower_avg >> 1;
 793 }
 794
 795 /**
 796  * iwl_update_common_txpower: update channel tx power
 797  *     update tx power per band based on EEPROM enhanced tx power info.
 798  */
 799 static s8 iwl_update_common_txpower(struct iwl_priv *priv,
 800                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 801                 int section, int element)
 802 {
 803         struct iwl_channel_info *ch_info;
 804         int ch;
 805         bool is_ht40 = false;
 806         s8 max_txpower_avg; /* (dBm) */
 807
 808         /* it is common section, contain all type (Legacy, HT and HT40)
 809          * based on the element in the section to determine
 810          * is it HT 40 or not
 811          */
 812         if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
 813                 is_ht40 = true;
 814         max_txpower_avg =
 815                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
 816         ch_info = priv->channel_info;
 817
 818         for (ch = 0; ch < priv->channel_count; ch++) {
 819                 /* find matching band and update tx power if needed */
 820                 if ((ch_info->band == enhinfo[section].band) &&
 821                     (ch_info->max_power_avg < max_txpower_avg) && (!is_ht40)) {
 822                         /* Update regulatory-based run-time data */
 823                         ch_info->max_power_avg = ch_info->curr_txpow =
 824                             max_txpower_avg;
 825                         ch_info->scan_power = max_txpower_avg;
 826                 }
 827                 if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
 828                     ch_info->ht40_max_power_avg &&
 829                     (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 830                         /* Update regulatory-based run-time data */
 831                         ch_info->ht40_max_power_avg = max_txpower_avg;
 832                         ch_info->ht40_curr_txpow = max_txpower_avg;
 833                         ch_info->ht40_scan_power = max_txpower_avg;
 834                 }
 835                 ch_info++;
 836         }
 837         return max_txpower_avg;
 838 }
 839
 840 /**
 841  * iwl_update_channel_txpower: update channel tx power
 842  *      update channel tx power based on EEPROM enhanced tx power info.
 843  */
 844 static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
 845                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 846                 int section, int element)
 847 {
 848         struct iwl_channel_info *ch_info;
 849         int ch;
 850         u8 channel;
 851         s8 max_txpower_avg; /* (dBm) */
 852
 853         channel = enhinfo[section].iwl_eeprom_section_channel[element];
 854         max_txpower_avg =
 855                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
 856
 857         ch_info = priv->channel_info;
 858         for (ch = 0; ch < priv->channel_count; ch++) {
 859                 /* find matching channel and update tx power if needed */
 860                 if (ch_info->channel == channel) {
 861                         if ((ch_info->max_power_avg < max_txpower_avg) &&
 862                             (!enhinfo[section].is_ht40)) {
 863                                 /* Update regulatory-based run-time data */
 864                                 ch_info->max_power_avg = max_txpower_avg;
 865                                 ch_info->curr_txpow = max_txpower_avg;
 866                                 ch_info->scan_power = max_txpower_avg;
 867                         }
 868                         if ((enhinfo[section].is_ht40) &&
 869                             (ch_info->ht40_max_power_avg) &&
 870                             (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 871                                 /* Update regulatory-based run-time data */
 872                                 ch_info->ht40_max_power_avg = max_txpower_avg;
 873                                 ch_info->ht40_curr_txpow = max_txpower_avg;
 874                                 ch_info->ht40_scan_power = max_txpower_avg;
 875                         }
 876                         break;
 877                 }
 878                 ch_info++;
 879         }
 880         return max_txpower_avg;
 881 }
 882
 883 /**
 884  * iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
 885  */
 886 void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
 887 {
 888         int eeprom_section_count = 0;
 889         int section, element;
 890         struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
 891         u32 offset;
 892         s8 max_txpower_avg; /* (dBm) */
 893
 894         /* Loop through all the sections
 895          * adjust bands and channel's max tx power
 896          * Set the tx_power_user_lmt to the highest power
 897          * supported by any channels and chains
 898          */
 899         for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
 900                 eeprom_section_count = enhinfo[section].count;
 901                 offset = enhinfo[section].offset;
 902                 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
 903                                 iwl_eeprom_query_addr(priv, offset);
 904
 905                 for (element = 0; element < eeprom_section_count; element++) {
 906                         if (enhinfo[section].is_common)
 907                                 max_txpower_avg =
 908                                         iwl_update_common_txpower(priv,
 909                                         enhanced_txpower, section, element);
 910                         else
 911                                 max_txpower_avg =
 912                                         iwl_update_channel_txpower(priv,
 913                                         enhanced_txpower, section, element);
 914
 915                         /* Update the tx_power_user_lmt to the highest power
 916                          * supported by any channel */
 917                         if (max_txpower_avg > priv->tx_power_user_lmt)
 918                                 priv->tx_power_user_lmt = max_txpower_avg;
 919                 }
 920         }
 921 }
 922 EXPORT_SYMBOL(iwlcore_eeprom_enhanced_txpower);
 923
 924 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 925                             ? # x " " : "")
 926
 927 /**
 928  * iwl_init_channel_map - Set up driver's info for all possible channels
 929  */
 930 int iwl_init_channel_map(struct iwl_priv *priv)
 931 {
 932         int eeprom_ch_count = 0;
 933         const u8 *eeprom_ch_index = NULL;
 934         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 935         int band, ch;
 936         struct iwl_channel_info *ch_info;
 937
 938         if (priv->channel_count) {
 939                 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
 940                 return 0;
 941         }
 942
 943         IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
 944
 945         priv->channel_count =
 946             ARRAY_SIZE(iwl_eeprom_band_1) +
 947             ARRAY_SIZE(iwl_eeprom_band_2) +
 948             ARRAY_SIZE(iwl_eeprom_band_3) +
 949             ARRAY_SIZE(iwl_eeprom_band_4) +
 950             ARRAY_SIZE(iwl_eeprom_band_5);
 951
 952         IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
 953
 954         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
 955                                      priv->channel_count, GFP_KERNEL);
 956         if (!priv->channel_info) {
 957                 IWL_ERR(priv, "Could not allocate channel_info\n");
 958                 priv->channel_count = 0;
 959                 return -ENOMEM;
 960         }
 961
 962         ch_info = priv->channel_info;
 963
 964         /* Loop through the 5 EEPROM bands adding them in order to the
 965          * channel map we maintain (that contains additional information than
 966          * what just in the EEPROM) */
 967         for (band = 1; band <= 5; band++) {
 968
 969                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 970                                         &eeprom_ch_info, &eeprom_ch_index);
 971
 972                 /* Loop through each band adding each of the channels */
 973                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 974                         ch_info->channel = eeprom_ch_index[ch];
 975                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 976                             IEEE80211_BAND_5GHZ;
 977
 978                         /* permanently store EEPROM's channel regulatory flags
 979                          *   and max power in channel info database. */
 980                         ch_info->eeprom = eeprom_ch_info[ch];
 981
 982                         /* Copy the run-time flags so they are there even on
 983                          * invalid channels */
 984                         ch_info->flags = eeprom_ch_info[ch].flags;
 985                         /* First write that ht40 is not enabled, and then enable
 986                          * one by one */
 987                         ch_info->ht40_extension_channel =
 988                                         IEEE80211_CHAN_NO_HT40;
 989
 990                         if (!(is_channel_valid(ch_info))) {
 991                                 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
 992                                                "No traffic\n",
 993                                                ch_info->channel,
 994                                                ch_info->flags,
 995                                                is_channel_a_band(ch_info) ?
 996                                                "5.2" : "2.4");
 997                                 ch_info++;
 998                                 continue;
 999                         }
1000
1001                         /* Initialize regulatory-based run-time data */
1002                         ch_info->max_power_avg = ch_info->curr_txpow =
1003                             eeprom_ch_info[ch].max_power_avg;
1004                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
1005                         ch_info->min_power = 0;
1006
1007                         IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
1008                                        " Ad-Hoc %ssupported\n",
1009                                        ch_info->channel,
1010                                        is_channel_a_band(ch_info) ?
1011                                        "5.2" : "2.4",
1012                                        CHECK_AND_PRINT_I(VALID),
1013                                        CHECK_AND_PRINT_I(IBSS),
1014                                        CHECK_AND_PRINT_I(ACTIVE),
1015                                        CHECK_AND_PRINT_I(RADAR),
1016                                        CHECK_AND_PRINT_I(WIDE),
1017                                        CHECK_AND_PRINT_I(DFS),
1018                                        eeprom_ch_info[ch].flags,
1019                                        eeprom_ch_info[ch].max_power_avg,
1020                                        ((eeprom_ch_info[ch].
1021                                          flags & EEPROM_CHANNEL_IBSS)
1022                                         && !(eeprom_ch_info[ch].
1023                                              flags & EEPROM_CHANNEL_RADAR))
1024                                        ? "" : "not ");
1025
1026                         /* Set the tx_power_user_lmt to the highest power
1027                          * supported by any channel */
1028                         if (eeprom_ch_info[ch].max_power_avg >
1029                                                 priv->tx_power_user_lmt)
1030                                 priv->tx_power_user_lmt =
1031                                     eeprom_ch_info[ch].max_power_avg;
1032
1033                         ch_info++;
1034                 }
1035         }
1036
1037         /* Check if we do have HT40 channels */
1038         if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
1039             EEPROM_REGULATORY_BAND_NO_HT40 &&
1040             priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
1041             EEPROM_REGULATORY_BAND_NO_HT40)
1042                 return 0;
1043
1044         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1045         for (band = 6; band <= 7; band++) {
1046                 enum ieee80211_band ieeeband;
1047
1048                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1049                                         &eeprom_ch_info, &eeprom_ch_index);
1050
1051                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1052                 ieeeband =
1053                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1054
1055                 /* Loop through each band adding each of the channels */
1056                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1057                         /* Set up driver's info for lower half */
1058                         iwl_mod_ht40_chan_info(priv, ieeeband,
1059                                                 eeprom_ch_index[ch],
1060                                                 &eeprom_ch_info[ch],
1061                                                 IEEE80211_CHAN_NO_HT40PLUS);
1062
1063                         /* Set up driver's info for upper half */
1064                         iwl_mod_ht40_chan_info(priv, ieeeband,
1065                                                 eeprom_ch_index[ch] + 4,
1066                                                 &eeprom_ch_info[ch],
1067                                                 IEEE80211_CHAN_NO_HT40MINUS);
1068                 }
1069         }
1070
1071         /* for newer device (6000 series and up)
1072          * EEPROM contain enhanced tx power information
1073          * driver need to process addition information
1074          * to determine the max channel tx power limits
1075          */
1076         if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower)
1077                 priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv);
1078
1079         return 0;
1080 }
1081 EXPORT_SYMBOL(iwl_init_channel_map);
1082
1083 /*
1084  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1085  */
1086 void iwl_free_channel_map(struct iwl_priv *priv)
1087 {
1088         kfree(priv->channel_info);
1089         priv->channel_count = 0;
1090 }
1091 EXPORT_SYMBOL(iwl_free_channel_map);
1092
1093 /**
1094  * iwl_get_channel_info - Find driver's private channel info
1095  *
1096  * Based on band and channel number.
1097  */
1098 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1099                                         enum ieee80211_band band, u16 channel)
1100 {
1101         int i;
1102
1103         switch (band) {
1104         case IEEE80211_BAND_5GHZ:
1105                 for (i = 14; i < priv->channel_count; i++) {
1106                         if (priv->channel_info[i].channel == channel)
1107                                 return &priv->channel_info[i];
1108                 }
1109                 break;
1110         case IEEE80211_BAND_2GHZ:
1111                 if (channel >= 1 && channel <= 14)
1112                         return &priv->channel_info[channel - 1];
1113                 break;
1114         default:
1115                 BUG();
1116         }
1117
1118         return NULL;
1119 }
1120 EXPORT_SYMBOL(iwl_get_channel_info);
1121