SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/init.h>
  67
  68 #include <net/mac80211.h>
  69
  70 #include "iwl-commands.h"
  71 #include "iwl-dev.h"
  72 #include "iwl-core.h"
  73 #include "iwl-debug.h"
  74 #include "iwl-eeprom.h"
  75 #include "iwl-io.h"
  76
  77 /************************** EEPROM BANDS ****************************
  78  *
  79  * The iwl_eeprom_band definitions below provide the mapping from the
  80  * EEPROM contents to the specific channel number supported for each
  81  * band.
  82  *
  83  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  84  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  85  * The specific geography and calibration information for that channel
  86  * is contained in the eeprom map itself.
  87  *
  88  * During init, we copy the eeprom information and channel map
  89  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  90  *
  91  * channel_map_24/52 provides the index in the channel_info array for a
  92  * given channel.  We have to have two separate maps as there is channel
  93  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  94  * band_2
  95  *
  96  * A value of 0xff stored in the channel_map indicates that the channel
  97  * is not supported by the hardware at all.
  98  *
  99  * A value of 0xfe in the channel_map indicates that the channel is not
 100  * valid for Tx with the current hardware.  This means that
 101  * while the system can tune and receive on a given channel, it may not
 102  * be able to associate or transmit any frames on that
 103  * channel.  There is no corresponding channel information for that
 104  * entry.
 105  *
 106  *********************************************************************/
 107
 108 /* 2.4 GHz */
 109 const u8 iwl_eeprom_band_1[14] = {
 110         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 111 };
 112
 113 /* 5.2 GHz bands */
 114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 115         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 116 };
 117
 118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 119         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 120 };
 121
 122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 123         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 124 };
 125
 126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 127         145, 149, 153, 157, 161, 165
 128 };
 129
 130 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 FAT channel */
 131         1, 2, 3, 4, 5, 6, 7
 132 };
 133
 134 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 FAT channel */
 135         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 136 };
 137
 138 /******************************************************************************
 139  *
 140  * EEPROM related functions
 141  *
 142 ******************************************************************************/
 143
 144 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
 145 {
 146         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 147         if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
 148                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 149                 return -ENOENT;
 150         }
 151         return 0;
 152 }
 153 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
 154
 155 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
 156 {
 157         u32 otpgp;
 158         int nvm_type;
 159
 160         /* OTP only valid for CP/PP and after */
 161         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 162         case CSR_HW_REV_TYPE_3945:
 163         case CSR_HW_REV_TYPE_4965:
 164         case CSR_HW_REV_TYPE_5300:
 165         case CSR_HW_REV_TYPE_5350:
 166         case CSR_HW_REV_TYPE_5100:
 167         case CSR_HW_REV_TYPE_5150:
 168                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 169                 break;
 170         default:
 171                 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 172                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 173                         nvm_type = NVM_DEVICE_TYPE_OTP;
 174                 else
 175                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 176                 break;
 177         }
 178         return  nvm_type;
 179 }
 180
 181 /*
 182  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 183  * when accessing the EEPROM; each access is a series of pulses to/from the
 184  * EEPROM chip, not a single event, so even reads could conflict if they
 185  * weren't arbitrated by the semaphore.
 186  */
 187 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
 188 {
 189         u16 count;
 190         int ret;
 191
 192         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 193                 /* Request semaphore */
 194                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 195                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 196
 197                 /* See if we got it */
 198                 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
 199                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 200                                 EEPROM_SEM_TIMEOUT);
 201                 if (ret >= 0) {
 202                         IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
 203                                 count+1);
 204                         return ret;
 205                 }
 206         }
 207
 208         return ret;
 209 }
 210 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
 211
 212 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
 213 {
 214         iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 215                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 216
 217 }
 218 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
 219
 220 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 221 {
 222         BUG_ON(offset >= priv->cfg->eeprom_size);
 223         return &priv->eeprom[offset];
 224 }
 225 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
 226
 227 static int iwl_init_otp_access(struct iwl_priv *priv)
 228 {
 229         int ret;
 230
 231         /* Enable 40MHz radio clock */
 232         _iwl_write32(priv, CSR_GP_CNTRL,
 233                      _iwl_read32(priv, CSR_GP_CNTRL) |
 234                      CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 235
 236         /* wait for clock to be ready */
 237         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 238                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 239                                   25000);
 240         if (ret < 0)
 241                 IWL_ERR(priv, "Time out access OTP\n");
 242         else {
 243                 if (!ret) {
 244                         iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
 245                                           APMG_PS_CTRL_VAL_RESET_REQ);
 246                         udelay(5);
 247                         iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 248                                             APMG_PS_CTRL_VAL_RESET_REQ);
 249                 }
 250         }
 251         return ret;
 252 }
 253
 254 /**
 255  * iwl_eeprom_init - read EEPROM contents
 256  *
 257  * Load the EEPROM contents from adapter into priv->eeprom
 258  *
 259  * NOTE:  This routine uses the non-debug IO access functions.
 260  */
 261 int iwl_eeprom_init(struct iwl_priv *priv)
 262 {
 263         u16 *e;
 264         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 265         int sz;
 266         int ret;
 267         u16 addr;
 268         u32 otpgp;
 269
 270         priv->nvm_device_type = iwlcore_get_nvm_type(priv);
 271
 272         /* allocate eeprom */
 273         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 274                 priv->cfg->eeprom_size =
 275                         OTP_BLOCK_SIZE * OTP_LOWER_BLOCKS_TOTAL;
 276         sz = priv->cfg->eeprom_size;
 277         priv->eeprom = kzalloc(sz, GFP_KERNEL);
 278         if (!priv->eeprom) {
 279                 ret = -ENOMEM;
 280                 goto alloc_err;
 281         }
 282         e = (u16 *)priv->eeprom;
 283
 284         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
 285         if (ret < 0) {
 286                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 287                 ret = -ENOENT;
 288                 goto err;
 289         }
 290
 291         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 292         ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
 293         if (ret < 0) {
 294                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 295                 ret = -ENOENT;
 296                 goto err;
 297         }
 298         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 299                 ret = iwl_init_otp_access(priv);
 300                 if (ret) {
 301                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 302                         ret = -ENOENT;
 303                         goto err;
 304                 }
 305                 _iwl_write32(priv, CSR_EEPROM_GP,
 306                              iwl_read32(priv, CSR_EEPROM_GP) &
 307                              ~CSR_EEPROM_GP_IF_OWNER_MSK);
 308                 /* clear */
 309                 _iwl_write32(priv, CSR_OTP_GP_REG,
 310                              iwl_read32(priv, CSR_OTP_GP_REG) |
 311                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 312                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 313
 314                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 315                         u32 r;
 316
 317                         _iwl_write32(priv, CSR_EEPROM_REG,
 318                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 319
 320                         ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
 321                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 322                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 323                         if (ret < 0) {
 324                                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
 325                                 goto done;
 326                         }
 327                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 328                         /* check for ECC errors: */
 329                         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 330                         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 331                                 /* stop in this case */
 332                                 IWL_ERR(priv, "Uncorrectable OTP ECC error, Abort OTP read\n");
 333                                 goto done;
 334                         }
 335                         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 336                                 /* continue in this case */
 337                                 _iwl_write32(priv, CSR_OTP_GP_REG,
 338                                              iwl_read32(priv, CSR_OTP_GP_REG) |
 339                                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 340                                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 341                         }
 342                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
 343                 }
 344         } else {
 345                 /* eeprom is an array of 16bit values */
 346                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 347                         u32 r;
 348
 349                         _iwl_write32(priv, CSR_EEPROM_REG,
 350                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 351
 352                         ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
 353                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 354                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 355                         if (ret < 0) {
 356                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 357                                 goto done;
 358                         }
 359                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 360                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
 361                 }
 362         }
 363         ret = 0;
 364 done:
 365         priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
 366 err:
 367         if (ret)
 368                 iwl_eeprom_free(priv);
 369 alloc_err:
 370         return ret;
 371 }
 372 EXPORT_SYMBOL(iwl_eeprom_init);
 373
 374 void iwl_eeprom_free(struct iwl_priv *priv)
 375 {
 376         kfree(priv->eeprom);
 377         priv->eeprom = NULL;
 378 }
 379 EXPORT_SYMBOL(iwl_eeprom_free);
 380
 381 int iwl_eeprom_check_version(struct iwl_priv *priv)
 382 {
 383         u16 eeprom_ver;
 384         u16 calib_ver;
 385
 386         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 387         calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
 388
 389         if (eeprom_ver < priv->cfg->eeprom_ver ||
 390             calib_ver < priv->cfg->eeprom_calib_ver)
 391                 goto err;
 392
 393         return 0;
 394 err:
 395         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 396                   eeprom_ver, priv->cfg->eeprom_ver,
 397                   calib_ver,  priv->cfg->eeprom_calib_ver);
 398         return -EINVAL;
 399
 400 }
 401 EXPORT_SYMBOL(iwl_eeprom_check_version);
 402
 403 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 404 {
 405         return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
 406 }
 407 EXPORT_SYMBOL(iwl_eeprom_query_addr);
 408
 409 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
 410 {
 411         if (!priv->eeprom)
 412                 return 0;
 413         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
 414 }
 415 EXPORT_SYMBOL(iwl_eeprom_query16);
 416
 417 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
 418 {
 419         const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
 420                                         EEPROM_MAC_ADDRESS);
 421         memcpy(mac, addr, ETH_ALEN);
 422 }
 423 EXPORT_SYMBOL(iwl_eeprom_get_mac);
 424
 425 static void iwl_init_band_reference(const struct iwl_priv *priv,
 426                         int eep_band, int *eeprom_ch_count,
 427                         const struct iwl_eeprom_channel **eeprom_ch_info,
 428                         const u8 **eeprom_ch_index)
 429 {
 430         u32 offset = priv->cfg->ops->lib->
 431                         eeprom_ops.regulatory_bands[eep_band - 1];
 432         switch (eep_band) {
 433         case 1:         /* 2.4GHz band */
 434                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 435                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 436                                 iwl_eeprom_query_addr(priv, offset);
 437                 *eeprom_ch_index = iwl_eeprom_band_1;
 438                 break;
 439         case 2:         /* 4.9GHz band */
 440                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 441                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 442                                 iwl_eeprom_query_addr(priv, offset);
 443                 *eeprom_ch_index = iwl_eeprom_band_2;
 444                 break;
 445         case 3:         /* 5.2GHz band */
 446                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 447                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 448                                 iwl_eeprom_query_addr(priv, offset);
 449                 *eeprom_ch_index = iwl_eeprom_band_3;
 450                 break;
 451         case 4:         /* 5.5GHz band */
 452                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 453                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 454                                 iwl_eeprom_query_addr(priv, offset);
 455                 *eeprom_ch_index = iwl_eeprom_band_4;
 456                 break;
 457         case 5:         /* 5.7GHz band */
 458                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 459                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 460                                 iwl_eeprom_query_addr(priv, offset);
 461                 *eeprom_ch_index = iwl_eeprom_band_5;
 462                 break;
 463         case 6:         /* 2.4GHz FAT channels */
 464                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 465                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 466                                 iwl_eeprom_query_addr(priv, offset);
 467                 *eeprom_ch_index = iwl_eeprom_band_6;
 468                 break;
 469         case 7:         /* 5 GHz FAT channels */
 470                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 471                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 472                                 iwl_eeprom_query_addr(priv, offset);
 473                 *eeprom_ch_index = iwl_eeprom_band_7;
 474                 break;
 475         default:
 476                 BUG();
 477                 return;
 478         }
 479 }
 480
 481 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 482                             ? # x " " : "")
 483
 484 /**
 485  * iwl_set_fat_chan_info - Copy fat channel info into driver's priv.
 486  *
 487  * Does not set up a command, or touch hardware.
 488  */
 489 static int iwl_set_fat_chan_info(struct iwl_priv *priv,
 490                               enum ieee80211_band band, u16 channel,
 491                               const struct iwl_eeprom_channel *eeprom_ch,
 492                               u8 fat_extension_channel)
 493 {
 494         struct iwl_channel_info *ch_info;
 495
 496         ch_info = (struct iwl_channel_info *)
 497                         iwl_get_channel_info(priv, band, channel);
 498
 499         if (!is_channel_valid(ch_info))
 500                 return -1;
 501
 502         IWL_DEBUG_INFO(priv, "FAT Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 503                         " Ad-Hoc %ssupported\n",
 504                         ch_info->channel,
 505                         is_channel_a_band(ch_info) ?
 506                         "5.2" : "2.4",
 507                         CHECK_AND_PRINT(IBSS),
 508                         CHECK_AND_PRINT(ACTIVE),
 509                         CHECK_AND_PRINT(RADAR),
 510                         CHECK_AND_PRINT(WIDE),
 511                         CHECK_AND_PRINT(DFS),
 512                         eeprom_ch->flags,
 513                         eeprom_ch->max_power_avg,
 514                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 515                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 516                         "" : "not ");
 517
 518         ch_info->fat_eeprom = *eeprom_ch;
 519         ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
 520         ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
 521         ch_info->fat_min_power = 0;
 522         ch_info->fat_scan_power = eeprom_ch->max_power_avg;
 523         ch_info->fat_flags = eeprom_ch->flags;
 524         ch_info->fat_extension_channel = fat_extension_channel;
 525
 526         return 0;
 527 }
 528
 529 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 530                             ? # x " " : "")
 531
 532 /**
 533  * iwl_init_channel_map - Set up driver's info for all possible channels
 534  */
 535 int iwl_init_channel_map(struct iwl_priv *priv)
 536 {
 537         int eeprom_ch_count = 0;
 538         const u8 *eeprom_ch_index = NULL;
 539         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 540         int band, ch;
 541         struct iwl_channel_info *ch_info;
 542
 543         if (priv->channel_count) {
 544                 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
 545                 return 0;
 546         }
 547
 548         IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
 549
 550         priv->channel_count =
 551             ARRAY_SIZE(iwl_eeprom_band_1) +
 552             ARRAY_SIZE(iwl_eeprom_band_2) +
 553             ARRAY_SIZE(iwl_eeprom_band_3) +
 554             ARRAY_SIZE(iwl_eeprom_band_4) +
 555             ARRAY_SIZE(iwl_eeprom_band_5);
 556
 557         IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
 558
 559         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
 560                                      priv->channel_count, GFP_KERNEL);
 561         if (!priv->channel_info) {
 562                 IWL_ERR(priv, "Could not allocate channel_info\n");
 563                 priv->channel_count = 0;
 564                 return -ENOMEM;
 565         }
 566
 567         ch_info = priv->channel_info;
 568
 569         /* Loop through the 5 EEPROM bands adding them in order to the
 570          * channel map we maintain (that contains additional information than
 571          * what just in the EEPROM) */
 572         for (band = 1; band <= 5; band++) {
 573
 574                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 575                                         &eeprom_ch_info, &eeprom_ch_index);
 576
 577                 /* Loop through each band adding each of the channels */
 578                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 579                         ch_info->channel = eeprom_ch_index[ch];
 580                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 581                             IEEE80211_BAND_5GHZ;
 582
 583                         /* permanently store EEPROM's channel regulatory flags
 584                          *   and max power in channel info database. */
 585                         ch_info->eeprom = eeprom_ch_info[ch];
 586
 587                         /* Copy the run-time flags so they are there even on
 588                          * invalid channels */
 589                         ch_info->flags = eeprom_ch_info[ch].flags;
 590                         /* First write that fat is not enabled, and then enable
 591                          * one by one */
 592                         ch_info->fat_extension_channel =
 593                                 (IEEE80211_CHAN_NO_HT40PLUS |
 594                                  IEEE80211_CHAN_NO_HT40MINUS);
 595
 596                         if (!(is_channel_valid(ch_info))) {
 597                                 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
 598                                                "No traffic\n",
 599                                                ch_info->channel,
 600                                                ch_info->flags,
 601                                                is_channel_a_band(ch_info) ?
 602                                                "5.2" : "2.4");
 603                                 ch_info++;
 604                                 continue;
 605                         }
 606
 607                         /* Initialize regulatory-based run-time data */
 608                         ch_info->max_power_avg = ch_info->curr_txpow =
 609                             eeprom_ch_info[ch].max_power_avg;
 610                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
 611                         ch_info->min_power = 0;
 612
 613                         IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
 614                                        " Ad-Hoc %ssupported\n",
 615                                        ch_info->channel,
 616                                        is_channel_a_band(ch_info) ?
 617                                        "5.2" : "2.4",
 618                                        CHECK_AND_PRINT_I(VALID),
 619                                        CHECK_AND_PRINT_I(IBSS),
 620                                        CHECK_AND_PRINT_I(ACTIVE),
 621                                        CHECK_AND_PRINT_I(RADAR),
 622                                        CHECK_AND_PRINT_I(WIDE),
 623                                        CHECK_AND_PRINT_I(DFS),
 624                                        eeprom_ch_info[ch].flags,
 625                                        eeprom_ch_info[ch].max_power_avg,
 626                                        ((eeprom_ch_info[ch].
 627                                          flags & EEPROM_CHANNEL_IBSS)
 628                                         && !(eeprom_ch_info[ch].
 629                                              flags & EEPROM_CHANNEL_RADAR))
 630                                        ? "" : "not ");
 631
 632                         /* Set the tx_power_user_lmt to the highest power
 633                          * supported by any channel */
 634                         if (eeprom_ch_info[ch].max_power_avg >
 635                                                 priv->tx_power_user_lmt)
 636                                 priv->tx_power_user_lmt =
 637                                     eeprom_ch_info[ch].max_power_avg;
 638
 639                         ch_info++;
 640                 }
 641         }
 642
 643         /* Check if we do have FAT channels */
 644         if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
 645             EEPROM_REGULATORY_BAND_NO_FAT &&
 646             priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
 647             EEPROM_REGULATORY_BAND_NO_FAT)
 648                 return 0;
 649
 650         /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
 651         for (band = 6; band <= 7; band++) {
 652                 enum ieee80211_band ieeeband;
 653                 u8 fat_extension_chan;
 654
 655                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 656                                         &eeprom_ch_info, &eeprom_ch_index);
 657
 658                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
 659                 ieeeband =
 660                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 661
 662                 /* Loop through each band adding each of the channels */
 663                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 664
 665                         if ((band == 6) &&
 666                                 ((eeprom_ch_index[ch] == 5) ||
 667                                  (eeprom_ch_index[ch] == 6) ||
 668                                  (eeprom_ch_index[ch] == 7)))
 669                                 /* both are allowed: above and below */
 670                                 fat_extension_chan = 0;
 671                         else
 672                                 fat_extension_chan =
 673                                         IEEE80211_CHAN_NO_HT40MINUS;
 674
 675                         /* Set up driver's info for lower half */
 676                         iwl_set_fat_chan_info(priv, ieeeband,
 677                                                 eeprom_ch_index[ch],
 678                                                 &(eeprom_ch_info[ch]),
 679                                                 fat_extension_chan);
 680
 681                         /* Set up driver's info for upper half */
 682                         iwl_set_fat_chan_info(priv, ieeeband,
 683                                                 (eeprom_ch_index[ch] + 4),
 684                                                 &(eeprom_ch_info[ch]),
 685                                                 IEEE80211_CHAN_NO_HT40PLUS);
 686                 }
 687         }
 688
 689         return 0;
 690 }
 691 EXPORT_SYMBOL(iwl_init_channel_map);
 692
 693 /*
 694  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
 695  */
 696 void iwl_free_channel_map(struct iwl_priv *priv)
 697 {
 698         kfree(priv->channel_info);
 699         priv->channel_count = 0;
 700 }
 701 EXPORT_SYMBOL(iwl_free_channel_map);
 702
 703 /**
 704  * iwl_get_channel_info - Find driver's private channel info
 705  *
 706  * Based on band and channel number.
 707  */
 708 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
 709                                         enum ieee80211_band band, u16 channel)
 710 {
 711         int i;
 712
 713         switch (band) {
 714         case IEEE80211_BAND_5GHZ:
 715                 for (i = 14; i < priv->channel_count; i++) {
 716                         if (priv->channel_info[i].channel == channel)
 717                                 return &priv->channel_info[i];
 718                 }
 719                 break;
 720         case IEEE80211_BAND_2GHZ:
 721                 if (channel >= 1 && channel <= 14)
 722                         return &priv->channel_info[channel - 1];
 723                 break;
 724         default:
 725                 BUG();
 726         }
 727
 728         return NULL;
 729 }
 730 EXPORT_SYMBOL(iwl_get_channel_info);
 731