iwlwifi: print rx_on config to help debug
[safe/jmp/linux-2.6] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2  *
3  * GPL LICENSE SUMMARY
4  *
5  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of version 2 of the GNU General Public License as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19  * USA
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called LICENSE.GPL.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
33
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-power.h"
40 #include "iwl-sta.h"
41 #include "iwl-helpers.h"
42
43
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
48
49 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
50         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
51          0, COEX_UNASSOC_IDLE_FLAGS},
52         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
53          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
54         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
55          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
56         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
57          0, COEX_CALIBRATION_FLAGS},
58         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
59          0, COEX_PERIODIC_CALIBRATION_FLAGS},
60         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
61          0, COEX_CONNECTION_ESTAB_FLAGS},
62         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
63          0, COEX_ASSOCIATED_IDLE_FLAGS},
64         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
65          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
66         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
67          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
68         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
69          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
70         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
71         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
72         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
73          0, COEX_STAND_ALONE_DEBUG_FLAGS},
74         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
75          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
76         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
77         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
78 };
79
80 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np)    \
81         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,      \
82                                     IWL_RATE_SISO_##s##M_PLCP, \
83                                     IWL_RATE_MIMO2_##s##M_PLCP,\
84                                     IWL_RATE_MIMO3_##s##M_PLCP,\
85                                     IWL_RATE_##r##M_IEEE,      \
86                                     IWL_RATE_##ip##M_INDEX,    \
87                                     IWL_RATE_##in##M_INDEX,    \
88                                     IWL_RATE_##rp##M_INDEX,    \
89                                     IWL_RATE_##rn##M_INDEX,    \
90                                     IWL_RATE_##pp##M_INDEX,    \
91                                     IWL_RATE_##np##M_INDEX }
92
93 u32 iwl_debug_level;
94 EXPORT_SYMBOL(iwl_debug_level);
95
96 static irqreturn_t iwl_isr(int irq, void *data);
97
98 /*
99  * Parameter order:
100  *   rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
101  *
102  * If there isn't a valid next or previous rate then INV is used which
103  * maps to IWL_RATE_INVALID
104  *
105  */
106 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
107         IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2),    /*  1mbps */
108         IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5),          /*  2mbps */
109         IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
110         IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18),      /* 11mbps */
111         IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
112         IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11),       /*  9mbps */
113         IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
114         IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
115         IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
116         IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
117         IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
118         IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
119         IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
120         /* FIXME:RS:          ^^    should be INV (legacy) */
121 };
122 EXPORT_SYMBOL(iwl_rates);
123
124 /**
125  * translate ucode response to mac80211 tx status control values
126  */
127 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
128                                   struct ieee80211_tx_info *info)
129 {
130         struct ieee80211_tx_rate *r = &info->control.rates[0];
131
132         info->antenna_sel_tx =
133                 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
134         if (rate_n_flags & RATE_MCS_HT_MSK)
135                 r->flags |= IEEE80211_TX_RC_MCS;
136         if (rate_n_flags & RATE_MCS_GF_MSK)
137                 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
138         if (rate_n_flags & RATE_MCS_HT40_MSK)
139                 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
140         if (rate_n_flags & RATE_MCS_DUP_MSK)
141                 r->flags |= IEEE80211_TX_RC_DUP_DATA;
142         if (rate_n_flags & RATE_MCS_SGI_MSK)
143                 r->flags |= IEEE80211_TX_RC_SHORT_GI;
144         r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
145 }
146 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
147
148 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
149 {
150         int idx = 0;
151
152         /* HT rate format */
153         if (rate_n_flags & RATE_MCS_HT_MSK) {
154                 idx = (rate_n_flags & 0xff);
155
156                 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
157                         idx = idx - IWL_RATE_MIMO3_6M_PLCP;
158                 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
159                         idx = idx - IWL_RATE_MIMO2_6M_PLCP;
160
161                 idx += IWL_FIRST_OFDM_RATE;
162                 /* skip 9M not supported in ht*/
163                 if (idx >= IWL_RATE_9M_INDEX)
164                         idx += 1;
165                 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
166                         return idx;
167
168         /* legacy rate format, search for match in table */
169         } else {
170                 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
171                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
172                                 return idx;
173         }
174
175         return -1;
176 }
177 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
178
179 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
180 {
181         int idx = 0;
182         int band_offset = 0;
183
184         /* HT rate format: mac80211 wants an MCS number, which is just LSB */
185         if (rate_n_flags & RATE_MCS_HT_MSK) {
186                 idx = (rate_n_flags & 0xff);
187                 return idx;
188         /* Legacy rate format, search for match in table */
189         } else {
190                 if (band == IEEE80211_BAND_5GHZ)
191                         band_offset = IWL_FIRST_OFDM_RATE;
192                 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
193                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
194                                 return idx - band_offset;
195         }
196
197         return -1;
198 }
199
200 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
201 {
202         int i;
203         u8 ind = ant;
204         for (i = 0; i < RATE_ANT_NUM - 1; i++) {
205                 ind = (ind + 1) < RATE_ANT_NUM ?  ind + 1 : 0;
206                 if (priv->hw_params.valid_tx_ant & BIT(ind))
207                         return ind;
208         }
209         return ant;
210 }
211
212 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
213 EXPORT_SYMBOL(iwl_bcast_addr);
214
215
216 /* This function both allocates and initializes hw and priv. */
217 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
218                 struct ieee80211_ops *hw_ops)
219 {
220         struct iwl_priv *priv;
221
222         /* mac80211 allocates memory for this device instance, including
223          *   space for this driver's private structure */
224         struct ieee80211_hw *hw =
225                 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
226         if (hw == NULL) {
227                 printk(KERN_ERR "%s: Can not allocate network device\n",
228                        cfg->name);
229                 goto out;
230         }
231
232         priv = hw->priv;
233         priv->hw = hw;
234
235 out:
236         return hw;
237 }
238 EXPORT_SYMBOL(iwl_alloc_all);
239
240 void iwl_hw_detect(struct iwl_priv *priv)
241 {
242         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
243         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
244         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
245 }
246 EXPORT_SYMBOL(iwl_hw_detect);
247
248 int iwl_hw_nic_init(struct iwl_priv *priv)
249 {
250         unsigned long flags;
251         struct iwl_rx_queue *rxq = &priv->rxq;
252         int ret;
253
254         /* nic_init */
255         spin_lock_irqsave(&priv->lock, flags);
256         priv->cfg->ops->lib->apm_ops.init(priv);
257         iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
258         spin_unlock_irqrestore(&priv->lock, flags);
259
260         ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
261
262         priv->cfg->ops->lib->apm_ops.config(priv);
263
264         /* Allocate the RX queue, or reset if it is already allocated */
265         if (!rxq->bd) {
266                 ret = iwl_rx_queue_alloc(priv);
267                 if (ret) {
268                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
269                         return -ENOMEM;
270                 }
271         } else
272                 iwl_rx_queue_reset(priv, rxq);
273
274         iwl_rx_replenish(priv);
275
276         iwl_rx_init(priv, rxq);
277
278         spin_lock_irqsave(&priv->lock, flags);
279
280         rxq->need_update = 1;
281         iwl_rx_queue_update_write_ptr(priv, rxq);
282
283         spin_unlock_irqrestore(&priv->lock, flags);
284
285         /* Allocate and init all Tx and Command queues */
286         ret = iwl_txq_ctx_reset(priv);
287         if (ret)
288                 return ret;
289
290         set_bit(STATUS_INIT, &priv->status);
291
292         return 0;
293 }
294 EXPORT_SYMBOL(iwl_hw_nic_init);
295
296 /*
297  * QoS  support
298 */
299 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
300 {
301         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
302                 return;
303
304         priv->qos_data.def_qos_parm.qos_flags = 0;
305
306         if (priv->qos_data.qos_cap.q_AP.queue_request &&
307             !priv->qos_data.qos_cap.q_AP.txop_request)
308                 priv->qos_data.def_qos_parm.qos_flags |=
309                         QOS_PARAM_FLG_TXOP_TYPE_MSK;
310         if (priv->qos_data.qos_active)
311                 priv->qos_data.def_qos_parm.qos_flags |=
312                         QOS_PARAM_FLG_UPDATE_EDCA_MSK;
313
314         if (priv->current_ht_config.is_ht)
315                 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
316
317         if (force || iwl_is_associated(priv)) {
318                 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
319                                 priv->qos_data.qos_active,
320                                 priv->qos_data.def_qos_parm.qos_flags);
321
322                 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
323                                        sizeof(struct iwl_qosparam_cmd),
324                                        &priv->qos_data.def_qos_parm, NULL);
325         }
326 }
327 EXPORT_SYMBOL(iwl_activate_qos);
328
329 /*
330  * AC        CWmin         CW max      AIFSN      TXOP Limit    TXOP Limit
331  *                                              (802.11b)      (802.11a/g)
332  * AC_BK      15            1023        7           0               0
333  * AC_BE      15            1023        3           0               0
334  * AC_VI       7              15        2          6.016ms       3.008ms
335  * AC_VO       3               7        2          3.264ms       1.504ms
336  */
337 void iwl_reset_qos(struct iwl_priv *priv)
338 {
339         u16 cw_min = 15;
340         u16 cw_max = 1023;
341         u8 aifs = 2;
342         bool is_legacy = false;
343         unsigned long flags;
344         int i;
345
346         spin_lock_irqsave(&priv->lock, flags);
347         /* QoS always active in AP and ADHOC mode
348          * In STA mode wait for association
349          */
350         if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
351             priv->iw_mode == NL80211_IFTYPE_AP)
352                 priv->qos_data.qos_active = 1;
353         else
354                 priv->qos_data.qos_active = 0;
355
356         /* check for legacy mode */
357         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
358             (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
359             (priv->iw_mode == NL80211_IFTYPE_STATION &&
360             (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
361                 cw_min = 31;
362                 is_legacy = 1;
363         }
364
365         if (priv->qos_data.qos_active)
366                 aifs = 3;
367
368         /* AC_BE */
369         priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
370         priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
371         priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
372         priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
373         priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
374
375         if (priv->qos_data.qos_active) {
376                 /* AC_BK */
377                 i = 1;
378                 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
379                 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
380                 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
381                 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
382                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
383
384                 /* AC_VI */
385                 i = 2;
386                 priv->qos_data.def_qos_parm.ac[i].cw_min =
387                         cpu_to_le16((cw_min + 1) / 2 - 1);
388                 priv->qos_data.def_qos_parm.ac[i].cw_max =
389                         cpu_to_le16(cw_min);
390                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
391                 if (is_legacy)
392                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
393                                 cpu_to_le16(6016);
394                 else
395                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
396                                 cpu_to_le16(3008);
397                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
398
399                 /* AC_VO */
400                 i = 3;
401                 priv->qos_data.def_qos_parm.ac[i].cw_min =
402                         cpu_to_le16((cw_min + 1) / 4 - 1);
403                 priv->qos_data.def_qos_parm.ac[i].cw_max =
404                         cpu_to_le16((cw_min + 1) / 2 - 1);
405                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
406                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
407                 if (is_legacy)
408                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
409                                 cpu_to_le16(3264);
410                 else
411                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
412                                 cpu_to_le16(1504);
413         } else {
414                 for (i = 1; i < 4; i++) {
415                         priv->qos_data.def_qos_parm.ac[i].cw_min =
416                                 cpu_to_le16(cw_min);
417                         priv->qos_data.def_qos_parm.ac[i].cw_max =
418                                 cpu_to_le16(cw_max);
419                         priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
420                         priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
421                         priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
422                 }
423         }
424         IWL_DEBUG_QOS(priv, "set QoS to default \n");
425
426         spin_unlock_irqrestore(&priv->lock, flags);
427 }
428 EXPORT_SYMBOL(iwl_reset_qos);
429
430 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
431 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
432 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
433                               struct ieee80211_sta_ht_cap *ht_info,
434                               enum ieee80211_band band)
435 {
436         u16 max_bit_rate = 0;
437         u8 rx_chains_num = priv->hw_params.rx_chains_num;
438         u8 tx_chains_num = priv->hw_params.tx_chains_num;
439
440         ht_info->cap = 0;
441         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
442
443         ht_info->ht_supported = true;
444
445         if (priv->cfg->ht_greenfield_support)
446                 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
447         ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
448         if (priv->cfg->support_sm_ps)
449                 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
450                                      (WLAN_HT_CAP_SM_PS_DYNAMIC << 2));
451         else
452                 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
453                                      (WLAN_HT_CAP_SM_PS_DISABLED << 2));
454
455         max_bit_rate = MAX_BIT_RATE_20_MHZ;
456         if (priv->hw_params.ht40_channel & BIT(band)) {
457                 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
458                 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
459                 ht_info->mcs.rx_mask[4] = 0x01;
460                 max_bit_rate = MAX_BIT_RATE_40_MHZ;
461         }
462
463         if (priv->cfg->mod_params->amsdu_size_8K)
464                 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
465
466         ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
467         ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
468
469         ht_info->mcs.rx_mask[0] = 0xFF;
470         if (rx_chains_num >= 2)
471                 ht_info->mcs.rx_mask[1] = 0xFF;
472         if (rx_chains_num >= 3)
473                 ht_info->mcs.rx_mask[2] = 0xFF;
474
475         /* Highest supported Rx data rate */
476         max_bit_rate *= rx_chains_num;
477         WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
478         ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
479
480         /* Tx MCS capabilities */
481         ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
482         if (tx_chains_num != rx_chains_num) {
483                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
484                 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
485                                 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
486         }
487 }
488
489 /**
490  * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
491  */
492 int iwlcore_init_geos(struct iwl_priv *priv)
493 {
494         struct iwl_channel_info *ch;
495         struct ieee80211_supported_band *sband;
496         struct ieee80211_channel *channels;
497         struct ieee80211_channel *geo_ch;
498         struct ieee80211_rate *rates;
499         int i = 0;
500
501         if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
502             priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
503                 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
504                 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
505                 return 0;
506         }
507
508         channels = kzalloc(sizeof(struct ieee80211_channel) *
509                            priv->channel_count, GFP_KERNEL);
510         if (!channels)
511                 return -ENOMEM;
512
513         rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
514                         GFP_KERNEL);
515         if (!rates) {
516                 kfree(channels);
517                 return -ENOMEM;
518         }
519
520         /* 5.2GHz channels start after the 2.4GHz channels */
521         sband = &priv->bands[IEEE80211_BAND_5GHZ];
522         sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
523         /* just OFDM */
524         sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
525         sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
526
527         if (priv->cfg->sku & IWL_SKU_N)
528                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
529                                          IEEE80211_BAND_5GHZ);
530
531         sband = &priv->bands[IEEE80211_BAND_2GHZ];
532         sband->channels = channels;
533         /* OFDM & CCK */
534         sband->bitrates = rates;
535         sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
536
537         if (priv->cfg->sku & IWL_SKU_N)
538                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
539                                          IEEE80211_BAND_2GHZ);
540
541         priv->ieee_channels = channels;
542         priv->ieee_rates = rates;
543
544         for (i = 0;  i < priv->channel_count; i++) {
545                 ch = &priv->channel_info[i];
546
547                 /* FIXME: might be removed if scan is OK */
548                 if (!is_channel_valid(ch))
549                         continue;
550
551                 if (is_channel_a_band(ch))
552                         sband =  &priv->bands[IEEE80211_BAND_5GHZ];
553                 else
554                         sband =  &priv->bands[IEEE80211_BAND_2GHZ];
555
556                 geo_ch = &sband->channels[sband->n_channels++];
557
558                 geo_ch->center_freq =
559                                 ieee80211_channel_to_frequency(ch->channel);
560                 geo_ch->max_power = ch->max_power_avg;
561                 geo_ch->max_antenna_gain = 0xff;
562                 geo_ch->hw_value = ch->channel;
563
564                 if (is_channel_valid(ch)) {
565                         if (!(ch->flags & EEPROM_CHANNEL_IBSS))
566                                 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
567
568                         if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
569                                 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
570
571                         if (ch->flags & EEPROM_CHANNEL_RADAR)
572                                 geo_ch->flags |= IEEE80211_CHAN_RADAR;
573
574                         geo_ch->flags |= ch->ht40_extension_channel;
575
576                         if (ch->max_power_avg > priv->tx_power_device_lmt)
577                                 priv->tx_power_device_lmt = ch->max_power_avg;
578                 } else {
579                         geo_ch->flags |= IEEE80211_CHAN_DISABLED;
580                 }
581
582                 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
583                                 ch->channel, geo_ch->center_freq,
584                                 is_channel_a_band(ch) ?  "5.2" : "2.4",
585                                 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
586                                 "restricted" : "valid",
587                                  geo_ch->flags);
588         }
589
590         if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
591              priv->cfg->sku & IWL_SKU_A) {
592                 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
593                         "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
594                            priv->pci_dev->device,
595                            priv->pci_dev->subsystem_device);
596                 priv->cfg->sku &= ~IWL_SKU_A;
597         }
598
599         IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
600                    priv->bands[IEEE80211_BAND_2GHZ].n_channels,
601                    priv->bands[IEEE80211_BAND_5GHZ].n_channels);
602
603         set_bit(STATUS_GEO_CONFIGURED, &priv->status);
604
605         return 0;
606 }
607 EXPORT_SYMBOL(iwlcore_init_geos);
608
609 /*
610  * iwlcore_free_geos - undo allocations in iwlcore_init_geos
611  */
612 void iwlcore_free_geos(struct iwl_priv *priv)
613 {
614         kfree(priv->ieee_channels);
615         kfree(priv->ieee_rates);
616         clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
617 }
618 EXPORT_SYMBOL(iwlcore_free_geos);
619
620 /*
621  *  iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
622  *  function.
623  */
624 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
625                                 __le32 *tx_flags)
626 {
627         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
628                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
629                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
630         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
631                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
632                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
633         }
634 }
635 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
636
637 static bool is_single_rx_stream(struct iwl_priv *priv)
638 {
639         return !priv->current_ht_config.is_ht ||
640                priv->current_ht_config.single_chain_sufficient;
641 }
642
643 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
644                                    enum ieee80211_band band,
645                                    u16 channel, u8 extension_chan_offset)
646 {
647         const struct iwl_channel_info *ch_info;
648
649         ch_info = iwl_get_channel_info(priv, band, channel);
650         if (!is_channel_valid(ch_info))
651                 return 0;
652
653         if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
654                 return !(ch_info->ht40_extension_channel &
655                                         IEEE80211_CHAN_NO_HT40PLUS);
656         else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
657                 return !(ch_info->ht40_extension_channel &
658                                         IEEE80211_CHAN_NO_HT40MINUS);
659
660         return 0;
661 }
662
663 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
664                          struct ieee80211_sta_ht_cap *sta_ht_inf)
665 {
666         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
667
668         if (!ht_conf->is_ht || !ht_conf->is_40mhz)
669                 return 0;
670
671         /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
672          * the bit will not set if it is pure 40MHz case
673          */
674         if (sta_ht_inf) {
675                 if (!sta_ht_inf->ht_supported)
676                         return 0;
677         }
678 #ifdef CONFIG_IWLWIFI_DEBUG
679         if (priv->disable_ht40)
680                 return 0;
681 #endif
682         return iwl_is_channel_extension(priv, priv->band,
683                         le16_to_cpu(priv->staging_rxon.channel),
684                         ht_conf->extension_chan_offset);
685 }
686 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
687
688 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
689 {
690         u16 new_val = 0;
691         u16 beacon_factor = 0;
692
693         beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
694         new_val = beacon_val / beacon_factor;
695
696         if (!new_val)
697                 new_val = max_beacon_val;
698
699         return new_val;
700 }
701
702 void iwl_setup_rxon_timing(struct iwl_priv *priv)
703 {
704         u64 tsf;
705         s32 interval_tm, rem;
706         unsigned long flags;
707         struct ieee80211_conf *conf = NULL;
708         u16 beacon_int;
709
710         conf = ieee80211_get_hw_conf(priv->hw);
711
712         spin_lock_irqsave(&priv->lock, flags);
713         priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
714         priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
715
716         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
717                 beacon_int = priv->beacon_int;
718                 priv->rxon_timing.atim_window = 0;
719         } else {
720                 beacon_int = priv->vif->bss_conf.beacon_int;
721
722                 /* TODO: we need to get atim_window from upper stack
723                  * for now we set to 0 */
724                 priv->rxon_timing.atim_window = 0;
725         }
726
727         beacon_int = iwl_adjust_beacon_interval(beacon_int,
728                                 priv->hw_params.max_beacon_itrvl * 1024);
729         priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
730
731         tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
732         interval_tm = beacon_int * 1024;
733         rem = do_div(tsf, interval_tm);
734         priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
735
736         spin_unlock_irqrestore(&priv->lock, flags);
737         IWL_DEBUG_ASSOC(priv,
738                         "beacon interval %d beacon timer %d beacon tim %d\n",
739                         le16_to_cpu(priv->rxon_timing.beacon_interval),
740                         le32_to_cpu(priv->rxon_timing.beacon_init_val),
741                         le16_to_cpu(priv->rxon_timing.atim_window));
742 }
743 EXPORT_SYMBOL(iwl_setup_rxon_timing);
744
745 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
746 {
747         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
748
749         if (hw_decrypt)
750                 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
751         else
752                 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
753
754 }
755 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
756
757 /**
758  * iwl_check_rxon_cmd - validate RXON structure is valid
759  *
760  * NOTE:  This is really only useful during development and can eventually
761  * be #ifdef'd out once the driver is stable and folks aren't actively
762  * making changes
763  */
764 int iwl_check_rxon_cmd(struct iwl_priv *priv)
765 {
766         int error = 0;
767         int counter = 1;
768         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
769
770         if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
771                 error |= le32_to_cpu(rxon->flags &
772                                 (RXON_FLG_TGJ_NARROW_BAND_MSK |
773                                  RXON_FLG_RADAR_DETECT_MSK));
774                 if (error)
775                         IWL_WARN(priv, "check 24G fields %d | %d\n",
776                                     counter++, error);
777         } else {
778                 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
779                                 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
780                 if (error)
781                         IWL_WARN(priv, "check 52 fields %d | %d\n",
782                                     counter++, error);
783                 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
784                 if (error)
785                         IWL_WARN(priv, "check 52 CCK %d | %d\n",
786                                     counter++, error);
787         }
788         error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
789         if (error)
790                 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
791
792         /* make sure basic rates 6Mbps and 1Mbps are supported */
793         error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
794                   ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
795         if (error)
796                 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
797
798         error |= (le16_to_cpu(rxon->assoc_id) > 2007);
799         if (error)
800                 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
801
802         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
803                         == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
804         if (error)
805                 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
806                             counter++, error);
807
808         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
809                         == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
810         if (error)
811                 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
812                             counter++, error);
813
814         error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
815                         RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
816         if (error)
817                 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
818                             counter++, error);
819
820         if (error)
821                 IWL_WARN(priv, "Tuning to channel %d\n",
822                             le16_to_cpu(rxon->channel));
823
824         if (error) {
825                 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
826                 return -1;
827         }
828         return 0;
829 }
830 EXPORT_SYMBOL(iwl_check_rxon_cmd);
831
832 /**
833  * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
834  * @priv: staging_rxon is compared to active_rxon
835  *
836  * If the RXON structure is changing enough to require a new tune,
837  * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
838  * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
839  */
840 int iwl_full_rxon_required(struct iwl_priv *priv)
841 {
842
843         /* These items are only settable from the full RXON command */
844         if (!(iwl_is_associated(priv)) ||
845             compare_ether_addr(priv->staging_rxon.bssid_addr,
846                                priv->active_rxon.bssid_addr) ||
847             compare_ether_addr(priv->staging_rxon.node_addr,
848                                priv->active_rxon.node_addr) ||
849             compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
850                                priv->active_rxon.wlap_bssid_addr) ||
851             (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
852             (priv->staging_rxon.channel != priv->active_rxon.channel) ||
853             (priv->staging_rxon.air_propagation !=
854              priv->active_rxon.air_propagation) ||
855             (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
856              priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
857             (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
858              priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
859             (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
860              priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
861             (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
862                 return 1;
863
864         /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
865          * be updated with the RXON_ASSOC command -- however only some
866          * flag transitions are allowed using RXON_ASSOC */
867
868         /* Check if we are not switching bands */
869         if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
870             (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
871                 return 1;
872
873         /* Check if we are switching association toggle */
874         if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
875                 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
876                 return 1;
877
878         return 0;
879 }
880 EXPORT_SYMBOL(iwl_full_rxon_required);
881
882 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
883 {
884         int i;
885         int rate_mask;
886
887         /* Set rate mask*/
888         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
889                 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
890         else
891                 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
892
893         /* Find lowest valid rate */
894         for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
895                                         i = iwl_rates[i].next_ieee) {
896                 if (rate_mask & (1 << i))
897                         return iwl_rates[i].plcp;
898         }
899
900         /* No valid rate was found. Assign the lowest one */
901         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
902                 return IWL_RATE_1M_PLCP;
903         else
904                 return IWL_RATE_6M_PLCP;
905 }
906 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
907
908 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
909 {
910         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
911
912         if (!ht_conf->is_ht) {
913                 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
914                         RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
915                         RXON_FLG_HT40_PROT_MSK |
916                         RXON_FLG_HT_PROT_MSK);
917                 return;
918         }
919
920         /* FIXME: if the definition of ht_protection changed, the "translation"
921          * will be needed for rxon->flags
922          */
923         rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
924
925         /* Set up channel bandwidth:
926          * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
927         /* clear the HT channel mode before set the mode */
928         rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
929                          RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
930         if (iwl_is_ht40_tx_allowed(priv, NULL)) {
931                 /* pure ht40 */
932                 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
933                         rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
934                         /* Note: control channel is opposite of extension channel */
935                         switch (ht_conf->extension_chan_offset) {
936                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
937                                 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
938                                 break;
939                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
940                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
941                                 break;
942                         }
943                 } else {
944                         /* Note: control channel is opposite of extension channel */
945                         switch (ht_conf->extension_chan_offset) {
946                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
947                                 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
948                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
949                                 break;
950                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
951                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
952                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
953                                 break;
954                         case IEEE80211_HT_PARAM_CHA_SEC_NONE:
955                         default:
956                                 /* channel location only valid if in Mixed mode */
957                                 IWL_ERR(priv, "invalid extension channel offset\n");
958                                 break;
959                         }
960                 }
961         } else {
962                 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
963         }
964
965         if (priv->cfg->ops->hcmd->set_rxon_chain)
966                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
967
968         IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
969                         "extension channel offset 0x%x\n",
970                         le32_to_cpu(rxon->flags), ht_conf->ht_protection,
971                         ht_conf->extension_chan_offset);
972         return;
973 }
974 EXPORT_SYMBOL(iwl_set_rxon_ht);
975
976 #define IWL_NUM_RX_CHAINS_MULTIPLE      3
977 #define IWL_NUM_RX_CHAINS_SINGLE        2
978 #define IWL_NUM_IDLE_CHAINS_DUAL        2
979 #define IWL_NUM_IDLE_CHAINS_SINGLE      1
980
981 /*
982  * Determine how many receiver/antenna chains to use.
983  *
984  * More provides better reception via diversity.  Fewer saves power
985  * at the expense of throughput, but only when not in powersave to
986  * start with.
987  *
988  * MIMO (dual stream) requires at least 2, but works better with 3.
989  * This does not determine *which* chains to use, just how many.
990  */
991 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
992 {
993         /* # of Rx chains to use when expecting MIMO. */
994         if (is_single_rx_stream(priv))
995                 return IWL_NUM_RX_CHAINS_SINGLE;
996         else
997                 return IWL_NUM_RX_CHAINS_MULTIPLE;
998 }
999
1000 /*
1001  * When we are in power saving mode, unless device support spatial
1002  * multiplexing power save, use the active count for rx chain count.
1003  */
1004 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
1005 {
1006         int idle_cnt = active_cnt;
1007         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1008
1009         if (priv->cfg->support_sm_ps) {
1010                 /* # Rx chains when idling and maybe trying to save power */
1011                 switch (priv->current_ht_config.sm_ps) {
1012                 case WLAN_HT_CAP_SM_PS_STATIC:
1013                 case WLAN_HT_CAP_SM_PS_DYNAMIC:
1014                         idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
1015                                 IWL_NUM_IDLE_CHAINS_SINGLE;
1016                         break;
1017                 case WLAN_HT_CAP_SM_PS_DISABLED:
1018                         idle_cnt = (is_cam) ? active_cnt :
1019                                 IWL_NUM_IDLE_CHAINS_SINGLE;
1020                         break;
1021                 case WLAN_HT_CAP_SM_PS_INVALID:
1022                 default:
1023                         IWL_ERR(priv, "invalid sm_ps mode %d\n",
1024                                 priv->current_ht_config.sm_ps);
1025                         WARN_ON(1);
1026                         break;
1027                 }
1028         }
1029         return idle_cnt;
1030 }
1031
1032 /* up to 4 chains */
1033 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1034 {
1035         u8 res;
1036         res = (chain_bitmap & BIT(0)) >> 0;
1037         res += (chain_bitmap & BIT(1)) >> 1;
1038         res += (chain_bitmap & BIT(2)) >> 2;
1039         res += (chain_bitmap & BIT(3)) >> 3;
1040         return res;
1041 }
1042
1043 /**
1044  * iwl_is_monitor_mode - Determine if interface in monitor mode
1045  *
1046  * priv->iw_mode is set in add_interface, but add_interface is
1047  * never called for monitor mode. The only way mac80211 informs us about
1048  * monitor mode is through configuring filters (call to configure_filter).
1049  */
1050 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1051 {
1052         return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1053 }
1054 EXPORT_SYMBOL(iwl_is_monitor_mode);
1055
1056 /**
1057  * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1058  *
1059  * Selects how many and which Rx receivers/antennas/chains to use.
1060  * This should not be used for scan command ... it puts data in wrong place.
1061  */
1062 void iwl_set_rxon_chain(struct iwl_priv *priv)
1063 {
1064         bool is_single = is_single_rx_stream(priv);
1065         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1066         u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1067         u32 active_chains;
1068         u16 rx_chain;
1069
1070         /* Tell uCode which antennas are actually connected.
1071          * Before first association, we assume all antennas are connected.
1072          * Just after first association, iwl_chain_noise_calibration()
1073          *    checks which antennas actually *are* connected. */
1074          if (priv->chain_noise_data.active_chains)
1075                 active_chains = priv->chain_noise_data.active_chains;
1076         else
1077                 active_chains = priv->hw_params.valid_rx_ant;
1078
1079         rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1080
1081         /* How many receivers should we use? */
1082         active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1083         idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1084
1085
1086         /* correct rx chain count according hw settings
1087          * and chain noise calibration
1088          */
1089         valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1090         if (valid_rx_cnt < active_rx_cnt)
1091                 active_rx_cnt = valid_rx_cnt;
1092
1093         if (valid_rx_cnt < idle_rx_cnt)
1094                 idle_rx_cnt = valid_rx_cnt;
1095
1096         rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1097         rx_chain |= idle_rx_cnt  << RXON_RX_CHAIN_CNT_POS;
1098
1099         /* copied from 'iwl_bg_request_scan()' */
1100         /* Force use of chains B and C (0x6) for Rx for 4965
1101          * Avoid A (0x1) because of its off-channel reception on A-band.
1102          * MIMO is not used here, but value is required */
1103         if (iwl_is_monitor_mode(priv) &&
1104             !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1105             ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1106                 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1107                 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1108                 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1109                 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1110         }
1111
1112         priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1113
1114         if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1115                 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1116         else
1117                 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1118
1119         IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1120                         priv->staging_rxon.rx_chain,
1121                         active_rx_cnt, idle_rx_cnt);
1122
1123         WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1124                 active_rx_cnt < idle_rx_cnt);
1125 }
1126 EXPORT_SYMBOL(iwl_set_rxon_chain);
1127
1128 /**
1129  * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1130  * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1131  * @channel: Any channel valid for the requested phymode
1132
1133  * In addition to setting the staging RXON, priv->phymode is also set.
1134  *
1135  * NOTE:  Does not commit to the hardware; it sets appropriate bit fields
1136  * in the staging RXON flag structure based on the phymode
1137  */
1138 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1139 {
1140         enum ieee80211_band band = ch->band;
1141         u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1142
1143         if (!iwl_get_channel_info(priv, band, channel)) {
1144                 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1145                                channel, band);
1146                 return -EINVAL;
1147         }
1148
1149         if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1150             (priv->band == band))
1151                 return 0;
1152
1153         priv->staging_rxon.channel = cpu_to_le16(channel);
1154         if (band == IEEE80211_BAND_5GHZ)
1155                 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1156         else
1157                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1158
1159         priv->band = band;
1160
1161         IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1162
1163         return 0;
1164 }
1165 EXPORT_SYMBOL(iwl_set_rxon_channel);
1166
1167 void iwl_set_flags_for_band(struct iwl_priv *priv,
1168                             enum ieee80211_band band)
1169 {
1170         if (band == IEEE80211_BAND_5GHZ) {
1171                 priv->staging_rxon.flags &=
1172                     ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1173                       | RXON_FLG_CCK_MSK);
1174                 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1175         } else {
1176                 /* Copied from iwl_post_associate() */
1177                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1178                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1179                 else
1180                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1181
1182                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1183                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1184
1185                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1186                 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1187                 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1188         }
1189 }
1190
1191 /*
1192  * initialize rxon structure with default values from eeprom
1193  */
1194 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1195 {
1196         const struct iwl_channel_info *ch_info;
1197
1198         memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1199
1200         switch (mode) {
1201         case NL80211_IFTYPE_AP:
1202                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1203                 break;
1204
1205         case NL80211_IFTYPE_STATION:
1206                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1207                 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1208                 break;
1209
1210         case NL80211_IFTYPE_ADHOC:
1211                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1212                 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1213                 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1214                                                   RXON_FILTER_ACCEPT_GRP_MSK;
1215                 break;
1216
1217         default:
1218                 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1219                 break;
1220         }
1221
1222 #if 0
1223         /* TODO:  Figure out when short_preamble would be set and cache from
1224          * that */
1225         if (!hw_to_local(priv->hw)->short_preamble)
1226                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1227         else
1228                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1229 #endif
1230
1231         ch_info = iwl_get_channel_info(priv, priv->band,
1232                                        le16_to_cpu(priv->active_rxon.channel));
1233
1234         if (!ch_info)
1235                 ch_info = &priv->channel_info[0];
1236
1237         /*
1238          * in some case A channels are all non IBSS
1239          * in this case force B/G channel
1240          */
1241         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1242             !(is_channel_ibss(ch_info)))
1243                 ch_info = &priv->channel_info[0];
1244
1245         priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1246         priv->band = ch_info->band;
1247
1248         iwl_set_flags_for_band(priv, priv->band);
1249
1250         priv->staging_rxon.ofdm_basic_rates =
1251             (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1252         priv->staging_rxon.cck_basic_rates =
1253             (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1254
1255         /* clear both MIX and PURE40 mode flag */
1256         priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1257                                         RXON_FLG_CHANNEL_MODE_PURE_40);
1258         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1259         memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1260         priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1261         priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1262         priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1263 }
1264 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1265
1266 static void iwl_set_rate(struct iwl_priv *priv)
1267 {
1268         const struct ieee80211_supported_band *hw = NULL;
1269         struct ieee80211_rate *rate;
1270         int i;
1271
1272         hw = iwl_get_hw_mode(priv, priv->band);
1273         if (!hw) {
1274                 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1275                 return;
1276         }
1277
1278         priv->active_rate = 0;
1279         priv->active_rate_basic = 0;
1280
1281         for (i = 0; i < hw->n_bitrates; i++) {
1282                 rate = &(hw->bitrates[i]);
1283                 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1284                         priv->active_rate |= (1 << rate->hw_value);
1285         }
1286
1287         IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1288                        priv->active_rate, priv->active_rate_basic);
1289
1290         /*
1291          * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1292          * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1293          * OFDM
1294          */
1295         if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1296                 priv->staging_rxon.cck_basic_rates =
1297                     ((priv->active_rate_basic &
1298                       IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1299         else
1300                 priv->staging_rxon.cck_basic_rates =
1301                     (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1302
1303         if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1304                 priv->staging_rxon.ofdm_basic_rates =
1305                     ((priv->active_rate_basic &
1306                       (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1307                       IWL_FIRST_OFDM_RATE) & 0xFF;
1308         else
1309                 priv->staging_rxon.ofdm_basic_rates =
1310                    (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1311 }
1312
1313 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1314 {
1315         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1316         struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1317         struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1318
1319         if (!le32_to_cpu(csa->status)) {
1320                 rxon->channel = csa->channel;
1321                 priv->staging_rxon.channel = csa->channel;
1322                 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1323                       le16_to_cpu(csa->channel));
1324         } else
1325                 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1326                       le16_to_cpu(csa->channel));
1327 }
1328 EXPORT_SYMBOL(iwl_rx_csa);
1329
1330 #ifdef CONFIG_IWLWIFI_DEBUG
1331 void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1332 {
1333         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1334
1335         IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1336         iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1337         IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1338         IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1339         IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1340                         le32_to_cpu(rxon->filter_flags));
1341         IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1342         IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1343                         rxon->ofdm_basic_rates);
1344         IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1345         IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1346         IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1347         IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1348 }
1349 EXPORT_SYMBOL(iwl_print_rx_config_cmd);
1350 #endif
1351 /**
1352  * iwl_irq_handle_error - called for HW or SW error interrupt from card
1353  */
1354 void iwl_irq_handle_error(struct iwl_priv *priv)
1355 {
1356         /* Set the FW error flag -- cleared on iwl_down */
1357         set_bit(STATUS_FW_ERROR, &priv->status);
1358
1359         /* Cancel currently queued command. */
1360         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1361
1362 #ifdef CONFIG_IWLWIFI_DEBUG
1363         if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
1364                 priv->cfg->ops->lib->dump_nic_error_log(priv);
1365                 priv->cfg->ops->lib->dump_nic_event_log(priv);
1366                 iwl_print_rx_config_cmd(priv);
1367         }
1368 #endif
1369
1370         wake_up_interruptible(&priv->wait_command_queue);
1371
1372         /* Keep the restart process from trying to send host
1373          * commands by clearing the INIT status bit */
1374         clear_bit(STATUS_READY, &priv->status);
1375
1376         if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1377                 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1378                           "Restarting adapter due to uCode error.\n");
1379
1380                 if (priv->cfg->mod_params->restart_fw)
1381                         queue_work(priv->workqueue, &priv->restart);
1382         }
1383 }
1384 EXPORT_SYMBOL(iwl_irq_handle_error);
1385
1386 int iwl_apm_stop_master(struct iwl_priv *priv)
1387 {
1388         int ret = 0;
1389
1390         /* stop device's busmaster DMA activity */
1391         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1392
1393         ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1394                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1395         if (ret)
1396                 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1397
1398         IWL_DEBUG_INFO(priv, "stop master\n");
1399
1400         return ret;
1401 }
1402 EXPORT_SYMBOL(iwl_apm_stop_master);
1403
1404 void iwl_apm_stop(struct iwl_priv *priv)
1405 {
1406         IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1407
1408         /* Stop device's DMA activity */
1409         iwl_apm_stop_master(priv);
1410
1411         /* Reset the entire device */
1412         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1413
1414         udelay(10);
1415
1416         /*
1417          * Clear "initialization complete" bit to move adapter from
1418          * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1419          */
1420         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1421 }
1422 EXPORT_SYMBOL(iwl_apm_stop);
1423
1424
1425 /*
1426  * Start up NIC's basic functionality after it has been reset
1427  * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1428  * NOTE:  This does not load uCode nor start the embedded processor
1429  */
1430 int iwl_apm_init(struct iwl_priv *priv)
1431 {
1432         int ret = 0;
1433         u16 lctl;
1434
1435         IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1436
1437         /*
1438          * Use "set_bit" below rather than "write", to preserve any hardware
1439          * bits already set by default after reset.
1440          */
1441
1442         /* Disable L0S exit timer (platform NMI Work/Around) */
1443         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1444                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1445
1446         /*
1447          * Disable L0s without affecting L1;
1448          *  don't wait for ICH L0s (ICH bug W/A)
1449          */
1450         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1451                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1452
1453         /* Set FH wait threshold to maximum (HW error during stress W/A) */
1454         iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1455
1456         /*
1457          * Enable HAP INTA (interrupt from management bus) to
1458          * wake device's PCI Express link L1a -> L0s
1459          * NOTE:  This is no-op for 3945 (non-existant bit)
1460          */
1461         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1462                                     CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1463
1464         /*
1465          * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1466          * Check if BIOS (or OS) enabled L1-ASPM on this device.
1467          * If so (likely), disable L0S, so device moves directly L0->L1;
1468          *    costs negligible amount of power savings.
1469          * If not (unlikely), enable L0S, so there is at least some
1470          *    power savings, even without L1.
1471          */
1472         if (priv->cfg->set_l0s) {
1473                 lctl = iwl_pcie_link_ctl(priv);
1474                 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1475                                         PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1476                         /* L1-ASPM enabled; disable(!) L0S  */
1477                         iwl_set_bit(priv, CSR_GIO_REG,
1478                                         CSR_GIO_REG_VAL_L0S_ENABLED);
1479                         IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1480                 } else {
1481                         /* L1-ASPM disabled; enable(!) L0S */
1482                         iwl_clear_bit(priv, CSR_GIO_REG,
1483                                         CSR_GIO_REG_VAL_L0S_ENABLED);
1484                         IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1485                 }
1486         }
1487
1488         /* Configure analog phase-lock-loop before activating to D0A */
1489         if (priv->cfg->pll_cfg_val)
1490                 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1491
1492         /*
1493          * Set "initialization complete" bit to move adapter from
1494          * D0U* --> D0A* (powered-up active) state.
1495          */
1496         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1497
1498         /*
1499          * Wait for clock stabilization; once stabilized, access to
1500          * device-internal resources is supported, e.g. iwl_write_prph()
1501          * and accesses to uCode SRAM.
1502          */
1503         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1504                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1505                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1506         if (ret < 0) {
1507                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1508                 goto out;
1509         }
1510
1511         /*
1512          * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1513          * BSM (Boostrap State Machine) is only in 3945 and 4965;
1514          * later devices (i.e. 5000 and later) have non-volatile SRAM,
1515          * and don't need BSM to restore data after power-saving sleep.
1516          *
1517          * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1518          * do not disable clocks.  This preserves any hardware bits already
1519          * set by default in "CLK_CTRL_REG" after reset.
1520          */
1521         if (priv->cfg->use_bsm)
1522                 iwl_write_prph(priv, APMG_CLK_EN_REG,
1523                         APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1524         else
1525                 iwl_write_prph(priv, APMG_CLK_EN_REG,
1526                         APMG_CLK_VAL_DMA_CLK_RQT);
1527         udelay(20);
1528
1529         /* Disable L1-Active */
1530         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1531                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1532
1533 out:
1534         return ret;
1535 }
1536 EXPORT_SYMBOL(iwl_apm_init);
1537
1538
1539
1540 void iwl_configure_filter(struct ieee80211_hw *hw,
1541                           unsigned int changed_flags,
1542                           unsigned int *total_flags,
1543                           u64 multicast)
1544 {
1545         struct iwl_priv *priv = hw->priv;
1546         __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1547
1548         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1549                         changed_flags, *total_flags);
1550
1551         if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1552                 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1553                         *filter_flags |= RXON_FILTER_PROMISC_MSK;
1554                 else
1555                         *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1556         }
1557         if (changed_flags & FIF_ALLMULTI) {
1558                 if (*total_flags & FIF_ALLMULTI)
1559                         *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1560                 else
1561                         *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1562         }
1563         if (changed_flags & FIF_CONTROL) {
1564                 if (*total_flags & FIF_CONTROL)
1565                         *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1566                 else
1567                         *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1568         }
1569         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1570                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1571                         *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1572                 else
1573                         *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1574         }
1575
1576         /* We avoid iwl_commit_rxon here to commit the new filter flags
1577          * since mac80211 will call ieee80211_hw_config immediately.
1578          * (mc_list is not supported at this time). Otherwise, we need to
1579          * queue a background iwl_commit_rxon work.
1580          */
1581
1582         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1583                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1584 }
1585 EXPORT_SYMBOL(iwl_configure_filter);
1586
1587 int iwl_set_hw_params(struct iwl_priv *priv)
1588 {
1589         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1590         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1591         if (priv->cfg->mod_params->amsdu_size_8K)
1592                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1593         else
1594                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1595
1596         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1597
1598         if (priv->cfg->mod_params->disable_11n)
1599                 priv->cfg->sku &= ~IWL_SKU_N;
1600
1601         /* Device-specific setup */
1602         return priv->cfg->ops->lib->set_hw_params(priv);
1603 }
1604 EXPORT_SYMBOL(iwl_set_hw_params);
1605
1606 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1607 {
1608         int ret = 0;
1609         s8 prev_tx_power = priv->tx_power_user_lmt;
1610
1611         if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1612                 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1613                          tx_power,
1614                          IWL_TX_POWER_TARGET_POWER_MIN);
1615                 return -EINVAL;
1616         }
1617
1618         if (tx_power > priv->tx_power_device_lmt) {
1619                 IWL_WARN(priv,
1620                         "Requested user TXPOWER %d above upper limit %d.\n",
1621                          tx_power, priv->tx_power_device_lmt);
1622                 return -EINVAL;
1623         }
1624
1625         if (priv->tx_power_user_lmt != tx_power)
1626                 force = true;
1627
1628         /* if nic is not up don't send command */
1629         if (iwl_is_ready_rf(priv)) {
1630                 priv->tx_power_user_lmt = tx_power;
1631                 if (force && priv->cfg->ops->lib->send_tx_power)
1632                         ret = priv->cfg->ops->lib->send_tx_power(priv);
1633                 else if (!priv->cfg->ops->lib->send_tx_power)
1634                         ret = -EOPNOTSUPP;
1635                 /*
1636                  * if fail to set tx_power, restore the orig. tx power
1637                  */
1638                 if (ret)
1639                         priv->tx_power_user_lmt = prev_tx_power;
1640         }
1641
1642         /*
1643          * Even this is an async host command, the command
1644          * will always report success from uCode
1645          * So once driver can placing the command into the queue
1646          * successfully, driver can use priv->tx_power_user_lmt
1647          * to reflect the current tx power
1648          */
1649         return ret;
1650 }
1651 EXPORT_SYMBOL(iwl_set_tx_power);
1652
1653 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1654
1655 /* Free dram table */
1656 void iwl_free_isr_ict(struct iwl_priv *priv)
1657 {
1658         if (priv->ict_tbl_vir) {
1659                 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1660                                         PAGE_SIZE, priv->ict_tbl_vir,
1661                                         priv->ict_tbl_dma);
1662                 priv->ict_tbl_vir = NULL;
1663         }
1664 }
1665 EXPORT_SYMBOL(iwl_free_isr_ict);
1666
1667
1668 /* allocate dram shared table it is a PAGE_SIZE aligned
1669  * also reset all data related to ICT table interrupt.
1670  */
1671 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1672 {
1673
1674         if (priv->cfg->use_isr_legacy)
1675                 return 0;
1676         /* allocate shrared data table */
1677         priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1678                                                   ICT_COUNT) + PAGE_SIZE,
1679                                                   &priv->ict_tbl_dma);
1680         if (!priv->ict_tbl_vir)
1681                 return -ENOMEM;
1682
1683         /* align table to PAGE_SIZE boundry */
1684         priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1685
1686         IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1687                              (unsigned long long)priv->ict_tbl_dma,
1688                              (unsigned long long)priv->aligned_ict_tbl_dma,
1689                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1690
1691         priv->ict_tbl =  priv->ict_tbl_vir +
1692                           (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1693
1694         IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1695                              priv->ict_tbl, priv->ict_tbl_vir,
1696                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1697
1698         /* reset table and index to all 0 */
1699         memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1700         priv->ict_index = 0;
1701
1702         /* add periodic RX interrupt */
1703         priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1704         return 0;
1705 }
1706 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1707
1708 /* Device is going up inform it about using ICT interrupt table,
1709  * also we need to tell the driver to start using ICT interrupt.
1710  */
1711 int iwl_reset_ict(struct iwl_priv *priv)
1712 {
1713         u32 val;
1714         unsigned long flags;
1715
1716         if (!priv->ict_tbl_vir)
1717                 return 0;
1718
1719         spin_lock_irqsave(&priv->lock, flags);
1720         iwl_disable_interrupts(priv);
1721
1722         memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
1723
1724         val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1725
1726         val |= CSR_DRAM_INT_TBL_ENABLE;
1727         val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1728
1729         IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1730                         "aligned dma address %Lx\n",
1731                         val, (unsigned long long)priv->aligned_ict_tbl_dma);
1732
1733         iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1734         priv->use_ict = true;
1735         priv->ict_index = 0;
1736         iwl_write32(priv, CSR_INT, priv->inta_mask);
1737         iwl_enable_interrupts(priv);
1738         spin_unlock_irqrestore(&priv->lock, flags);
1739
1740         return 0;
1741 }
1742 EXPORT_SYMBOL(iwl_reset_ict);
1743
1744 /* Device is going down disable ict interrupt usage */
1745 void iwl_disable_ict(struct iwl_priv *priv)
1746 {
1747         unsigned long flags;
1748
1749         spin_lock_irqsave(&priv->lock, flags);
1750         priv->use_ict = false;
1751         spin_unlock_irqrestore(&priv->lock, flags);
1752 }
1753 EXPORT_SYMBOL(iwl_disable_ict);
1754
1755 /* interrupt handler using ict table, with this interrupt driver will
1756  * stop using INTA register to get device's interrupt, reading this register
1757  * is expensive, device will write interrupts in ICT dram table, increment
1758  * index then will fire interrupt to driver, driver will OR all ICT table
1759  * entries from current index up to table entry with 0 value. the result is
1760  * the interrupt we need to service, driver will set the entries back to 0 and
1761  * set index.
1762  */
1763 irqreturn_t iwl_isr_ict(int irq, void *data)
1764 {
1765         struct iwl_priv *priv = data;
1766         u32 inta, inta_mask;
1767         u32 val = 0;
1768
1769         if (!priv)
1770                 return IRQ_NONE;
1771
1772         /* dram interrupt table not set yet,
1773          * use legacy interrupt.
1774          */
1775         if (!priv->use_ict)
1776                 return iwl_isr(irq, data);
1777
1778         spin_lock(&priv->lock);
1779
1780         /* Disable (but don't clear!) interrupts here to avoid
1781          * back-to-back ISRs and sporadic interrupts from our NIC.
1782          * If we have something to service, the tasklet will re-enable ints.
1783          * If we *don't* have something, we'll re-enable before leaving here.
1784          */
1785         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1786         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1787
1788
1789         /* Ignore interrupt if there's nothing in NIC to service.
1790          * This may be due to IRQ shared with another device,
1791          * or due to sporadic interrupts thrown from our NIC. */
1792         if (!priv->ict_tbl[priv->ict_index]) {
1793                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1794                 goto none;
1795         }
1796
1797         /* read all entries that not 0 start with ict_index */
1798         while (priv->ict_tbl[priv->ict_index]) {
1799
1800                 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
1801                 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1802                                 priv->ict_index,
1803                                 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
1804                 priv->ict_tbl[priv->ict_index] = 0;
1805                 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1806                                                      ICT_COUNT);
1807
1808         }
1809
1810         /* We should not get this value, just ignore it. */
1811         if (val == 0xffffffff)
1812                 val = 0;
1813
1814         inta = (0xff & val) | ((0xff00 & val) << 16);
1815         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1816                         inta, inta_mask, val);
1817
1818         inta &= priv->inta_mask;
1819         priv->inta |= inta;
1820
1821         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1822         if (likely(inta))
1823                 tasklet_schedule(&priv->irq_tasklet);
1824         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1825                 /* Allow interrupt if was disabled by this handler and
1826                  * no tasklet was schedules, We should not enable interrupt,
1827                  * tasklet will enable it.
1828                  */
1829                 iwl_enable_interrupts(priv);
1830         }
1831
1832         spin_unlock(&priv->lock);
1833         return IRQ_HANDLED;
1834
1835  none:
1836         /* re-enable interrupts here since we don't have anything to service.
1837          * only Re-enable if disabled by irq.
1838          */
1839         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1840                 iwl_enable_interrupts(priv);
1841
1842         spin_unlock(&priv->lock);
1843         return IRQ_NONE;
1844 }
1845 EXPORT_SYMBOL(iwl_isr_ict);
1846
1847
1848 static irqreturn_t iwl_isr(int irq, void *data)
1849 {
1850         struct iwl_priv *priv = data;
1851         u32 inta, inta_mask;
1852 #ifdef CONFIG_IWLWIFI_DEBUG
1853         u32 inta_fh;
1854 #endif
1855         if (!priv)
1856                 return IRQ_NONE;
1857
1858         spin_lock(&priv->lock);
1859
1860         /* Disable (but don't clear!) interrupts here to avoid
1861          *    back-to-back ISRs and sporadic interrupts from our NIC.
1862          * If we have something to service, the tasklet will re-enable ints.
1863          * If we *don't* have something, we'll re-enable before leaving here. */
1864         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1865         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1866
1867         /* Discover which interrupts are active/pending */
1868         inta = iwl_read32(priv, CSR_INT);
1869
1870         /* Ignore interrupt if there's nothing in NIC to service.
1871          * This may be due to IRQ shared with another device,
1872          * or due to sporadic interrupts thrown from our NIC. */
1873         if (!inta) {
1874                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1875                 goto none;
1876         }
1877
1878         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1879                 /* Hardware disappeared. It might have already raised
1880                  * an interrupt */
1881                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1882                 goto unplugged;
1883         }
1884
1885 #ifdef CONFIG_IWLWIFI_DEBUG
1886         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1887                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1888                 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1889                               "fh 0x%08x\n", inta, inta_mask, inta_fh);
1890         }
1891 #endif
1892
1893         priv->inta |= inta;
1894         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1895         if (likely(inta))
1896                 tasklet_schedule(&priv->irq_tasklet);
1897         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1898                 iwl_enable_interrupts(priv);
1899
1900  unplugged:
1901         spin_unlock(&priv->lock);
1902         return IRQ_HANDLED;
1903
1904  none:
1905         /* re-enable interrupts here since we don't have anything to service. */
1906         /* only Re-enable if diabled by irq  and no schedules tasklet. */
1907         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1908                 iwl_enable_interrupts(priv);
1909
1910         spin_unlock(&priv->lock);
1911         return IRQ_NONE;
1912 }
1913
1914 irqreturn_t iwl_isr_legacy(int irq, void *data)
1915 {
1916         struct iwl_priv *priv = data;
1917         u32 inta, inta_mask;
1918         u32 inta_fh;
1919         if (!priv)
1920                 return IRQ_NONE;
1921
1922         spin_lock(&priv->lock);
1923
1924         /* Disable (but don't clear!) interrupts here to avoid
1925          *    back-to-back ISRs and sporadic interrupts from our NIC.
1926          * If we have something to service, the tasklet will re-enable ints.
1927          * If we *don't* have something, we'll re-enable before leaving here. */
1928         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1929         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1930
1931         /* Discover which interrupts are active/pending */
1932         inta = iwl_read32(priv, CSR_INT);
1933         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1934
1935         /* Ignore interrupt if there's nothing in NIC to service.
1936          * This may be due to IRQ shared with another device,
1937          * or due to sporadic interrupts thrown from our NIC. */
1938         if (!inta && !inta_fh) {
1939                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1940                 goto none;
1941         }
1942
1943         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1944                 /* Hardware disappeared. It might have already raised
1945                  * an interrupt */
1946                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1947                 goto unplugged;
1948         }
1949
1950         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1951                       inta, inta_mask, inta_fh);
1952
1953         inta &= ~CSR_INT_BIT_SCD;
1954
1955         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1956         if (likely(inta || inta_fh))
1957                 tasklet_schedule(&priv->irq_tasklet);
1958
1959  unplugged:
1960         spin_unlock(&priv->lock);
1961         return IRQ_HANDLED;
1962
1963  none:
1964         /* re-enable interrupts here since we don't have anything to service. */
1965         /* only Re-enable if diabled by irq */
1966         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1967                 iwl_enable_interrupts(priv);
1968         spin_unlock(&priv->lock);
1969         return IRQ_NONE;
1970 }
1971 EXPORT_SYMBOL(iwl_isr_legacy);
1972
1973 int iwl_send_bt_config(struct iwl_priv *priv)
1974 {
1975         struct iwl_bt_cmd bt_cmd = {
1976                 .flags = BT_COEX_MODE_4W,
1977                 .lead_time = BT_LEAD_TIME_DEF,
1978                 .max_kill = BT_MAX_KILL_DEF,
1979                 .kill_ack_mask = 0,
1980                 .kill_cts_mask = 0,
1981         };
1982
1983         return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1984                                 sizeof(struct iwl_bt_cmd), &bt_cmd);
1985 }
1986 EXPORT_SYMBOL(iwl_send_bt_config);
1987
1988 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
1989 {
1990         u32 stat_flags = 0;
1991         struct iwl_host_cmd cmd = {
1992                 .id = REPLY_STATISTICS_CMD,
1993                 .flags = flags,
1994                 .len = sizeof(stat_flags),
1995                 .data = (u8 *) &stat_flags,
1996         };
1997         return iwl_send_cmd(priv, &cmd);
1998 }
1999 EXPORT_SYMBOL(iwl_send_statistics_request);
2000
2001 /**
2002  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2003  *   using sample data 100 bytes apart.  If these sample points are good,
2004  *   it's a pretty good bet that everything between them is good, too.
2005  */
2006 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2007 {
2008         u32 val;
2009         int ret = 0;
2010         u32 errcnt = 0;
2011         u32 i;
2012
2013         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2014
2015         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2016                 /* read data comes through single port, auto-incr addr */
2017                 /* NOTE: Use the debugless read so we don't flood kernel log
2018                  * if IWL_DL_IO is set */
2019                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2020                         i + IWL49_RTC_INST_LOWER_BOUND);
2021                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2022                 if (val != le32_to_cpu(*image)) {
2023                         ret = -EIO;
2024                         errcnt++;
2025                         if (errcnt >= 3)
2026                                 break;
2027                 }
2028         }
2029
2030         return ret;
2031 }
2032
2033 /**
2034  * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2035  *     looking at all data.
2036  */
2037 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2038                                  u32 len)
2039 {
2040         u32 val;
2041         u32 save_len = len;
2042         int ret = 0;
2043         u32 errcnt;
2044
2045         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2046
2047         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2048                            IWL49_RTC_INST_LOWER_BOUND);
2049
2050         errcnt = 0;
2051         for (; len > 0; len -= sizeof(u32), image++) {
2052                 /* read data comes through single port, auto-incr addr */
2053                 /* NOTE: Use the debugless read so we don't flood kernel log
2054                  * if IWL_DL_IO is set */
2055                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2056                 if (val != le32_to_cpu(*image)) {
2057                         IWL_ERR(priv, "uCode INST section is invalid at "
2058                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2059                                   save_len - len, val, le32_to_cpu(*image));
2060                         ret = -EIO;
2061                         errcnt++;
2062                         if (errcnt >= 20)
2063                                 break;
2064                 }
2065         }
2066
2067         if (!errcnt)
2068                 IWL_DEBUG_INFO(priv,
2069                     "ucode image in INSTRUCTION memory is good\n");
2070
2071         return ret;
2072 }
2073
2074 /**
2075  * iwl_verify_ucode - determine which instruction image is in SRAM,
2076  *    and verify its contents
2077  */
2078 int iwl_verify_ucode(struct iwl_priv *priv)
2079 {
2080         __le32 *image;
2081         u32 len;
2082         int ret;
2083
2084         /* Try bootstrap */
2085         image = (__le32 *)priv->ucode_boot.v_addr;
2086         len = priv->ucode_boot.len;
2087         ret = iwlcore_verify_inst_sparse(priv, image, len);
2088         if (!ret) {
2089                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2090                 return 0;
2091         }
2092
2093         /* Try initialize */
2094         image = (__le32 *)priv->ucode_init.v_addr;
2095         len = priv->ucode_init.len;
2096         ret = iwlcore_verify_inst_sparse(priv, image, len);
2097         if (!ret) {
2098                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2099                 return 0;
2100         }
2101
2102         /* Try runtime/protocol */
2103         image = (__le32 *)priv->ucode_code.v_addr;
2104         len = priv->ucode_code.len;
2105         ret = iwlcore_verify_inst_sparse(priv, image, len);
2106         if (!ret) {
2107                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2108                 return 0;
2109         }
2110
2111         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2112
2113         /* Since nothing seems to match, show first several data entries in
2114          * instruction SRAM, so maybe visual inspection will give a clue.
2115          * Selection of bootstrap image (vs. other images) is arbitrary. */
2116         image = (__le32 *)priv->ucode_boot.v_addr;
2117         len = priv->ucode_boot.len;
2118         ret = iwl_verify_inst_full(priv, image, len);
2119
2120         return ret;
2121 }
2122 EXPORT_SYMBOL(iwl_verify_ucode);
2123
2124
2125 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2126 {
2127         struct iwl_ct_kill_config cmd;
2128         struct iwl_ct_kill_throttling_config adv_cmd;
2129         unsigned long flags;
2130         int ret = 0;
2131
2132         spin_lock_irqsave(&priv->lock, flags);
2133         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2134                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2135         spin_unlock_irqrestore(&priv->lock, flags);
2136         priv->thermal_throttle.ct_kill_toggle = false;
2137
2138         if (priv->cfg->support_ct_kill_exit) {
2139                 adv_cmd.critical_temperature_enter =
2140                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2141                 adv_cmd.critical_temperature_exit =
2142                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2143
2144                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2145                                        sizeof(adv_cmd), &adv_cmd);
2146                 if (ret)
2147                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2148                 else
2149                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2150                                         "succeeded, "
2151                                         "critical temperature enter is %d,"
2152                                         "exit is %d\n",
2153                                        priv->hw_params.ct_kill_threshold,
2154                                        priv->hw_params.ct_kill_exit_threshold);
2155         } else {
2156                 cmd.critical_temperature_R =
2157                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2158
2159                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2160                                        sizeof(cmd), &cmd);
2161                 if (ret)
2162                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2163                 else
2164                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2165                                         "succeeded, "
2166                                         "critical temperature is %d\n",
2167                                         priv->hw_params.ct_kill_threshold);
2168         }
2169 }
2170 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2171
2172
2173 /*
2174  * CARD_STATE_CMD
2175  *
2176  * Use: Sets the device's internal card state to enable, disable, or halt
2177  *
2178  * When in the 'enable' state the card operates as normal.
2179  * When in the 'disable' state, the card enters into a low power mode.
2180  * When in the 'halt' state, the card is shut down and must be fully
2181  * restarted to come back on.
2182  */
2183 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2184 {
2185         struct iwl_host_cmd cmd = {
2186                 .id = REPLY_CARD_STATE_CMD,
2187                 .len = sizeof(u32),
2188                 .data = &flags,
2189                 .flags = meta_flag,
2190         };
2191
2192         return iwl_send_cmd(priv, &cmd);
2193 }
2194
2195 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2196                            struct iwl_rx_mem_buffer *rxb)
2197 {
2198 #ifdef CONFIG_IWLWIFI_DEBUG
2199         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2200         struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2201         IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2202                      sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2203 #endif
2204 }
2205 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2206
2207 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2208                                       struct iwl_rx_mem_buffer *rxb)
2209 {
2210         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2211         u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2212         IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2213                         "notification for %s:\n", len,
2214                         get_cmd_string(pkt->hdr.cmd));
2215         iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
2216 }
2217 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2218
2219 void iwl_rx_reply_error(struct iwl_priv *priv,
2220                         struct iwl_rx_mem_buffer *rxb)
2221 {
2222         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2223
2224         IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2225                 "seq 0x%04X ser 0x%08X\n",
2226                 le32_to_cpu(pkt->u.err_resp.error_type),
2227                 get_cmd_string(pkt->u.err_resp.cmd_id),
2228                 pkt->u.err_resp.cmd_id,
2229                 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2230                 le32_to_cpu(pkt->u.err_resp.error_info));
2231 }
2232 EXPORT_SYMBOL(iwl_rx_reply_error);
2233
2234 void iwl_clear_isr_stats(struct iwl_priv *priv)
2235 {
2236         memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2237 }
2238
2239 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2240                            const struct ieee80211_tx_queue_params *params)
2241 {
2242         struct iwl_priv *priv = hw->priv;
2243         unsigned long flags;
2244         int q;
2245
2246         IWL_DEBUG_MAC80211(priv, "enter\n");
2247
2248         if (!iwl_is_ready_rf(priv)) {
2249                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2250                 return -EIO;
2251         }
2252
2253         if (queue >= AC_NUM) {
2254                 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2255                 return 0;
2256         }
2257
2258         q = AC_NUM - 1 - queue;
2259
2260         spin_lock_irqsave(&priv->lock, flags);
2261
2262         priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2263         priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2264         priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2265         priv->qos_data.def_qos_parm.ac[q].edca_txop =
2266                         cpu_to_le16((params->txop * 32));
2267
2268         priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2269         priv->qos_data.qos_active = 1;
2270
2271         if (priv->iw_mode == NL80211_IFTYPE_AP)
2272                 iwl_activate_qos(priv, 1);
2273         else if (priv->assoc_id && iwl_is_associated(priv))
2274                 iwl_activate_qos(priv, 0);
2275
2276         spin_unlock_irqrestore(&priv->lock, flags);
2277
2278         IWL_DEBUG_MAC80211(priv, "leave\n");
2279         return 0;
2280 }
2281 EXPORT_SYMBOL(iwl_mac_conf_tx);
2282
2283 static void iwl_ht_conf(struct iwl_priv *priv,
2284                         struct ieee80211_bss_conf *bss_conf)
2285 {
2286         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2287         struct ieee80211_sta *sta;
2288
2289         IWL_DEBUG_MAC80211(priv, "enter: \n");
2290
2291         if (!ht_conf->is_ht)
2292                 return;
2293
2294         ht_conf->ht_protection =
2295                 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2296         ht_conf->non_GF_STA_present =
2297                 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2298
2299         ht_conf->single_chain_sufficient = false;
2300
2301         switch (priv->iw_mode) {
2302         case NL80211_IFTYPE_STATION:
2303                 rcu_read_lock();
2304                 sta = ieee80211_find_sta(priv->vif, priv->bssid);
2305                 if (sta) {
2306                         struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2307                         int maxstreams;
2308
2309                         maxstreams = (ht_cap->mcs.tx_params &
2310                                       IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2311                                         >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2312                         maxstreams += 1;
2313
2314                         ht_conf->sm_ps =
2315                                 (u8)((ht_cap->cap & IEEE80211_HT_CAP_SM_PS)
2316                                 >> 2);
2317                         IWL_DEBUG_MAC80211(priv, "sm_ps: 0x%x\n",
2318                                 ht_conf->sm_ps);
2319
2320                         if ((ht_cap->mcs.rx_mask[1] == 0) &&
2321                             (ht_cap->mcs.rx_mask[2] == 0))
2322                                 ht_conf->single_chain_sufficient = true;
2323                         if (maxstreams <= 1)
2324                                 ht_conf->single_chain_sufficient = true;
2325                 } else {
2326                         /*
2327                          * If at all, this can only happen through a race
2328                          * when the AP disconnects us while we're still
2329                          * setting up the connection, in that case mac80211
2330                          * will soon tell us about that.
2331                          */
2332                         ht_conf->single_chain_sufficient = true;
2333                 }
2334                 rcu_read_unlock();
2335                 break;
2336         case NL80211_IFTYPE_ADHOC:
2337                 ht_conf->single_chain_sufficient = true;
2338                 break;
2339         default:
2340                 break;
2341         }
2342
2343         IWL_DEBUG_MAC80211(priv, "leave\n");
2344 }
2345
2346 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2347 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2348                           struct ieee80211_vif *vif,
2349                           struct ieee80211_bss_conf *bss_conf,
2350                           u32 changes)
2351 {
2352         struct iwl_priv *priv = hw->priv;
2353         int ret;
2354
2355         IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2356
2357         if (!iwl_is_alive(priv))
2358                 return;
2359
2360         mutex_lock(&priv->mutex);
2361
2362         if (changes & BSS_CHANGED_BEACON &&
2363             priv->iw_mode == NL80211_IFTYPE_AP) {
2364                 dev_kfree_skb(priv->ibss_beacon);
2365                 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2366         }
2367
2368         if (changes & BSS_CHANGED_BEACON_INT) {
2369                 priv->beacon_int = bss_conf->beacon_int;
2370                 /* TODO: in AP mode, do something to make this take effect */
2371         }
2372
2373         if (changes & BSS_CHANGED_BSSID) {
2374                 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2375
2376                 /*
2377                  * If there is currently a HW scan going on in the
2378                  * background then we need to cancel it else the RXON
2379                  * below/in post_associate will fail.
2380                  */
2381                 if (iwl_scan_cancel_timeout(priv, 100)) {
2382                         IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2383                         IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2384                         mutex_unlock(&priv->mutex);
2385                         return;
2386                 }
2387
2388                 /* mac80211 only sets assoc when in STATION mode */
2389                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2390                     bss_conf->assoc) {
2391                         memcpy(priv->staging_rxon.bssid_addr,
2392                                bss_conf->bssid, ETH_ALEN);
2393
2394                         /* currently needed in a few places */
2395                         memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2396                 } else {
2397                         priv->staging_rxon.filter_flags &=
2398                                 ~RXON_FILTER_ASSOC_MSK;
2399                 }
2400
2401         }
2402
2403         /*
2404          * This needs to be after setting the BSSID in case
2405          * mac80211 decides to do both changes at once because
2406          * it will invoke post_associate.
2407          */
2408         if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2409             changes & BSS_CHANGED_BEACON) {
2410                 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2411
2412                 if (beacon)
2413                         iwl_mac_beacon_update(hw, beacon);
2414         }
2415
2416         if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2417                 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2418                                    bss_conf->use_short_preamble);
2419                 if (bss_conf->use_short_preamble)
2420                         priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2421                 else
2422                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2423         }
2424
2425         if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2426                 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2427                 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2428                         priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2429                 else
2430                         priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2431         }
2432
2433         if (changes & BSS_CHANGED_BASIC_RATES) {
2434                 /* XXX use this information
2435                  *
2436                  * To do that, remove code from iwl_set_rate() and put something
2437                  * like this here:
2438                  *
2439                 if (A-band)
2440                         priv->staging_rxon.ofdm_basic_rates =
2441                                 bss_conf->basic_rates;
2442                 else
2443                         priv->staging_rxon.ofdm_basic_rates =
2444                                 bss_conf->basic_rates >> 4;
2445                         priv->staging_rxon.cck_basic_rates =
2446                                 bss_conf->basic_rates & 0xF;
2447                  */
2448         }
2449
2450         if (changes & BSS_CHANGED_HT) {
2451                 iwl_ht_conf(priv, bss_conf);
2452
2453                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2454                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2455         }
2456
2457         if (changes & BSS_CHANGED_ASSOC) {
2458                 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2459                 if (bss_conf->assoc) {
2460                         priv->assoc_id = bss_conf->aid;
2461                         priv->beacon_int = bss_conf->beacon_int;
2462                         priv->timestamp = bss_conf->timestamp;
2463                         priv->assoc_capability = bss_conf->assoc_capability;
2464
2465                         iwl_led_associate(priv);
2466
2467                         /*
2468                          * We have just associated, don't start scan too early
2469                          * leave time for EAPOL exchange to complete.
2470                          *
2471                          * XXX: do this in mac80211
2472                          */
2473                         priv->next_scan_jiffies = jiffies +
2474                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2475                         if (!iwl_is_rfkill(priv))
2476                                 priv->cfg->ops->lib->post_associate(priv);
2477                 } else {
2478                         priv->assoc_id = 0;
2479                         iwl_led_disassociate(priv);
2480                 }
2481         }
2482
2483         if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2484                 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2485                                    changes);
2486                 ret = iwl_send_rxon_assoc(priv);
2487                 if (!ret) {
2488                         /* Sync active_rxon with latest change. */
2489                         memcpy((void *)&priv->active_rxon,
2490                                 &priv->staging_rxon,
2491                                 sizeof(struct iwl_rxon_cmd));
2492                 }
2493         }
2494
2495         mutex_unlock(&priv->mutex);
2496
2497         IWL_DEBUG_MAC80211(priv, "leave\n");
2498 }
2499 EXPORT_SYMBOL(iwl_bss_info_changed);
2500
2501 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2502 {
2503         struct iwl_priv *priv = hw->priv;
2504         unsigned long flags;
2505         __le64 timestamp;
2506
2507         IWL_DEBUG_MAC80211(priv, "enter\n");
2508
2509         if (!iwl_is_ready_rf(priv)) {
2510                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2511                 return -EIO;
2512         }
2513
2514         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2515                 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2516                 return -EIO;
2517         }
2518
2519         spin_lock_irqsave(&priv->lock, flags);
2520
2521         if (priv->ibss_beacon)
2522                 dev_kfree_skb(priv->ibss_beacon);
2523
2524         priv->ibss_beacon = skb;
2525
2526         priv->assoc_id = 0;
2527         timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2528         priv->timestamp = le64_to_cpu(timestamp);
2529
2530         IWL_DEBUG_MAC80211(priv, "leave\n");
2531         spin_unlock_irqrestore(&priv->lock, flags);
2532
2533         iwl_reset_qos(priv);
2534
2535         priv->cfg->ops->lib->post_associate(priv);
2536
2537
2538         return 0;
2539 }
2540 EXPORT_SYMBOL(iwl_mac_beacon_update);
2541
2542 int iwl_set_mode(struct iwl_priv *priv, int mode)
2543 {
2544         if (mode == NL80211_IFTYPE_ADHOC) {
2545                 const struct iwl_channel_info *ch_info;
2546
2547                 ch_info = iwl_get_channel_info(priv,
2548                         priv->band,
2549                         le16_to_cpu(priv->staging_rxon.channel));
2550
2551                 if (!ch_info || !is_channel_ibss(ch_info)) {
2552                         IWL_ERR(priv, "channel %d not IBSS channel\n",
2553                                   le16_to_cpu(priv->staging_rxon.channel));
2554                         return -EINVAL;
2555                 }
2556         }
2557
2558         iwl_connection_init_rx_config(priv, mode);
2559
2560         if (priv->cfg->ops->hcmd->set_rxon_chain)
2561                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2562
2563         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2564
2565         iwl_clear_stations_table(priv);
2566
2567         /* dont commit rxon if rf-kill is on*/
2568         if (!iwl_is_ready_rf(priv))
2569                 return -EAGAIN;
2570
2571         iwlcore_commit_rxon(priv);
2572
2573         return 0;
2574 }
2575 EXPORT_SYMBOL(iwl_set_mode);
2576
2577 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2578                                  struct ieee80211_if_init_conf *conf)
2579 {
2580         struct iwl_priv *priv = hw->priv;
2581         unsigned long flags;
2582
2583         IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2584
2585         if (priv->vif) {
2586                 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2587                 return -EOPNOTSUPP;
2588         }
2589
2590         spin_lock_irqsave(&priv->lock, flags);
2591         priv->vif = conf->vif;
2592         priv->iw_mode = conf->type;
2593
2594         spin_unlock_irqrestore(&priv->lock, flags);
2595
2596         mutex_lock(&priv->mutex);
2597
2598         if (conf->mac_addr) {
2599                 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2600                 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2601         }
2602
2603         if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2604                 /* we are not ready, will run again when ready */
2605                 set_bit(STATUS_MODE_PENDING, &priv->status);
2606
2607         mutex_unlock(&priv->mutex);
2608
2609         IWL_DEBUG_MAC80211(priv, "leave\n");
2610         return 0;
2611 }
2612 EXPORT_SYMBOL(iwl_mac_add_interface);
2613
2614 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2615                                      struct ieee80211_if_init_conf *conf)
2616 {
2617         struct iwl_priv *priv = hw->priv;
2618
2619         IWL_DEBUG_MAC80211(priv, "enter\n");
2620
2621         mutex_lock(&priv->mutex);
2622
2623         if (iwl_is_ready_rf(priv)) {
2624                 iwl_scan_cancel_timeout(priv, 100);
2625                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2626                 iwlcore_commit_rxon(priv);
2627         }
2628         if (priv->vif == conf->vif) {
2629                 priv->vif = NULL;
2630                 memset(priv->bssid, 0, ETH_ALEN);
2631         }
2632         mutex_unlock(&priv->mutex);
2633
2634         IWL_DEBUG_MAC80211(priv, "leave\n");
2635
2636 }
2637 EXPORT_SYMBOL(iwl_mac_remove_interface);
2638
2639 /**
2640  * iwl_mac_config - mac80211 config callback
2641  *
2642  * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2643  * be set inappropriately and the driver currently sets the hardware up to
2644  * use it whenever needed.
2645  */
2646 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2647 {
2648         struct iwl_priv *priv = hw->priv;
2649         const struct iwl_channel_info *ch_info;
2650         struct ieee80211_conf *conf = &hw->conf;
2651         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2652         unsigned long flags = 0;
2653         int ret = 0;
2654         u16 ch;
2655         int scan_active = 0;
2656
2657         mutex_lock(&priv->mutex);
2658
2659         IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2660                                         conf->channel->hw_value, changed);
2661
2662         if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2663                         test_bit(STATUS_SCANNING, &priv->status))) {
2664                 scan_active = 1;
2665                 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2666         }
2667
2668
2669         /* during scanning mac80211 will delay channel setting until
2670          * scan finish with changed = 0
2671          */
2672         if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2673                 if (scan_active)
2674                         goto set_ch_out;
2675
2676                 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2677                 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2678                 if (!is_channel_valid(ch_info)) {
2679                         IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2680                         ret = -EINVAL;
2681                         goto set_ch_out;
2682                 }
2683
2684                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2685                         !is_channel_ibss(ch_info)) {
2686                         IWL_ERR(priv, "channel %d in band %d not "
2687                                 "IBSS channel\n",
2688                                 conf->channel->hw_value, conf->channel->band);
2689                         ret = -EINVAL;
2690                         goto set_ch_out;
2691                 }
2692
2693                 if (iwl_is_associated(priv) &&
2694                     (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2695                     priv->cfg->ops->lib->set_channel_switch) {
2696                         ret = priv->cfg->ops->lib->set_channel_switch(priv,
2697                                 ch);
2698                         goto out;
2699                 }
2700
2701                 spin_lock_irqsave(&priv->lock, flags);
2702
2703                 /* Configure HT40 channels */
2704                 ht_conf->is_ht = conf_is_ht(conf);
2705                 if (ht_conf->is_ht) {
2706                         if (conf_is_ht40_minus(conf)) {
2707                                 ht_conf->extension_chan_offset =
2708                                         IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2709                                 ht_conf->is_40mhz = true;
2710                         } else if (conf_is_ht40_plus(conf)) {
2711                                 ht_conf->extension_chan_offset =
2712                                         IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2713                                 ht_conf->is_40mhz = true;
2714                         } else {
2715                                 ht_conf->extension_chan_offset =
2716                                         IEEE80211_HT_PARAM_CHA_SEC_NONE;
2717                                 ht_conf->is_40mhz = false;
2718                         }
2719                 } else
2720                         ht_conf->is_40mhz = false;
2721                 /* Default to no protection. Protection mode will later be set
2722                  * from BSS config in iwl_ht_conf */
2723                 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2724
2725                 /* if we are switching from ht to 2.4 clear flags
2726                  * from any ht related info since 2.4 does not
2727                  * support ht */
2728                 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2729                         priv->staging_rxon.flags = 0;
2730
2731                 iwl_set_rxon_channel(priv, conf->channel);
2732
2733                 iwl_set_flags_for_band(priv, conf->channel->band);
2734                 spin_unlock_irqrestore(&priv->lock, flags);
2735  set_ch_out:
2736                 /* The list of supported rates and rate mask can be different
2737                  * for each band; since the band may have changed, reset
2738                  * the rate mask to what mac80211 lists */
2739                 iwl_set_rate(priv);
2740         }
2741
2742         if (changed & (IEEE80211_CONF_CHANGE_PS |
2743                         IEEE80211_CONF_CHANGE_IDLE)) {
2744                 ret = iwl_power_update_mode(priv, false);
2745                 if (ret)
2746                         IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2747         }
2748
2749         if (changed & IEEE80211_CONF_CHANGE_POWER) {
2750                 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2751                         priv->tx_power_user_lmt, conf->power_level);
2752
2753                 iwl_set_tx_power(priv, conf->power_level, false);
2754         }
2755
2756         /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2757         if (priv->cfg->ops->hcmd->set_rxon_chain)
2758                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2759
2760         if (!iwl_is_ready(priv)) {
2761                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2762                 goto out;
2763         }
2764
2765         if (scan_active)
2766                 goto out;
2767
2768         if (memcmp(&priv->active_rxon,
2769                    &priv->staging_rxon, sizeof(priv->staging_rxon)))
2770                 iwlcore_commit_rxon(priv);
2771         else
2772                 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2773
2774
2775 out:
2776         IWL_DEBUG_MAC80211(priv, "leave\n");
2777         mutex_unlock(&priv->mutex);
2778         return ret;
2779 }
2780 EXPORT_SYMBOL(iwl_mac_config);
2781
2782 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2783                          struct ieee80211_tx_queue_stats *stats)
2784 {
2785         struct iwl_priv *priv = hw->priv;
2786         int i, avail;
2787         struct iwl_tx_queue *txq;
2788         struct iwl_queue *q;
2789         unsigned long flags;
2790
2791         IWL_DEBUG_MAC80211(priv, "enter\n");
2792
2793         if (!iwl_is_ready_rf(priv)) {
2794                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2795                 return -EIO;
2796         }
2797
2798         spin_lock_irqsave(&priv->lock, flags);
2799
2800         for (i = 0; i < AC_NUM; i++) {
2801                 txq = &priv->txq[i];
2802                 q = &txq->q;
2803                 avail = iwl_queue_space(q);
2804
2805                 stats[i].len = q->n_window - avail;
2806                 stats[i].limit = q->n_window - q->high_mark;
2807                 stats[i].count = q->n_window;
2808
2809         }
2810         spin_unlock_irqrestore(&priv->lock, flags);
2811
2812         IWL_DEBUG_MAC80211(priv, "leave\n");
2813
2814         return 0;
2815 }
2816 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2817
2818 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2819 {
2820         struct iwl_priv *priv = hw->priv;
2821         unsigned long flags;
2822
2823         mutex_lock(&priv->mutex);
2824         IWL_DEBUG_MAC80211(priv, "enter\n");
2825
2826         spin_lock_irqsave(&priv->lock, flags);
2827         memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2828         spin_unlock_irqrestore(&priv->lock, flags);
2829
2830         iwl_reset_qos(priv);
2831
2832         spin_lock_irqsave(&priv->lock, flags);
2833         priv->assoc_id = 0;
2834         priv->assoc_capability = 0;
2835         priv->assoc_station_added = 0;
2836
2837         /* new association get rid of ibss beacon skb */
2838         if (priv->ibss_beacon)
2839                 dev_kfree_skb(priv->ibss_beacon);
2840
2841         priv->ibss_beacon = NULL;
2842
2843         priv->beacon_int = priv->vif->bss_conf.beacon_int;
2844         priv->timestamp = 0;
2845         if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2846                 priv->beacon_int = 0;
2847
2848         spin_unlock_irqrestore(&priv->lock, flags);
2849
2850         if (!iwl_is_ready_rf(priv)) {
2851                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2852                 mutex_unlock(&priv->mutex);
2853                 return;
2854         }
2855
2856         /* we are restarting association process
2857          * clear RXON_FILTER_ASSOC_MSK bit
2858          */
2859         if (priv->iw_mode != NL80211_IFTYPE_AP) {
2860                 iwl_scan_cancel_timeout(priv, 100);
2861                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2862                 iwlcore_commit_rxon(priv);
2863         }
2864
2865         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2866                 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2867                 mutex_unlock(&priv->mutex);
2868                 return;
2869         }
2870
2871         iwl_set_rate(priv);
2872
2873         mutex_unlock(&priv->mutex);
2874
2875         IWL_DEBUG_MAC80211(priv, "leave\n");
2876 }
2877 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2878
2879 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2880 {
2881         if (!priv->txq)
2882                 priv->txq = kzalloc(
2883                         sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2884                         GFP_KERNEL);
2885         if (!priv->txq) {
2886                 IWL_ERR(priv, "Not enough memory for txq \n");
2887                 return -ENOMEM;
2888         }
2889         return 0;
2890 }
2891 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2892
2893 void iwl_free_txq_mem(struct iwl_priv *priv)
2894 {
2895         kfree(priv->txq);
2896         priv->txq = NULL;
2897 }
2898 EXPORT_SYMBOL(iwl_free_txq_mem);
2899
2900 int iwl_send_wimax_coex(struct iwl_priv *priv)
2901 {
2902         struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2903
2904         if (priv->cfg->support_wimax_coexist) {
2905                 /* UnMask wake up src at associated sleep */
2906                 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2907
2908                 /* UnMask wake up src at unassociated sleep */
2909                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2910                 memcpy(coex_cmd.sta_prio, cu_priorities,
2911                         sizeof(struct iwl_wimax_coex_event_entry) *
2912                          COEX_NUM_OF_EVENTS);
2913
2914                 /* enabling the coexistence feature */
2915                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2916
2917                 /* enabling the priorities tables */
2918                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2919         } else {
2920                 /* coexistence is disabled */
2921                 memset(&coex_cmd, 0, sizeof(coex_cmd));
2922         }
2923         return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2924                                 sizeof(coex_cmd), &coex_cmd);
2925 }
2926 EXPORT_SYMBOL(iwl_send_wimax_coex);
2927
2928 #ifdef CONFIG_IWLWIFI_DEBUGFS
2929
2930 #define IWL_TRAFFIC_DUMP_SIZE   (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2931
2932 void iwl_reset_traffic_log(struct iwl_priv *priv)
2933 {
2934         priv->tx_traffic_idx = 0;
2935         priv->rx_traffic_idx = 0;
2936         if (priv->tx_traffic)
2937                 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2938         if (priv->rx_traffic)
2939                 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2940 }
2941
2942 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2943 {
2944         u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2945
2946         if (iwl_debug_level & IWL_DL_TX) {
2947                 if (!priv->tx_traffic) {
2948                         priv->tx_traffic =
2949                                 kzalloc(traffic_size, GFP_KERNEL);
2950                         if (!priv->tx_traffic)
2951                                 return -ENOMEM;
2952                 }
2953         }
2954         if (iwl_debug_level & IWL_DL_RX) {
2955                 if (!priv->rx_traffic) {
2956                         priv->rx_traffic =
2957                                 kzalloc(traffic_size, GFP_KERNEL);
2958                         if (!priv->rx_traffic)
2959                                 return -ENOMEM;
2960                 }
2961         }
2962         iwl_reset_traffic_log(priv);
2963         return 0;
2964 }
2965 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2966
2967 void iwl_free_traffic_mem(struct iwl_priv *priv)
2968 {
2969         kfree(priv->tx_traffic);
2970         priv->tx_traffic = NULL;
2971
2972         kfree(priv->rx_traffic);
2973         priv->rx_traffic = NULL;
2974 }
2975 EXPORT_SYMBOL(iwl_free_traffic_mem);
2976
2977 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2978                       u16 length, struct ieee80211_hdr *header)
2979 {
2980         __le16 fc;
2981         u16 len;
2982
2983         if (likely(!(iwl_debug_level & IWL_DL_TX)))
2984                 return;
2985
2986         if (!priv->tx_traffic)
2987                 return;
2988
2989         fc = header->frame_control;
2990         if (ieee80211_is_data(fc)) {
2991                 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2992                        ? IWL_TRAFFIC_ENTRY_SIZE : length;
2993                 memcpy((priv->tx_traffic +
2994                        (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2995                        header, len);
2996                 priv->tx_traffic_idx =
2997                         (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2998         }
2999 }
3000 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3001
3002 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3003                       u16 length, struct ieee80211_hdr *header)
3004 {
3005         __le16 fc;
3006         u16 len;
3007
3008         if (likely(!(iwl_debug_level & IWL_DL_RX)))
3009                 return;
3010
3011         if (!priv->rx_traffic)
3012                 return;
3013
3014         fc = header->frame_control;
3015         if (ieee80211_is_data(fc)) {
3016                 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3017                        ? IWL_TRAFFIC_ENTRY_SIZE : length;
3018                 memcpy((priv->rx_traffic +
3019                        (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3020                        header, len);
3021                 priv->rx_traffic_idx =
3022                         (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3023         }
3024 }
3025 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
3026
3027 const char *get_mgmt_string(int cmd)
3028 {
3029         switch (cmd) {
3030                 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3031                 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3032                 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3033                 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3034                 IWL_CMD(MANAGEMENT_PROBE_REQ);
3035                 IWL_CMD(MANAGEMENT_PROBE_RESP);
3036                 IWL_CMD(MANAGEMENT_BEACON);
3037                 IWL_CMD(MANAGEMENT_ATIM);
3038                 IWL_CMD(MANAGEMENT_DISASSOC);
3039                 IWL_CMD(MANAGEMENT_AUTH);
3040                 IWL_CMD(MANAGEMENT_DEAUTH);
3041                 IWL_CMD(MANAGEMENT_ACTION);
3042         default:
3043                 return "UNKNOWN";
3044
3045         }
3046 }
3047
3048 const char *get_ctrl_string(int cmd)
3049 {
3050         switch (cmd) {
3051                 IWL_CMD(CONTROL_BACK_REQ);
3052                 IWL_CMD(CONTROL_BACK);
3053                 IWL_CMD(CONTROL_PSPOLL);
3054                 IWL_CMD(CONTROL_RTS);
3055                 IWL_CMD(CONTROL_CTS);
3056                 IWL_CMD(CONTROL_ACK);
3057                 IWL_CMD(CONTROL_CFEND);
3058                 IWL_CMD(CONTROL_CFENDACK);
3059         default:
3060                 return "UNKNOWN";
3061
3062         }
3063 }
3064
3065 void iwl_clear_tx_stats(struct iwl_priv *priv)
3066 {
3067         memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3068
3069 }
3070
3071 void iwl_clear_rx_stats(struct iwl_priv *priv)
3072 {
3073         memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3074 }
3075
3076 /*
3077  * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3078  * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3079  * Use debugFs to display the rx/rx_statistics
3080  * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3081  * information will be recorded, but DATA pkt still will be recorded
3082  * for the reason of iwl_led.c need to control the led blinking based on
3083  * number of tx and rx data.
3084  *
3085  */
3086 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3087 {
3088         struct traffic_stats    *stats;
3089
3090         if (is_tx)
3091                 stats = &priv->tx_stats;
3092         else
3093                 stats = &priv->rx_stats;
3094
3095         if (ieee80211_is_mgmt(fc)) {
3096                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3097                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3098                         stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3099                         break;
3100                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3101                         stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3102                         break;
3103                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3104                         stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3105                         break;
3106                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3107                         stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3108                         break;
3109                 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3110                         stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3111                         break;
3112                 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3113                         stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3114                         break;
3115                 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3116                         stats->mgmt[MANAGEMENT_BEACON]++;
3117                         break;
3118                 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3119                         stats->mgmt[MANAGEMENT_ATIM]++;
3120                         break;
3121                 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3122                         stats->mgmt[MANAGEMENT_DISASSOC]++;
3123                         break;
3124                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3125                         stats->mgmt[MANAGEMENT_AUTH]++;
3126                         break;
3127                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3128                         stats->mgmt[MANAGEMENT_DEAUTH]++;
3129                         break;
3130                 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3131                         stats->mgmt[MANAGEMENT_ACTION]++;
3132                         break;
3133                 }
3134         } else if (ieee80211_is_ctl(fc)) {
3135                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3136                 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3137                         stats->ctrl[CONTROL_BACK_REQ]++;
3138                         break;
3139                 case cpu_to_le16(IEEE80211_STYPE_BACK):
3140                         stats->ctrl[CONTROL_BACK]++;
3141                         break;
3142                 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3143                         stats->ctrl[CONTROL_PSPOLL]++;
3144                         break;
3145                 case cpu_to_le16(IEEE80211_STYPE_RTS):
3146                         stats->ctrl[CONTROL_RTS]++;
3147                         break;
3148                 case cpu_to_le16(IEEE80211_STYPE_CTS):
3149                         stats->ctrl[CONTROL_CTS]++;
3150                         break;
3151                 case cpu_to_le16(IEEE80211_STYPE_ACK):
3152                         stats->ctrl[CONTROL_ACK]++;
3153                         break;
3154                 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3155                         stats->ctrl[CONTROL_CFEND]++;
3156                         break;
3157                 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3158                         stats->ctrl[CONTROL_CFENDACK]++;
3159                         break;
3160                 }
3161         } else {
3162                 /* data */
3163                 stats->data_cnt++;
3164                 stats->data_bytes += len;
3165         }
3166 }
3167 EXPORT_SYMBOL(iwl_update_stats);
3168 #endif
3169
3170 #ifdef CONFIG_PM
3171
3172 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3173 {
3174         struct iwl_priv *priv = pci_get_drvdata(pdev);
3175
3176         /*
3177          * This function is called when system goes into suspend state
3178          * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3179          * first but since iwl_mac_stop() has no knowledge of who the caller is,
3180          * it will not call apm_ops.stop() to stop the DMA operation.
3181          * Calling apm_ops.stop here to make sure we stop the DMA.
3182          */
3183         priv->cfg->ops->lib->apm_ops.stop(priv);
3184
3185         pci_save_state(pdev);
3186         pci_disable_device(pdev);
3187         pci_set_power_state(pdev, PCI_D3hot);
3188
3189         return 0;
3190 }
3191 EXPORT_SYMBOL(iwl_pci_suspend);
3192
3193 int iwl_pci_resume(struct pci_dev *pdev)
3194 {
3195         struct iwl_priv *priv = pci_get_drvdata(pdev);
3196         int ret;
3197
3198         pci_set_power_state(pdev, PCI_D0);
3199         ret = pci_enable_device(pdev);
3200         if (ret)
3201                 return ret;
3202         pci_restore_state(pdev);
3203         iwl_enable_interrupts(priv);
3204
3205         return 0;
3206 }
3207 EXPORT_SYMBOL(iwl_pci_resume);
3208
3209 #endif /* CONFIG_PM */