iwlwifi: add channel switch support to 5000 series and up
[safe/jmp/linux-2.6] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2  *
3  * GPL LICENSE SUMMARY
4  *
5  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of version 2 of the GNU General Public License as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19  * USA
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called LICENSE.GPL.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <net/mac80211.h>
33
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h" /* FIXME: remove */
36 #include "iwl-debug.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-power.h"
40 #include "iwl-sta.h"
41 #include "iwl-helpers.h"
42
43
44 MODULE_DESCRIPTION("iwl core");
45 MODULE_VERSION(IWLWIFI_VERSION);
46 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
47 MODULE_LICENSE("GPL");
48
49 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np)    \
50         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,      \
51                                     IWL_RATE_SISO_##s##M_PLCP, \
52                                     IWL_RATE_MIMO2_##s##M_PLCP,\
53                                     IWL_RATE_MIMO3_##s##M_PLCP,\
54                                     IWL_RATE_##r##M_IEEE,      \
55                                     IWL_RATE_##ip##M_INDEX,    \
56                                     IWL_RATE_##in##M_INDEX,    \
57                                     IWL_RATE_##rp##M_INDEX,    \
58                                     IWL_RATE_##rn##M_INDEX,    \
59                                     IWL_RATE_##pp##M_INDEX,    \
60                                     IWL_RATE_##np##M_INDEX }
61
62 u32 iwl_debug_level;
63 EXPORT_SYMBOL(iwl_debug_level);
64
65 static irqreturn_t iwl_isr(int irq, void *data);
66
67 /*
68  * Parameter order:
69  *   rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
70  *
71  * If there isn't a valid next or previous rate then INV is used which
72  * maps to IWL_RATE_INVALID
73  *
74  */
75 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
76         IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2),    /*  1mbps */
77         IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5),          /*  2mbps */
78         IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
79         IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18),      /* 11mbps */
80         IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
81         IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11),       /*  9mbps */
82         IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
83         IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
84         IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
85         IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
86         IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
87         IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
88         IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
89         /* FIXME:RS:          ^^    should be INV (legacy) */
90 };
91 EXPORT_SYMBOL(iwl_rates);
92
93 /**
94  * translate ucode response to mac80211 tx status control values
95  */
96 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
97                                   struct ieee80211_tx_info *info)
98 {
99         struct ieee80211_tx_rate *r = &info->control.rates[0];
100
101         info->antenna_sel_tx =
102                 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
103         if (rate_n_flags & RATE_MCS_HT_MSK)
104                 r->flags |= IEEE80211_TX_RC_MCS;
105         if (rate_n_flags & RATE_MCS_GF_MSK)
106                 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
107         if (rate_n_flags & RATE_MCS_HT40_MSK)
108                 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
109         if (rate_n_flags & RATE_MCS_DUP_MSK)
110                 r->flags |= IEEE80211_TX_RC_DUP_DATA;
111         if (rate_n_flags & RATE_MCS_SGI_MSK)
112                 r->flags |= IEEE80211_TX_RC_SHORT_GI;
113         r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
114 }
115 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
116
117 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
118 {
119         int idx = 0;
120
121         /* HT rate format */
122         if (rate_n_flags & RATE_MCS_HT_MSK) {
123                 idx = (rate_n_flags & 0xff);
124
125                 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
126                         idx = idx - IWL_RATE_MIMO3_6M_PLCP;
127                 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
128                         idx = idx - IWL_RATE_MIMO2_6M_PLCP;
129
130                 idx += IWL_FIRST_OFDM_RATE;
131                 /* skip 9M not supported in ht*/
132                 if (idx >= IWL_RATE_9M_INDEX)
133                         idx += 1;
134                 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
135                         return idx;
136
137         /* legacy rate format, search for match in table */
138         } else {
139                 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
140                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
141                                 return idx;
142         }
143
144         return -1;
145 }
146 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
147
148 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
149 {
150         int idx = 0;
151         int band_offset = 0;
152
153         /* HT rate format: mac80211 wants an MCS number, which is just LSB */
154         if (rate_n_flags & RATE_MCS_HT_MSK) {
155                 idx = (rate_n_flags & 0xff);
156                 return idx;
157         /* Legacy rate format, search for match in table */
158         } else {
159                 if (band == IEEE80211_BAND_5GHZ)
160                         band_offset = IWL_FIRST_OFDM_RATE;
161                 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
162                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
163                                 return idx - band_offset;
164         }
165
166         return -1;
167 }
168
169 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
170 {
171         int i;
172         u8 ind = ant;
173         for (i = 0; i < RATE_ANT_NUM - 1; i++) {
174                 ind = (ind + 1) < RATE_ANT_NUM ?  ind + 1 : 0;
175                 if (priv->hw_params.valid_tx_ant & BIT(ind))
176                         return ind;
177         }
178         return ant;
179 }
180
181 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
182 EXPORT_SYMBOL(iwl_bcast_addr);
183
184
185 /* This function both allocates and initializes hw and priv. */
186 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
187                 struct ieee80211_ops *hw_ops)
188 {
189         struct iwl_priv *priv;
190
191         /* mac80211 allocates memory for this device instance, including
192          *   space for this driver's private structure */
193         struct ieee80211_hw *hw =
194                 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
195         if (hw == NULL) {
196                 printk(KERN_ERR "%s: Can not allocate network device\n",
197                        cfg->name);
198                 goto out;
199         }
200
201         priv = hw->priv;
202         priv->hw = hw;
203
204 out:
205         return hw;
206 }
207 EXPORT_SYMBOL(iwl_alloc_all);
208
209 void iwl_hw_detect(struct iwl_priv *priv)
210 {
211         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
212         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
213         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
214 }
215 EXPORT_SYMBOL(iwl_hw_detect);
216
217 int iwl_hw_nic_init(struct iwl_priv *priv)
218 {
219         unsigned long flags;
220         struct iwl_rx_queue *rxq = &priv->rxq;
221         int ret;
222
223         /* nic_init */
224         spin_lock_irqsave(&priv->lock, flags);
225         priv->cfg->ops->lib->apm_ops.init(priv);
226         iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
227         spin_unlock_irqrestore(&priv->lock, flags);
228
229         ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
230
231         priv->cfg->ops->lib->apm_ops.config(priv);
232
233         /* Allocate the RX queue, or reset if it is already allocated */
234         if (!rxq->bd) {
235                 ret = iwl_rx_queue_alloc(priv);
236                 if (ret) {
237                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
238                         return -ENOMEM;
239                 }
240         } else
241                 iwl_rx_queue_reset(priv, rxq);
242
243         iwl_rx_replenish(priv);
244
245         iwl_rx_init(priv, rxq);
246
247         spin_lock_irqsave(&priv->lock, flags);
248
249         rxq->need_update = 1;
250         iwl_rx_queue_update_write_ptr(priv, rxq);
251
252         spin_unlock_irqrestore(&priv->lock, flags);
253
254         /* Allocate and init all Tx and Command queues */
255         ret = iwl_txq_ctx_reset(priv);
256         if (ret)
257                 return ret;
258
259         set_bit(STATUS_INIT, &priv->status);
260
261         return 0;
262 }
263 EXPORT_SYMBOL(iwl_hw_nic_init);
264
265 /*
266  * QoS  support
267 */
268 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
269 {
270         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
271                 return;
272
273         priv->qos_data.def_qos_parm.qos_flags = 0;
274
275         if (priv->qos_data.qos_cap.q_AP.queue_request &&
276             !priv->qos_data.qos_cap.q_AP.txop_request)
277                 priv->qos_data.def_qos_parm.qos_flags |=
278                         QOS_PARAM_FLG_TXOP_TYPE_MSK;
279         if (priv->qos_data.qos_active)
280                 priv->qos_data.def_qos_parm.qos_flags |=
281                         QOS_PARAM_FLG_UPDATE_EDCA_MSK;
282
283         if (priv->current_ht_config.is_ht)
284                 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
285
286         if (force || iwl_is_associated(priv)) {
287                 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
288                                 priv->qos_data.qos_active,
289                                 priv->qos_data.def_qos_parm.qos_flags);
290
291                 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
292                                        sizeof(struct iwl_qosparam_cmd),
293                                        &priv->qos_data.def_qos_parm, NULL);
294         }
295 }
296 EXPORT_SYMBOL(iwl_activate_qos);
297
298 /*
299  * AC        CWmin         CW max      AIFSN      TXOP Limit    TXOP Limit
300  *                                              (802.11b)      (802.11a/g)
301  * AC_BK      15            1023        7           0               0
302  * AC_BE      15            1023        3           0               0
303  * AC_VI       7              15        2          6.016ms       3.008ms
304  * AC_VO       3               7        2          3.264ms       1.504ms
305  */
306 void iwl_reset_qos(struct iwl_priv *priv)
307 {
308         u16 cw_min = 15;
309         u16 cw_max = 1023;
310         u8 aifs = 2;
311         bool is_legacy = false;
312         unsigned long flags;
313         int i;
314
315         spin_lock_irqsave(&priv->lock, flags);
316         /* QoS always active in AP and ADHOC mode
317          * In STA mode wait for association
318          */
319         if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
320             priv->iw_mode == NL80211_IFTYPE_AP)
321                 priv->qos_data.qos_active = 1;
322         else
323                 priv->qos_data.qos_active = 0;
324
325         /* check for legacy mode */
326         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
327             (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
328             (priv->iw_mode == NL80211_IFTYPE_STATION &&
329             (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
330                 cw_min = 31;
331                 is_legacy = 1;
332         }
333
334         if (priv->qos_data.qos_active)
335                 aifs = 3;
336
337         /* AC_BE */
338         priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
339         priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
340         priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
341         priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
342         priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
343
344         if (priv->qos_data.qos_active) {
345                 /* AC_BK */
346                 i = 1;
347                 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
348                 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
349                 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
350                 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
351                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
352
353                 /* AC_VI */
354                 i = 2;
355                 priv->qos_data.def_qos_parm.ac[i].cw_min =
356                         cpu_to_le16((cw_min + 1) / 2 - 1);
357                 priv->qos_data.def_qos_parm.ac[i].cw_max =
358                         cpu_to_le16(cw_min);
359                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
360                 if (is_legacy)
361                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
362                                 cpu_to_le16(6016);
363                 else
364                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
365                                 cpu_to_le16(3008);
366                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
367
368                 /* AC_VO */
369                 i = 3;
370                 priv->qos_data.def_qos_parm.ac[i].cw_min =
371                         cpu_to_le16((cw_min + 1) / 4 - 1);
372                 priv->qos_data.def_qos_parm.ac[i].cw_max =
373                         cpu_to_le16((cw_min + 1) / 2 - 1);
374                 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
375                 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
376                 if (is_legacy)
377                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
378                                 cpu_to_le16(3264);
379                 else
380                         priv->qos_data.def_qos_parm.ac[i].edca_txop =
381                                 cpu_to_le16(1504);
382         } else {
383                 for (i = 1; i < 4; i++) {
384                         priv->qos_data.def_qos_parm.ac[i].cw_min =
385                                 cpu_to_le16(cw_min);
386                         priv->qos_data.def_qos_parm.ac[i].cw_max =
387                                 cpu_to_le16(cw_max);
388                         priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
389                         priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
390                         priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
391                 }
392         }
393         IWL_DEBUG_QOS(priv, "set QoS to default \n");
394
395         spin_unlock_irqrestore(&priv->lock, flags);
396 }
397 EXPORT_SYMBOL(iwl_reset_qos);
398
399 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
400 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
401 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
402                               struct ieee80211_sta_ht_cap *ht_info,
403                               enum ieee80211_band band)
404 {
405         u16 max_bit_rate = 0;
406         u8 rx_chains_num = priv->hw_params.rx_chains_num;
407         u8 tx_chains_num = priv->hw_params.tx_chains_num;
408
409         ht_info->cap = 0;
410         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
411
412         ht_info->ht_supported = true;
413
414         if (priv->cfg->ht_greenfield_support)
415                 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
416         ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
417         ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
418                              (WLAN_HT_CAP_SM_PS_DISABLED << 2));
419
420         max_bit_rate = MAX_BIT_RATE_20_MHZ;
421         if (priv->hw_params.ht40_channel & BIT(band)) {
422                 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
423                 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
424                 ht_info->mcs.rx_mask[4] = 0x01;
425                 max_bit_rate = MAX_BIT_RATE_40_MHZ;
426         }
427
428         if (priv->cfg->mod_params->amsdu_size_8K)
429                 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
430
431         ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
432         ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
433
434         ht_info->mcs.rx_mask[0] = 0xFF;
435         if (rx_chains_num >= 2)
436                 ht_info->mcs.rx_mask[1] = 0xFF;
437         if (rx_chains_num >= 3)
438                 ht_info->mcs.rx_mask[2] = 0xFF;
439
440         /* Highest supported Rx data rate */
441         max_bit_rate *= rx_chains_num;
442         WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
443         ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
444
445         /* Tx MCS capabilities */
446         ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
447         if (tx_chains_num != rx_chains_num) {
448                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
449                 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
450                                 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
451         }
452 }
453
454 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
455                               struct ieee80211_rate *rates)
456 {
457         int i;
458
459         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
460                 rates[i].bitrate = iwl_rates[i].ieee * 5;
461                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
462                 rates[i].hw_value_short = i;
463                 rates[i].flags = 0;
464                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
465                         /*
466                          * If CCK != 1M then set short preamble rate flag.
467                          */
468                         rates[i].flags |=
469                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
470                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
471                 }
472         }
473 }
474
475
476 /**
477  * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
478  */
479 int iwlcore_init_geos(struct iwl_priv *priv)
480 {
481         struct iwl_channel_info *ch;
482         struct ieee80211_supported_band *sband;
483         struct ieee80211_channel *channels;
484         struct ieee80211_channel *geo_ch;
485         struct ieee80211_rate *rates;
486         int i = 0;
487
488         if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
489             priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
490                 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
491                 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
492                 return 0;
493         }
494
495         channels = kzalloc(sizeof(struct ieee80211_channel) *
496                            priv->channel_count, GFP_KERNEL);
497         if (!channels)
498                 return -ENOMEM;
499
500         rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
501                         GFP_KERNEL);
502         if (!rates) {
503                 kfree(channels);
504                 return -ENOMEM;
505         }
506
507         /* 5.2GHz channels start after the 2.4GHz channels */
508         sband = &priv->bands[IEEE80211_BAND_5GHZ];
509         sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
510         /* just OFDM */
511         sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
512         sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
513
514         if (priv->cfg->sku & IWL_SKU_N)
515                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
516                                          IEEE80211_BAND_5GHZ);
517
518         sband = &priv->bands[IEEE80211_BAND_2GHZ];
519         sband->channels = channels;
520         /* OFDM & CCK */
521         sband->bitrates = rates;
522         sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
523
524         if (priv->cfg->sku & IWL_SKU_N)
525                 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
526                                          IEEE80211_BAND_2GHZ);
527
528         priv->ieee_channels = channels;
529         priv->ieee_rates = rates;
530
531         for (i = 0;  i < priv->channel_count; i++) {
532                 ch = &priv->channel_info[i];
533
534                 /* FIXME: might be removed if scan is OK */
535                 if (!is_channel_valid(ch))
536                         continue;
537
538                 if (is_channel_a_band(ch))
539                         sband =  &priv->bands[IEEE80211_BAND_5GHZ];
540                 else
541                         sband =  &priv->bands[IEEE80211_BAND_2GHZ];
542
543                 geo_ch = &sband->channels[sband->n_channels++];
544
545                 geo_ch->center_freq =
546                                 ieee80211_channel_to_frequency(ch->channel);
547                 geo_ch->max_power = ch->max_power_avg;
548                 geo_ch->max_antenna_gain = 0xff;
549                 geo_ch->hw_value = ch->channel;
550
551                 if (is_channel_valid(ch)) {
552                         if (!(ch->flags & EEPROM_CHANNEL_IBSS))
553                                 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
554
555                         if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
556                                 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
557
558                         if (ch->flags & EEPROM_CHANNEL_RADAR)
559                                 geo_ch->flags |= IEEE80211_CHAN_RADAR;
560
561                         geo_ch->flags |= ch->ht40_extension_channel;
562
563                         if (ch->max_power_avg > priv->tx_power_device_lmt)
564                                 priv->tx_power_device_lmt = ch->max_power_avg;
565                 } else {
566                         geo_ch->flags |= IEEE80211_CHAN_DISABLED;
567                 }
568
569                 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
570                                 ch->channel, geo_ch->center_freq,
571                                 is_channel_a_band(ch) ?  "5.2" : "2.4",
572                                 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
573                                 "restricted" : "valid",
574                                  geo_ch->flags);
575         }
576
577         if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
578              priv->cfg->sku & IWL_SKU_A) {
579                 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
580                         "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
581                            priv->pci_dev->device,
582                            priv->pci_dev->subsystem_device);
583                 priv->cfg->sku &= ~IWL_SKU_A;
584         }
585
586         IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
587                    priv->bands[IEEE80211_BAND_2GHZ].n_channels,
588                    priv->bands[IEEE80211_BAND_5GHZ].n_channels);
589
590         set_bit(STATUS_GEO_CONFIGURED, &priv->status);
591
592         return 0;
593 }
594 EXPORT_SYMBOL(iwlcore_init_geos);
595
596 /*
597  * iwlcore_free_geos - undo allocations in iwlcore_init_geos
598  */
599 void iwlcore_free_geos(struct iwl_priv *priv)
600 {
601         kfree(priv->ieee_channels);
602         kfree(priv->ieee_rates);
603         clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
604 }
605 EXPORT_SYMBOL(iwlcore_free_geos);
606
607 /*
608  *  iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
609  *  function.
610  */
611 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
612                                 __le32 *tx_flags)
613 {
614         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
615                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
616                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
617         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
618                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
619                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
620         }
621 }
622 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
623
624 static bool is_single_rx_stream(struct iwl_priv *priv)
625 {
626         return !priv->current_ht_config.is_ht ||
627                priv->current_ht_config.single_chain_sufficient;
628 }
629
630 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
631                                    enum ieee80211_band band,
632                                    u16 channel, u8 extension_chan_offset)
633 {
634         const struct iwl_channel_info *ch_info;
635
636         ch_info = iwl_get_channel_info(priv, band, channel);
637         if (!is_channel_valid(ch_info))
638                 return 0;
639
640         if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
641                 return !(ch_info->ht40_extension_channel &
642                                         IEEE80211_CHAN_NO_HT40PLUS);
643         else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
644                 return !(ch_info->ht40_extension_channel &
645                                         IEEE80211_CHAN_NO_HT40MINUS);
646
647         return 0;
648 }
649
650 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
651                          struct ieee80211_sta_ht_cap *sta_ht_inf)
652 {
653         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
654
655         if (!ht_conf->is_ht || !ht_conf->is_40mhz)
656                 return 0;
657
658         /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
659          * the bit will not set if it is pure 40MHz case
660          */
661         if (sta_ht_inf) {
662                 if (!sta_ht_inf->ht_supported)
663                         return 0;
664         }
665 #ifdef CONFIG_IWLWIFI_DEBUG
666         if (priv->disable_ht40)
667                 return 0;
668 #endif
669         return iwl_is_channel_extension(priv, priv->band,
670                         le16_to_cpu(priv->staging_rxon.channel),
671                         ht_conf->extension_chan_offset);
672 }
673 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
674
675 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
676 {
677         u16 new_val = 0;
678         u16 beacon_factor = 0;
679
680         beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
681         new_val = beacon_val / beacon_factor;
682
683         if (!new_val)
684                 new_val = max_beacon_val;
685
686         return new_val;
687 }
688
689 void iwl_setup_rxon_timing(struct iwl_priv *priv)
690 {
691         u64 tsf;
692         s32 interval_tm, rem;
693         unsigned long flags;
694         struct ieee80211_conf *conf = NULL;
695         u16 beacon_int;
696
697         conf = ieee80211_get_hw_conf(priv->hw);
698
699         spin_lock_irqsave(&priv->lock, flags);
700         priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
701         priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
702
703         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
704                 beacon_int = priv->beacon_int;
705                 priv->rxon_timing.atim_window = 0;
706         } else {
707                 beacon_int = priv->vif->bss_conf.beacon_int;
708
709                 /* TODO: we need to get atim_window from upper stack
710                  * for now we set to 0 */
711                 priv->rxon_timing.atim_window = 0;
712         }
713
714         beacon_int = iwl_adjust_beacon_interval(beacon_int,
715                                 priv->hw_params.max_beacon_itrvl * 1024);
716         priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
717
718         tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
719         interval_tm = beacon_int * 1024;
720         rem = do_div(tsf, interval_tm);
721         priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
722
723         spin_unlock_irqrestore(&priv->lock, flags);
724         IWL_DEBUG_ASSOC(priv,
725                         "beacon interval %d beacon timer %d beacon tim %d\n",
726                         le16_to_cpu(priv->rxon_timing.beacon_interval),
727                         le32_to_cpu(priv->rxon_timing.beacon_init_val),
728                         le16_to_cpu(priv->rxon_timing.atim_window));
729 }
730 EXPORT_SYMBOL(iwl_setup_rxon_timing);
731
732 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
733 {
734         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
735
736         if (hw_decrypt)
737                 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
738         else
739                 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
740
741 }
742 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
743
744 /**
745  * iwl_check_rxon_cmd - validate RXON structure is valid
746  *
747  * NOTE:  This is really only useful during development and can eventually
748  * be #ifdef'd out once the driver is stable and folks aren't actively
749  * making changes
750  */
751 int iwl_check_rxon_cmd(struct iwl_priv *priv)
752 {
753         int error = 0;
754         int counter = 1;
755         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
756
757         if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
758                 error |= le32_to_cpu(rxon->flags &
759                                 (RXON_FLG_TGJ_NARROW_BAND_MSK |
760                                  RXON_FLG_RADAR_DETECT_MSK));
761                 if (error)
762                         IWL_WARN(priv, "check 24G fields %d | %d\n",
763                                     counter++, error);
764         } else {
765                 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
766                                 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
767                 if (error)
768                         IWL_WARN(priv, "check 52 fields %d | %d\n",
769                                     counter++, error);
770                 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
771                 if (error)
772                         IWL_WARN(priv, "check 52 CCK %d | %d\n",
773                                     counter++, error);
774         }
775         error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
776         if (error)
777                 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
778
779         /* make sure basic rates 6Mbps and 1Mbps are supported */
780         error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
781                   ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
782         if (error)
783                 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
784
785         error |= (le16_to_cpu(rxon->assoc_id) > 2007);
786         if (error)
787                 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
788
789         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
790                         == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
791         if (error)
792                 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
793                             counter++, error);
794
795         error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
796                         == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
797         if (error)
798                 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
799                             counter++, error);
800
801         error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
802                         RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
803         if (error)
804                 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
805                             counter++, error);
806
807         if (error)
808                 IWL_WARN(priv, "Tuning to channel %d\n",
809                             le16_to_cpu(rxon->channel));
810
811         if (error) {
812                 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
813                 return -1;
814         }
815         return 0;
816 }
817 EXPORT_SYMBOL(iwl_check_rxon_cmd);
818
819 /**
820  * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
821  * @priv: staging_rxon is compared to active_rxon
822  *
823  * If the RXON structure is changing enough to require a new tune,
824  * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
825  * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
826  */
827 int iwl_full_rxon_required(struct iwl_priv *priv)
828 {
829
830         /* These items are only settable from the full RXON command */
831         if (!(iwl_is_associated(priv)) ||
832             compare_ether_addr(priv->staging_rxon.bssid_addr,
833                                priv->active_rxon.bssid_addr) ||
834             compare_ether_addr(priv->staging_rxon.node_addr,
835                                priv->active_rxon.node_addr) ||
836             compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
837                                priv->active_rxon.wlap_bssid_addr) ||
838             (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
839             (priv->staging_rxon.channel != priv->active_rxon.channel) ||
840             (priv->staging_rxon.air_propagation !=
841              priv->active_rxon.air_propagation) ||
842             (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
843              priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
844             (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
845              priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
846             (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
847              priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
848             (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
849                 return 1;
850
851         /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
852          * be updated with the RXON_ASSOC command -- however only some
853          * flag transitions are allowed using RXON_ASSOC */
854
855         /* Check if we are not switching bands */
856         if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
857             (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
858                 return 1;
859
860         /* Check if we are switching association toggle */
861         if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
862                 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
863                 return 1;
864
865         return 0;
866 }
867 EXPORT_SYMBOL(iwl_full_rxon_required);
868
869 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
870 {
871         int i;
872         int rate_mask;
873
874         /* Set rate mask*/
875         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
876                 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
877         else
878                 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
879
880         /* Find lowest valid rate */
881         for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
882                                         i = iwl_rates[i].next_ieee) {
883                 if (rate_mask & (1 << i))
884                         return iwl_rates[i].plcp;
885         }
886
887         /* No valid rate was found. Assign the lowest one */
888         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
889                 return IWL_RATE_1M_PLCP;
890         else
891                 return IWL_RATE_6M_PLCP;
892 }
893 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
894
895 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
896 {
897         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
898
899         if (!ht_conf->is_ht) {
900                 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
901                         RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
902                         RXON_FLG_HT40_PROT_MSK |
903                         RXON_FLG_HT_PROT_MSK);
904                 return;
905         }
906
907         /* FIXME: if the definition of ht_protection changed, the "translation"
908          * will be needed for rxon->flags
909          */
910         rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
911
912         /* Set up channel bandwidth:
913          * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
914         /* clear the HT channel mode before set the mode */
915         rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
916                          RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
917         if (iwl_is_ht40_tx_allowed(priv, NULL)) {
918                 /* pure ht40 */
919                 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
920                         rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
921                         /* Note: control channel is opposite of extension channel */
922                         switch (ht_conf->extension_chan_offset) {
923                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
924                                 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
925                                 break;
926                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
927                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
928                                 break;
929                         }
930                 } else {
931                         /* Note: control channel is opposite of extension channel */
932                         switch (ht_conf->extension_chan_offset) {
933                         case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
934                                 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
935                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
936                                 break;
937                         case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
938                                 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
939                                 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
940                                 break;
941                         case IEEE80211_HT_PARAM_CHA_SEC_NONE:
942                         default:
943                                 /* channel location only valid if in Mixed mode */
944                                 IWL_ERR(priv, "invalid extension channel offset\n");
945                                 break;
946                         }
947                 }
948         } else {
949                 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
950         }
951
952         if (priv->cfg->ops->hcmd->set_rxon_chain)
953                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
954
955         IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
956                         "extension channel offset 0x%x\n",
957                         le32_to_cpu(rxon->flags), ht_conf->ht_protection,
958                         ht_conf->extension_chan_offset);
959         return;
960 }
961 EXPORT_SYMBOL(iwl_set_rxon_ht);
962
963 #define IWL_NUM_RX_CHAINS_MULTIPLE      3
964 #define IWL_NUM_RX_CHAINS_SINGLE        2
965 #define IWL_NUM_IDLE_CHAINS_DUAL        2
966 #define IWL_NUM_IDLE_CHAINS_SINGLE      1
967
968 /*
969  * Determine how many receiver/antenna chains to use.
970  *
971  * More provides better reception via diversity.  Fewer saves power
972  * at the expense of throughput, but only when not in powersave to
973  * start with.
974  *
975  * MIMO (dual stream) requires at least 2, but works better with 3.
976  * This does not determine *which* chains to use, just how many.
977  */
978 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
979 {
980         /* # of Rx chains to use when expecting MIMO. */
981         if (is_single_rx_stream(priv))
982                 return IWL_NUM_RX_CHAINS_SINGLE;
983         else
984                 return IWL_NUM_RX_CHAINS_MULTIPLE;
985 }
986
987 /*
988  * When we are in power saving, there's no difference between
989  * using multiple chains or just a single chain, but due to the
990  * lack of SM PS we lose a lot of throughput if we use just a
991  * single chain.
992  *
993  * Therefore, use the active count here (which will use multiple
994  * chains unless connected to a legacy AP).
995  */
996 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
997 {
998         return active_cnt;
999 }
1000
1001 /* up to 4 chains */
1002 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1003 {
1004         u8 res;
1005         res = (chain_bitmap & BIT(0)) >> 0;
1006         res += (chain_bitmap & BIT(1)) >> 1;
1007         res += (chain_bitmap & BIT(2)) >> 2;
1008         res += (chain_bitmap & BIT(3)) >> 3;
1009         return res;
1010 }
1011
1012 /**
1013  * iwl_is_monitor_mode - Determine if interface in monitor mode
1014  *
1015  * priv->iw_mode is set in add_interface, but add_interface is
1016  * never called for monitor mode. The only way mac80211 informs us about
1017  * monitor mode is through configuring filters (call to configure_filter).
1018  */
1019 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1020 {
1021         return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1022 }
1023 EXPORT_SYMBOL(iwl_is_monitor_mode);
1024
1025 /**
1026  * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1027  *
1028  * Selects how many and which Rx receivers/antennas/chains to use.
1029  * This should not be used for scan command ... it puts data in wrong place.
1030  */
1031 void iwl_set_rxon_chain(struct iwl_priv *priv)
1032 {
1033         bool is_single = is_single_rx_stream(priv);
1034         bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1035         u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1036         u32 active_chains;
1037         u16 rx_chain;
1038
1039         /* Tell uCode which antennas are actually connected.
1040          * Before first association, we assume all antennas are connected.
1041          * Just after first association, iwl_chain_noise_calibration()
1042          *    checks which antennas actually *are* connected. */
1043          if (priv->chain_noise_data.active_chains)
1044                 active_chains = priv->chain_noise_data.active_chains;
1045         else
1046                 active_chains = priv->hw_params.valid_rx_ant;
1047
1048         rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1049
1050         /* How many receivers should we use? */
1051         active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1052         idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1053
1054
1055         /* correct rx chain count according hw settings
1056          * and chain noise calibration
1057          */
1058         valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1059         if (valid_rx_cnt < active_rx_cnt)
1060                 active_rx_cnt = valid_rx_cnt;
1061
1062         if (valid_rx_cnt < idle_rx_cnt)
1063                 idle_rx_cnt = valid_rx_cnt;
1064
1065         rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1066         rx_chain |= idle_rx_cnt  << RXON_RX_CHAIN_CNT_POS;
1067
1068         /* copied from 'iwl_bg_request_scan()' */
1069         /* Force use of chains B and C (0x6) for Rx for 4965
1070          * Avoid A (0x1) because of its off-channel reception on A-band.
1071          * MIMO is not used here, but value is required */
1072         if (iwl_is_monitor_mode(priv) &&
1073             !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1074             ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1075                 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1076                 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1077                 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1078                 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1079         }
1080
1081         priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1082
1083         if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1084                 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1085         else
1086                 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1087
1088         IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1089                         priv->staging_rxon.rx_chain,
1090                         active_rx_cnt, idle_rx_cnt);
1091
1092         WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1093                 active_rx_cnt < idle_rx_cnt);
1094 }
1095 EXPORT_SYMBOL(iwl_set_rxon_chain);
1096
1097 /**
1098  * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1099  * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1100  * @channel: Any channel valid for the requested phymode
1101
1102  * In addition to setting the staging RXON, priv->phymode is also set.
1103  *
1104  * NOTE:  Does not commit to the hardware; it sets appropriate bit fields
1105  * in the staging RXON flag structure based on the phymode
1106  */
1107 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1108 {
1109         enum ieee80211_band band = ch->band;
1110         u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1111
1112         if (!iwl_get_channel_info(priv, band, channel)) {
1113                 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1114                                channel, band);
1115                 return -EINVAL;
1116         }
1117
1118         if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1119             (priv->band == band))
1120                 return 0;
1121
1122         priv->staging_rxon.channel = cpu_to_le16(channel);
1123         if (band == IEEE80211_BAND_5GHZ)
1124                 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1125         else
1126                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1127
1128         priv->band = band;
1129
1130         IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1131
1132         return 0;
1133 }
1134 EXPORT_SYMBOL(iwl_set_rxon_channel);
1135
1136 void iwl_set_flags_for_band(struct iwl_priv *priv,
1137                             enum ieee80211_band band)
1138 {
1139         if (band == IEEE80211_BAND_5GHZ) {
1140                 priv->staging_rxon.flags &=
1141                     ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1142                       | RXON_FLG_CCK_MSK);
1143                 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1144         } else {
1145                 /* Copied from iwl_post_associate() */
1146                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1147                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1148                 else
1149                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1150
1151                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1152                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1153
1154                 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1155                 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1156                 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1157         }
1158 }
1159
1160 /*
1161  * initialize rxon structure with default values from eeprom
1162  */
1163 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1164 {
1165         const struct iwl_channel_info *ch_info;
1166
1167         memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1168
1169         switch (mode) {
1170         case NL80211_IFTYPE_AP:
1171                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1172                 break;
1173
1174         case NL80211_IFTYPE_STATION:
1175                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1176                 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1177                 break;
1178
1179         case NL80211_IFTYPE_ADHOC:
1180                 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1181                 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1182                 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1183                                                   RXON_FILTER_ACCEPT_GRP_MSK;
1184                 break;
1185
1186         default:
1187                 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1188                 break;
1189         }
1190
1191 #if 0
1192         /* TODO:  Figure out when short_preamble would be set and cache from
1193          * that */
1194         if (!hw_to_local(priv->hw)->short_preamble)
1195                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1196         else
1197                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1198 #endif
1199
1200         ch_info = iwl_get_channel_info(priv, priv->band,
1201                                        le16_to_cpu(priv->active_rxon.channel));
1202
1203         if (!ch_info)
1204                 ch_info = &priv->channel_info[0];
1205
1206         /*
1207          * in some case A channels are all non IBSS
1208          * in this case force B/G channel
1209          */
1210         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1211             !(is_channel_ibss(ch_info)))
1212                 ch_info = &priv->channel_info[0];
1213
1214         priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1215         priv->band = ch_info->band;
1216
1217         iwl_set_flags_for_band(priv, priv->band);
1218
1219         priv->staging_rxon.ofdm_basic_rates =
1220             (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1221         priv->staging_rxon.cck_basic_rates =
1222             (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1223
1224         /* clear both MIX and PURE40 mode flag */
1225         priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1226                                         RXON_FLG_CHANNEL_MODE_PURE_40);
1227         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1228         memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1229         priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1230         priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1231         priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1232 }
1233 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1234
1235 static void iwl_set_rate(struct iwl_priv *priv)
1236 {
1237         const struct ieee80211_supported_band *hw = NULL;
1238         struct ieee80211_rate *rate;
1239         int i;
1240
1241         hw = iwl_get_hw_mode(priv, priv->band);
1242         if (!hw) {
1243                 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1244                 return;
1245         }
1246
1247         priv->active_rate = 0;
1248         priv->active_rate_basic = 0;
1249
1250         for (i = 0; i < hw->n_bitrates; i++) {
1251                 rate = &(hw->bitrates[i]);
1252                 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1253                         priv->active_rate |= (1 << rate->hw_value);
1254         }
1255
1256         IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1257                        priv->active_rate, priv->active_rate_basic);
1258
1259         /*
1260          * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1261          * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1262          * OFDM
1263          */
1264         if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1265                 priv->staging_rxon.cck_basic_rates =
1266                     ((priv->active_rate_basic &
1267                       IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1268         else
1269                 priv->staging_rxon.cck_basic_rates =
1270                     (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1271
1272         if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1273                 priv->staging_rxon.ofdm_basic_rates =
1274                     ((priv->active_rate_basic &
1275                       (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1276                       IWL_FIRST_OFDM_RATE) & 0xFF;
1277         else
1278                 priv->staging_rxon.ofdm_basic_rates =
1279                    (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1280 }
1281
1282 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1283 {
1284         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1285         struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1286         struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1287
1288         if (!le32_to_cpu(csa->status)) {
1289                 rxon->channel = csa->channel;
1290                 priv->staging_rxon.channel = csa->channel;
1291                 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1292                       le16_to_cpu(csa->channel));
1293         } else
1294                 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1295                       le16_to_cpu(csa->channel));
1296 }
1297 EXPORT_SYMBOL(iwl_rx_csa);
1298
1299 #ifdef CONFIG_IWLWIFI_DEBUG
1300 static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1301 {
1302         struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1303
1304         IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1305         iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1306         IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1307         IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1308         IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1309                         le32_to_cpu(rxon->filter_flags));
1310         IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1311         IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1312                         rxon->ofdm_basic_rates);
1313         IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1314         IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1315         IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1316         IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1317 }
1318 #endif
1319 /**
1320  * iwl_irq_handle_error - called for HW or SW error interrupt from card
1321  */
1322 void iwl_irq_handle_error(struct iwl_priv *priv)
1323 {
1324         /* Set the FW error flag -- cleared on iwl_down */
1325         set_bit(STATUS_FW_ERROR, &priv->status);
1326
1327         /* Cancel currently queued command. */
1328         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1329
1330 #ifdef CONFIG_IWLWIFI_DEBUG
1331         if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) {
1332                 priv->cfg->ops->lib->dump_nic_error_log(priv);
1333                 priv->cfg->ops->lib->dump_nic_event_log(priv);
1334                 iwl_print_rx_config_cmd(priv);
1335         }
1336 #endif
1337
1338         wake_up_interruptible(&priv->wait_command_queue);
1339
1340         /* Keep the restart process from trying to send host
1341          * commands by clearing the INIT status bit */
1342         clear_bit(STATUS_READY, &priv->status);
1343
1344         if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1345                 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1346                           "Restarting adapter due to uCode error.\n");
1347
1348                 if (priv->cfg->mod_params->restart_fw)
1349                         queue_work(priv->workqueue, &priv->restart);
1350         }
1351 }
1352 EXPORT_SYMBOL(iwl_irq_handle_error);
1353
1354 int iwl_apm_stop_master(struct iwl_priv *priv)
1355 {
1356         unsigned long flags;
1357
1358         spin_lock_irqsave(&priv->lock, flags);
1359
1360         /* set stop master bit */
1361         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1362
1363         iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1364                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1365
1366         spin_unlock_irqrestore(&priv->lock, flags);
1367         IWL_DEBUG_INFO(priv, "stop master\n");
1368
1369         return 0;
1370 }
1371 EXPORT_SYMBOL(iwl_apm_stop_master);
1372
1373 void iwl_apm_stop(struct iwl_priv *priv)
1374 {
1375         unsigned long flags;
1376
1377         IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1378
1379         iwl_apm_stop_master(priv);
1380
1381         spin_lock_irqsave(&priv->lock, flags);
1382
1383         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1384
1385         udelay(10);
1386         /* clear "init complete"  move adapter D0A* --> D0U state */
1387         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1388         spin_unlock_irqrestore(&priv->lock, flags);
1389 }
1390 EXPORT_SYMBOL(iwl_apm_stop);
1391
1392
1393 /*
1394  * Start up NIC's basic functionality after it has been reset
1395  * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1396  * NOTE:  This does not load uCode nor start the embedded processor
1397  */
1398 int iwl_apm_init(struct iwl_priv *priv)
1399 {
1400         int ret = 0;
1401         u16 lctl;
1402
1403         IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1404
1405         /*
1406          * Use "set_bit" below rather than "write", to preserve any hardware
1407          * bits already set by default after reset.
1408          */
1409
1410         /* Disable L0S exit timer (platform NMI Work/Around) */
1411         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1412                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1413
1414         /*
1415          * Disable L0s without affecting L1;
1416          *  don't wait for ICH L0s (ICH bug W/A)
1417          */
1418         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1419                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1420
1421         /* Set FH wait threshold to maximum (HW error during stress W/A) */
1422         iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1423
1424         /*
1425          * Enable HAP INTA (interrupt from management bus) to
1426          * wake device's PCI Express link L1a -> L0s
1427          * NOTE:  This is no-op for 3945 (non-existant bit)
1428          */
1429         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1430                                     CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1431
1432         /*
1433          * HW bug W/A - costs negligible power consumption ...
1434          * Check if BIOS (or OS) enabled L1-ASPM on this device
1435          */
1436         if (priv->cfg->set_l0s) {
1437                 lctl = iwl_pcie_link_ctl(priv);
1438                 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1439                                         PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1440                         /* L1-ASPM enabled; disable(!) L0S  */
1441                         iwl_set_bit(priv, CSR_GIO_REG,
1442                                         CSR_GIO_REG_VAL_L0S_ENABLED);
1443                         IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1444                 } else {
1445                         /* L1-ASPM disabled; enable(!) L0S */
1446                         iwl_clear_bit(priv, CSR_GIO_REG,
1447                                         CSR_GIO_REG_VAL_L0S_ENABLED);
1448                         IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1449                 }
1450         }
1451
1452         /* Configure analog phase-lock-loop before activating to D0A */
1453         if (priv->cfg->pll_cfg_val)
1454                 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1455
1456         /*
1457          * Set "initialization complete" bit to move adapter from
1458          * D0U* --> D0A* (powered-up active) state.
1459          */
1460         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1461
1462         /*
1463          * Wait for clock stabilization; once stabilized, access to
1464          * device-internal resources is supported, e.g. iwl_write_prph()
1465          * and accesses to uCode SRAM.
1466          */
1467         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1468                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1469                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1470         if (ret < 0) {
1471                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1472                 goto out;
1473         }
1474
1475         /*
1476          * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1477          * BSM (Boostrap State Machine) is only in 3945 and 4965;
1478          * later devices (i.e. 5000 and later) have non-volatile SRAM,
1479          * and don't need BSM to restore data after power-saving sleep.
1480          *
1481          * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1482          * do not disable clocks.  This preserves any hardware bits already
1483          * set by default in "CLK_CTRL_REG" after reset.
1484          */
1485         if (priv->cfg->use_bsm)
1486                 iwl_write_prph(priv, APMG_CLK_EN_REG,
1487                         APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1488         else
1489                 iwl_write_prph(priv, APMG_CLK_EN_REG,
1490                         APMG_CLK_VAL_DMA_CLK_RQT);
1491         udelay(20);
1492
1493         /* Disable L1-Active */
1494         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1495                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1496
1497 out:
1498         return ret;
1499 }
1500 EXPORT_SYMBOL(iwl_apm_init);
1501
1502
1503
1504 void iwl_configure_filter(struct ieee80211_hw *hw,
1505                           unsigned int changed_flags,
1506                           unsigned int *total_flags,
1507                           u64 multicast)
1508 {
1509         struct iwl_priv *priv = hw->priv;
1510         __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1511
1512         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1513                         changed_flags, *total_flags);
1514
1515         if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1516                 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1517                         *filter_flags |= RXON_FILTER_PROMISC_MSK;
1518                 else
1519                         *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1520         }
1521         if (changed_flags & FIF_ALLMULTI) {
1522                 if (*total_flags & FIF_ALLMULTI)
1523                         *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1524                 else
1525                         *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1526         }
1527         if (changed_flags & FIF_CONTROL) {
1528                 if (*total_flags & FIF_CONTROL)
1529                         *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1530                 else
1531                         *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1532         }
1533         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1534                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1535                         *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1536                 else
1537                         *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1538         }
1539
1540         /* We avoid iwl_commit_rxon here to commit the new filter flags
1541          * since mac80211 will call ieee80211_hw_config immediately.
1542          * (mc_list is not supported at this time). Otherwise, we need to
1543          * queue a background iwl_commit_rxon work.
1544          */
1545
1546         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1547                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1548 }
1549 EXPORT_SYMBOL(iwl_configure_filter);
1550
1551 int iwl_set_hw_params(struct iwl_priv *priv)
1552 {
1553         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1554         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1555         if (priv->cfg->mod_params->amsdu_size_8K)
1556                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1557         else
1558                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1559
1560         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1561
1562         if (priv->cfg->mod_params->disable_11n)
1563                 priv->cfg->sku &= ~IWL_SKU_N;
1564
1565         /* Device-specific setup */
1566         return priv->cfg->ops->lib->set_hw_params(priv);
1567 }
1568 EXPORT_SYMBOL(iwl_set_hw_params);
1569
1570 int iwl_init_drv(struct iwl_priv *priv)
1571 {
1572         int ret;
1573
1574         priv->ibss_beacon = NULL;
1575
1576         spin_lock_init(&priv->lock);
1577         spin_lock_init(&priv->sta_lock);
1578         spin_lock_init(&priv->hcmd_lock);
1579
1580         INIT_LIST_HEAD(&priv->free_frames);
1581
1582         mutex_init(&priv->mutex);
1583
1584         /* Clear the driver's (not device's) station table */
1585         iwl_clear_stations_table(priv);
1586
1587         priv->ieee_channels = NULL;
1588         priv->ieee_rates = NULL;
1589         priv->band = IEEE80211_BAND_2GHZ;
1590
1591         priv->iw_mode = NL80211_IFTYPE_STATION;
1592
1593         /* Choose which receivers/antennas to use */
1594         if (priv->cfg->ops->hcmd->set_rxon_chain)
1595                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1596
1597         iwl_init_scan_params(priv);
1598
1599         iwl_reset_qos(priv);
1600
1601         priv->qos_data.qos_active = 0;
1602         priv->qos_data.qos_cap.val = 0;
1603
1604         priv->rates_mask = IWL_RATES_MASK;
1605         /* Set the tx_power_user_lmt to the lowest power level
1606          * this value will get overwritten by channel max power avg
1607          * from eeprom */
1608         priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
1609
1610         ret = iwl_init_channel_map(priv);
1611         if (ret) {
1612                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1613                 goto err;
1614         }
1615
1616         ret = iwlcore_init_geos(priv);
1617         if (ret) {
1618                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1619                 goto err_free_channel_map;
1620         }
1621         iwlcore_init_hw_rates(priv, priv->ieee_rates);
1622
1623         return 0;
1624
1625 err_free_channel_map:
1626         iwl_free_channel_map(priv);
1627 err:
1628         return ret;
1629 }
1630 EXPORT_SYMBOL(iwl_init_drv);
1631
1632 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1633 {
1634         int ret = 0;
1635         s8 prev_tx_power = priv->tx_power_user_lmt;
1636
1637         if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1638                 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1639                          tx_power,
1640                          IWL_TX_POWER_TARGET_POWER_MIN);
1641                 return -EINVAL;
1642         }
1643
1644         if (tx_power > priv->tx_power_device_lmt) {
1645                 IWL_WARN(priv,
1646                         "Requested user TXPOWER %d above upper limit %d.\n",
1647                          tx_power, priv->tx_power_device_lmt);
1648                 return -EINVAL;
1649         }
1650
1651         if (priv->tx_power_user_lmt != tx_power)
1652                 force = true;
1653
1654         /* if nic is not up don't send command */
1655         if (iwl_is_ready_rf(priv)) {
1656                 priv->tx_power_user_lmt = tx_power;
1657                 if (force && priv->cfg->ops->lib->send_tx_power)
1658                         ret = priv->cfg->ops->lib->send_tx_power(priv);
1659                 else if (!priv->cfg->ops->lib->send_tx_power)
1660                         ret = -EOPNOTSUPP;
1661                 /*
1662                  * if fail to set tx_power, restore the orig. tx power
1663                  */
1664                 if (ret)
1665                         priv->tx_power_user_lmt = prev_tx_power;
1666         }
1667
1668         /*
1669          * Even this is an async host command, the command
1670          * will always report success from uCode
1671          * So once driver can placing the command into the queue
1672          * successfully, driver can use priv->tx_power_user_lmt
1673          * to reflect the current tx power
1674          */
1675         return ret;
1676 }
1677 EXPORT_SYMBOL(iwl_set_tx_power);
1678
1679 void iwl_uninit_drv(struct iwl_priv *priv)
1680 {
1681         iwl_calib_free_results(priv);
1682         iwlcore_free_geos(priv);
1683         iwl_free_channel_map(priv);
1684         kfree(priv->scan);
1685 }
1686 EXPORT_SYMBOL(iwl_uninit_drv);
1687
1688 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1689
1690 /* Free dram table */
1691 void iwl_free_isr_ict(struct iwl_priv *priv)
1692 {
1693         if (priv->ict_tbl_vir) {
1694                 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1695                                         PAGE_SIZE, priv->ict_tbl_vir,
1696                                         priv->ict_tbl_dma);
1697                 priv->ict_tbl_vir = NULL;
1698         }
1699 }
1700 EXPORT_SYMBOL(iwl_free_isr_ict);
1701
1702
1703 /* allocate dram shared table it is a PAGE_SIZE aligned
1704  * also reset all data related to ICT table interrupt.
1705  */
1706 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1707 {
1708
1709         if (priv->cfg->use_isr_legacy)
1710                 return 0;
1711         /* allocate shrared data table */
1712         priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1713                                                   ICT_COUNT) + PAGE_SIZE,
1714                                                   &priv->ict_tbl_dma);
1715         if (!priv->ict_tbl_vir)
1716                 return -ENOMEM;
1717
1718         /* align table to PAGE_SIZE boundry */
1719         priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1720
1721         IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1722                              (unsigned long long)priv->ict_tbl_dma,
1723                              (unsigned long long)priv->aligned_ict_tbl_dma,
1724                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1725
1726         priv->ict_tbl =  priv->ict_tbl_vir +
1727                           (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1728
1729         IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1730                              priv->ict_tbl, priv->ict_tbl_vir,
1731                         (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1732
1733         /* reset table and index to all 0 */
1734         memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1735         priv->ict_index = 0;
1736
1737         /* add periodic RX interrupt */
1738         priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1739         return 0;
1740 }
1741 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1742
1743 /* Device is going up inform it about using ICT interrupt table,
1744  * also we need to tell the driver to start using ICT interrupt.
1745  */
1746 int iwl_reset_ict(struct iwl_priv *priv)
1747 {
1748         u32 val;
1749         unsigned long flags;
1750
1751         if (!priv->ict_tbl_vir)
1752                 return 0;
1753
1754         spin_lock_irqsave(&priv->lock, flags);
1755         iwl_disable_interrupts(priv);
1756
1757         memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
1758
1759         val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1760
1761         val |= CSR_DRAM_INT_TBL_ENABLE;
1762         val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1763
1764         IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1765                         "aligned dma address %Lx\n",
1766                         val, (unsigned long long)priv->aligned_ict_tbl_dma);
1767
1768         iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1769         priv->use_ict = true;
1770         priv->ict_index = 0;
1771         iwl_write32(priv, CSR_INT, priv->inta_mask);
1772         iwl_enable_interrupts(priv);
1773         spin_unlock_irqrestore(&priv->lock, flags);
1774
1775         return 0;
1776 }
1777 EXPORT_SYMBOL(iwl_reset_ict);
1778
1779 /* Device is going down disable ict interrupt usage */
1780 void iwl_disable_ict(struct iwl_priv *priv)
1781 {
1782         unsigned long flags;
1783
1784         spin_lock_irqsave(&priv->lock, flags);
1785         priv->use_ict = false;
1786         spin_unlock_irqrestore(&priv->lock, flags);
1787 }
1788 EXPORT_SYMBOL(iwl_disable_ict);
1789
1790 /* interrupt handler using ict table, with this interrupt driver will
1791  * stop using INTA register to get device's interrupt, reading this register
1792  * is expensive, device will write interrupts in ICT dram table, increment
1793  * index then will fire interrupt to driver, driver will OR all ICT table
1794  * entries from current index up to table entry with 0 value. the result is
1795  * the interrupt we need to service, driver will set the entries back to 0 and
1796  * set index.
1797  */
1798 irqreturn_t iwl_isr_ict(int irq, void *data)
1799 {
1800         struct iwl_priv *priv = data;
1801         u32 inta, inta_mask;
1802         u32 val = 0;
1803
1804         if (!priv)
1805                 return IRQ_NONE;
1806
1807         /* dram interrupt table not set yet,
1808          * use legacy interrupt.
1809          */
1810         if (!priv->use_ict)
1811                 return iwl_isr(irq, data);
1812
1813         spin_lock(&priv->lock);
1814
1815         /* Disable (but don't clear!) interrupts here to avoid
1816          * back-to-back ISRs and sporadic interrupts from our NIC.
1817          * If we have something to service, the tasklet will re-enable ints.
1818          * If we *don't* have something, we'll re-enable before leaving here.
1819          */
1820         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1821         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1822
1823
1824         /* Ignore interrupt if there's nothing in NIC to service.
1825          * This may be due to IRQ shared with another device,
1826          * or due to sporadic interrupts thrown from our NIC. */
1827         if (!priv->ict_tbl[priv->ict_index]) {
1828                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1829                 goto none;
1830         }
1831
1832         /* read all entries that not 0 start with ict_index */
1833         while (priv->ict_tbl[priv->ict_index]) {
1834
1835                 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
1836                 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1837                                 priv->ict_index,
1838                                 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
1839                 priv->ict_tbl[priv->ict_index] = 0;
1840                 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1841                                                      ICT_COUNT);
1842
1843         }
1844
1845         /* We should not get this value, just ignore it. */
1846         if (val == 0xffffffff)
1847                 val = 0;
1848
1849         inta = (0xff & val) | ((0xff00 & val) << 16);
1850         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1851                         inta, inta_mask, val);
1852
1853         inta &= priv->inta_mask;
1854         priv->inta |= inta;
1855
1856         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1857         if (likely(inta))
1858                 tasklet_schedule(&priv->irq_tasklet);
1859         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1860                 /* Allow interrupt if was disabled by this handler and
1861                  * no tasklet was schedules, We should not enable interrupt,
1862                  * tasklet will enable it.
1863                  */
1864                 iwl_enable_interrupts(priv);
1865         }
1866
1867         spin_unlock(&priv->lock);
1868         return IRQ_HANDLED;
1869
1870  none:
1871         /* re-enable interrupts here since we don't have anything to service.
1872          * only Re-enable if disabled by irq.
1873          */
1874         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1875                 iwl_enable_interrupts(priv);
1876
1877         spin_unlock(&priv->lock);
1878         return IRQ_NONE;
1879 }
1880 EXPORT_SYMBOL(iwl_isr_ict);
1881
1882
1883 static irqreturn_t iwl_isr(int irq, void *data)
1884 {
1885         struct iwl_priv *priv = data;
1886         u32 inta, inta_mask;
1887 #ifdef CONFIG_IWLWIFI_DEBUG
1888         u32 inta_fh;
1889 #endif
1890         if (!priv)
1891                 return IRQ_NONE;
1892
1893         spin_lock(&priv->lock);
1894
1895         /* Disable (but don't clear!) interrupts here to avoid
1896          *    back-to-back ISRs and sporadic interrupts from our NIC.
1897          * If we have something to service, the tasklet will re-enable ints.
1898          * If we *don't* have something, we'll re-enable before leaving here. */
1899         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1900         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1901
1902         /* Discover which interrupts are active/pending */
1903         inta = iwl_read32(priv, CSR_INT);
1904
1905         /* Ignore interrupt if there's nothing in NIC to service.
1906          * This may be due to IRQ shared with another device,
1907          * or due to sporadic interrupts thrown from our NIC. */
1908         if (!inta) {
1909                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1910                 goto none;
1911         }
1912
1913         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1914                 /* Hardware disappeared. It might have already raised
1915                  * an interrupt */
1916                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1917                 goto unplugged;
1918         }
1919
1920 #ifdef CONFIG_IWLWIFI_DEBUG
1921         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1922                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1923                 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1924                               "fh 0x%08x\n", inta, inta_mask, inta_fh);
1925         }
1926 #endif
1927
1928         priv->inta |= inta;
1929         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1930         if (likely(inta))
1931                 tasklet_schedule(&priv->irq_tasklet);
1932         else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1933                 iwl_enable_interrupts(priv);
1934
1935  unplugged:
1936         spin_unlock(&priv->lock);
1937         return IRQ_HANDLED;
1938
1939  none:
1940         /* re-enable interrupts here since we don't have anything to service. */
1941         /* only Re-enable if diabled by irq  and no schedules tasklet. */
1942         if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1943                 iwl_enable_interrupts(priv);
1944
1945         spin_unlock(&priv->lock);
1946         return IRQ_NONE;
1947 }
1948
1949 irqreturn_t iwl_isr_legacy(int irq, void *data)
1950 {
1951         struct iwl_priv *priv = data;
1952         u32 inta, inta_mask;
1953         u32 inta_fh;
1954         if (!priv)
1955                 return IRQ_NONE;
1956
1957         spin_lock(&priv->lock);
1958
1959         /* Disable (but don't clear!) interrupts here to avoid
1960          *    back-to-back ISRs and sporadic interrupts from our NIC.
1961          * If we have something to service, the tasklet will re-enable ints.
1962          * If we *don't* have something, we'll re-enable before leaving here. */
1963         inta_mask = iwl_read32(priv, CSR_INT_MASK);  /* just for debug */
1964         iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1965
1966         /* Discover which interrupts are active/pending */
1967         inta = iwl_read32(priv, CSR_INT);
1968         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1969
1970         /* Ignore interrupt if there's nothing in NIC to service.
1971          * This may be due to IRQ shared with another device,
1972          * or due to sporadic interrupts thrown from our NIC. */
1973         if (!inta && !inta_fh) {
1974                 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1975                 goto none;
1976         }
1977
1978         if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1979                 /* Hardware disappeared. It might have already raised
1980                  * an interrupt */
1981                 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1982                 goto unplugged;
1983         }
1984
1985         IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1986                       inta, inta_mask, inta_fh);
1987
1988         inta &= ~CSR_INT_BIT_SCD;
1989
1990         /* iwl_irq_tasklet() will service interrupts and re-enable them */
1991         if (likely(inta || inta_fh))
1992                 tasklet_schedule(&priv->irq_tasklet);
1993
1994  unplugged:
1995         spin_unlock(&priv->lock);
1996         return IRQ_HANDLED;
1997
1998  none:
1999         /* re-enable interrupts here since we don't have anything to service. */
2000         /* only Re-enable if diabled by irq */
2001         if (test_bit(STATUS_INT_ENABLED, &priv->status))
2002                 iwl_enable_interrupts(priv);
2003         spin_unlock(&priv->lock);
2004         return IRQ_NONE;
2005 }
2006 EXPORT_SYMBOL(iwl_isr_legacy);
2007
2008 int iwl_send_bt_config(struct iwl_priv *priv)
2009 {
2010         struct iwl_bt_cmd bt_cmd = {
2011                 .flags = BT_COEX_MODE_4W,
2012                 .lead_time = BT_LEAD_TIME_DEF,
2013                 .max_kill = BT_MAX_KILL_DEF,
2014                 .kill_ack_mask = 0,
2015                 .kill_cts_mask = 0,
2016         };
2017
2018         return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
2019                                 sizeof(struct iwl_bt_cmd), &bt_cmd);
2020 }
2021 EXPORT_SYMBOL(iwl_send_bt_config);
2022
2023 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
2024 {
2025         u32 stat_flags = 0;
2026         struct iwl_host_cmd cmd = {
2027                 .id = REPLY_STATISTICS_CMD,
2028                 .flags = flags,
2029                 .len = sizeof(stat_flags),
2030                 .data = (u8 *) &stat_flags,
2031         };
2032         return iwl_send_cmd(priv, &cmd);
2033 }
2034 EXPORT_SYMBOL(iwl_send_statistics_request);
2035
2036 /**
2037  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2038  *   using sample data 100 bytes apart.  If these sample points are good,
2039  *   it's a pretty good bet that everything between them is good, too.
2040  */
2041 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2042 {
2043         u32 val;
2044         int ret = 0;
2045         u32 errcnt = 0;
2046         u32 i;
2047
2048         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2049
2050         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2051                 /* read data comes through single port, auto-incr addr */
2052                 /* NOTE: Use the debugless read so we don't flood kernel log
2053                  * if IWL_DL_IO is set */
2054                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2055                         i + IWL49_RTC_INST_LOWER_BOUND);
2056                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2057                 if (val != le32_to_cpu(*image)) {
2058                         ret = -EIO;
2059                         errcnt++;
2060                         if (errcnt >= 3)
2061                                 break;
2062                 }
2063         }
2064
2065         return ret;
2066 }
2067
2068 /**
2069  * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2070  *     looking at all data.
2071  */
2072 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2073                                  u32 len)
2074 {
2075         u32 val;
2076         u32 save_len = len;
2077         int ret = 0;
2078         u32 errcnt;
2079
2080         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2081
2082         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2083                            IWL49_RTC_INST_LOWER_BOUND);
2084
2085         errcnt = 0;
2086         for (; len > 0; len -= sizeof(u32), image++) {
2087                 /* read data comes through single port, auto-incr addr */
2088                 /* NOTE: Use the debugless read so we don't flood kernel log
2089                  * if IWL_DL_IO is set */
2090                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2091                 if (val != le32_to_cpu(*image)) {
2092                         IWL_ERR(priv, "uCode INST section is invalid at "
2093                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2094                                   save_len - len, val, le32_to_cpu(*image));
2095                         ret = -EIO;
2096                         errcnt++;
2097                         if (errcnt >= 20)
2098                                 break;
2099                 }
2100         }
2101
2102         if (!errcnt)
2103                 IWL_DEBUG_INFO(priv,
2104                     "ucode image in INSTRUCTION memory is good\n");
2105
2106         return ret;
2107 }
2108
2109 /**
2110  * iwl_verify_ucode - determine which instruction image is in SRAM,
2111  *    and verify its contents
2112  */
2113 int iwl_verify_ucode(struct iwl_priv *priv)
2114 {
2115         __le32 *image;
2116         u32 len;
2117         int ret;
2118
2119         /* Try bootstrap */
2120         image = (__le32 *)priv->ucode_boot.v_addr;
2121         len = priv->ucode_boot.len;
2122         ret = iwlcore_verify_inst_sparse(priv, image, len);
2123         if (!ret) {
2124                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2125                 return 0;
2126         }
2127
2128         /* Try initialize */
2129         image = (__le32 *)priv->ucode_init.v_addr;
2130         len = priv->ucode_init.len;
2131         ret = iwlcore_verify_inst_sparse(priv, image, len);
2132         if (!ret) {
2133                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2134                 return 0;
2135         }
2136
2137         /* Try runtime/protocol */
2138         image = (__le32 *)priv->ucode_code.v_addr;
2139         len = priv->ucode_code.len;
2140         ret = iwlcore_verify_inst_sparse(priv, image, len);
2141         if (!ret) {
2142                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2143                 return 0;
2144         }
2145
2146         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2147
2148         /* Since nothing seems to match, show first several data entries in
2149          * instruction SRAM, so maybe visual inspection will give a clue.
2150          * Selection of bootstrap image (vs. other images) is arbitrary. */
2151         image = (__le32 *)priv->ucode_boot.v_addr;
2152         len = priv->ucode_boot.len;
2153         ret = iwl_verify_inst_full(priv, image, len);
2154
2155         return ret;
2156 }
2157 EXPORT_SYMBOL(iwl_verify_ucode);
2158
2159
2160 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2161 {
2162         struct iwl_ct_kill_config cmd;
2163         struct iwl_ct_kill_throttling_config adv_cmd;
2164         unsigned long flags;
2165         int ret = 0;
2166
2167         spin_lock_irqsave(&priv->lock, flags);
2168         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2169                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2170         spin_unlock_irqrestore(&priv->lock, flags);
2171         priv->thermal_throttle.ct_kill_toggle = false;
2172
2173         if (priv->cfg->support_ct_kill_exit) {
2174                 adv_cmd.critical_temperature_enter =
2175                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2176                 adv_cmd.critical_temperature_exit =
2177                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2178
2179                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2180                                        sizeof(adv_cmd), &adv_cmd);
2181                 if (ret)
2182                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2183                 else
2184                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2185                                         "succeeded, "
2186                                         "critical temperature enter is %d,"
2187                                         "exit is %d\n",
2188                                        priv->hw_params.ct_kill_threshold,
2189                                        priv->hw_params.ct_kill_exit_threshold);
2190         } else {
2191                 cmd.critical_temperature_R =
2192                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2193
2194                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2195                                        sizeof(cmd), &cmd);
2196                 if (ret)
2197                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2198                 else
2199                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2200                                         "succeeded, "
2201                                         "critical temperature is %d\n",
2202                                         priv->hw_params.ct_kill_threshold);
2203         }
2204 }
2205 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2206
2207
2208 /*
2209  * CARD_STATE_CMD
2210  *
2211  * Use: Sets the device's internal card state to enable, disable, or halt
2212  *
2213  * When in the 'enable' state the card operates as normal.
2214  * When in the 'disable' state, the card enters into a low power mode.
2215  * When in the 'halt' state, the card is shut down and must be fully
2216  * restarted to come back on.
2217  */
2218 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2219 {
2220         struct iwl_host_cmd cmd = {
2221                 .id = REPLY_CARD_STATE_CMD,
2222                 .len = sizeof(u32),
2223                 .data = &flags,
2224                 .flags = meta_flag,
2225         };
2226
2227         return iwl_send_cmd(priv, &cmd);
2228 }
2229
2230 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2231                            struct iwl_rx_mem_buffer *rxb)
2232 {
2233 #ifdef CONFIG_IWLWIFI_DEBUG
2234         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2235         struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2236         IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2237                      sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2238 #endif
2239 }
2240 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2241
2242 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2243                                       struct iwl_rx_mem_buffer *rxb)
2244 {
2245         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2246         u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2247         IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2248                         "notification for %s:\n", len,
2249                         get_cmd_string(pkt->hdr.cmd));
2250         iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
2251 }
2252 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2253
2254 void iwl_rx_reply_error(struct iwl_priv *priv,
2255                         struct iwl_rx_mem_buffer *rxb)
2256 {
2257         struct iwl_rx_packet *pkt = rxb_addr(rxb);
2258
2259         IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2260                 "seq 0x%04X ser 0x%08X\n",
2261                 le32_to_cpu(pkt->u.err_resp.error_type),
2262                 get_cmd_string(pkt->u.err_resp.cmd_id),
2263                 pkt->u.err_resp.cmd_id,
2264                 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2265                 le32_to_cpu(pkt->u.err_resp.error_info));
2266 }
2267 EXPORT_SYMBOL(iwl_rx_reply_error);
2268
2269 void iwl_clear_isr_stats(struct iwl_priv *priv)
2270 {
2271         memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2272 }
2273
2274 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2275                            const struct ieee80211_tx_queue_params *params)
2276 {
2277         struct iwl_priv *priv = hw->priv;
2278         unsigned long flags;
2279         int q;
2280
2281         IWL_DEBUG_MAC80211(priv, "enter\n");
2282
2283         if (!iwl_is_ready_rf(priv)) {
2284                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2285                 return -EIO;
2286         }
2287
2288         if (queue >= AC_NUM) {
2289                 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2290                 return 0;
2291         }
2292
2293         q = AC_NUM - 1 - queue;
2294
2295         spin_lock_irqsave(&priv->lock, flags);
2296
2297         priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2298         priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2299         priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2300         priv->qos_data.def_qos_parm.ac[q].edca_txop =
2301                         cpu_to_le16((params->txop * 32));
2302
2303         priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2304         priv->qos_data.qos_active = 1;
2305
2306         if (priv->iw_mode == NL80211_IFTYPE_AP)
2307                 iwl_activate_qos(priv, 1);
2308         else if (priv->assoc_id && iwl_is_associated(priv))
2309                 iwl_activate_qos(priv, 0);
2310
2311         spin_unlock_irqrestore(&priv->lock, flags);
2312
2313         IWL_DEBUG_MAC80211(priv, "leave\n");
2314         return 0;
2315 }
2316 EXPORT_SYMBOL(iwl_mac_conf_tx);
2317
2318 static void iwl_ht_conf(struct iwl_priv *priv,
2319                         struct ieee80211_bss_conf *bss_conf)
2320 {
2321         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2322         struct ieee80211_sta *sta;
2323
2324         IWL_DEBUG_MAC80211(priv, "enter: \n");
2325
2326         if (!ht_conf->is_ht)
2327                 return;
2328
2329         ht_conf->ht_protection =
2330                 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2331         ht_conf->non_GF_STA_present =
2332                 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2333
2334         ht_conf->single_chain_sufficient = false;
2335
2336         switch (priv->iw_mode) {
2337         case NL80211_IFTYPE_STATION:
2338                 rcu_read_lock();
2339                 sta = ieee80211_find_sta(priv->hw, priv->bssid);
2340                 if (sta) {
2341                         struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2342                         int maxstreams;
2343
2344                         maxstreams = (ht_cap->mcs.tx_params &
2345                                       IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2346                                         >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2347                         maxstreams += 1;
2348
2349                         if ((ht_cap->mcs.rx_mask[1] == 0) &&
2350                             (ht_cap->mcs.rx_mask[2] == 0))
2351                                 ht_conf->single_chain_sufficient = true;
2352                         if (maxstreams <= 1)
2353                                 ht_conf->single_chain_sufficient = true;
2354                 } else {
2355                         /*
2356                          * If at all, this can only happen through a race
2357                          * when the AP disconnects us while we're still
2358                          * setting up the connection, in that case mac80211
2359                          * will soon tell us about that.
2360                          */
2361                         ht_conf->single_chain_sufficient = true;
2362                 }
2363                 rcu_read_unlock();
2364                 break;
2365         case NL80211_IFTYPE_ADHOC:
2366                 ht_conf->single_chain_sufficient = true;
2367                 break;
2368         default:
2369                 break;
2370         }
2371
2372         IWL_DEBUG_MAC80211(priv, "leave\n");
2373 }
2374
2375 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2376 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2377                           struct ieee80211_vif *vif,
2378                           struct ieee80211_bss_conf *bss_conf,
2379                           u32 changes)
2380 {
2381         struct iwl_priv *priv = hw->priv;
2382         int ret;
2383
2384         IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2385
2386         if (!iwl_is_alive(priv))
2387                 return;
2388
2389         mutex_lock(&priv->mutex);
2390
2391         if (changes & BSS_CHANGED_BEACON &&
2392             priv->iw_mode == NL80211_IFTYPE_AP) {
2393                 dev_kfree_skb(priv->ibss_beacon);
2394                 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2395         }
2396
2397         if (changes & BSS_CHANGED_BEACON_INT) {
2398                 priv->beacon_int = bss_conf->beacon_int;
2399                 /* TODO: in AP mode, do something to make this take effect */
2400         }
2401
2402         if (changes & BSS_CHANGED_BSSID) {
2403                 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2404
2405                 /*
2406                  * If there is currently a HW scan going on in the
2407                  * background then we need to cancel it else the RXON
2408                  * below/in post_associate will fail.
2409                  */
2410                 if (iwl_scan_cancel_timeout(priv, 100)) {
2411                         IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2412                         IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2413                         mutex_unlock(&priv->mutex);
2414                         return;
2415                 }
2416
2417                 /* mac80211 only sets assoc when in STATION mode */
2418                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2419                     bss_conf->assoc) {
2420                         memcpy(priv->staging_rxon.bssid_addr,
2421                                bss_conf->bssid, ETH_ALEN);
2422
2423                         /* currently needed in a few places */
2424                         memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2425                 } else {
2426                         priv->staging_rxon.filter_flags &=
2427                                 ~RXON_FILTER_ASSOC_MSK;
2428                 }
2429
2430         }
2431
2432         /*
2433          * This needs to be after setting the BSSID in case
2434          * mac80211 decides to do both changes at once because
2435          * it will invoke post_associate.
2436          */
2437         if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2438             changes & BSS_CHANGED_BEACON) {
2439                 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2440
2441                 if (beacon)
2442                         iwl_mac_beacon_update(hw, beacon);
2443         }
2444
2445         if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2446                 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2447                                    bss_conf->use_short_preamble);
2448                 if (bss_conf->use_short_preamble)
2449                         priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2450                 else
2451                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2452         }
2453
2454         if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2455                 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2456                 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2457                         priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2458                 else
2459                         priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2460         }
2461
2462         if (changes & BSS_CHANGED_BASIC_RATES) {
2463                 /* XXX use this information
2464                  *
2465                  * To do that, remove code from iwl_set_rate() and put something
2466                  * like this here:
2467                  *
2468                 if (A-band)
2469                         priv->staging_rxon.ofdm_basic_rates =
2470                                 bss_conf->basic_rates;
2471                 else
2472                         priv->staging_rxon.ofdm_basic_rates =
2473                                 bss_conf->basic_rates >> 4;
2474                         priv->staging_rxon.cck_basic_rates =
2475                                 bss_conf->basic_rates & 0xF;
2476                  */
2477         }
2478
2479         if (changes & BSS_CHANGED_HT) {
2480                 iwl_ht_conf(priv, bss_conf);
2481
2482                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2483                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2484         }
2485
2486         if (changes & BSS_CHANGED_ASSOC) {
2487                 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2488                 if (bss_conf->assoc) {
2489                         priv->assoc_id = bss_conf->aid;
2490                         priv->beacon_int = bss_conf->beacon_int;
2491                         priv->timestamp = bss_conf->timestamp;
2492                         priv->assoc_capability = bss_conf->assoc_capability;
2493
2494                         iwl_led_associate(priv);
2495
2496                         /*
2497                          * We have just associated, don't start scan too early
2498                          * leave time for EAPOL exchange to complete.
2499                          *
2500                          * XXX: do this in mac80211
2501                          */
2502                         priv->next_scan_jiffies = jiffies +
2503                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2504                         if (!iwl_is_rfkill(priv))
2505                                 priv->cfg->ops->lib->post_associate(priv);
2506                 } else {
2507                         priv->assoc_id = 0;
2508                         iwl_led_disassociate(priv);
2509                 }
2510         }
2511
2512         if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2513                 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2514                                    changes);
2515                 ret = iwl_send_rxon_assoc(priv);
2516                 if (!ret) {
2517                         /* Sync active_rxon with latest change. */
2518                         memcpy((void *)&priv->active_rxon,
2519                                 &priv->staging_rxon,
2520                                 sizeof(struct iwl_rxon_cmd));
2521                 }
2522         }
2523
2524         mutex_unlock(&priv->mutex);
2525
2526         IWL_DEBUG_MAC80211(priv, "leave\n");
2527 }
2528 EXPORT_SYMBOL(iwl_bss_info_changed);
2529
2530 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2531 {
2532         struct iwl_priv *priv = hw->priv;
2533         unsigned long flags;
2534         __le64 timestamp;
2535
2536         IWL_DEBUG_MAC80211(priv, "enter\n");
2537
2538         if (!iwl_is_ready_rf(priv)) {
2539                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2540                 return -EIO;
2541         }
2542
2543         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2544                 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2545                 return -EIO;
2546         }
2547
2548         spin_lock_irqsave(&priv->lock, flags);
2549
2550         if (priv->ibss_beacon)
2551                 dev_kfree_skb(priv->ibss_beacon);
2552
2553         priv->ibss_beacon = skb;
2554
2555         priv->assoc_id = 0;
2556         timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2557         priv->timestamp = le64_to_cpu(timestamp);
2558
2559         IWL_DEBUG_MAC80211(priv, "leave\n");
2560         spin_unlock_irqrestore(&priv->lock, flags);
2561
2562         iwl_reset_qos(priv);
2563
2564         priv->cfg->ops->lib->post_associate(priv);
2565
2566
2567         return 0;
2568 }
2569 EXPORT_SYMBOL(iwl_mac_beacon_update);
2570
2571 int iwl_set_mode(struct iwl_priv *priv, int mode)
2572 {
2573         if (mode == NL80211_IFTYPE_ADHOC) {
2574                 const struct iwl_channel_info *ch_info;
2575
2576                 ch_info = iwl_get_channel_info(priv,
2577                         priv->band,
2578                         le16_to_cpu(priv->staging_rxon.channel));
2579
2580                 if (!ch_info || !is_channel_ibss(ch_info)) {
2581                         IWL_ERR(priv, "channel %d not IBSS channel\n",
2582                                   le16_to_cpu(priv->staging_rxon.channel));
2583                         return -EINVAL;
2584                 }
2585         }
2586
2587         iwl_connection_init_rx_config(priv, mode);
2588
2589         if (priv->cfg->ops->hcmd->set_rxon_chain)
2590                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2591
2592         memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2593
2594         iwl_clear_stations_table(priv);
2595
2596         /* dont commit rxon if rf-kill is on*/
2597         if (!iwl_is_ready_rf(priv))
2598                 return -EAGAIN;
2599
2600         iwlcore_commit_rxon(priv);
2601
2602         return 0;
2603 }
2604 EXPORT_SYMBOL(iwl_set_mode);
2605
2606 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2607                                  struct ieee80211_if_init_conf *conf)
2608 {
2609         struct iwl_priv *priv = hw->priv;
2610         unsigned long flags;
2611
2612         IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2613
2614         if (priv->vif) {
2615                 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2616                 return -EOPNOTSUPP;
2617         }
2618
2619         spin_lock_irqsave(&priv->lock, flags);
2620         priv->vif = conf->vif;
2621         priv->iw_mode = conf->type;
2622
2623         spin_unlock_irqrestore(&priv->lock, flags);
2624
2625         mutex_lock(&priv->mutex);
2626
2627         if (conf->mac_addr) {
2628                 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2629                 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2630         }
2631
2632         if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2633                 /* we are not ready, will run again when ready */
2634                 set_bit(STATUS_MODE_PENDING, &priv->status);
2635
2636         mutex_unlock(&priv->mutex);
2637
2638         IWL_DEBUG_MAC80211(priv, "leave\n");
2639         return 0;
2640 }
2641 EXPORT_SYMBOL(iwl_mac_add_interface);
2642
2643 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2644                                      struct ieee80211_if_init_conf *conf)
2645 {
2646         struct iwl_priv *priv = hw->priv;
2647
2648         IWL_DEBUG_MAC80211(priv, "enter\n");
2649
2650         mutex_lock(&priv->mutex);
2651
2652         if (iwl_is_ready_rf(priv)) {
2653                 iwl_scan_cancel_timeout(priv, 100);
2654                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2655                 iwlcore_commit_rxon(priv);
2656         }
2657         if (priv->vif == conf->vif) {
2658                 priv->vif = NULL;
2659                 memset(priv->bssid, 0, ETH_ALEN);
2660         }
2661         mutex_unlock(&priv->mutex);
2662
2663         IWL_DEBUG_MAC80211(priv, "leave\n");
2664
2665 }
2666 EXPORT_SYMBOL(iwl_mac_remove_interface);
2667
2668 /**
2669  * iwl_mac_config - mac80211 config callback
2670  *
2671  * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2672  * be set inappropriately and the driver currently sets the hardware up to
2673  * use it whenever needed.
2674  */
2675 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2676 {
2677         struct iwl_priv *priv = hw->priv;
2678         const struct iwl_channel_info *ch_info;
2679         struct ieee80211_conf *conf = &hw->conf;
2680         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2681         unsigned long flags = 0;
2682         int ret = 0;
2683         u16 ch;
2684         int scan_active = 0;
2685
2686         mutex_lock(&priv->mutex);
2687
2688         IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2689                                         conf->channel->hw_value, changed);
2690
2691         if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2692                         test_bit(STATUS_SCANNING, &priv->status))) {
2693                 scan_active = 1;
2694                 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2695         }
2696
2697
2698         /* during scanning mac80211 will delay channel setting until
2699          * scan finish with changed = 0
2700          */
2701         if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2702                 if (scan_active)
2703                         goto set_ch_out;
2704
2705                 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2706                 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2707                 if (!is_channel_valid(ch_info)) {
2708                         IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2709                         ret = -EINVAL;
2710                         goto set_ch_out;
2711                 }
2712
2713                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2714                         !is_channel_ibss(ch_info)) {
2715                         IWL_ERR(priv, "channel %d in band %d not "
2716                                 "IBSS channel\n",
2717                                 conf->channel->hw_value, conf->channel->band);
2718                         ret = -EINVAL;
2719                         goto set_ch_out;
2720                 }
2721
2722                 if (iwl_is_associated(priv) &&
2723                     (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2724                     priv->cfg->ops->lib->set_channel_switch) {
2725                         ret = priv->cfg->ops->lib->set_channel_switch(priv,
2726                                 ch);
2727                         goto out;
2728                 }
2729
2730                 spin_lock_irqsave(&priv->lock, flags);
2731
2732                 /* Configure HT40 channels */
2733                 ht_conf->is_ht = conf_is_ht(conf);
2734                 if (ht_conf->is_ht) {
2735                         if (conf_is_ht40_minus(conf)) {
2736                                 ht_conf->extension_chan_offset =
2737                                         IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2738                                 ht_conf->is_40mhz = true;
2739                         } else if (conf_is_ht40_plus(conf)) {
2740                                 ht_conf->extension_chan_offset =
2741                                         IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2742                                 ht_conf->is_40mhz = true;
2743                         } else {
2744                                 ht_conf->extension_chan_offset =
2745                                         IEEE80211_HT_PARAM_CHA_SEC_NONE;
2746                                 ht_conf->is_40mhz = false;
2747                         }
2748                 } else
2749                         ht_conf->is_40mhz = false;
2750                 /* Default to no protection. Protection mode will later be set
2751                  * from BSS config in iwl_ht_conf */
2752                 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2753
2754                 /* if we are switching from ht to 2.4 clear flags
2755                  * from any ht related info since 2.4 does not
2756                  * support ht */
2757                 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2758                         priv->staging_rxon.flags = 0;
2759
2760                 iwl_set_rxon_channel(priv, conf->channel);
2761
2762                 iwl_set_flags_for_band(priv, conf->channel->band);
2763                 spin_unlock_irqrestore(&priv->lock, flags);
2764  set_ch_out:
2765                 /* The list of supported rates and rate mask can be different
2766                  * for each band; since the band may have changed, reset
2767                  * the rate mask to what mac80211 lists */
2768                 iwl_set_rate(priv);
2769         }
2770
2771         if (changed & (IEEE80211_CONF_CHANGE_PS |
2772                         IEEE80211_CONF_CHANGE_IDLE)) {
2773                 ret = iwl_power_update_mode(priv, false);
2774                 if (ret)
2775                         IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2776         }
2777
2778         if (changed & IEEE80211_CONF_CHANGE_POWER) {
2779                 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2780                         priv->tx_power_user_lmt, conf->power_level);
2781
2782                 iwl_set_tx_power(priv, conf->power_level, false);
2783         }
2784
2785         /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2786         if (priv->cfg->ops->hcmd->set_rxon_chain)
2787                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2788
2789         if (!iwl_is_ready(priv)) {
2790                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2791                 goto out;
2792         }
2793
2794         if (scan_active)
2795                 goto out;
2796
2797         if (memcmp(&priv->active_rxon,
2798                    &priv->staging_rxon, sizeof(priv->staging_rxon)))
2799                 iwlcore_commit_rxon(priv);
2800         else
2801                 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2802
2803
2804 out:
2805         IWL_DEBUG_MAC80211(priv, "leave\n");
2806         mutex_unlock(&priv->mutex);
2807         return ret;
2808 }
2809 EXPORT_SYMBOL(iwl_mac_config);
2810
2811 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2812                          struct ieee80211_tx_queue_stats *stats)
2813 {
2814         struct iwl_priv *priv = hw->priv;
2815         int i, avail;
2816         struct iwl_tx_queue *txq;
2817         struct iwl_queue *q;
2818         unsigned long flags;
2819
2820         IWL_DEBUG_MAC80211(priv, "enter\n");
2821
2822         if (!iwl_is_ready_rf(priv)) {
2823                 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2824                 return -EIO;
2825         }
2826
2827         spin_lock_irqsave(&priv->lock, flags);
2828
2829         for (i = 0; i < AC_NUM; i++) {
2830                 txq = &priv->txq[i];
2831                 q = &txq->q;
2832                 avail = iwl_queue_space(q);
2833
2834                 stats[i].len = q->n_window - avail;
2835                 stats[i].limit = q->n_window - q->high_mark;
2836                 stats[i].count = q->n_window;
2837
2838         }
2839         spin_unlock_irqrestore(&priv->lock, flags);
2840
2841         IWL_DEBUG_MAC80211(priv, "leave\n");
2842
2843         return 0;
2844 }
2845 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2846
2847 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2848 {
2849         struct iwl_priv *priv = hw->priv;
2850         unsigned long flags;
2851
2852         mutex_lock(&priv->mutex);
2853         IWL_DEBUG_MAC80211(priv, "enter\n");
2854
2855         spin_lock_irqsave(&priv->lock, flags);
2856         memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2857         spin_unlock_irqrestore(&priv->lock, flags);
2858
2859         iwl_reset_qos(priv);
2860
2861         spin_lock_irqsave(&priv->lock, flags);
2862         priv->assoc_id = 0;
2863         priv->assoc_capability = 0;
2864         priv->assoc_station_added = 0;
2865
2866         /* new association get rid of ibss beacon skb */
2867         if (priv->ibss_beacon)
2868                 dev_kfree_skb(priv->ibss_beacon);
2869
2870         priv->ibss_beacon = NULL;
2871
2872         priv->beacon_int = priv->vif->bss_conf.beacon_int;
2873         priv->timestamp = 0;
2874         if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2875                 priv->beacon_int = 0;
2876
2877         spin_unlock_irqrestore(&priv->lock, flags);
2878
2879         if (!iwl_is_ready_rf(priv)) {
2880                 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2881                 mutex_unlock(&priv->mutex);
2882                 return;
2883         }
2884
2885         /* we are restarting association process
2886          * clear RXON_FILTER_ASSOC_MSK bit
2887          */
2888         if (priv->iw_mode != NL80211_IFTYPE_AP) {
2889                 iwl_scan_cancel_timeout(priv, 100);
2890                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2891                 iwlcore_commit_rxon(priv);
2892         }
2893
2894         if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2895                 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2896                 mutex_unlock(&priv->mutex);
2897                 return;
2898         }
2899
2900         iwl_set_rate(priv);
2901
2902         mutex_unlock(&priv->mutex);
2903
2904         IWL_DEBUG_MAC80211(priv, "leave\n");
2905 }
2906 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2907
2908 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2909 {
2910         if (!priv->txq)
2911                 priv->txq = kzalloc(
2912                         sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2913                         GFP_KERNEL);
2914         if (!priv->txq) {
2915                 IWL_ERR(priv, "Not enough memory for txq \n");
2916                 return -ENOMEM;
2917         }
2918         return 0;
2919 }
2920 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2921
2922 void iwl_free_txq_mem(struct iwl_priv *priv)
2923 {
2924         kfree(priv->txq);
2925         priv->txq = NULL;
2926 }
2927 EXPORT_SYMBOL(iwl_free_txq_mem);
2928
2929 #ifdef CONFIG_IWLWIFI_DEBUGFS
2930
2931 #define IWL_TRAFFIC_DUMP_SIZE   (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2932
2933 void iwl_reset_traffic_log(struct iwl_priv *priv)
2934 {
2935         priv->tx_traffic_idx = 0;
2936         priv->rx_traffic_idx = 0;
2937         if (priv->tx_traffic)
2938                 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2939         if (priv->rx_traffic)
2940                 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2941 }
2942
2943 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2944 {
2945         u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2946
2947         if (iwl_debug_level & IWL_DL_TX) {
2948                 if (!priv->tx_traffic) {
2949                         priv->tx_traffic =
2950                                 kzalloc(traffic_size, GFP_KERNEL);
2951                         if (!priv->tx_traffic)
2952                                 return -ENOMEM;
2953                 }
2954         }
2955         if (iwl_debug_level & IWL_DL_RX) {
2956                 if (!priv->rx_traffic) {
2957                         priv->rx_traffic =
2958                                 kzalloc(traffic_size, GFP_KERNEL);
2959                         if (!priv->rx_traffic)
2960                                 return -ENOMEM;
2961                 }
2962         }
2963         iwl_reset_traffic_log(priv);
2964         return 0;
2965 }
2966 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2967
2968 void iwl_free_traffic_mem(struct iwl_priv *priv)
2969 {
2970         kfree(priv->tx_traffic);
2971         priv->tx_traffic = NULL;
2972
2973         kfree(priv->rx_traffic);
2974         priv->rx_traffic = NULL;
2975 }
2976 EXPORT_SYMBOL(iwl_free_traffic_mem);
2977
2978 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2979                       u16 length, struct ieee80211_hdr *header)
2980 {
2981         __le16 fc;
2982         u16 len;
2983
2984         if (likely(!(iwl_debug_level & IWL_DL_TX)))
2985                 return;
2986
2987         if (!priv->tx_traffic)
2988                 return;
2989
2990         fc = header->frame_control;
2991         if (ieee80211_is_data(fc)) {
2992                 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2993                        ? IWL_TRAFFIC_ENTRY_SIZE : length;
2994                 memcpy((priv->tx_traffic +
2995                        (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2996                        header, len);
2997                 priv->tx_traffic_idx =
2998                         (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2999         }
3000 }
3001 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3002
3003 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3004                       u16 length, struct ieee80211_hdr *header)
3005 {
3006         __le16 fc;
3007         u16 len;
3008
3009         if (likely(!(iwl_debug_level & IWL_DL_RX)))
3010                 return;
3011
3012         if (!priv->rx_traffic)
3013                 return;
3014
3015         fc = header->frame_control;
3016         if (ieee80211_is_data(fc)) {
3017                 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3018                        ? IWL_TRAFFIC_ENTRY_SIZE : length;
3019                 memcpy((priv->rx_traffic +
3020                        (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3021                        header, len);
3022                 priv->rx_traffic_idx =
3023                         (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3024         }
3025 }
3026 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
3027
3028 const char *get_mgmt_string(int cmd)
3029 {
3030         switch (cmd) {
3031                 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3032                 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3033                 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3034                 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3035                 IWL_CMD(MANAGEMENT_PROBE_REQ);
3036                 IWL_CMD(MANAGEMENT_PROBE_RESP);
3037                 IWL_CMD(MANAGEMENT_BEACON);
3038                 IWL_CMD(MANAGEMENT_ATIM);
3039                 IWL_CMD(MANAGEMENT_DISASSOC);
3040                 IWL_CMD(MANAGEMENT_AUTH);
3041                 IWL_CMD(MANAGEMENT_DEAUTH);
3042                 IWL_CMD(MANAGEMENT_ACTION);
3043         default:
3044                 return "UNKNOWN";
3045
3046         }
3047 }
3048
3049 const char *get_ctrl_string(int cmd)
3050 {
3051         switch (cmd) {
3052                 IWL_CMD(CONTROL_BACK_REQ);
3053                 IWL_CMD(CONTROL_BACK);
3054                 IWL_CMD(CONTROL_PSPOLL);
3055                 IWL_CMD(CONTROL_RTS);
3056                 IWL_CMD(CONTROL_CTS);
3057                 IWL_CMD(CONTROL_ACK);
3058                 IWL_CMD(CONTROL_CFEND);
3059                 IWL_CMD(CONTROL_CFENDACK);
3060         default:
3061                 return "UNKNOWN";
3062
3063         }
3064 }
3065
3066 void iwl_clear_tx_stats(struct iwl_priv *priv)
3067 {
3068         memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3069
3070 }
3071
3072 void iwl_clear_rx_stats(struct iwl_priv *priv)
3073 {
3074         memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3075 }
3076
3077 /*
3078  * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3079  * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3080  * Use debugFs to display the rx/rx_statistics
3081  * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3082  * information will be recorded, but DATA pkt still will be recorded
3083  * for the reason of iwl_led.c need to control the led blinking based on
3084  * number of tx and rx data.
3085  *
3086  */
3087 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3088 {
3089         struct traffic_stats    *stats;
3090
3091         if (is_tx)
3092                 stats = &priv->tx_stats;
3093         else
3094                 stats = &priv->rx_stats;
3095
3096         if (ieee80211_is_mgmt(fc)) {
3097                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3098                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3099                         stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3100                         break;
3101                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3102                         stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3103                         break;
3104                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3105                         stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3106                         break;
3107                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3108                         stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3109                         break;
3110                 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3111                         stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3112                         break;
3113                 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3114                         stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3115                         break;
3116                 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3117                         stats->mgmt[MANAGEMENT_BEACON]++;
3118                         break;
3119                 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3120                         stats->mgmt[MANAGEMENT_ATIM]++;
3121                         break;
3122                 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3123                         stats->mgmt[MANAGEMENT_DISASSOC]++;
3124                         break;
3125                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3126                         stats->mgmt[MANAGEMENT_AUTH]++;
3127                         break;
3128                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3129                         stats->mgmt[MANAGEMENT_DEAUTH]++;
3130                         break;
3131                 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3132                         stats->mgmt[MANAGEMENT_ACTION]++;
3133                         break;
3134                 }
3135         } else if (ieee80211_is_ctl(fc)) {
3136                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3137                 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3138                         stats->ctrl[CONTROL_BACK_REQ]++;
3139                         break;
3140                 case cpu_to_le16(IEEE80211_STYPE_BACK):
3141                         stats->ctrl[CONTROL_BACK]++;
3142                         break;
3143                 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3144                         stats->ctrl[CONTROL_PSPOLL]++;
3145                         break;
3146                 case cpu_to_le16(IEEE80211_STYPE_RTS):
3147                         stats->ctrl[CONTROL_RTS]++;
3148                         break;
3149                 case cpu_to_le16(IEEE80211_STYPE_CTS):
3150                         stats->ctrl[CONTROL_CTS]++;
3151                         break;
3152                 case cpu_to_le16(IEEE80211_STYPE_ACK):
3153                         stats->ctrl[CONTROL_ACK]++;
3154                         break;
3155                 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3156                         stats->ctrl[CONTROL_CFEND]++;
3157                         break;
3158                 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3159                         stats->ctrl[CONTROL_CFENDACK]++;
3160                         break;
3161                 }
3162         } else {
3163                 /* data */
3164                 stats->data_cnt++;
3165                 stats->data_bytes += len;
3166         }
3167 }
3168 EXPORT_SYMBOL(iwl_update_stats);
3169 #endif
3170
3171 #ifdef CONFIG_PM
3172
3173 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3174 {
3175         struct iwl_priv *priv = pci_get_drvdata(pdev);
3176
3177         /*
3178          * This function is called when system goes into suspend state
3179          * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3180          * first but since iwl_mac_stop() has no knowledge of who the caller is,
3181          * it will not call apm_ops.stop() to stop the DMA operation.
3182          * Calling apm_ops.stop here to make sure we stop the DMA.
3183          */
3184         priv->cfg->ops->lib->apm_ops.stop(priv);
3185
3186         pci_save_state(pdev);
3187         pci_disable_device(pdev);
3188         pci_set_power_state(pdev, PCI_D3hot);
3189
3190         return 0;
3191 }
3192 EXPORT_SYMBOL(iwl_pci_suspend);
3193
3194 int iwl_pci_resume(struct pci_dev *pdev)
3195 {
3196         struct iwl_priv *priv = pci_get_drvdata(pdev);
3197         int ret;
3198
3199         pci_set_power_state(pdev, PCI_D0);
3200         ret = pci_enable_device(pdev);
3201         if (ret)
3202                 return ret;
3203         pci_restore_state(pdev);
3204         iwl_enable_interrupts(priv);
3205
3206         return 0;
3207 }
3208 EXPORT_SYMBOL(iwl_pci_resume);
3209
3210 #endif /* CONFIG_PM */