SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/skbuff.h>
  37 #include <linux/netdevice.h>
  38 #include <linux/wireless.h>
  39 #include <linux/firmware.h>
  40 #include <linux/etherdevice.h>
  41 #include <linux/if_arp.h>
  42
  43 #include <net/mac80211.h>
  44
  45 #include <asm/div64.h>
  46
  47 #define DRV_NAME        "iwlagn"
  48
  49 #include "iwl-eeprom.h"
  50 #include "iwl-dev.h"
  51 #include "iwl-core.h"
  52 #include "iwl-io.h"
  53 #include "iwl-helpers.h"
  54 #include "iwl-sta.h"
  55 #include "iwl-calib.h"
  56
  57
  58 /******************************************************************************
  59  *
  60  * module boiler plate
  61  *
  62  ******************************************************************************/
  63
  64 /*
  65  * module name, copyright, version, etc.
  66  */
  67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  68
  69 #ifdef CONFIG_IWLWIFI_DEBUG
  70 #define VD "d"
  71 #else
  72 #define VD
  73 #endif
  74
  75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  76 #define VS "s"
  77 #else
  78 #define VS
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD VS
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 /*************** STATION TABLE MANAGEMENT ****
  91  * mac80211 should be examined to determine if sta_info is duplicating
  92  * the functionality provided here
  93  */
  94
  95 /**************************************************************/
  96
  97 /**
  98  * iwl_commit_rxon - commit staging_rxon to hardware
  99  *
 100  * The RXON command in staging_rxon is committed to the hardware and
 101  * the active_rxon structure is updated with the new data.  This
 102  * function correctly transitions out of the RXON_ASSOC_MSK state if
 103  * a HW tune is required based on the RXON structure changes.
 104  */
 105 int iwl_commit_rxon(struct iwl_priv *priv)
 106 {
 107         /* cast away the const for active_rxon in this function */
 108         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 109         int ret;
 110         bool new_assoc =
 111                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 112
 113         if (!iwl_is_alive(priv))
 114                 return -EBUSY;
 115
 116         /* always get timestamp with Rx frame */
 117         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 118         /* allow CTS-to-self if possible. this is relevant only for
 119          * 5000, but will not damage 4965 */
 120         priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 121
 122         ret = iwl_check_rxon_cmd(priv);
 123         if (ret) {
 124                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 125                 return -EINVAL;
 126         }
 127
 128         /* If we don't need to send a full RXON, we can use
 129          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 130          * and other flags for the current radio configuration. */
 131         if (!iwl_full_rxon_required(priv)) {
 132                 ret = iwl_send_rxon_assoc(priv);
 133                 if (ret) {
 134                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 135                         return ret;
 136                 }
 137
 138                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 139                 return 0;
 140         }
 141
 142         /* station table will be cleared */
 143         priv->assoc_station_added = 0;
 144
 145         /* If we are currently associated and the new config requires
 146          * an RXON_ASSOC and the new config wants the associated mask enabled,
 147          * we must clear the associated from the active configuration
 148          * before we apply the new config */
 149         if (iwl_is_associated(priv) && new_assoc) {
 150                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 151                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 152
 153                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 154                                       sizeof(struct iwl_rxon_cmd),
 155                                       &priv->active_rxon);
 156
 157                 /* If the mask clearing failed then we set
 158                  * active_rxon back to what it was previously */
 159                 if (ret) {
 160                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 161                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 162                         return ret;
 163                 }
 164         }
 165
 166         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 167                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 168                        "* channel = %d\n"
 169                        "* bssid = %pM\n",
 170                        (new_assoc ? "" : "out"),
 171                        le16_to_cpu(priv->staging_rxon.channel),
 172                        priv->staging_rxon.bssid_addr);
 173
 174         iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
 175
 176         /* Apply the new configuration
 177          * RXON unassoc clears the station table in uCode, send it before
 178          * we add the bcast station. If assoc bit is set, we will send RXON
 179          * after having added the bcast and bssid station.
 180          */
 181         if (!new_assoc) {
 182                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 183                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 184                 if (ret) {
 185                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 186                         return ret;
 187                 }
 188                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 189         }
 190
 191         priv->cfg->ops->smgmt->clear_station_table(priv);
 192
 193         priv->start_calib = 0;
 194
 195         /* Add the broadcast address so we can send broadcast frames */
 196         if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
 197                                                 IWL_INVALID_STATION) {
 198                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
 199                 return -EIO;
 200         }
 201
 202         /* If we have set the ASSOC_MSK and we are in BSS mode then
 203          * add the IWL_AP_ID to the station rate table */
 204         if (new_assoc) {
 205                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 206                         ret = iwl_rxon_add_station(priv,
 207                                            priv->active_rxon.bssid_addr, 1);
 208                         if (ret == IWL_INVALID_STATION) {
 209                                 IWL_ERR(priv,
 210                                         "Error adding AP address for TX.\n");
 211                                 return -EIO;
 212                         }
 213                         priv->assoc_station_added = 1;
 214                         if (priv->default_wep_key &&
 215                             iwl_send_static_wepkey_cmd(priv, 0))
 216                                 IWL_ERR(priv,
 217                                         "Could not send WEP static key.\n");
 218                 }
 219
 220                 /* Apply the new configuration
 221                  * RXON assoc doesn't clear the station table in uCode,
 222                  */
 223                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 224                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 225                 if (ret) {
 226                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 227                         return ret;
 228                 }
 229                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 230         }
 231
 232         iwl_init_sensitivity(priv);
 233
 234         /* If we issue a new RXON command which required a tune then we must
 235          * send a new TXPOWER command or we won't be able to Tx any frames */
 236         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 237         if (ret) {
 238                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 239                 return ret;
 240         }
 241
 242         return 0;
 243 }
 244
 245 void iwl_update_chain_flags(struct iwl_priv *priv)
 246 {
 247
 248         if (priv->cfg->ops->hcmd->set_rxon_chain)
 249                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 250         iwlcore_commit_rxon(priv);
 251 }
 252
 253 static void iwl_clear_free_frames(struct iwl_priv *priv)
 254 {
 255         struct list_head *element;
 256
 257         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 258                        priv->frames_count);
 259
 260         while (!list_empty(&priv->free_frames)) {
 261                 element = priv->free_frames.next;
 262                 list_del(element);
 263                 kfree(list_entry(element, struct iwl_frame, list));
 264                 priv->frames_count--;
 265         }
 266
 267         if (priv->frames_count) {
 268                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 269                             priv->frames_count);
 270                 priv->frames_count = 0;
 271         }
 272 }
 273
 274 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 275 {
 276         struct iwl_frame *frame;
 277         struct list_head *element;
 278         if (list_empty(&priv->free_frames)) {
 279                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 280                 if (!frame) {
 281                         IWL_ERR(priv, "Could not allocate frame!\n");
 282                         return NULL;
 283                 }
 284
 285                 priv->frames_count++;
 286                 return frame;
 287         }
 288
 289         element = priv->free_frames.next;
 290         list_del(element);
 291         return list_entry(element, struct iwl_frame, list);
 292 }
 293
 294 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 295 {
 296         memset(frame, 0, sizeof(*frame));
 297         list_add(&frame->list, &priv->free_frames);
 298 }
 299
 300 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
 301                                           struct ieee80211_hdr *hdr,
 302                                           int left)
 303 {
 304         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 305             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 306              (priv->iw_mode != NL80211_IFTYPE_AP)))
 307                 return 0;
 308
 309         if (priv->ibss_beacon->len > left)
 310                 return 0;
 311
 312         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 313
 314         return priv->ibss_beacon->len;
 315 }
 316
 317 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 318                                        struct iwl_frame *frame, u8 rate)
 319 {
 320         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 321         unsigned int frame_size;
 322
 323         tx_beacon_cmd = &frame->u.beacon;
 324         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 325
 326         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 327         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 328
 329         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 330                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 331
 332         BUG_ON(frame_size > MAX_MPDU_SIZE);
 333         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 334
 335         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
 336                 tx_beacon_cmd->tx.rate_n_flags =
 337                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
 338         else
 339                 tx_beacon_cmd->tx.rate_n_flags =
 340                         iwl_hw_set_rate_n_flags(rate, 0);
 341
 342         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 343                                      TX_CMD_FLG_TSF_MSK |
 344                                      TX_CMD_FLG_STA_RATE_MSK;
 345
 346         return sizeof(*tx_beacon_cmd) + frame_size;
 347 }
 348 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 349 {
 350         struct iwl_frame *frame;
 351         unsigned int frame_size;
 352         int rc;
 353         u8 rate;
 354
 355         frame = iwl_get_free_frame(priv);
 356
 357         if (!frame) {
 358                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 359                           "command.\n");
 360                 return -ENOMEM;
 361         }
 362
 363         rate = iwl_rate_get_lowest_plcp(priv);
 364
 365         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
 366
 367         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 368                               &frame->u.cmd[0]);
 369
 370         iwl_free_frame(priv, frame);
 371
 372         return rc;
 373 }
 374
 375 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 376 {
 377         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 378
 379         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 380         if (sizeof(dma_addr_t) > sizeof(u32))
 381                 addr |=
 382                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 383
 384         return addr;
 385 }
 386
 387 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 388 {
 389         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 390
 391         return le16_to_cpu(tb->hi_n_len) >> 4;
 392 }
 393
 394 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 395                                   dma_addr_t addr, u16 len)
 396 {
 397         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 398         u16 hi_n_len = len << 4;
 399
 400         put_unaligned_le32(addr, &tb->lo);
 401         if (sizeof(dma_addr_t) > sizeof(u32))
 402                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 403
 404         tb->hi_n_len = cpu_to_le16(hi_n_len);
 405
 406         tfd->num_tbs = idx + 1;
 407 }
 408
 409 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 410 {
 411         return tfd->num_tbs & 0x1f;
 412 }
 413
 414 /**
 415  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 416  * @priv - driver private data
 417  * @txq - tx queue
 418  *
 419  * Does NOT advance any TFD circular buffer read/write indexes
 420  * Does NOT free the TFD itself (which is within circular buffer)
 421  */
 422 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 423 {
 424         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 425         struct iwl_tfd *tfd;
 426         struct pci_dev *dev = priv->pci_dev;
 427         int index = txq->q.read_ptr;
 428         int i;
 429         int num_tbs;
 430
 431         tfd = &tfd_tmp[index];
 432
 433         /* Sanity check on number of chunks */
 434         num_tbs = iwl_tfd_get_num_tbs(tfd);
 435
 436         if (num_tbs >= IWL_NUM_OF_TBS) {
 437                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 438                 /* @todo issue fatal error, it is quite serious situation */
 439                 return;
 440         }
 441
 442         /* Unmap tx_cmd */
 443         if (num_tbs)
 444                 pci_unmap_single(dev,
 445                                 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
 446                                 pci_unmap_len(&txq->cmd[index]->meta, len),
 447                                 PCI_DMA_BIDIRECTIONAL);
 448
 449         /* Unmap chunks, if any. */
 450         for (i = 1; i < num_tbs; i++) {
 451                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 452                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 453
 454                 if (txq->txb) {
 455                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 456                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 457                 }
 458         }
 459 }
 460
 461 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 462                                  struct iwl_tx_queue *txq,
 463                                  dma_addr_t addr, u16 len,
 464                                  u8 reset, u8 pad)
 465 {
 466         struct iwl_queue *q;
 467         struct iwl_tfd *tfd, *tfd_tmp;
 468         u32 num_tbs;
 469
 470         q = &txq->q;
 471         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 472         tfd = &tfd_tmp[q->write_ptr];
 473
 474         if (reset)
 475                 memset(tfd, 0, sizeof(*tfd));
 476
 477         num_tbs = iwl_tfd_get_num_tbs(tfd);
 478
 479         /* Each TFD can point to a maximum 20 Tx buffers */
 480         if (num_tbs >= IWL_NUM_OF_TBS) {
 481                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 482                           IWL_NUM_OF_TBS);
 483                 return -EINVAL;
 484         }
 485
 486         BUG_ON(addr & ~DMA_BIT_MASK(36));
 487         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 488                 IWL_ERR(priv, "Unaligned address = %llx\n",
 489                           (unsigned long long)addr);
 490
 491         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 492
 493         return 0;
 494 }
 495
 496 /*
 497  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 498  * given Tx queue, and enable the DMA channel used for that queue.
 499  *
 500  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 501  * channels supported in hardware.
 502  */
 503 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 504                          struct iwl_tx_queue *txq)
 505 {
 506         int txq_id = txq->q.id;
 507
 508         /* Circular buffer (TFD queue in DRAM) physical base address */
 509         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 510                              txq->q.dma_addr >> 8);
 511
 512         return 0;
 513 }
 514
 515
 516 /******************************************************************************
 517  *
 518  * Misc. internal state and helper functions
 519  *
 520  ******************************************************************************/
 521
 522 #define MAX_UCODE_BEACON_INTERVAL       4096
 523
 524 static u16 iwl_adjust_beacon_interval(u16 beacon_val)
 525 {
 526         u16 new_val = 0;
 527         u16 beacon_factor = 0;
 528
 529         beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
 530                                         / MAX_UCODE_BEACON_INTERVAL;
 531         new_val = beacon_val / beacon_factor;
 532
 533         if (!new_val)
 534                 new_val = MAX_UCODE_BEACON_INTERVAL;
 535
 536         return new_val;
 537 }
 538
 539 static void iwl_setup_rxon_timing(struct iwl_priv *priv)
 540 {
 541         u64 tsf;
 542         s32 interval_tm, rem;
 543         unsigned long flags;
 544         struct ieee80211_conf *conf = NULL;
 545         u16 beacon_int = 0;
 546
 547         conf = ieee80211_get_hw_conf(priv->hw);
 548
 549         spin_lock_irqsave(&priv->lock, flags);
 550         priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
 551         priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
 552
 553         if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 554                 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
 555                 priv->rxon_timing.atim_window = 0;
 556         } else {
 557                 beacon_int = iwl_adjust_beacon_interval(
 558                         priv->vif->bss_conf.beacon_int);
 559
 560                 /* TODO: we need to get atim_window from upper stack
 561                  * for now we set to 0 */
 562                 priv->rxon_timing.atim_window = 0;
 563         }
 564
 565         priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
 566
 567         tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
 568         interval_tm = beacon_int * 1024;
 569         rem = do_div(tsf, interval_tm);
 570         priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
 571
 572         spin_unlock_irqrestore(&priv->lock, flags);
 573         IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
 574                         le16_to_cpu(priv->rxon_timing.beacon_interval),
 575                         le32_to_cpu(priv->rxon_timing.beacon_init_val),
 576                         le16_to_cpu(priv->rxon_timing.atim_window));
 577 }
 578
 579 /******************************************************************************
 580  *
 581  * Generic RX handler implementations
 582  *
 583  ******************************************************************************/
 584 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 585                                 struct iwl_rx_mem_buffer *rxb)
 586 {
 587         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 588         struct iwl_alive_resp *palive;
 589         struct delayed_work *pwork;
 590
 591         palive = &pkt->u.alive_frame;
 592
 593         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 594                        "0x%01X 0x%01X\n",
 595                        palive->is_valid, palive->ver_type,
 596                        palive->ver_subtype);
 597
 598         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 599                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 600                 memcpy(&priv->card_alive_init,
 601                        &pkt->u.alive_frame,
 602                        sizeof(struct iwl_init_alive_resp));
 603                 pwork = &priv->init_alive_start;
 604         } else {
 605                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 606                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 607                        sizeof(struct iwl_alive_resp));
 608                 pwork = &priv->alive_start;
 609         }
 610
 611         /* We delay the ALIVE response by 5ms to
 612          * give the HW RF Kill time to activate... */
 613         if (palive->is_valid == UCODE_VALID_OK)
 614                 queue_delayed_work(priv->workqueue, pwork,
 615                                    msecs_to_jiffies(5));
 616         else
 617                 IWL_WARN(priv, "uCode did not respond OK.\n");
 618 }
 619
 620 static void iwl_bg_beacon_update(struct work_struct *work)
 621 {
 622         struct iwl_priv *priv =
 623                 container_of(work, struct iwl_priv, beacon_update);
 624         struct sk_buff *beacon;
 625
 626         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 627         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 628
 629         if (!beacon) {
 630                 IWL_ERR(priv, "update beacon failed\n");
 631                 return;
 632         }
 633
 634         mutex_lock(&priv->mutex);
 635         /* new beacon skb is allocated every time; dispose previous.*/
 636         if (priv->ibss_beacon)
 637                 dev_kfree_skb(priv->ibss_beacon);
 638
 639         priv->ibss_beacon = beacon;
 640         mutex_unlock(&priv->mutex);
 641
 642         iwl_send_beacon_cmd(priv);
 643 }
 644
 645 /**
 646  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 647  *
 648  * This callback is provided in order to send a statistics request.
 649  *
 650  * This timer function is continually reset to execute within
 651  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 652  * was received.  We need to ensure we receive the statistics in order
 653  * to update the temperature used for calibrating the TXPOWER.
 654  */
 655 static void iwl_bg_statistics_periodic(unsigned long data)
 656 {
 657         struct iwl_priv *priv = (struct iwl_priv *)data;
 658
 659         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 660                 return;
 661
 662         /* dont send host command if rf-kill is on */
 663         if (!iwl_is_ready_rf(priv))
 664                 return;
 665
 666         iwl_send_statistics_request(priv, CMD_ASYNC);
 667 }
 668
 669 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 670                                 struct iwl_rx_mem_buffer *rxb)
 671 {
 672 #ifdef CONFIG_IWLWIFI_DEBUG
 673         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 674         struct iwl4965_beacon_notif *beacon =
 675                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 676         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 677
 678         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 679                 "tsf %d %d rate %d\n",
 680                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 681                 beacon->beacon_notify_hdr.failure_frame,
 682                 le32_to_cpu(beacon->ibss_mgr_status),
 683                 le32_to_cpu(beacon->high_tsf),
 684                 le32_to_cpu(beacon->low_tsf), rate);
 685 #endif
 686
 687         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 688             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 689                 queue_work(priv->workqueue, &priv->beacon_update);
 690 }
 691
 692 /* Handle notification from uCode that card's power state is changing
 693  * due to software, hardware, or critical temperature RFKILL */
 694 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 695                                     struct iwl_rx_mem_buffer *rxb)
 696 {
 697         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 698         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 699         unsigned long status = priv->status;
 700         unsigned long reg_flags;
 701
 702         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
 703                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 704                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
 705
 706         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 707                      RF_CARD_DISABLED)) {
 708
 709                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 710                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 711
 712                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 713                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 714
 715                 if (!(flags & RXON_CARD_DISABLED)) {
 716                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 717                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 718                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 719                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 720
 721                 }
 722
 723                 if (flags & RF_CARD_DISABLED) {
 724                         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 725                                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
 726                         iwl_read32(priv, CSR_UCODE_DRV_GP1);
 727                         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 728                         if (!iwl_grab_nic_access(priv))
 729                                 iwl_release_nic_access(priv);
 730                         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 731                 }
 732         }
 733
 734         if (flags & HW_CARD_DISABLED)
 735                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 736         else
 737                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 738
 739
 740         if (flags & SW_CARD_DISABLED)
 741                 set_bit(STATUS_RF_KILL_SW, &priv->status);
 742         else
 743                 clear_bit(STATUS_RF_KILL_SW, &priv->status);
 744
 745         if (!(flags & RXON_CARD_DISABLED))
 746                 iwl_scan_cancel(priv);
 747
 748         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 749              test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
 750             (test_bit(STATUS_RF_KILL_SW, &status) !=
 751              test_bit(STATUS_RF_KILL_SW, &priv->status)))
 752                 queue_work(priv->workqueue, &priv->rf_kill);
 753         else
 754                 wake_up_interruptible(&priv->wait_command_queue);
 755 }
 756
 757 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 758 {
 759         if (src == IWL_PWR_SRC_VAUX) {
 760                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 761                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 762                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 763                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 764         } else {
 765                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 766                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 767                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 768         }
 769
 770         return 0;
 771 }
 772
 773 /**
 774  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 775  *
 776  * Setup the RX handlers for each of the reply types sent from the uCode
 777  * to the host.
 778  *
 779  * This function chains into the hardware specific files for them to setup
 780  * any hardware specific handlers as well.
 781  */
 782 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 783 {
 784         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 785         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 786         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 787         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 788         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 789             iwl_rx_pm_debug_statistics_notif;
 790         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 791
 792         /*
 793          * The same handler is used for both the REPLY to a discrete
 794          * statistics request from the host as well as for the periodic
 795          * statistics notifications (after received beacons) from the uCode.
 796          */
 797         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
 798         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 799
 800         iwl_setup_spectrum_handlers(priv);
 801         iwl_setup_rx_scan_handlers(priv);
 802
 803         /* status change handler */
 804         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 805
 806         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 807             iwl_rx_missed_beacon_notif;
 808         /* Rx handlers */
 809         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
 810         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
 811         /* block ack */
 812         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
 813         /* Set up hardware specific Rx handlers */
 814         priv->cfg->ops->lib->rx_handler_setup(priv);
 815 }
 816
 817 /**
 818  * iwl_rx_handle - Main entry function for receiving responses from uCode
 819  *
 820  * Uses the priv->rx_handlers callback function array to invoke
 821  * the appropriate handlers, including command responses,
 822  * frame-received notifications, and other notifications.
 823  */
 824 void iwl_rx_handle(struct iwl_priv *priv)
 825 {
 826         struct iwl_rx_mem_buffer *rxb;
 827         struct iwl_rx_packet *pkt;
 828         struct iwl_rx_queue *rxq = &priv->rxq;
 829         u32 r, i;
 830         int reclaim;
 831         unsigned long flags;
 832         u8 fill_rx = 0;
 833         u32 count = 8;
 834
 835         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 836          * buffer that the driver may process (last buffer filled by ucode). */
 837         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 838         i = rxq->read;
 839
 840         /* Rx interrupt, but nothing sent from uCode */
 841         if (i == r)
 842                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 843
 844         if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
 845                 fill_rx = 1;
 846
 847         while (i != r) {
 848                 rxb = rxq->queue[i];
 849
 850                 /* If an RXB doesn't have a Rx queue slot associated with it,
 851                  * then a bug has been introduced in the queue refilling
 852                  * routines -- catch it here */
 853                 BUG_ON(rxb == NULL);
 854
 855                 rxq->queue[i] = NULL;
 856
 857                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
 858                                  priv->hw_params.rx_buf_size + 256,
 859                                  PCI_DMA_FROMDEVICE);
 860                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
 861
 862                 /* Reclaim a command buffer only if this packet is a response
 863                  *   to a (driver-originated) command.
 864                  * If the packet (e.g. Rx frame) originated from uCode,
 865                  *   there is no command buffer to reclaim.
 866                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 867                  *   but apparently a few don't get set; catch them here. */
 868                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 869                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 870                         (pkt->hdr.cmd != REPLY_RX) &&
 871                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 872                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 873                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 874                         (pkt->hdr.cmd != REPLY_TX);
 875
 876                 /* Based on type of command response or notification,
 877                  *   handle those that need handling via function in
 878                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 879                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 880                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 881                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 882                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 883                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 884                 } else {
 885                         /* No handling needed */
 886                         IWL_DEBUG_RX(priv,
 887                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 888                                 r, i, get_cmd_string(pkt->hdr.cmd),
 889                                 pkt->hdr.cmd);
 890                 }
 891
 892                 if (reclaim) {
 893                         /* Invoke any callbacks, transfer the skb to caller, and
 894                          * fire off the (possibly) blocking iwl_send_cmd()
 895                          * as we reclaim the driver command queue */
 896                         if (rxb && rxb->skb)
 897                                 iwl_tx_cmd_complete(priv, rxb);
 898                         else
 899                                 IWL_WARN(priv, "Claim null rxb?\n");
 900                 }
 901
 902                 /* For now we just don't re-use anything.  We can tweak this
 903                  * later to try and re-use notification packets and SKBs that
 904                  * fail to Rx correctly */
 905                 if (rxb->skb != NULL) {
 906                         priv->alloc_rxb_skb--;
 907                         dev_kfree_skb_any(rxb->skb);
 908                         rxb->skb = NULL;
 909                 }
 910
 911                 spin_lock_irqsave(&rxq->lock, flags);
 912                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
 913                 spin_unlock_irqrestore(&rxq->lock, flags);
 914                 i = (i + 1) & RX_QUEUE_MASK;
 915                 /* If there are a lot of unused frames,
 916                  * restock the Rx queue so ucode wont assert. */
 917                 if (fill_rx) {
 918                         count++;
 919                         if (count >= 8) {
 920                                 priv->rxq.read = i;
 921                                 iwl_rx_queue_restock(priv);
 922                                 count = 0;
 923                         }
 924                 }
 925         }
 926
 927         /* Backtrack one entry */
 928         priv->rxq.read = i;
 929         iwl_rx_queue_restock(priv);
 930 }
 931
 932 /* call this function to flush any scheduled tasklet */
 933 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
 934 {
 935         /* wait to make sure we flush pending tasklet*/
 936         synchronize_irq(priv->pci_dev->irq);
 937         tasklet_kill(&priv->irq_tasklet);
 938 }
 939
 940 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
 941 {
 942         u32 inta, handled = 0;
 943         u32 inta_fh;
 944         unsigned long flags;
 945 #ifdef CONFIG_IWLWIFI_DEBUG
 946         u32 inta_mask;
 947 #endif
 948
 949         spin_lock_irqsave(&priv->lock, flags);
 950
 951         /* Ack/clear/reset pending uCode interrupts.
 952          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 953          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
 954         inta = iwl_read32(priv, CSR_INT);
 955         iwl_write32(priv, CSR_INT, inta);
 956
 957         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
 958          * Any new interrupts that happen after this, either while we're
 959          * in this tasklet, or later, will show up in next ISR/tasklet. */
 960         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 961         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
 962
 963 #ifdef CONFIG_IWLWIFI_DEBUG
 964         if (priv->debug_level & IWL_DL_ISR) {
 965                 /* just for debug */
 966                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 967                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 968                               inta, inta_mask, inta_fh);
 969         }
 970 #endif
 971
 972         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
 973          * atomic, make sure that inta covers all the interrupts that
 974          * we've discovered, even if FH interrupt came in just after
 975          * reading CSR_INT. */
 976         if (inta_fh & CSR49_FH_INT_RX_MASK)
 977                 inta |= CSR_INT_BIT_FH_RX;
 978         if (inta_fh & CSR49_FH_INT_TX_MASK)
 979                 inta |= CSR_INT_BIT_FH_TX;
 980
 981         /* Now service all interrupt bits discovered above. */
 982         if (inta & CSR_INT_BIT_HW_ERR) {
 983                 IWL_ERR(priv, "Microcode HW error detected.  Restarting.\n");
 984
 985                 /* Tell the device to stop sending interrupts */
 986                 iwl_disable_interrupts(priv);
 987
 988                 priv->isr_stats.hw++;
 989                 iwl_irq_handle_error(priv);
 990
 991                 handled |= CSR_INT_BIT_HW_ERR;
 992
 993                 spin_unlock_irqrestore(&priv->lock, flags);
 994
 995                 return;
 996         }
 997
 998 #ifdef CONFIG_IWLWIFI_DEBUG
 999         if (priv->debug_level & (IWL_DL_ISR)) {
1000                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1001                 if (inta & CSR_INT_BIT_SCD) {
1002                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1003                                       "the frame/frames.\n");
1004                         priv->isr_stats.sch++;
1005                 }
1006
1007                 /* Alive notification via Rx interrupt will do the real work */
1008                 if (inta & CSR_INT_BIT_ALIVE) {
1009                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1010                         priv->isr_stats.alive++;
1011                 }
1012         }
1013 #endif
1014         /* Safely ignore these bits for debug checks below */
1015         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1016
1017         /* HW RF KILL switch toggled */
1018         if (inta & CSR_INT_BIT_RF_KILL) {
1019                 int hw_rf_kill = 0;
1020                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1021                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1022                         hw_rf_kill = 1;
1023
1024                 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1025                                 hw_rf_kill ? "disable radio" : "enable radio");
1026
1027                 priv->isr_stats.rfkill++;
1028
1029                 /* driver only loads ucode once setting the interface up.
1030                  * the driver allows loading the ucode even if the radio
1031                  * is killed. Hence update the killswitch state here. The
1032                  * rfkill handler will care about restarting if needed.
1033                  */
1034                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1035                         if (hw_rf_kill)
1036                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1037                         else
1038                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1039                         queue_work(priv->workqueue, &priv->rf_kill);
1040                 }
1041
1042                 handled |= CSR_INT_BIT_RF_KILL;
1043         }
1044
1045         /* Chip got too hot and stopped itself */
1046         if (inta & CSR_INT_BIT_CT_KILL) {
1047                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1048                 priv->isr_stats.ctkill++;
1049                 handled |= CSR_INT_BIT_CT_KILL;
1050         }
1051
1052         /* Error detected by uCode */
1053         if (inta & CSR_INT_BIT_SW_ERR) {
1054                 IWL_ERR(priv, "Microcode SW error detected. "
1055                         " Restarting 0x%X.\n", inta);
1056                 priv->isr_stats.sw++;
1057                 priv->isr_stats.sw_err = inta;
1058                 iwl_irq_handle_error(priv);
1059                 handled |= CSR_INT_BIT_SW_ERR;
1060         }
1061
1062         /* uCode wakes up after power-down sleep */
1063         if (inta & CSR_INT_BIT_WAKEUP) {
1064                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1065                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1066                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1067                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1068                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1069                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1070                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1071                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1072
1073                 priv->isr_stats.wakeup++;
1074
1075                 handled |= CSR_INT_BIT_WAKEUP;
1076         }
1077
1078         /* All uCode command responses, including Tx command responses,
1079          * Rx "responses" (frame-received notification), and other
1080          * notifications from uCode come through here*/
1081         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1082                 iwl_rx_handle(priv);
1083                 priv->isr_stats.rx++;
1084                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1085         }
1086
1087         if (inta & CSR_INT_BIT_FH_TX) {
1088                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1089                 priv->isr_stats.tx++;
1090                 handled |= CSR_INT_BIT_FH_TX;
1091                 /* FH finished to write, send event */
1092                 priv->ucode_write_complete = 1;
1093                 wake_up_interruptible(&priv->wait_command_queue);
1094         }
1095
1096         if (inta & ~handled) {
1097                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1098                 priv->isr_stats.unhandled++;
1099         }
1100
1101         if (inta & ~CSR_INI_SET_MASK) {
1102                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1103                          inta & ~CSR_INI_SET_MASK);
1104                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1105         }
1106
1107         /* Re-enable all interrupts */
1108         /* only Re-enable if diabled by irq */
1109         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1110                 iwl_enable_interrupts(priv);
1111
1112 #ifdef CONFIG_IWLWIFI_DEBUG
1113         if (priv->debug_level & (IWL_DL_ISR)) {
1114                 inta = iwl_read32(priv, CSR_INT);
1115                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1116                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1117                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1118                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1119         }
1120 #endif
1121         spin_unlock_irqrestore(&priv->lock, flags);
1122 }
1123
1124 /* tasklet for iwlagn interrupt */
1125 static void iwl_irq_tasklet(struct iwl_priv *priv)
1126 {
1127         u32 inta = 0;
1128         u32 handled = 0;
1129         unsigned long flags;
1130 #ifdef CONFIG_IWLWIFI_DEBUG
1131         u32 inta_mask;
1132 #endif
1133
1134         spin_lock_irqsave(&priv->lock, flags);
1135
1136         /* Ack/clear/reset pending uCode interrupts.
1137          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1138          */
1139         iwl_write32(priv, CSR_INT, priv->inta);
1140
1141         inta = priv->inta;
1142
1143 #ifdef CONFIG_IWLWIFI_DEBUG
1144         if (priv->debug_level & IWL_DL_ISR) {
1145                 /* just for debug */
1146                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1147                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1148                                 inta, inta_mask);
1149         }
1150 #endif
1151         /* saved interrupt in inta variable now we can reset priv->inta */
1152         priv->inta = 0;
1153
1154         /* Now service all interrupt bits discovered above. */
1155         if (inta & CSR_INT_BIT_HW_ERR) {
1156                 IWL_ERR(priv, "Microcode HW error detected.  Restarting.\n");
1157
1158                 /* Tell the device to stop sending interrupts */
1159                 iwl_disable_interrupts(priv);
1160
1161                 priv->isr_stats.hw++;
1162                 iwl_irq_handle_error(priv);
1163
1164                 handled |= CSR_INT_BIT_HW_ERR;
1165
1166                 spin_unlock_irqrestore(&priv->lock, flags);
1167
1168                 return;
1169         }
1170
1171 #ifdef CONFIG_IWLWIFI_DEBUG
1172         if (priv->debug_level & (IWL_DL_ISR)) {
1173                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1174                 if (inta & CSR_INT_BIT_SCD) {
1175                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1176                                       "the frame/frames.\n");
1177                         priv->isr_stats.sch++;
1178                 }
1179
1180                 /* Alive notification via Rx interrupt will do the real work */
1181                 if (inta & CSR_INT_BIT_ALIVE) {
1182                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1183                         priv->isr_stats.alive++;
1184                 }
1185         }
1186 #endif
1187         /* Safely ignore these bits for debug checks below */
1188         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1189
1190         /* HW RF KILL switch toggled */
1191         if (inta & CSR_INT_BIT_RF_KILL) {
1192                 int hw_rf_kill = 0;
1193                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1194                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1195                         hw_rf_kill = 1;
1196
1197                 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1198                                 hw_rf_kill ? "disable radio" : "enable radio");
1199
1200                 priv->isr_stats.rfkill++;
1201
1202                 /* driver only loads ucode once setting the interface up.
1203                  * the driver allows loading the ucode even if the radio
1204                  * is killed. Hence update the killswitch state here. The
1205                  * rfkill handler will care about restarting if needed.
1206                  */
1207                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1208                         if (hw_rf_kill)
1209                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1210                         else
1211                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1212                         queue_work(priv->workqueue, &priv->rf_kill);
1213                 }
1214
1215                 handled |= CSR_INT_BIT_RF_KILL;
1216         }
1217
1218         /* Chip got too hot and stopped itself */
1219         if (inta & CSR_INT_BIT_CT_KILL) {
1220                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1221                 priv->isr_stats.ctkill++;
1222                 handled |= CSR_INT_BIT_CT_KILL;
1223         }
1224
1225         /* Error detected by uCode */
1226         if (inta & CSR_INT_BIT_SW_ERR) {
1227                 IWL_ERR(priv, "Microcode SW error detected. "
1228                         " Restarting 0x%X.\n", inta);
1229                 priv->isr_stats.sw++;
1230                 priv->isr_stats.sw_err = inta;
1231                 iwl_irq_handle_error(priv);
1232                 handled |= CSR_INT_BIT_SW_ERR;
1233         }
1234
1235         /* uCode wakes up after power-down sleep */
1236         if (inta & CSR_INT_BIT_WAKEUP) {
1237                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1238                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1239                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1240                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1241                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1242                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1243                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1244                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1245
1246                 priv->isr_stats.wakeup++;
1247
1248                 handled |= CSR_INT_BIT_WAKEUP;
1249         }
1250
1251         /* All uCode command responses, including Tx command responses,
1252          * Rx "responses" (frame-received notification), and other
1253          * notifications from uCode come through here*/
1254         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1255                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1256                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_RX_MASK);
1257                 iwl_rx_handle(priv);
1258                 priv->isr_stats.rx++;
1259                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1260         }
1261
1262         if (inta & CSR_INT_BIT_FH_TX) {
1263                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1264                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1265                 priv->isr_stats.tx++;
1266                 handled |= CSR_INT_BIT_FH_TX;
1267                 /* FH finished to write, send event */
1268                 priv->ucode_write_complete = 1;
1269                 wake_up_interruptible(&priv->wait_command_queue);
1270         }
1271
1272         if (inta & ~handled) {
1273                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1274                 priv->isr_stats.unhandled++;
1275         }
1276
1277         if (inta & ~CSR_INI_SET_MASK) {
1278                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1279                          inta & ~CSR_INI_SET_MASK);
1280         }
1281
1282
1283         /* Re-enable all interrupts */
1284         /* only Re-enable if diabled by irq */
1285         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1286                 iwl_enable_interrupts(priv);
1287
1288         spin_unlock_irqrestore(&priv->lock, flags);
1289
1290 }
1291
1292
1293 /******************************************************************************
1294  *
1295  * uCode download functions
1296  *
1297  ******************************************************************************/
1298
1299 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1300 {
1301         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1302         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1303         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1304         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1305         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1306         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1307 }
1308
1309 static void iwl_nic_start(struct iwl_priv *priv)
1310 {
1311         /* Remove all resets to allow NIC to operate */
1312         iwl_write32(priv, CSR_RESET, 0);
1313 }
1314
1315
1316 /**
1317  * iwl_read_ucode - Read uCode images from disk file.
1318  *
1319  * Copy into buffers for card to fetch via bus-mastering
1320  */
1321 static int iwl_read_ucode(struct iwl_priv *priv)
1322 {
1323         struct iwl_ucode *ucode;
1324         int ret = -EINVAL, index;
1325         const struct firmware *ucode_raw;
1326         const char *name_pre = priv->cfg->fw_name_pre;
1327         const unsigned int api_max = priv->cfg->ucode_api_max;
1328         const unsigned int api_min = priv->cfg->ucode_api_min;
1329         char buf[25];
1330         u8 *src;
1331         size_t len;
1332         u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1333
1334         /* Ask kernel firmware_class module to get the boot firmware off disk.
1335          * request_firmware() is synchronous, file is in memory on return. */
1336         for (index = api_max; index >= api_min; index--) {
1337                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1338                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1339                 if (ret < 0) {
1340                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1341                                   buf, ret);
1342                         if (ret == -ENOENT)
1343                                 continue;
1344                         else
1345                                 goto error;
1346                 } else {
1347                         if (index < api_max)
1348                                 IWL_ERR(priv, "Loaded firmware %s, "
1349                                         "which is deprecated. "
1350                                         "Please use API v%u instead.\n",
1351                                           buf, api_max);
1352
1353                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1354                                        buf, ucode_raw->size);
1355                         break;
1356                 }
1357         }
1358
1359         if (ret < 0)
1360                 goto error;
1361
1362         /* Make sure that we got at least our header! */
1363         if (ucode_raw->size < sizeof(*ucode)) {
1364                 IWL_ERR(priv, "File size way too small!\n");
1365                 ret = -EINVAL;
1366                 goto err_release;
1367         }
1368
1369         /* Data from ucode file:  header followed by uCode images */
1370         ucode = (void *)ucode_raw->data;
1371
1372         priv->ucode_ver = le32_to_cpu(ucode->ver);
1373         api_ver = IWL_UCODE_API(priv->ucode_ver);
1374         inst_size = le32_to_cpu(ucode->inst_size);
1375         data_size = le32_to_cpu(ucode->data_size);
1376         init_size = le32_to_cpu(ucode->init_size);
1377         init_data_size = le32_to_cpu(ucode->init_data_size);
1378         boot_size = le32_to_cpu(ucode->boot_size);
1379
1380         /* api_ver should match the api version forming part of the
1381          * firmware filename ... but we don't check for that and only rely
1382          * on the API version read from firmware header from here on forward */
1383
1384         if (api_ver < api_min || api_ver > api_max) {
1385                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1386                           "Driver supports v%u, firmware is v%u.\n",
1387                           api_max, api_ver);
1388                 priv->ucode_ver = 0;
1389                 ret = -EINVAL;
1390                 goto err_release;
1391         }
1392         if (api_ver != api_max)
1393                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1394                           "got v%u. New firmware can be obtained "
1395                           "from http://www.intellinuxwireless.org.\n",
1396                           api_max, api_ver);
1397
1398         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1399                IWL_UCODE_MAJOR(priv->ucode_ver),
1400                IWL_UCODE_MINOR(priv->ucode_ver),
1401                IWL_UCODE_API(priv->ucode_ver),
1402                IWL_UCODE_SERIAL(priv->ucode_ver));
1403
1404         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1405                        priv->ucode_ver);
1406         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1407                        inst_size);
1408         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1409                        data_size);
1410         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1411                        init_size);
1412         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1413                        init_data_size);
1414         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1415                        boot_size);
1416
1417         /* Verify size of file vs. image size info in file's header */
1418         if (ucode_raw->size < sizeof(*ucode) +
1419                 inst_size + data_size + init_size +
1420                 init_data_size + boot_size) {
1421
1422                 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
1423                                (int)ucode_raw->size);
1424                 ret = -EINVAL;
1425                 goto err_release;
1426         }
1427
1428         /* Verify that uCode images will fit in card's SRAM */
1429         if (inst_size > priv->hw_params.max_inst_size) {
1430                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1431                                inst_size);
1432                 ret = -EINVAL;
1433                 goto err_release;
1434         }
1435
1436         if (data_size > priv->hw_params.max_data_size) {
1437                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1438                                 data_size);
1439                 ret = -EINVAL;
1440                 goto err_release;
1441         }
1442         if (init_size > priv->hw_params.max_inst_size) {
1443                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1444                         init_size);
1445                 ret = -EINVAL;
1446                 goto err_release;
1447         }
1448         if (init_data_size > priv->hw_params.max_data_size) {
1449                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1450                       init_data_size);
1451                 ret = -EINVAL;
1452                 goto err_release;
1453         }
1454         if (boot_size > priv->hw_params.max_bsm_size) {
1455                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1456                         boot_size);
1457                 ret = -EINVAL;
1458                 goto err_release;
1459         }
1460
1461         /* Allocate ucode buffers for card's bus-master loading ... */
1462
1463         /* Runtime instructions and 2 copies of data:
1464          * 1) unmodified from disk
1465          * 2) backup cache for save/restore during power-downs */
1466         priv->ucode_code.len = inst_size;
1467         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1468
1469         priv->ucode_data.len = data_size;
1470         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1471
1472         priv->ucode_data_backup.len = data_size;
1473         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1474
1475         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1476             !priv->ucode_data_backup.v_addr)
1477                 goto err_pci_alloc;
1478
1479         /* Initialization instructions and data */
1480         if (init_size && init_data_size) {
1481                 priv->ucode_init.len = init_size;
1482                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1483
1484                 priv->ucode_init_data.len = init_data_size;
1485                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1486
1487                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1488                         goto err_pci_alloc;
1489         }
1490
1491         /* Bootstrap (instructions only, no data) */
1492         if (boot_size) {
1493                 priv->ucode_boot.len = boot_size;
1494                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1495
1496                 if (!priv->ucode_boot.v_addr)
1497                         goto err_pci_alloc;
1498         }
1499
1500         /* Copy images into buffers for card's bus-master reads ... */
1501
1502         /* Runtime instructions (first block of data in file) */
1503         src = &ucode->data[0];
1504         len = priv->ucode_code.len;
1505         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1506         memcpy(priv->ucode_code.v_addr, src, len);
1507         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1508                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1509
1510         /* Runtime data (2nd block)
1511          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1512         src = &ucode->data[inst_size];
1513         len = priv->ucode_data.len;
1514         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1515         memcpy(priv->ucode_data.v_addr, src, len);
1516         memcpy(priv->ucode_data_backup.v_addr, src, len);
1517
1518         /* Initialization instructions (3rd block) */
1519         if (init_size) {
1520                 src = &ucode->data[inst_size + data_size];
1521                 len = priv->ucode_init.len;
1522                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1523                                 len);
1524                 memcpy(priv->ucode_init.v_addr, src, len);
1525         }
1526
1527         /* Initialization data (4th block) */
1528         if (init_data_size) {
1529                 src = &ucode->data[inst_size + data_size + init_size];
1530                 len = priv->ucode_init_data.len;
1531                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1532                                len);
1533                 memcpy(priv->ucode_init_data.v_addr, src, len);
1534         }
1535
1536         /* Bootstrap instructions (5th block) */
1537         src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1538         len = priv->ucode_boot.len;
1539         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1540         memcpy(priv->ucode_boot.v_addr, src, len);
1541
1542         /* We have our copies now, allow OS release its copies */
1543         release_firmware(ucode_raw);
1544         return 0;
1545
1546  err_pci_alloc:
1547         IWL_ERR(priv, "failed to allocate pci memory\n");
1548         ret = -ENOMEM;
1549         iwl_dealloc_ucode_pci(priv);
1550
1551  err_release:
1552         release_firmware(ucode_raw);
1553
1554  error:
1555         return ret;
1556 }
1557
1558 /**
1559  * iwl_alive_start - called after REPLY_ALIVE notification received
1560  *                   from protocol/runtime uCode (initialization uCode's
1561  *                   Alive gets handled by iwl_init_alive_start()).
1562  */
1563 static void iwl_alive_start(struct iwl_priv *priv)
1564 {
1565         int ret = 0;
1566
1567         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1568
1569         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1570                 /* We had an error bringing up the hardware, so take it
1571                  * all the way back down so we can try again */
1572                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1573                 goto restart;
1574         }
1575
1576         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1577          * This is a paranoid check, because we would not have gotten the
1578          * "runtime" alive if code weren't properly loaded.  */
1579         if (iwl_verify_ucode(priv)) {
1580                 /* Runtime instruction load was bad;
1581                  * take it all the way back down so we can try again */
1582                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1583                 goto restart;
1584         }
1585
1586         priv->cfg->ops->smgmt->clear_station_table(priv);
1587         ret = priv->cfg->ops->lib->alive_notify(priv);
1588         if (ret) {
1589                 IWL_WARN(priv,
1590                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1591                 goto restart;
1592         }
1593
1594         /* After the ALIVE response, we can send host commands to the uCode */
1595         set_bit(STATUS_ALIVE, &priv->status);
1596
1597         if (iwl_is_rfkill(priv))
1598                 return;
1599
1600         ieee80211_wake_queues(priv->hw);
1601
1602         priv->active_rate = priv->rates_mask;
1603         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1604
1605         if (iwl_is_associated(priv)) {
1606                 struct iwl_rxon_cmd *active_rxon =
1607                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1608                 /* apply any changes in staging */
1609                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1610                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1611         } else {
1612                 /* Initialize our rx_config data */
1613                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1614
1615                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1616                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1617
1618                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1619         }
1620
1621         /* Configure Bluetooth device coexistence support */
1622         iwl_send_bt_config(priv);
1623
1624         iwl_reset_run_time_calib(priv);
1625
1626         /* Configure the adapter for unassociated operation */
1627         iwlcore_commit_rxon(priv);
1628
1629         /* At this point, the NIC is initialized and operational */
1630         iwl_rf_kill_ct_config(priv);
1631
1632         iwl_leds_register(priv);
1633
1634         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1635         set_bit(STATUS_READY, &priv->status);
1636         wake_up_interruptible(&priv->wait_command_queue);
1637
1638         iwl_power_update_mode(priv, 1);
1639
1640         /* reassociate for ADHOC mode */
1641         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1642                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1643                                                                 priv->vif);
1644                 if (beacon)
1645                         iwl_mac_beacon_update(priv->hw, beacon);
1646         }
1647
1648
1649         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1650                 iwl_set_mode(priv, priv->iw_mode);
1651
1652         return;
1653
1654  restart:
1655         queue_work(priv->workqueue, &priv->restart);
1656 }
1657
1658 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1659
1660 static void __iwl_down(struct iwl_priv *priv)
1661 {
1662         unsigned long flags;
1663         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1664
1665         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1666
1667         if (!exit_pending)
1668                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1669
1670         iwl_leds_unregister(priv);
1671
1672         priv->cfg->ops->smgmt->clear_station_table(priv);
1673
1674         /* Unblock any waiting calls */
1675         wake_up_interruptible_all(&priv->wait_command_queue);
1676
1677         /* Wipe out the EXIT_PENDING status bit if we are not actually
1678          * exiting the module */
1679         if (!exit_pending)
1680                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1681
1682         /* stop and reset the on-board processor */
1683         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1684
1685         /* tell the device to stop sending interrupts */
1686         spin_lock_irqsave(&priv->lock, flags);
1687         iwl_disable_interrupts(priv);
1688         spin_unlock_irqrestore(&priv->lock, flags);
1689         iwl_synchronize_irq(priv);
1690
1691         if (priv->mac80211_registered)
1692                 ieee80211_stop_queues(priv->hw);
1693
1694         /* If we have not previously called iwl_init() then
1695          * clear all bits but the RF Kill bits and return */
1696         if (!iwl_is_init(priv)) {
1697                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1698                                         STATUS_RF_KILL_HW |
1699                                test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1700                                         STATUS_RF_KILL_SW |
1701                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1702                                         STATUS_GEO_CONFIGURED |
1703                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1704                                         STATUS_EXIT_PENDING;
1705                 goto exit;
1706         }
1707
1708         /* ...otherwise clear out all the status bits but the RF Kill
1709          * bits and continue taking the NIC down. */
1710         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1711                                 STATUS_RF_KILL_HW |
1712                         test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1713                                 STATUS_RF_KILL_SW |
1714                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1715                                 STATUS_GEO_CONFIGURED |
1716                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1717                                 STATUS_FW_ERROR |
1718                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1719                                 STATUS_EXIT_PENDING;
1720
1721         /* device going down, Stop using ICT table */
1722         iwl_disable_ict(priv);
1723         spin_lock_irqsave(&priv->lock, flags);
1724         iwl_clear_bit(priv, CSR_GP_CNTRL,
1725                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1726         spin_unlock_irqrestore(&priv->lock, flags);
1727
1728         iwl_txq_ctx_stop(priv);
1729         iwl_rxq_stop(priv);
1730
1731         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1732                                 APMG_CLK_VAL_DMA_CLK_RQT);
1733
1734         udelay(5);
1735
1736         /* FIXME: apm_ops.suspend(priv) */
1737         if (exit_pending)
1738                 priv->cfg->ops->lib->apm_ops.stop(priv);
1739         else
1740                 priv->cfg->ops->lib->apm_ops.reset(priv);
1741  exit:
1742         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1743
1744         if (priv->ibss_beacon)
1745                 dev_kfree_skb(priv->ibss_beacon);
1746         priv->ibss_beacon = NULL;
1747
1748         /* clear out any free frames */
1749         iwl_clear_free_frames(priv);
1750 }
1751
1752 static void iwl_down(struct iwl_priv *priv)
1753 {
1754         mutex_lock(&priv->mutex);
1755         __iwl_down(priv);
1756         mutex_unlock(&priv->mutex);
1757
1758         iwl_cancel_deferred_work(priv);
1759 }
1760
1761 #define MAX_HW_RESTARTS 5
1762
1763 static int __iwl_up(struct iwl_priv *priv)
1764 {
1765         int i;
1766         int ret;
1767
1768         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1769                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1770                 return -EIO;
1771         }
1772
1773         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1774                 IWL_ERR(priv, "ucode not available for device bringup\n");
1775                 return -EIO;
1776         }
1777
1778         /* If platform's RF_KILL switch is NOT set to KILL */
1779         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1780                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1781         else
1782                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1783
1784         if (iwl_is_rfkill(priv)) {
1785                 iwl_enable_interrupts(priv);
1786                 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
1787                     test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
1788                 return 0;
1789         }
1790
1791         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1792
1793         ret = iwl_hw_nic_init(priv);
1794         if (ret) {
1795                 IWL_ERR(priv, "Unable to init nic\n");
1796                 return ret;
1797         }
1798
1799         /* make sure rfkill handshake bits are cleared */
1800         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1801         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1802                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1803
1804         /* clear (again), then enable host interrupts */
1805         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1806         /* enable dram interrupt */
1807         iwl_reset_ict(priv);
1808         iwl_enable_interrupts(priv);
1809
1810         /* really make sure rfkill handshake bits are cleared */
1811         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1812         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1813
1814         /* Copy original ucode data image from disk into backup cache.
1815          * This will be used to initialize the on-board processor's
1816          * data SRAM for a clean start when the runtime program first loads. */
1817         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1818                priv->ucode_data.len);
1819
1820         for (i = 0; i < MAX_HW_RESTARTS; i++) {
1821
1822                 priv->cfg->ops->smgmt->clear_station_table(priv);
1823
1824                 /* load bootstrap state machine,
1825                  * load bootstrap program into processor's memory,
1826                  * prepare to load the "initialize" uCode */
1827                 ret = priv->cfg->ops->lib->load_ucode(priv);
1828
1829                 if (ret) {
1830                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1831                                 ret);
1832                         continue;
1833                 }
1834
1835                 /* start card; "initialize" will load runtime ucode */
1836                 iwl_nic_start(priv);
1837
1838                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1839
1840                 return 0;
1841         }
1842
1843         set_bit(STATUS_EXIT_PENDING, &priv->status);
1844         __iwl_down(priv);
1845         clear_bit(STATUS_EXIT_PENDING, &priv->status);
1846
1847         /* tried to restart and config the device for as long as our
1848          * patience could withstand */
1849         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1850         return -EIO;
1851 }
1852
1853
1854 /*****************************************************************************
1855  *
1856  * Workqueue callbacks
1857  *
1858  *****************************************************************************/
1859
1860 static void iwl_bg_init_alive_start(struct work_struct *data)
1861 {
1862         struct iwl_priv *priv =
1863             container_of(data, struct iwl_priv, init_alive_start.work);
1864
1865         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1866                 return;
1867
1868         mutex_lock(&priv->mutex);
1869         priv->cfg->ops->lib->init_alive_start(priv);
1870         mutex_unlock(&priv->mutex);
1871 }
1872
1873 static void iwl_bg_alive_start(struct work_struct *data)
1874 {
1875         struct iwl_priv *priv =
1876             container_of(data, struct iwl_priv, alive_start.work);
1877
1878         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1879                 return;
1880
1881         mutex_lock(&priv->mutex);
1882         iwl_alive_start(priv);
1883         mutex_unlock(&priv->mutex);
1884 }
1885
1886 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1887 {
1888         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1889                         run_time_calib_work);
1890
1891         mutex_lock(&priv->mutex);
1892
1893         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1894             test_bit(STATUS_SCANNING, &priv->status)) {
1895                 mutex_unlock(&priv->mutex);
1896                 return;
1897         }
1898
1899         if (priv->start_calib) {
1900                 iwl_chain_noise_calibration(priv, &priv->statistics);
1901
1902                 iwl_sensitivity_calibration(priv, &priv->statistics);
1903         }
1904
1905         mutex_unlock(&priv->mutex);
1906         return;
1907 }
1908
1909 static void iwl_bg_up(struct work_struct *data)
1910 {
1911         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
1912
1913         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1914                 return;
1915
1916         mutex_lock(&priv->mutex);
1917         __iwl_up(priv);
1918         mutex_unlock(&priv->mutex);
1919         iwl_rfkill_set_hw_state(priv);
1920 }
1921
1922 static void iwl_bg_restart(struct work_struct *data)
1923 {
1924         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
1925
1926         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1927                 return;
1928
1929         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
1930                 mutex_lock(&priv->mutex);
1931                 priv->vif = NULL;
1932                 priv->is_open = 0;
1933                 mutex_unlock(&priv->mutex);
1934                 iwl_down(priv);
1935                 ieee80211_restart_hw(priv->hw);
1936         } else {
1937                 iwl_down(priv);
1938                 queue_work(priv->workqueue, &priv->up);
1939         }
1940 }
1941
1942 static void iwl_bg_rx_replenish(struct work_struct *data)
1943 {
1944         struct iwl_priv *priv =
1945             container_of(data, struct iwl_priv, rx_replenish);
1946
1947         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1948                 return;
1949
1950         mutex_lock(&priv->mutex);
1951         iwl_rx_replenish(priv);
1952         mutex_unlock(&priv->mutex);
1953 }
1954
1955 #define IWL_DELAY_NEXT_SCAN (HZ*2)
1956
1957 void iwl_post_associate(struct iwl_priv *priv)
1958 {
1959         struct ieee80211_conf *conf = NULL;
1960         int ret = 0;
1961         unsigned long flags;
1962
1963         if (priv->iw_mode == NL80211_IFTYPE_AP) {
1964                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
1965                 return;
1966         }
1967
1968         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
1969                         priv->assoc_id, priv->active_rxon.bssid_addr);
1970
1971
1972         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1973                 return;
1974
1975
1976         if (!priv->vif || !priv->is_open)
1977                 return;
1978
1979         iwl_scan_cancel_timeout(priv, 200);
1980
1981         conf = ieee80211_get_hw_conf(priv->hw);
1982
1983         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1984         iwlcore_commit_rxon(priv);
1985
1986         iwl_setup_rxon_timing(priv);
1987         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
1988                               sizeof(priv->rxon_timing), &priv->rxon_timing);
1989         if (ret)
1990                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
1991                             "Attempting to continue.\n");
1992
1993         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1994
1995         iwl_set_rxon_ht(priv, &priv->current_ht_config);
1996
1997         if (priv->cfg->ops->hcmd->set_rxon_chain)
1998                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1999
2000         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2001
2002         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2003                         priv->assoc_id, priv->beacon_int);
2004
2005         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2006                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2007         else
2008                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2009
2010         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2011                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2012                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2013                 else
2014                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2015
2016                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2017                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2018
2019         }
2020
2021         iwlcore_commit_rxon(priv);
2022
2023         switch (priv->iw_mode) {
2024         case NL80211_IFTYPE_STATION:
2025                 break;
2026
2027         case NL80211_IFTYPE_ADHOC:
2028
2029                 /* assume default assoc id */
2030                 priv->assoc_id = 1;
2031
2032                 iwl_rxon_add_station(priv, priv->bssid, 0);
2033                 iwl_send_beacon_cmd(priv);
2034
2035                 break;
2036
2037         default:
2038                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2039                           __func__, priv->iw_mode);
2040                 break;
2041         }
2042
2043         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2044                 priv->assoc_station_added = 1;
2045
2046         spin_lock_irqsave(&priv->lock, flags);
2047         iwl_activate_qos(priv, 0);
2048         spin_unlock_irqrestore(&priv->lock, flags);
2049
2050         /* the chain noise calibration will enabled PM upon completion
2051          * If chain noise has already been run, then we need to enable
2052          * power management here */
2053         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2054                 iwl_power_update_mode(priv, 0);
2055
2056         /* Enable Rx differential gain and sensitivity calibrations */
2057         iwl_chain_noise_reset(priv);
2058         priv->start_calib = 1;
2059
2060 }
2061
2062 /*****************************************************************************
2063  *
2064  * mac80211 entry point functions
2065  *
2066  *****************************************************************************/
2067
2068 #define UCODE_READY_TIMEOUT     (4 * HZ)
2069
2070 static int iwl_mac_start(struct ieee80211_hw *hw)
2071 {
2072         struct iwl_priv *priv = hw->priv;
2073         int ret;
2074
2075         IWL_DEBUG_MAC80211(priv, "enter\n");
2076
2077         /* we should be verifying the device is ready to be opened */
2078         mutex_lock(&priv->mutex);
2079
2080         memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
2081         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2082          * ucode filename and max sizes are card-specific. */
2083
2084         if (!priv->ucode_code.len) {
2085                 ret = iwl_read_ucode(priv);
2086                 if (ret) {
2087                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2088                         mutex_unlock(&priv->mutex);
2089                         return ret;
2090                 }
2091         }
2092
2093         ret = __iwl_up(priv);
2094
2095         mutex_unlock(&priv->mutex);
2096
2097         iwl_rfkill_set_hw_state(priv);
2098
2099         if (ret)
2100                 return ret;
2101
2102         if (iwl_is_rfkill(priv))
2103                 goto out;
2104
2105         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2106
2107         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2108          * mac80211 will not be run successfully. */
2109         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2110                         test_bit(STATUS_READY, &priv->status),
2111                         UCODE_READY_TIMEOUT);
2112         if (!ret) {
2113                 if (!test_bit(STATUS_READY, &priv->status)) {
2114                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2115                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2116                         return -ETIMEDOUT;
2117                 }
2118         }
2119
2120 out:
2121         priv->is_open = 1;
2122         IWL_DEBUG_MAC80211(priv, "leave\n");
2123         return 0;
2124 }
2125
2126 static void iwl_mac_stop(struct ieee80211_hw *hw)
2127 {
2128         struct iwl_priv *priv = hw->priv;
2129
2130         IWL_DEBUG_MAC80211(priv, "enter\n");
2131
2132         if (!priv->is_open)
2133                 return;
2134
2135         priv->is_open = 0;
2136
2137         if (iwl_is_ready_rf(priv)) {
2138                 /* stop mac, cancel any scan request and clear
2139                  * RXON_FILTER_ASSOC_MSK BIT
2140                  */
2141                 mutex_lock(&priv->mutex);
2142                 iwl_scan_cancel_timeout(priv, 100);
2143                 mutex_unlock(&priv->mutex);
2144         }
2145
2146         iwl_down(priv);
2147
2148         flush_workqueue(priv->workqueue);
2149
2150         /* enable interrupts again in order to receive rfkill changes */
2151         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2152         iwl_enable_interrupts(priv);
2153
2154         IWL_DEBUG_MAC80211(priv, "leave\n");
2155 }
2156
2157 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2158 {
2159         struct iwl_priv *priv = hw->priv;
2160
2161         IWL_DEBUG_MACDUMP(priv, "enter\n");
2162
2163         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2164                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2165
2166         if (iwl_tx_skb(priv, skb))
2167                 dev_kfree_skb_any(skb);
2168
2169         IWL_DEBUG_MACDUMP(priv, "leave\n");
2170         return NETDEV_TX_OK;
2171 }
2172
2173 void iwl_config_ap(struct iwl_priv *priv)
2174 {
2175         int ret = 0;
2176         unsigned long flags;
2177
2178         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2179                 return;
2180
2181         /* The following should be done only at AP bring up */
2182         if (!iwl_is_associated(priv)) {
2183
2184                 /* RXON - unassoc (to set timing command) */
2185                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2186                 iwlcore_commit_rxon(priv);
2187
2188                 /* RXON Timing */
2189                 iwl_setup_rxon_timing(priv);
2190                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2191                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2192                 if (ret)
2193                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2194                                         "Attempting to continue.\n");
2195
2196                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2197                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2198
2199                 /* FIXME: what should be the assoc_id for AP? */
2200                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2201                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2202                         priv->staging_rxon.flags |=
2203                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2204                 else
2205                         priv->staging_rxon.flags &=
2206                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2207
2208                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2209                         if (priv->assoc_capability &
2210                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2211                                 priv->staging_rxon.flags |=
2212                                         RXON_FLG_SHORT_SLOT_MSK;
2213                         else
2214                                 priv->staging_rxon.flags &=
2215                                         ~RXON_FLG_SHORT_SLOT_MSK;
2216
2217                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2218                                 priv->staging_rxon.flags &=
2219                                         ~RXON_FLG_SHORT_SLOT_MSK;
2220                 }
2221                 /* restore RXON assoc */
2222                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2223                 iwlcore_commit_rxon(priv);
2224                 spin_lock_irqsave(&priv->lock, flags);
2225                 iwl_activate_qos(priv, 1);
2226                 spin_unlock_irqrestore(&priv->lock, flags);
2227                 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2228         }
2229         iwl_send_beacon_cmd(priv);
2230
2231         /* FIXME - we need to add code here to detect a totally new
2232          * configuration, reset the AP, unassoc, rxon timing, assoc,
2233          * clear sta table, add BCAST sta... */
2234 }
2235
2236 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2237                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2238                         u32 iv32, u16 *phase1key)
2239 {
2240
2241         struct iwl_priv *priv = hw->priv;
2242         IWL_DEBUG_MAC80211(priv, "enter\n");
2243
2244         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2245
2246         IWL_DEBUG_MAC80211(priv, "leave\n");
2247 }
2248
2249 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2250                            struct ieee80211_vif *vif,
2251                            struct ieee80211_sta *sta,
2252                            struct ieee80211_key_conf *key)
2253 {
2254         struct iwl_priv *priv = hw->priv;
2255         const u8 *addr;
2256         int ret;
2257         u8 sta_id;
2258         bool is_default_wep_key = false;
2259
2260         IWL_DEBUG_MAC80211(priv, "enter\n");
2261
2262         if (priv->hw_params.sw_crypto) {
2263                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2264                 return -EOPNOTSUPP;
2265         }
2266         addr = sta ? sta->addr : iwl_bcast_addr;
2267         sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
2268         if (sta_id == IWL_INVALID_STATION) {
2269                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2270                                    addr);
2271                 return -EINVAL;
2272
2273         }
2274
2275         mutex_lock(&priv->mutex);
2276         iwl_scan_cancel_timeout(priv, 100);
2277         mutex_unlock(&priv->mutex);
2278
2279         /* If we are getting WEP group key and we didn't receive any key mapping
2280          * so far, we are in legacy wep mode (group key only), otherwise we are
2281          * in 1X mode.
2282          * In legacy wep mode, we use another host command to the uCode */
2283         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2284                 priv->iw_mode != NL80211_IFTYPE_AP) {
2285                 if (cmd == SET_KEY)
2286                         is_default_wep_key = !priv->key_mapping_key;
2287                 else
2288                         is_default_wep_key =
2289                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2290         }
2291
2292         switch (cmd) {
2293         case SET_KEY:
2294                 if (is_default_wep_key)
2295                         ret = iwl_set_default_wep_key(priv, key);
2296                 else
2297                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2298
2299                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2300                 break;
2301         case DISABLE_KEY:
2302                 if (is_default_wep_key)
2303                         ret = iwl_remove_default_wep_key(priv, key);
2304                 else
2305                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2306
2307                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2308                 break;
2309         default:
2310                 ret = -EINVAL;
2311         }
2312
2313         IWL_DEBUG_MAC80211(priv, "leave\n");
2314
2315         return ret;
2316 }
2317
2318 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2319                              enum ieee80211_ampdu_mlme_action action,
2320                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2321 {
2322         struct iwl_priv *priv = hw->priv;
2323         int ret;
2324
2325         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2326                      sta->addr, tid);
2327
2328         if (!(priv->cfg->sku & IWL_SKU_N))
2329                 return -EACCES;
2330
2331         switch (action) {
2332         case IEEE80211_AMPDU_RX_START:
2333                 IWL_DEBUG_HT(priv, "start Rx\n");
2334                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2335         case IEEE80211_AMPDU_RX_STOP:
2336                 IWL_DEBUG_HT(priv, "stop Rx\n");
2337                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2338                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2339                         return 0;
2340                 else
2341                         return ret;
2342         case IEEE80211_AMPDU_TX_START:
2343                 IWL_DEBUG_HT(priv, "start Tx\n");
2344                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2345         case IEEE80211_AMPDU_TX_STOP:
2346                 IWL_DEBUG_HT(priv, "stop Tx\n");
2347                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2348                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2349                         return 0;
2350                 else
2351                         return ret;
2352         default:
2353                 IWL_DEBUG_HT(priv, "unknown\n");
2354                 return -EINVAL;
2355                 break;
2356         }
2357         return 0;
2358 }
2359
2360 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2361                              struct ieee80211_low_level_stats *stats)
2362 {
2363         struct iwl_priv *priv = hw->priv;
2364
2365         priv = hw->priv;
2366         IWL_DEBUG_MAC80211(priv, "enter\n");
2367         IWL_DEBUG_MAC80211(priv, "leave\n");
2368
2369         return 0;
2370 }
2371
2372 /*****************************************************************************
2373  *
2374  * sysfs attributes
2375  *
2376  *****************************************************************************/
2377
2378 #ifdef CONFIG_IWLWIFI_DEBUG
2379
2380 /*
2381  * The following adds a new attribute to the sysfs representation
2382  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2383  * used for controlling the debug level.
2384  *
2385  * See the level definitions in iwl for details.
2386  */
2387
2388 static ssize_t show_debug_level(struct device *d,
2389                                 struct device_attribute *attr, char *buf)
2390 {
2391         struct iwl_priv *priv = dev_get_drvdata(d);
2392
2393         return sprintf(buf, "0x%08X\n", priv->debug_level);
2394 }
2395 static ssize_t store_debug_level(struct device *d,
2396                                 struct device_attribute *attr,
2397                                  const char *buf, size_t count)
2398 {
2399         struct iwl_priv *priv = dev_get_drvdata(d);
2400         unsigned long val;
2401         int ret;
2402
2403         ret = strict_strtoul(buf, 0, &val);
2404         if (ret)
2405                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2406         else
2407                 priv->debug_level = val;
2408
2409         return strnlen(buf, count);
2410 }
2411
2412 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2413                         show_debug_level, store_debug_level);
2414
2415
2416 #endif /* CONFIG_IWLWIFI_DEBUG */
2417
2418
2419 static ssize_t show_version(struct device *d,
2420                                 struct device_attribute *attr, char *buf)
2421 {
2422         struct iwl_priv *priv = dev_get_drvdata(d);
2423         struct iwl_alive_resp *palive = &priv->card_alive;
2424         ssize_t pos = 0;
2425         u16 eeprom_ver;
2426
2427         if (palive->is_valid)
2428                 pos += sprintf(buf + pos,
2429                                 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2430                                 "fw type: 0x%01X 0x%01X\n",
2431                                 palive->ucode_major, palive->ucode_minor,
2432                                 palive->sw_rev[0], palive->sw_rev[1],
2433                                 palive->ver_type, palive->ver_subtype);
2434         else
2435                 pos += sprintf(buf + pos, "fw not loaded\n");
2436
2437         if (priv->eeprom) {
2438                 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2439                 pos += sprintf(buf + pos, "NVM Type: %s, version: 0x%x\n",
2440                                (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
2441                                ? "OTP" : "EEPROM", eeprom_ver);
2442
2443         } else {
2444                 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2445         }
2446
2447         return pos;
2448 }
2449
2450 static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2451
2452 static ssize_t show_temperature(struct device *d,
2453                                 struct device_attribute *attr, char *buf)
2454 {
2455         struct iwl_priv *priv = dev_get_drvdata(d);
2456
2457         if (!iwl_is_alive(priv))
2458                 return -EAGAIN;
2459
2460         return sprintf(buf, "%d\n", priv->temperature);
2461 }
2462
2463 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2464
2465 static ssize_t show_tx_power(struct device *d,
2466                              struct device_attribute *attr, char *buf)
2467 {
2468         struct iwl_priv *priv = dev_get_drvdata(d);
2469
2470         if (!iwl_is_ready_rf(priv))
2471                 return sprintf(buf, "off\n");
2472         else
2473                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2474 }
2475
2476 static ssize_t store_tx_power(struct device *d,
2477                               struct device_attribute *attr,
2478                               const char *buf, size_t count)
2479 {
2480         struct iwl_priv *priv = dev_get_drvdata(d);
2481         unsigned long val;
2482         int ret;
2483
2484         ret = strict_strtoul(buf, 10, &val);
2485         if (ret)
2486                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2487         else
2488                 iwl_set_tx_power(priv, val, false);
2489
2490         return count;
2491 }
2492
2493 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2494
2495 static ssize_t show_flags(struct device *d,
2496                           struct device_attribute *attr, char *buf)
2497 {
2498         struct iwl_priv *priv = dev_get_drvdata(d);
2499
2500         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2501 }
2502
2503 static ssize_t store_flags(struct device *d,
2504                            struct device_attribute *attr,
2505                            const char *buf, size_t count)
2506 {
2507         struct iwl_priv *priv = dev_get_drvdata(d);
2508         unsigned long val;
2509         u32 flags;
2510         int ret = strict_strtoul(buf, 0, &val);
2511         if (ret)
2512                 return ret;
2513         flags = (u32)val;
2514
2515         mutex_lock(&priv->mutex);
2516         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2517                 /* Cancel any currently running scans... */
2518                 if (iwl_scan_cancel_timeout(priv, 100))
2519                         IWL_WARN(priv, "Could not cancel scan.\n");
2520                 else {
2521                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2522                         priv->staging_rxon.flags = cpu_to_le32(flags);
2523                         iwlcore_commit_rxon(priv);
2524                 }
2525         }
2526         mutex_unlock(&priv->mutex);
2527
2528         return count;
2529 }
2530
2531 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2532
2533 static ssize_t show_filter_flags(struct device *d,
2534                                  struct device_attribute *attr, char *buf)
2535 {
2536         struct iwl_priv *priv = dev_get_drvdata(d);
2537
2538         return sprintf(buf, "0x%04X\n",
2539                 le32_to_cpu(priv->active_rxon.filter_flags));
2540 }
2541
2542 static ssize_t store_filter_flags(struct device *d,
2543                                   struct device_attribute *attr,
2544                                   const char *buf, size_t count)
2545 {
2546         struct iwl_priv *priv = dev_get_drvdata(d);
2547         unsigned long val;
2548         u32 filter_flags;
2549         int ret = strict_strtoul(buf, 0, &val);
2550         if (ret)
2551                 return ret;
2552         filter_flags = (u32)val;
2553
2554         mutex_lock(&priv->mutex);
2555         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2556                 /* Cancel any currently running scans... */
2557                 if (iwl_scan_cancel_timeout(priv, 100))
2558                         IWL_WARN(priv, "Could not cancel scan.\n");
2559                 else {
2560                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2561                                        "0x%04X\n", filter_flags);
2562                         priv->staging_rxon.filter_flags =
2563                                 cpu_to_le32(filter_flags);
2564                         iwlcore_commit_rxon(priv);
2565                 }
2566         }
2567         mutex_unlock(&priv->mutex);
2568
2569         return count;
2570 }
2571
2572 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2573                    store_filter_flags);
2574
2575 static ssize_t store_power_level(struct device *d,
2576                                  struct device_attribute *attr,
2577                                  const char *buf, size_t count)
2578 {
2579         struct iwl_priv *priv = dev_get_drvdata(d);
2580         int ret;
2581         unsigned long mode;
2582
2583
2584         mutex_lock(&priv->mutex);
2585
2586         ret = strict_strtoul(buf, 10, &mode);
2587         if (ret)
2588                 goto out;
2589
2590         ret = iwl_power_set_user_mode(priv, mode);
2591         if (ret) {
2592                 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2593                 goto out;
2594         }
2595         ret = count;
2596
2597  out:
2598         mutex_unlock(&priv->mutex);
2599         return ret;
2600 }
2601
2602 static ssize_t show_power_level(struct device *d,
2603                                 struct device_attribute *attr, char *buf)
2604 {
2605         struct iwl_priv *priv = dev_get_drvdata(d);
2606         int mode = priv->power_data.user_power_setting;
2607         int level = priv->power_data.power_mode;
2608         char *p = buf;
2609
2610         p += sprintf(p, "INDEX:%d\t", level);
2611         p += sprintf(p, "USER:%d\n", mode);
2612         return p - buf + 1;
2613 }
2614
2615 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2616                    store_power_level);
2617
2618 static ssize_t show_qos(struct device *d,
2619                                 struct device_attribute *attr, char *buf)
2620 {
2621         struct iwl_priv *priv = dev_get_drvdata(d);
2622         char *p = buf;
2623         int   q;
2624
2625         for (q = 0; q < AC_NUM; q++) {
2626                 p += sprintf(p, "\tcw_min\tcw_max\taifsn\ttxop\n");
2627                 p += sprintf(p, "AC[%d]\t%u\t%u\t%u\t%u\n", q,
2628                              priv->qos_data.def_qos_parm.ac[q].cw_min,
2629                              priv->qos_data.def_qos_parm.ac[q].cw_max,
2630                              priv->qos_data.def_qos_parm.ac[q].aifsn,
2631                              priv->qos_data.def_qos_parm.ac[q].edca_txop);
2632         }
2633
2634         return p - buf + 1;
2635 }
2636
2637 static DEVICE_ATTR(qos, S_IRUGO, show_qos, NULL);
2638
2639 static ssize_t show_statistics(struct device *d,
2640                                struct device_attribute *attr, char *buf)
2641 {
2642         struct iwl_priv *priv = dev_get_drvdata(d);
2643         u32 size = sizeof(struct iwl_notif_statistics);
2644         u32 len = 0, ofs = 0;
2645         u8 *data = (u8 *)&priv->statistics;
2646         int rc = 0;
2647
2648         if (!iwl_is_alive(priv))
2649                 return -EAGAIN;
2650
2651         mutex_lock(&priv->mutex);
2652         rc = iwl_send_statistics_request(priv, 0);
2653         mutex_unlock(&priv->mutex);
2654
2655         if (rc) {
2656                 len = sprintf(buf,
2657                               "Error sending statistics request: 0x%08X\n", rc);
2658                 return len;
2659         }
2660
2661         while (size && (PAGE_SIZE - len)) {
2662                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2663                                    PAGE_SIZE - len, 1);
2664                 len = strlen(buf);
2665                 if (PAGE_SIZE - len)
2666                         buf[len++] = '\n';
2667
2668                 ofs += 16;
2669                 size -= min(size, 16U);
2670         }
2671
2672         return len;
2673 }
2674
2675 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2676
2677
2678 /*****************************************************************************
2679  *
2680  * driver setup and teardown
2681  *
2682  *****************************************************************************/
2683
2684 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2685 {
2686         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2687
2688         init_waitqueue_head(&priv->wait_command_queue);
2689
2690         INIT_WORK(&priv->up, iwl_bg_up);
2691         INIT_WORK(&priv->restart, iwl_bg_restart);
2692         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2693         INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
2694         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2695         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2696         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2697         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2698
2699         iwl_setup_scan_deferred_work(priv);
2700
2701         if (priv->cfg->ops->lib->setup_deferred_work)
2702                 priv->cfg->ops->lib->setup_deferred_work(priv);
2703
2704         init_timer(&priv->statistics_periodic);
2705         priv->statistics_periodic.data = (unsigned long)priv;
2706         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2707
2708         if (!priv->cfg->use_isr_legacy)
2709                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2710                         iwl_irq_tasklet, (unsigned long)priv);
2711         else
2712                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2713                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2714 }
2715
2716 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2717 {
2718         if (priv->cfg->ops->lib->cancel_deferred_work)
2719                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2720
2721         cancel_delayed_work_sync(&priv->init_alive_start);
2722         cancel_delayed_work(&priv->scan_check);
2723         cancel_delayed_work(&priv->alive_start);
2724         cancel_work_sync(&priv->beacon_update);
2725         del_timer_sync(&priv->statistics_periodic);
2726 }
2727
2728 static struct attribute *iwl_sysfs_entries[] = {
2729         &dev_attr_flags.attr,
2730         &dev_attr_filter_flags.attr,
2731         &dev_attr_power_level.attr,
2732         &dev_attr_statistics.attr,
2733         &dev_attr_temperature.attr,
2734         &dev_attr_tx_power.attr,
2735 #ifdef CONFIG_IWLWIFI_DEBUG
2736         &dev_attr_debug_level.attr,
2737 #endif
2738         &dev_attr_version.attr,
2739         &dev_attr_qos.attr,
2740         NULL
2741 };
2742
2743 static struct attribute_group iwl_attribute_group = {
2744         .name = NULL,           /* put in device directory */
2745         .attrs = iwl_sysfs_entries,
2746 };
2747
2748 static struct ieee80211_ops iwl_hw_ops = {
2749         .tx = iwl_mac_tx,
2750         .start = iwl_mac_start,
2751         .stop = iwl_mac_stop,
2752         .add_interface = iwl_mac_add_interface,
2753         .remove_interface = iwl_mac_remove_interface,
2754         .config = iwl_mac_config,
2755         .configure_filter = iwl_configure_filter,
2756         .set_key = iwl_mac_set_key,
2757         .update_tkip_key = iwl_mac_update_tkip_key,
2758         .get_stats = iwl_mac_get_stats,
2759         .get_tx_stats = iwl_mac_get_tx_stats,
2760         .conf_tx = iwl_mac_conf_tx,
2761         .reset_tsf = iwl_mac_reset_tsf,
2762         .bss_info_changed = iwl_bss_info_changed,
2763         .ampdu_action = iwl_mac_ampdu_action,
2764         .hw_scan = iwl_mac_hw_scan
2765 };
2766
2767 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2768 {
2769         int err = 0;
2770         struct iwl_priv *priv;
2771         struct ieee80211_hw *hw;
2772         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2773         unsigned long flags;
2774         u16 pci_cmd;
2775
2776         /************************
2777          * 1. Allocating HW data
2778          ************************/
2779
2780         /* Disabling hardware scan means that mac80211 will perform scans
2781          * "the hard way", rather than using device's scan. */
2782         if (cfg->mod_params->disable_hw_scan) {
2783                 if (cfg->mod_params->debug & IWL_DL_INFO)
2784                         dev_printk(KERN_DEBUG, &(pdev->dev),
2785                                    "Disabling hw_scan\n");
2786                 iwl_hw_ops.hw_scan = NULL;
2787         }
2788
2789         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2790         if (!hw) {
2791                 err = -ENOMEM;
2792                 goto out;
2793         }
2794         priv = hw->priv;
2795         /* At this point both hw and priv are allocated. */
2796
2797         SET_IEEE80211_DEV(hw, &pdev->dev);
2798
2799         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2800         priv->cfg = cfg;
2801         priv->pci_dev = pdev;
2802
2803 #ifdef CONFIG_IWLWIFI_DEBUG
2804         priv->debug_level = priv->cfg->mod_params->debug;
2805         atomic_set(&priv->restrict_refcnt, 0);
2806 #endif
2807
2808         /**************************
2809          * 2. Initializing PCI bus
2810          **************************/
2811         if (pci_enable_device(pdev)) {
2812                 err = -ENODEV;
2813                 goto out_ieee80211_free_hw;
2814         }
2815
2816         pci_set_master(pdev);
2817
2818         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2819         if (!err)
2820                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2821         if (err) {
2822                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2823                 if (!err)
2824                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2825                 /* both attempts failed: */
2826                 if (err) {
2827                         IWL_WARN(priv, "No suitable DMA available.\n");
2828                         goto out_pci_disable_device;
2829                 }
2830         }
2831
2832         err = pci_request_regions(pdev, DRV_NAME);
2833         if (err)
2834                 goto out_pci_disable_device;
2835
2836         pci_set_drvdata(pdev, priv);
2837
2838
2839         /***********************
2840          * 3. Read REV register
2841          ***********************/
2842         priv->hw_base = pci_iomap(pdev, 0, 0);
2843         if (!priv->hw_base) {
2844                 err = -ENODEV;
2845                 goto out_pci_release_regions;
2846         }
2847
2848         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2849                 (unsigned long long) pci_resource_len(pdev, 0));
2850         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2851
2852         /* this spin lock will be used in apm_ops.init and EEPROM access
2853          * we should init now
2854          */
2855         spin_lock_init(&priv->reg_lock);
2856         iwl_hw_detect(priv);
2857         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2858                 priv->cfg->name, priv->hw_rev);
2859
2860         /* We disable the RETRY_TIMEOUT register (0x41) to keep
2861          * PCI Tx retries from interfering with C3 CPU state */
2862         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2863
2864         /* amp init */
2865         err = priv->cfg->ops->lib->apm_ops.init(priv);
2866         if (err < 0) {
2867                 IWL_ERR(priv, "Failed to init APMG\n");
2868                 goto out_iounmap;
2869         }
2870         /*****************
2871          * 4. Read EEPROM
2872          *****************/
2873         /* Read the EEPROM */
2874         err = iwl_eeprom_init(priv);
2875         if (err) {
2876                 IWL_ERR(priv, "Unable to init EEPROM\n");
2877                 goto out_iounmap;
2878         }
2879         err = iwl_eeprom_check_version(priv);
2880         if (err)
2881                 goto out_free_eeprom;
2882
2883         /* extract MAC Address */
2884         iwl_eeprom_get_mac(priv, priv->mac_addr);
2885         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2886         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2887
2888         /************************
2889          * 5. Setup HW constants
2890          ************************/
2891         if (iwl_set_hw_params(priv)) {
2892                 IWL_ERR(priv, "failed to set hw parameters\n");
2893                 goto out_free_eeprom;
2894         }
2895
2896         /*******************
2897          * 6. Setup priv
2898          *******************/
2899
2900         err = iwl_init_drv(priv);
2901         if (err)
2902                 goto out_free_eeprom;
2903         /* At this point both hw and priv are initialized. */
2904
2905         /********************
2906          * 7. Setup services
2907          ********************/
2908         spin_lock_irqsave(&priv->lock, flags);
2909         iwl_disable_interrupts(priv);
2910         spin_unlock_irqrestore(&priv->lock, flags);
2911
2912         pci_enable_msi(priv->pci_dev);
2913
2914         iwl_alloc_isr_ict(priv);
2915         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
2916                           IRQF_SHARED, DRV_NAME, priv);
2917         if (err) {
2918                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
2919                 goto out_disable_msi;
2920         }
2921         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
2922         if (err) {
2923                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2924                 goto out_free_irq;
2925         }
2926
2927         iwl_setup_deferred_work(priv);
2928         iwl_setup_rx_handlers(priv);
2929
2930         /**********************************
2931          * 8. Setup and register mac80211
2932          **********************************/
2933
2934         /* enable interrupts if needed: hw bug w/a */
2935         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2936         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2937                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2938                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2939         }
2940
2941         iwl_enable_interrupts(priv);
2942
2943         err = iwl_setup_mac(priv);
2944         if (err)
2945                 goto out_remove_sysfs;
2946
2947         err = iwl_dbgfs_register(priv, DRV_NAME);
2948         if (err)
2949                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2950
2951         /* If platform's RF_KILL switch is NOT set to KILL */
2952         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2953                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2954         else
2955                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2956
2957         err = iwl_rfkill_init(priv);
2958         if (err)
2959                 IWL_ERR(priv, "Unable to initialize RFKILL system. "
2960                                   "Ignoring error: %d\n", err);
2961         else
2962                 iwl_rfkill_set_hw_state(priv);
2963
2964         iwl_power_initialize(priv);
2965         return 0;
2966
2967  out_remove_sysfs:
2968         destroy_workqueue(priv->workqueue);
2969         priv->workqueue = NULL;
2970         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
2971  out_free_irq:
2972         free_irq(priv->pci_dev->irq, priv);
2973         iwl_free_isr_ict(priv);
2974  out_disable_msi:
2975         pci_disable_msi(priv->pci_dev);
2976         iwl_uninit_drv(priv);
2977  out_free_eeprom:
2978         iwl_eeprom_free(priv);
2979  out_iounmap:
2980         pci_iounmap(pdev, priv->hw_base);
2981  out_pci_release_regions:
2982         pci_set_drvdata(pdev, NULL);
2983         pci_release_regions(pdev);
2984  out_pci_disable_device:
2985         pci_disable_device(pdev);
2986  out_ieee80211_free_hw:
2987         ieee80211_free_hw(priv->hw);
2988  out:
2989         return err;
2990 }
2991
2992 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
2993 {
2994         struct iwl_priv *priv = pci_get_drvdata(pdev);
2995         unsigned long flags;
2996
2997         if (!priv)
2998                 return;
2999
3000         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3001
3002         iwl_dbgfs_unregister(priv);
3003         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3004
3005         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3006          * to be called and iwl_down since we are removing the device
3007          * we need to set STATUS_EXIT_PENDING bit.
3008          */
3009         set_bit(STATUS_EXIT_PENDING, &priv->status);
3010         if (priv->mac80211_registered) {
3011                 ieee80211_unregister_hw(priv->hw);
3012                 priv->mac80211_registered = 0;
3013         } else {
3014                 iwl_down(priv);
3015         }
3016
3017         /* make sure we flush any pending irq or
3018          * tasklet for the driver
3019          */
3020         spin_lock_irqsave(&priv->lock, flags);
3021         iwl_disable_interrupts(priv);
3022         spin_unlock_irqrestore(&priv->lock, flags);
3023
3024         iwl_synchronize_irq(priv);
3025
3026         iwl_rfkill_unregister(priv);
3027         iwl_dealloc_ucode_pci(priv);
3028
3029         if (priv->rxq.bd)
3030                 iwl_rx_queue_free(priv, &priv->rxq);
3031         iwl_hw_txq_ctx_free(priv);
3032
3033         priv->cfg->ops->smgmt->clear_station_table(priv);
3034         iwl_eeprom_free(priv);
3035
3036
3037         /*netif_stop_queue(dev); */
3038         flush_workqueue(priv->workqueue);
3039
3040         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3041          * priv->workqueue... so we can't take down the workqueue
3042          * until now... */
3043         destroy_workqueue(priv->workqueue);
3044         priv->workqueue = NULL;
3045
3046         free_irq(priv->pci_dev->irq, priv);
3047         pci_disable_msi(priv->pci_dev);
3048         pci_iounmap(pdev, priv->hw_base);
3049         pci_release_regions(pdev);
3050         pci_disable_device(pdev);
3051         pci_set_drvdata(pdev, NULL);
3052
3053         iwl_uninit_drv(priv);
3054
3055         iwl_free_isr_ict(priv);
3056
3057         if (priv->ibss_beacon)
3058                 dev_kfree_skb(priv->ibss_beacon);
3059
3060         ieee80211_free_hw(priv->hw);
3061 }
3062
3063
3064 /*****************************************************************************
3065  *
3066  * driver and module entry point
3067  *
3068  *****************************************************************************/
3069
3070 /* Hardware specific file defines the PCI IDs table for that hardware module */
3071 static struct pci_device_id iwl_hw_card_ids[] = {
3072 #ifdef CONFIG_IWL4965
3073         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3074         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3075 #endif /* CONFIG_IWL4965 */
3076 #ifdef CONFIG_IWL5000
3077         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3078         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3079         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3080         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3081         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3082         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3083         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3084         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3085         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3086         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3087 /* 5350 WiFi/WiMax */
3088         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3089         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3090         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3091 /* 5150 Wifi/WiMax */
3092         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3093         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3094 /* 6000/6050 Series */
3095         {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3096         {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3097         {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3098         {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3099         {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000_2agn_cfg)},
3100         {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3101         {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000_2agn_cfg)},
3102         {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3103         {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3104         {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3105         {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3106         {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3107         {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3108 /* 1000 Series WiFi */
3109         {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3110         {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3111 #endif /* CONFIG_IWL5000 */
3112
3113         {0}
3114 };
3115 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3116
3117 static struct pci_driver iwl_driver = {
3118         .name = DRV_NAME,
3119         .id_table = iwl_hw_card_ids,
3120         .probe = iwl_pci_probe,
3121         .remove = __devexit_p(iwl_pci_remove),
3122 #ifdef CONFIG_PM
3123         .suspend = iwl_pci_suspend,
3124         .resume = iwl_pci_resume,
3125 #endif
3126 };
3127
3128 static int __init iwl_init(void)
3129 {
3130
3131         int ret;
3132         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3133         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3134
3135         ret = iwlagn_rate_control_register();
3136         if (ret) {
3137                 printk(KERN_ERR DRV_NAME
3138                        "Unable to register rate control algorithm: %d\n", ret);
3139                 return ret;
3140         }
3141
3142         ret = pci_register_driver(&iwl_driver);
3143         if (ret) {
3144                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3145                 goto error_register;
3146         }
3147
3148         return ret;
3149
3150 error_register:
3151         iwlagn_rate_control_unregister();
3152         return ret;
3153 }
3154
3155 static void __exit iwl_exit(void)
3156 {
3157         pci_unregister_driver(&iwl_driver);
3158         iwlagn_rate_control_unregister();
3159 }
3160
3161 module_exit(iwl_exit);
3162 module_init(iwl_init);