1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/mac80211.h>
45 #include <asm/div64.h>
47 #define DRV_NAME "iwlagn"
49 #include "iwl-eeprom.h"
53 #include "iwl-helpers.h"
55 #include "iwl-calib.h"
58 /******************************************************************************
62 ******************************************************************************/
65 * module name, copyright, version, etc.
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69 #ifdef CONFIG_IWLWIFI_DEBUG
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
95 /**************************************************************/
98 * iwl_commit_rxon - commit staging_rxon to hardware
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
105 int iwl_commit_rxon(struct iwl_priv *priv)
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113 if (!iwl_is_alive(priv))
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119 ret = iwl_check_rxon_cmd(priv);
121 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
126 * receive commit_rxon request
127 * abort any previous channel switch if still in process
129 if (priv->switch_rxon.switch_in_progress &&
130 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
131 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
132 le16_to_cpu(priv->switch_rxon.channel));
133 priv->switch_rxon.switch_in_progress = false;
136 /* If we don't need to send a full RXON, we can use
137 * iwl_rxon_assoc_cmd which is used to reconfigure filter
138 * and other flags for the current radio configuration. */
139 if (!iwl_full_rxon_required(priv)) {
140 ret = iwl_send_rxon_assoc(priv);
142 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
147 iwl_print_rx_config_cmd(priv);
151 /* station table will be cleared */
152 priv->assoc_station_added = 0;
154 /* If we are currently associated and the new config requires
155 * an RXON_ASSOC and the new config wants the associated mask enabled,
156 * we must clear the associated from the active configuration
157 * before we apply the new config */
158 if (iwl_is_associated(priv) && new_assoc) {
159 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
160 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
162 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
163 sizeof(struct iwl_rxon_cmd),
166 /* If the mask clearing failed then we set
167 * active_rxon back to what it was previously */
169 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
170 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
175 IWL_DEBUG_INFO(priv, "Sending RXON\n"
176 "* with%s RXON_FILTER_ASSOC_MSK\n"
179 (new_assoc ? "" : "out"),
180 le16_to_cpu(priv->staging_rxon.channel),
181 priv->staging_rxon.bssid_addr);
183 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
185 /* Apply the new configuration
186 * RXON unassoc clears the station table in uCode, send it before
187 * we add the bcast station. If assoc bit is set, we will send RXON
188 * after having added the bcast and bssid station.
191 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
192 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
194 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
197 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
200 iwl_clear_stations_table(priv);
202 priv->start_calib = 0;
204 /* Add the broadcast address so we can send broadcast frames */
205 iwl_add_bcast_station(priv);
207 /* If we have set the ASSOC_MSK and we are in BSS mode then
208 * add the IWL_AP_ID to the station rate table */
210 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
211 ret = iwl_rxon_add_station(priv,
212 priv->active_rxon.bssid_addr, 1);
213 if (ret == IWL_INVALID_STATION) {
215 "Error adding AP address for TX.\n");
218 priv->assoc_station_added = 1;
219 if (priv->default_wep_key &&
220 iwl_send_static_wepkey_cmd(priv, 0))
222 "Could not send WEP static key.\n");
226 * allow CTS-to-self if possible for new association.
227 * this is relevant only for 5000 series and up,
228 * but will not damage 4965
230 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
232 /* Apply the new configuration
233 * RXON assoc doesn't clear the station table in uCode,
235 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
236 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
238 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
241 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
243 iwl_print_rx_config_cmd(priv);
245 iwl_init_sensitivity(priv);
247 /* If we issue a new RXON command which required a tune then we must
248 * send a new TXPOWER command or we won't be able to Tx any frames */
249 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
251 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
258 void iwl_update_chain_flags(struct iwl_priv *priv)
261 if (priv->cfg->ops->hcmd->set_rxon_chain)
262 priv->cfg->ops->hcmd->set_rxon_chain(priv);
263 iwlcore_commit_rxon(priv);
266 static void iwl_clear_free_frames(struct iwl_priv *priv)
268 struct list_head *element;
270 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
273 while (!list_empty(&priv->free_frames)) {
274 element = priv->free_frames.next;
276 kfree(list_entry(element, struct iwl_frame, list));
277 priv->frames_count--;
280 if (priv->frames_count) {
281 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
283 priv->frames_count = 0;
287 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
289 struct iwl_frame *frame;
290 struct list_head *element;
291 if (list_empty(&priv->free_frames)) {
292 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
294 IWL_ERR(priv, "Could not allocate frame!\n");
298 priv->frames_count++;
302 element = priv->free_frames.next;
304 return list_entry(element, struct iwl_frame, list);
307 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
309 memset(frame, 0, sizeof(*frame));
310 list_add(&frame->list, &priv->free_frames);
313 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
314 struct ieee80211_hdr *hdr,
317 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
318 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
319 (priv->iw_mode != NL80211_IFTYPE_AP)))
322 if (priv->ibss_beacon->len > left)
325 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
327 return priv->ibss_beacon->len;
330 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
331 struct iwl_frame *frame, u8 rate)
333 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
334 unsigned int frame_size;
336 tx_beacon_cmd = &frame->u.beacon;
337 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
339 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
340 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
342 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
343 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
345 BUG_ON(frame_size > MAX_MPDU_SIZE);
346 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
348 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
349 tx_beacon_cmd->tx.rate_n_flags =
350 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
352 tx_beacon_cmd->tx.rate_n_flags =
353 iwl_hw_set_rate_n_flags(rate, 0);
355 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
357 TX_CMD_FLG_STA_RATE_MSK;
359 return sizeof(*tx_beacon_cmd) + frame_size;
361 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
363 struct iwl_frame *frame;
364 unsigned int frame_size;
368 frame = iwl_get_free_frame(priv);
371 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
376 rate = iwl_rate_get_lowest_plcp(priv);
378 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
380 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
383 iwl_free_frame(priv, frame);
388 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
390 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
392 dma_addr_t addr = get_unaligned_le32(&tb->lo);
393 if (sizeof(dma_addr_t) > sizeof(u32))
395 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
400 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
402 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
404 return le16_to_cpu(tb->hi_n_len) >> 4;
407 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
408 dma_addr_t addr, u16 len)
410 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
411 u16 hi_n_len = len << 4;
413 put_unaligned_le32(addr, &tb->lo);
414 if (sizeof(dma_addr_t) > sizeof(u32))
415 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
417 tb->hi_n_len = cpu_to_le16(hi_n_len);
419 tfd->num_tbs = idx + 1;
422 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
424 return tfd->num_tbs & 0x1f;
428 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
429 * @priv - driver private data
432 * Does NOT advance any TFD circular buffer read/write indexes
433 * Does NOT free the TFD itself (which is within circular buffer)
435 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
437 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
439 struct pci_dev *dev = priv->pci_dev;
440 int index = txq->q.read_ptr;
444 tfd = &tfd_tmp[index];
446 /* Sanity check on number of chunks */
447 num_tbs = iwl_tfd_get_num_tbs(tfd);
449 if (num_tbs >= IWL_NUM_OF_TBS) {
450 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
451 /* @todo issue fatal error, it is quite serious situation */
457 pci_unmap_single(dev,
458 pci_unmap_addr(&txq->meta[index], mapping),
459 pci_unmap_len(&txq->meta[index], len),
460 PCI_DMA_BIDIRECTIONAL);
462 /* Unmap chunks, if any. */
463 for (i = 1; i < num_tbs; i++) {
464 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
465 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
468 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
469 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
474 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
475 struct iwl_tx_queue *txq,
476 dma_addr_t addr, u16 len,
480 struct iwl_tfd *tfd, *tfd_tmp;
484 tfd_tmp = (struct iwl_tfd *)txq->tfds;
485 tfd = &tfd_tmp[q->write_ptr];
488 memset(tfd, 0, sizeof(*tfd));
490 num_tbs = iwl_tfd_get_num_tbs(tfd);
492 /* Each TFD can point to a maximum 20 Tx buffers */
493 if (num_tbs >= IWL_NUM_OF_TBS) {
494 IWL_ERR(priv, "Error can not send more than %d chunks\n",
499 BUG_ON(addr & ~DMA_BIT_MASK(36));
500 if (unlikely(addr & ~IWL_TX_DMA_MASK))
501 IWL_ERR(priv, "Unaligned address = %llx\n",
502 (unsigned long long)addr);
504 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
510 * Tell nic where to find circular buffer of Tx Frame Descriptors for
511 * given Tx queue, and enable the DMA channel used for that queue.
513 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
514 * channels supported in hardware.
516 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
517 struct iwl_tx_queue *txq)
519 int txq_id = txq->q.id;
521 /* Circular buffer (TFD queue in DRAM) physical base address */
522 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
523 txq->q.dma_addr >> 8);
528 /******************************************************************************
530 * Generic RX handler implementations
532 ******************************************************************************/
533 static void iwl_rx_reply_alive(struct iwl_priv *priv,
534 struct iwl_rx_mem_buffer *rxb)
536 struct iwl_rx_packet *pkt = rxb_addr(rxb);
537 struct iwl_alive_resp *palive;
538 struct delayed_work *pwork;
540 palive = &pkt->u.alive_frame;
542 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
544 palive->is_valid, palive->ver_type,
545 palive->ver_subtype);
547 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
548 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
549 memcpy(&priv->card_alive_init,
551 sizeof(struct iwl_init_alive_resp));
552 pwork = &priv->init_alive_start;
554 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
555 memcpy(&priv->card_alive, &pkt->u.alive_frame,
556 sizeof(struct iwl_alive_resp));
557 pwork = &priv->alive_start;
560 /* We delay the ALIVE response by 5ms to
561 * give the HW RF Kill time to activate... */
562 if (palive->is_valid == UCODE_VALID_OK)
563 queue_delayed_work(priv->workqueue, pwork,
564 msecs_to_jiffies(5));
566 IWL_WARN(priv, "uCode did not respond OK.\n");
569 static void iwl_bg_beacon_update(struct work_struct *work)
571 struct iwl_priv *priv =
572 container_of(work, struct iwl_priv, beacon_update);
573 struct sk_buff *beacon;
575 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
576 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
579 IWL_ERR(priv, "update beacon failed\n");
583 mutex_lock(&priv->mutex);
584 /* new beacon skb is allocated every time; dispose previous.*/
585 if (priv->ibss_beacon)
586 dev_kfree_skb(priv->ibss_beacon);
588 priv->ibss_beacon = beacon;
589 mutex_unlock(&priv->mutex);
591 iwl_send_beacon_cmd(priv);
595 * iwl_bg_statistics_periodic - Timer callback to queue statistics
597 * This callback is provided in order to send a statistics request.
599 * This timer function is continually reset to execute within
600 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
601 * was received. We need to ensure we receive the statistics in order
602 * to update the temperature used for calibrating the TXPOWER.
604 static void iwl_bg_statistics_periodic(unsigned long data)
606 struct iwl_priv *priv = (struct iwl_priv *)data;
608 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
611 /* dont send host command if rf-kill is on */
612 if (!iwl_is_ready_rf(priv))
615 iwl_send_statistics_request(priv, CMD_ASYNC);
618 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
619 struct iwl_rx_mem_buffer *rxb)
621 #ifdef CONFIG_IWLWIFI_DEBUG
622 struct iwl_rx_packet *pkt = rxb_addr(rxb);
623 struct iwl4965_beacon_notif *beacon =
624 (struct iwl4965_beacon_notif *)pkt->u.raw;
625 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
627 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
628 "tsf %d %d rate %d\n",
629 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
630 beacon->beacon_notify_hdr.failure_frame,
631 le32_to_cpu(beacon->ibss_mgr_status),
632 le32_to_cpu(beacon->high_tsf),
633 le32_to_cpu(beacon->low_tsf), rate);
636 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
637 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
638 queue_work(priv->workqueue, &priv->beacon_update);
641 /* Handle notification from uCode that card's power state is changing
642 * due to software, hardware, or critical temperature RFKILL */
643 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
644 struct iwl_rx_mem_buffer *rxb)
646 struct iwl_rx_packet *pkt = rxb_addr(rxb);
647 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
648 unsigned long status = priv->status;
650 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
651 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
652 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
654 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
657 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
658 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
660 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
661 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
663 if (!(flags & RXON_CARD_DISABLED)) {
664 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
665 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
666 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
667 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
669 if (flags & RF_CARD_DISABLED)
670 iwl_tt_enter_ct_kill(priv);
672 if (!(flags & RF_CARD_DISABLED))
673 iwl_tt_exit_ct_kill(priv);
675 if (flags & HW_CARD_DISABLED)
676 set_bit(STATUS_RF_KILL_HW, &priv->status);
678 clear_bit(STATUS_RF_KILL_HW, &priv->status);
681 if (!(flags & RXON_CARD_DISABLED))
682 iwl_scan_cancel(priv);
684 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
685 test_bit(STATUS_RF_KILL_HW, &priv->status)))
686 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
687 test_bit(STATUS_RF_KILL_HW, &priv->status));
689 wake_up_interruptible(&priv->wait_command_queue);
692 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
694 if (src == IWL_PWR_SRC_VAUX) {
695 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
696 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
697 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
698 ~APMG_PS_CTRL_MSK_PWR_SRC);
700 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
701 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
702 ~APMG_PS_CTRL_MSK_PWR_SRC);
709 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
711 * Setup the RX handlers for each of the reply types sent from the uCode
714 * This function chains into the hardware specific files for them to setup
715 * any hardware specific handlers as well.
717 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
719 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
720 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
721 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
722 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
723 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
724 iwl_rx_pm_debug_statistics_notif;
725 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
728 * The same handler is used for both the REPLY to a discrete
729 * statistics request from the host as well as for the periodic
730 * statistics notifications (after received beacons) from the uCode.
732 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
733 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
735 iwl_setup_spectrum_handlers(priv);
736 iwl_setup_rx_scan_handlers(priv);
738 /* status change handler */
739 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
741 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
742 iwl_rx_missed_beacon_notif;
744 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
745 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
747 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
748 /* Set up hardware specific Rx handlers */
749 priv->cfg->ops->lib->rx_handler_setup(priv);
753 * iwl_rx_handle - Main entry function for receiving responses from uCode
755 * Uses the priv->rx_handlers callback function array to invoke
756 * the appropriate handlers, including command responses,
757 * frame-received notifications, and other notifications.
759 void iwl_rx_handle(struct iwl_priv *priv)
761 struct iwl_rx_mem_buffer *rxb;
762 struct iwl_rx_packet *pkt;
763 struct iwl_rx_queue *rxq = &priv->rxq;
771 /* uCode's read index (stored in shared DRAM) indicates the last Rx
772 * buffer that the driver may process (last buffer filled by ucode). */
773 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
776 /* Rx interrupt, but nothing sent from uCode */
778 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
780 /* calculate total frames need to be restock after handling RX */
781 total_empty = r - rxq->write_actual;
783 total_empty += RX_QUEUE_SIZE;
785 if (total_empty > (RX_QUEUE_SIZE / 2))
791 /* If an RXB doesn't have a Rx queue slot associated with it,
792 * then a bug has been introduced in the queue refilling
793 * routines -- catch it here */
796 rxq->queue[i] = NULL;
798 pci_unmap_page(priv->pci_dev, rxb->page_dma,
799 PAGE_SIZE << priv->hw_params.rx_page_order,
803 trace_iwlwifi_dev_rx(priv, pkt,
804 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
806 /* Reclaim a command buffer only if this packet is a response
807 * to a (driver-originated) command.
808 * If the packet (e.g. Rx frame) originated from uCode,
809 * there is no command buffer to reclaim.
810 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
811 * but apparently a few don't get set; catch them here. */
812 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
813 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
814 (pkt->hdr.cmd != REPLY_RX) &&
815 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
816 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
817 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
818 (pkt->hdr.cmd != REPLY_TX);
820 /* Based on type of command response or notification,
821 * handle those that need handling via function in
822 * rx_handlers table. See iwl_setup_rx_handlers() */
823 if (priv->rx_handlers[pkt->hdr.cmd]) {
824 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
825 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
826 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
827 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
829 /* No handling needed */
831 "r %d i %d No handler needed for %s, 0x%02x\n",
832 r, i, get_cmd_string(pkt->hdr.cmd),
837 * XXX: After here, we should always check rxb->page
838 * against NULL before touching it or its virtual
839 * memory (pkt). Because some rx_handler might have
840 * already taken or freed the pages.
844 /* Invoke any callbacks, transfer the buffer to caller,
845 * and fire off the (possibly) blocking iwl_send_cmd()
846 * as we reclaim the driver command queue */
848 iwl_tx_cmd_complete(priv, rxb);
850 IWL_WARN(priv, "Claim null rxb?\n");
853 /* Reuse the page if possible. For notification packets and
854 * SKBs that fail to Rx correctly, add them back into the
855 * rx_free list for reuse later. */
856 spin_lock_irqsave(&rxq->lock, flags);
857 if (rxb->page != NULL) {
858 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
859 0, PAGE_SIZE << priv->hw_params.rx_page_order,
861 list_add_tail(&rxb->list, &rxq->rx_free);
864 list_add_tail(&rxb->list, &rxq->rx_used);
866 spin_unlock_irqrestore(&rxq->lock, flags);
868 i = (i + 1) & RX_QUEUE_MASK;
869 /* If there are a lot of unused frames,
870 * restock the Rx queue so ucode wont assert. */
875 iwl_rx_replenish_now(priv);
881 /* Backtrack one entry */
884 iwl_rx_replenish_now(priv);
886 iwl_rx_queue_restock(priv);
889 /* call this function to flush any scheduled tasklet */
890 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
892 /* wait to make sure we flush pending tasklet*/
893 synchronize_irq(priv->pci_dev->irq);
894 tasklet_kill(&priv->irq_tasklet);
897 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
899 u32 inta, handled = 0;
903 #ifdef CONFIG_IWLWIFI_DEBUG
907 spin_lock_irqsave(&priv->lock, flags);
909 /* Ack/clear/reset pending uCode interrupts.
910 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
911 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
912 inta = iwl_read32(priv, CSR_INT);
913 iwl_write32(priv, CSR_INT, inta);
915 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
916 * Any new interrupts that happen after this, either while we're
917 * in this tasklet, or later, will show up in next ISR/tasklet. */
918 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
919 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
921 #ifdef CONFIG_IWLWIFI_DEBUG
922 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
924 inta_mask = iwl_read32(priv, CSR_INT_MASK);
925 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
926 inta, inta_mask, inta_fh);
930 spin_unlock_irqrestore(&priv->lock, flags);
932 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
933 * atomic, make sure that inta covers all the interrupts that
934 * we've discovered, even if FH interrupt came in just after
935 * reading CSR_INT. */
936 if (inta_fh & CSR49_FH_INT_RX_MASK)
937 inta |= CSR_INT_BIT_FH_RX;
938 if (inta_fh & CSR49_FH_INT_TX_MASK)
939 inta |= CSR_INT_BIT_FH_TX;
941 /* Now service all interrupt bits discovered above. */
942 if (inta & CSR_INT_BIT_HW_ERR) {
943 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
945 /* Tell the device to stop sending interrupts */
946 iwl_disable_interrupts(priv);
948 priv->isr_stats.hw++;
949 iwl_irq_handle_error(priv);
951 handled |= CSR_INT_BIT_HW_ERR;
956 #ifdef CONFIG_IWLWIFI_DEBUG
957 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
958 /* NIC fires this, but we don't use it, redundant with WAKEUP */
959 if (inta & CSR_INT_BIT_SCD) {
960 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
961 "the frame/frames.\n");
962 priv->isr_stats.sch++;
965 /* Alive notification via Rx interrupt will do the real work */
966 if (inta & CSR_INT_BIT_ALIVE) {
967 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
968 priv->isr_stats.alive++;
972 /* Safely ignore these bits for debug checks below */
973 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
975 /* HW RF KILL switch toggled */
976 if (inta & CSR_INT_BIT_RF_KILL) {
978 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
979 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
982 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
983 hw_rf_kill ? "disable radio" : "enable radio");
985 priv->isr_stats.rfkill++;
987 /* driver only loads ucode once setting the interface up.
988 * the driver allows loading the ucode even if the radio
989 * is killed. Hence update the killswitch state here. The
990 * rfkill handler will care about restarting if needed.
992 if (!test_bit(STATUS_ALIVE, &priv->status)) {
994 set_bit(STATUS_RF_KILL_HW, &priv->status);
996 clear_bit(STATUS_RF_KILL_HW, &priv->status);
997 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1000 handled |= CSR_INT_BIT_RF_KILL;
1003 /* Chip got too hot and stopped itself */
1004 if (inta & CSR_INT_BIT_CT_KILL) {
1005 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1006 priv->isr_stats.ctkill++;
1007 handled |= CSR_INT_BIT_CT_KILL;
1010 /* Error detected by uCode */
1011 if (inta & CSR_INT_BIT_SW_ERR) {
1012 IWL_ERR(priv, "Microcode SW error detected. "
1013 " Restarting 0x%X.\n", inta);
1014 priv->isr_stats.sw++;
1015 priv->isr_stats.sw_err = inta;
1016 iwl_irq_handle_error(priv);
1017 handled |= CSR_INT_BIT_SW_ERR;
1021 * uCode wakes up after power-down sleep.
1022 * Tell device about any new tx or host commands enqueued,
1023 * and about any Rx buffers made available while asleep.
1025 if (inta & CSR_INT_BIT_WAKEUP) {
1026 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1027 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1028 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1029 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1030 priv->isr_stats.wakeup++;
1031 handled |= CSR_INT_BIT_WAKEUP;
1034 /* All uCode command responses, including Tx command responses,
1035 * Rx "responses" (frame-received notification), and other
1036 * notifications from uCode come through here*/
1037 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1038 iwl_rx_handle(priv);
1039 priv->isr_stats.rx++;
1040 iwl_leds_background(priv);
1041 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1044 /* This "Tx" DMA channel is used only for loading uCode */
1045 if (inta & CSR_INT_BIT_FH_TX) {
1046 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1047 priv->isr_stats.tx++;
1048 handled |= CSR_INT_BIT_FH_TX;
1049 /* Wake up uCode load routine, now that load is complete */
1050 priv->ucode_write_complete = 1;
1051 wake_up_interruptible(&priv->wait_command_queue);
1054 if (inta & ~handled) {
1055 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1056 priv->isr_stats.unhandled++;
1059 if (inta & ~(priv->inta_mask)) {
1060 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1061 inta & ~priv->inta_mask);
1062 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1065 /* Re-enable all interrupts */
1066 /* only Re-enable if diabled by irq */
1067 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1068 iwl_enable_interrupts(priv);
1070 #ifdef CONFIG_IWLWIFI_DEBUG
1071 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1072 inta = iwl_read32(priv, CSR_INT);
1073 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1074 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1075 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1076 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1081 /* tasklet for iwlagn interrupt */
1082 static void iwl_irq_tasklet(struct iwl_priv *priv)
1086 unsigned long flags;
1087 #ifdef CONFIG_IWLWIFI_DEBUG
1091 spin_lock_irqsave(&priv->lock, flags);
1093 /* Ack/clear/reset pending uCode interrupts.
1094 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1096 iwl_write32(priv, CSR_INT, priv->inta);
1100 #ifdef CONFIG_IWLWIFI_DEBUG
1101 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1102 /* just for debug */
1103 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1104 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1109 spin_unlock_irqrestore(&priv->lock, flags);
1111 /* saved interrupt in inta variable now we can reset priv->inta */
1114 /* Now service all interrupt bits discovered above. */
1115 if (inta & CSR_INT_BIT_HW_ERR) {
1116 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1118 /* Tell the device to stop sending interrupts */
1119 iwl_disable_interrupts(priv);
1121 priv->isr_stats.hw++;
1122 iwl_irq_handle_error(priv);
1124 handled |= CSR_INT_BIT_HW_ERR;
1129 #ifdef CONFIG_IWLWIFI_DEBUG
1130 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1131 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1132 if (inta & CSR_INT_BIT_SCD) {
1133 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1134 "the frame/frames.\n");
1135 priv->isr_stats.sch++;
1138 /* Alive notification via Rx interrupt will do the real work */
1139 if (inta & CSR_INT_BIT_ALIVE) {
1140 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1141 priv->isr_stats.alive++;
1145 /* Safely ignore these bits for debug checks below */
1146 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1148 /* HW RF KILL switch toggled */
1149 if (inta & CSR_INT_BIT_RF_KILL) {
1151 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1152 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1155 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1156 hw_rf_kill ? "disable radio" : "enable radio");
1158 priv->isr_stats.rfkill++;
1160 /* driver only loads ucode once setting the interface up.
1161 * the driver allows loading the ucode even if the radio
1162 * is killed. Hence update the killswitch state here. The
1163 * rfkill handler will care about restarting if needed.
1165 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1167 set_bit(STATUS_RF_KILL_HW, &priv->status);
1169 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1170 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1173 handled |= CSR_INT_BIT_RF_KILL;
1176 /* Chip got too hot and stopped itself */
1177 if (inta & CSR_INT_BIT_CT_KILL) {
1178 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1179 priv->isr_stats.ctkill++;
1180 handled |= CSR_INT_BIT_CT_KILL;
1183 /* Error detected by uCode */
1184 if (inta & CSR_INT_BIT_SW_ERR) {
1185 IWL_ERR(priv, "Microcode SW error detected. "
1186 " Restarting 0x%X.\n", inta);
1187 priv->isr_stats.sw++;
1188 priv->isr_stats.sw_err = inta;
1189 iwl_irq_handle_error(priv);
1190 handled |= CSR_INT_BIT_SW_ERR;
1193 /* uCode wakes up after power-down sleep */
1194 if (inta & CSR_INT_BIT_WAKEUP) {
1195 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1196 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1197 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1198 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1199 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1200 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1201 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1202 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1204 priv->isr_stats.wakeup++;
1206 handled |= CSR_INT_BIT_WAKEUP;
1209 /* All uCode command responses, including Tx command responses,
1210 * Rx "responses" (frame-received notification), and other
1211 * notifications from uCode come through here*/
1212 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1213 CSR_INT_BIT_RX_PERIODIC)) {
1214 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1215 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1216 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1217 iwl_write32(priv, CSR_FH_INT_STATUS,
1218 CSR49_FH_INT_RX_MASK);
1220 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1221 handled |= CSR_INT_BIT_RX_PERIODIC;
1222 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1224 /* Sending RX interrupt require many steps to be done in the
1226 * 1- write interrupt to current index in ICT table.
1228 * 3- update RX shared data to indicate last write index.
1229 * 4- send interrupt.
1230 * This could lead to RX race, driver could receive RX interrupt
1231 * but the shared data changes does not reflect this.
1232 * this could lead to RX race, RX periodic will solve this race
1234 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1235 CSR_INT_PERIODIC_DIS);
1236 iwl_rx_handle(priv);
1237 /* Only set RX periodic if real RX is received. */
1238 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1239 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1240 CSR_INT_PERIODIC_ENA);
1242 priv->isr_stats.rx++;
1243 iwl_leds_background(priv);
1246 /* This "Tx" DMA channel is used only for loading uCode */
1247 if (inta & CSR_INT_BIT_FH_TX) {
1248 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1249 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1250 priv->isr_stats.tx++;
1251 handled |= CSR_INT_BIT_FH_TX;
1252 /* Wake up uCode load routine, now that load is complete */
1253 priv->ucode_write_complete = 1;
1254 wake_up_interruptible(&priv->wait_command_queue);
1257 if (inta & ~handled) {
1258 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1259 priv->isr_stats.unhandled++;
1262 if (inta & ~(priv->inta_mask)) {
1263 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1264 inta & ~priv->inta_mask);
1267 /* Re-enable all interrupts */
1268 /* only Re-enable if diabled by irq */
1269 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1270 iwl_enable_interrupts(priv);
1274 /******************************************************************************
1276 * uCode download functions
1278 ******************************************************************************/
1280 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1282 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1283 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1284 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1285 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1286 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1287 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1290 static void iwl_nic_start(struct iwl_priv *priv)
1292 /* Remove all resets to allow NIC to operate */
1293 iwl_write32(priv, CSR_RESET, 0);
1298 * iwl_read_ucode - Read uCode images from disk file.
1300 * Copy into buffers for card to fetch via bus-mastering
1302 static int iwl_read_ucode(struct iwl_priv *priv)
1304 struct iwl_ucode_header *ucode;
1305 int ret = -EINVAL, index;
1306 const struct firmware *ucode_raw;
1307 const char *name_pre = priv->cfg->fw_name_pre;
1308 const unsigned int api_max = priv->cfg->ucode_api_max;
1309 const unsigned int api_min = priv->cfg->ucode_api_min;
1314 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1317 /* Ask kernel firmware_class module to get the boot firmware off disk.
1318 * request_firmware() is synchronous, file is in memory on return. */
1319 for (index = api_max; index >= api_min; index--) {
1320 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1321 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1323 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1330 if (index < api_max)
1331 IWL_ERR(priv, "Loaded firmware %s, "
1332 "which is deprecated. "
1333 "Please use API v%u instead.\n",
1336 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1337 buf, ucode_raw->size);
1345 /* Make sure that we got at least the v1 header! */
1346 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1347 IWL_ERR(priv, "File size way too small!\n");
1352 /* Data from ucode file: header followed by uCode images */
1353 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1355 priv->ucode_ver = le32_to_cpu(ucode->ver);
1356 api_ver = IWL_UCODE_API(priv->ucode_ver);
1357 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1358 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1359 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1360 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1362 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1363 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1364 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1366 /* api_ver should match the api version forming part of the
1367 * firmware filename ... but we don't check for that and only rely
1368 * on the API version read from firmware header from here on forward */
1370 if (api_ver < api_min || api_ver > api_max) {
1371 IWL_ERR(priv, "Driver unable to support your firmware API. "
1372 "Driver supports v%u, firmware is v%u.\n",
1374 priv->ucode_ver = 0;
1378 if (api_ver != api_max)
1379 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1380 "got v%u. New firmware can be obtained "
1381 "from http://www.intellinuxwireless.org.\n",
1384 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1385 IWL_UCODE_MAJOR(priv->ucode_ver),
1386 IWL_UCODE_MINOR(priv->ucode_ver),
1387 IWL_UCODE_API(priv->ucode_ver),
1388 IWL_UCODE_SERIAL(priv->ucode_ver));
1390 snprintf(priv->hw->wiphy->fw_version,
1391 sizeof(priv->hw->wiphy->fw_version),
1393 IWL_UCODE_MAJOR(priv->ucode_ver),
1394 IWL_UCODE_MINOR(priv->ucode_ver),
1395 IWL_UCODE_API(priv->ucode_ver),
1396 IWL_UCODE_SERIAL(priv->ucode_ver));
1399 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1401 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1402 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1403 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1404 ? "OTP" : "EEPROM", eeprom_ver);
1406 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1408 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1410 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1412 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1414 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1416 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1419 /* Verify size of file vs. image size info in file's header */
1420 if (ucode_raw->size !=
1421 priv->cfg->ops->ucode->get_header_size(api_ver) +
1422 inst_size + data_size + init_size +
1423 init_data_size + boot_size) {
1425 IWL_DEBUG_INFO(priv,
1426 "uCode file size %d does not match expected size\n",
1427 (int)ucode_raw->size);
1432 /* Verify that uCode images will fit in card's SRAM */
1433 if (inst_size > priv->hw_params.max_inst_size) {
1434 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1440 if (data_size > priv->hw_params.max_data_size) {
1441 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1446 if (init_size > priv->hw_params.max_inst_size) {
1447 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1452 if (init_data_size > priv->hw_params.max_data_size) {
1453 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1458 if (boot_size > priv->hw_params.max_bsm_size) {
1459 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1465 /* Allocate ucode buffers for card's bus-master loading ... */
1467 /* Runtime instructions and 2 copies of data:
1468 * 1) unmodified from disk
1469 * 2) backup cache for save/restore during power-downs */
1470 priv->ucode_code.len = inst_size;
1471 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1473 priv->ucode_data.len = data_size;
1474 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1476 priv->ucode_data_backup.len = data_size;
1477 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1479 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1480 !priv->ucode_data_backup.v_addr)
1483 /* Initialization instructions and data */
1484 if (init_size && init_data_size) {
1485 priv->ucode_init.len = init_size;
1486 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1488 priv->ucode_init_data.len = init_data_size;
1489 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1491 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1495 /* Bootstrap (instructions only, no data) */
1497 priv->ucode_boot.len = boot_size;
1498 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1500 if (!priv->ucode_boot.v_addr)
1504 /* Copy images into buffers for card's bus-master reads ... */
1506 /* Runtime instructions (first block of data in file) */
1508 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1509 memcpy(priv->ucode_code.v_addr, src, len);
1512 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1513 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1515 /* Runtime data (2nd block)
1516 * NOTE: Copy into backup buffer will be done in iwl_up() */
1518 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1519 memcpy(priv->ucode_data.v_addr, src, len);
1520 memcpy(priv->ucode_data_backup.v_addr, src, len);
1523 /* Initialization instructions (3rd block) */
1526 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1528 memcpy(priv->ucode_init.v_addr, src, len);
1532 /* Initialization data (4th block) */
1533 if (init_data_size) {
1534 len = init_data_size;
1535 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1537 memcpy(priv->ucode_init_data.v_addr, src, len);
1541 /* Bootstrap instructions (5th block) */
1543 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1544 memcpy(priv->ucode_boot.v_addr, src, len);
1546 /* We have our copies now, allow OS release its copies */
1547 release_firmware(ucode_raw);
1551 IWL_ERR(priv, "failed to allocate pci memory\n");
1553 iwl_dealloc_ucode_pci(priv);
1556 release_firmware(ucode_raw);
1562 #ifdef CONFIG_IWLWIFI_DEBUG
1563 static const char *desc_lookup_text[] = {
1568 "NMI_INTERRUPT_WDG",
1572 "HW_ERROR_TUNE_LOCK",
1573 "HW_ERROR_TEMPERATURE",
1574 "ILLEGAL_CHAN_FREQ",
1577 "NMI_INTERRUPT_HOST",
1578 "NMI_INTERRUPT_ACTION_PT",
1579 "NMI_INTERRUPT_UNKNOWN",
1580 "UCODE_VERSION_MISMATCH",
1581 "HW_ERROR_ABS_LOCK",
1582 "HW_ERROR_CAL_LOCK_FAIL",
1583 "NMI_INTERRUPT_INST_ACTION_PT",
1584 "NMI_INTERRUPT_DATA_ACTION_PT",
1586 "NMI_INTERRUPT_TRM",
1587 "NMI_INTERRUPT_BREAK_POINT"
1595 static const char *desc_lookup(int i)
1597 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1599 if (i < 0 || i > max)
1602 return desc_lookup_text[i];
1605 #define ERROR_START_OFFSET (1 * sizeof(u32))
1606 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1608 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1611 u32 desc, time, count, base, data1;
1612 u32 blink1, blink2, ilink1, ilink2;
1614 if (priv->ucode_type == UCODE_INIT)
1615 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1617 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1619 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1620 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1624 count = iwl_read_targ_mem(priv, base);
1626 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1627 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1628 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1629 priv->status, count);
1632 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1633 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1634 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1635 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1636 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1637 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1638 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1639 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1640 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1642 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1643 blink1, blink2, ilink1, ilink2);
1645 IWL_ERR(priv, "Desc Time "
1646 "data1 data2 line\n");
1647 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1648 desc_lookup(desc), desc, time, data1, data2, line);
1649 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1650 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1655 #define EVENT_START_OFFSET (4 * sizeof(u32))
1658 * iwl_print_event_log - Dump error event log to syslog
1661 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1662 u32 num_events, u32 mode)
1665 u32 base; /* SRAM byte address of event log header */
1666 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1667 u32 ptr; /* SRAM byte address of log data */
1668 u32 ev, time, data; /* event log data */
1670 if (num_events == 0)
1672 if (priv->ucode_type == UCODE_INIT)
1673 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1675 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1678 event_size = 2 * sizeof(u32);
1680 event_size = 3 * sizeof(u32);
1682 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1684 /* "time" is actually "data" for mode 0 (no timestamp).
1685 * place event id # at far right for easier visual parsing. */
1686 for (i = 0; i < num_events; i++) {
1687 ev = iwl_read_targ_mem(priv, ptr);
1689 time = iwl_read_targ_mem(priv, ptr);
1693 trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1694 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1696 data = iwl_read_targ_mem(priv, ptr);
1698 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1700 trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1705 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1706 #define MAX_EVENT_LOG_SIZE (512)
1708 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1710 u32 base; /* SRAM byte address of event log header */
1711 u32 capacity; /* event log capacity in # entries */
1712 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1713 u32 num_wraps; /* # times uCode wrapped to top of log */
1714 u32 next_entry; /* index of next entry to be written by uCode */
1715 u32 size; /* # entries that we'll print */
1717 if (priv->ucode_type == UCODE_INIT)
1718 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1720 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1722 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1723 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1727 /* event log header */
1728 capacity = iwl_read_targ_mem(priv, base);
1729 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1730 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1731 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1733 if (capacity > MAX_EVENT_LOG_SIZE) {
1734 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1735 capacity, MAX_EVENT_LOG_SIZE);
1736 capacity = MAX_EVENT_LOG_SIZE;
1739 if (next_entry > MAX_EVENT_LOG_SIZE) {
1740 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1741 next_entry, MAX_EVENT_LOG_SIZE);
1742 next_entry = MAX_EVENT_LOG_SIZE;
1745 size = num_wraps ? capacity : next_entry;
1747 /* bail out if nothing in log */
1749 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1753 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1756 /* if uCode has wrapped back to top of log, start at the oldest entry,
1757 * i.e the next one that uCode would fill. */
1759 iwl_print_event_log(priv, next_entry,
1760 capacity - next_entry, mode);
1761 /* (then/else) start at top of log */
1762 iwl_print_event_log(priv, 0, next_entry, mode);
1768 * iwl_alive_start - called after REPLY_ALIVE notification received
1769 * from protocol/runtime uCode (initialization uCode's
1770 * Alive gets handled by iwl_init_alive_start()).
1772 static void iwl_alive_start(struct iwl_priv *priv)
1776 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1778 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1779 /* We had an error bringing up the hardware, so take it
1780 * all the way back down so we can try again */
1781 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1785 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1786 * This is a paranoid check, because we would not have gotten the
1787 * "runtime" alive if code weren't properly loaded. */
1788 if (iwl_verify_ucode(priv)) {
1789 /* Runtime instruction load was bad;
1790 * take it all the way back down so we can try again */
1791 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1795 iwl_clear_stations_table(priv);
1796 ret = priv->cfg->ops->lib->alive_notify(priv);
1799 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1803 /* After the ALIVE response, we can send host commands to the uCode */
1804 set_bit(STATUS_ALIVE, &priv->status);
1806 if (iwl_is_rfkill(priv))
1809 ieee80211_wake_queues(priv->hw);
1811 priv->active_rate = priv->rates_mask;
1812 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1814 /* Configure Tx antenna selection based on H/W config */
1815 if (priv->cfg->ops->hcmd->set_tx_ant)
1816 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1818 if (iwl_is_associated(priv)) {
1819 struct iwl_rxon_cmd *active_rxon =
1820 (struct iwl_rxon_cmd *)&priv->active_rxon;
1821 /* apply any changes in staging */
1822 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1823 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1825 /* Initialize our rx_config data */
1826 iwl_connection_init_rx_config(priv, priv->iw_mode);
1828 if (priv->cfg->ops->hcmd->set_rxon_chain)
1829 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1831 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1834 /* Configure Bluetooth device coexistence support */
1835 iwl_send_bt_config(priv);
1837 iwl_reset_run_time_calib(priv);
1839 /* Configure the adapter for unassociated operation */
1840 iwlcore_commit_rxon(priv);
1842 /* At this point, the NIC is initialized and operational */
1843 iwl_rf_kill_ct_config(priv);
1845 iwl_leds_init(priv);
1847 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1848 set_bit(STATUS_READY, &priv->status);
1849 wake_up_interruptible(&priv->wait_command_queue);
1851 iwl_power_update_mode(priv, true);
1853 /* reassociate for ADHOC mode */
1854 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1855 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1858 iwl_mac_beacon_update(priv->hw, beacon);
1862 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1863 iwl_set_mode(priv, priv->iw_mode);
1868 queue_work(priv->workqueue, &priv->restart);
1871 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1873 static void __iwl_down(struct iwl_priv *priv)
1875 unsigned long flags;
1876 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1878 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1881 set_bit(STATUS_EXIT_PENDING, &priv->status);
1883 iwl_clear_stations_table(priv);
1885 /* Unblock any waiting calls */
1886 wake_up_interruptible_all(&priv->wait_command_queue);
1888 /* Wipe out the EXIT_PENDING status bit if we are not actually
1889 * exiting the module */
1891 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1893 /* stop and reset the on-board processor */
1894 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1896 /* tell the device to stop sending interrupts */
1897 spin_lock_irqsave(&priv->lock, flags);
1898 iwl_disable_interrupts(priv);
1899 spin_unlock_irqrestore(&priv->lock, flags);
1900 iwl_synchronize_irq(priv);
1902 if (priv->mac80211_registered)
1903 ieee80211_stop_queues(priv->hw);
1905 /* If we have not previously called iwl_init() then
1906 * clear all bits but the RF Kill bit and return */
1907 if (!iwl_is_init(priv)) {
1908 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1910 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1911 STATUS_GEO_CONFIGURED |
1912 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1913 STATUS_EXIT_PENDING;
1917 /* ...otherwise clear out all the status bits but the RF Kill
1918 * bit and continue taking the NIC down. */
1919 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1921 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1922 STATUS_GEO_CONFIGURED |
1923 test_bit(STATUS_FW_ERROR, &priv->status) <<
1925 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1926 STATUS_EXIT_PENDING;
1928 /* device going down, Stop using ICT table */
1929 iwl_disable_ict(priv);
1930 spin_lock_irqsave(&priv->lock, flags);
1931 iwl_clear_bit(priv, CSR_GP_CNTRL,
1932 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1933 spin_unlock_irqrestore(&priv->lock, flags);
1935 iwl_txq_ctx_stop(priv);
1938 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1939 APMG_CLK_VAL_DMA_CLK_RQT);
1943 /* Stop the device, and put it in low power state */
1944 priv->cfg->ops->lib->apm_ops.stop(priv);
1947 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1949 if (priv->ibss_beacon)
1950 dev_kfree_skb(priv->ibss_beacon);
1951 priv->ibss_beacon = NULL;
1953 /* clear out any free frames */
1954 iwl_clear_free_frames(priv);
1957 static void iwl_down(struct iwl_priv *priv)
1959 mutex_lock(&priv->mutex);
1961 mutex_unlock(&priv->mutex);
1963 iwl_cancel_deferred_work(priv);
1966 #define HW_READY_TIMEOUT (50)
1968 static int iwl_set_hw_ready(struct iwl_priv *priv)
1972 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1973 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1975 /* See if we got it */
1976 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1977 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1978 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1980 if (ret != -ETIMEDOUT)
1981 priv->hw_ready = true;
1983 priv->hw_ready = false;
1985 IWL_DEBUG_INFO(priv, "hardware %s\n",
1986 (priv->hw_ready == 1) ? "ready" : "not ready");
1990 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1994 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1996 ret = iwl_set_hw_ready(priv);
2000 /* If HW is not ready, prepare the conditions to check again */
2001 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2002 CSR_HW_IF_CONFIG_REG_PREPARE);
2004 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2005 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2006 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2008 /* HW should be ready by now, check again. */
2009 if (ret != -ETIMEDOUT)
2010 iwl_set_hw_ready(priv);
2015 #define MAX_HW_RESTARTS 5
2017 static int __iwl_up(struct iwl_priv *priv)
2022 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2023 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2027 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2028 IWL_ERR(priv, "ucode not available for device bringup\n");
2032 iwl_prepare_card_hw(priv);
2034 if (!priv->hw_ready) {
2035 IWL_WARN(priv, "Exit HW not ready\n");
2039 /* If platform's RF_KILL switch is NOT set to KILL */
2040 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2041 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2043 set_bit(STATUS_RF_KILL_HW, &priv->status);
2045 if (iwl_is_rfkill(priv)) {
2046 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2048 iwl_enable_interrupts(priv);
2049 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2053 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2055 ret = iwl_hw_nic_init(priv);
2057 IWL_ERR(priv, "Unable to init nic\n");
2061 /* make sure rfkill handshake bits are cleared */
2062 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2063 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2064 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2066 /* clear (again), then enable host interrupts */
2067 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2068 iwl_enable_interrupts(priv);
2070 /* really make sure rfkill handshake bits are cleared */
2071 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2072 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2074 /* Copy original ucode data image from disk into backup cache.
2075 * This will be used to initialize the on-board processor's
2076 * data SRAM for a clean start when the runtime program first loads. */
2077 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2078 priv->ucode_data.len);
2080 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2082 iwl_clear_stations_table(priv);
2084 /* load bootstrap state machine,
2085 * load bootstrap program into processor's memory,
2086 * prepare to load the "initialize" uCode */
2087 ret = priv->cfg->ops->lib->load_ucode(priv);
2090 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2095 /* start card; "initialize" will load runtime ucode */
2096 iwl_nic_start(priv);
2098 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2103 set_bit(STATUS_EXIT_PENDING, &priv->status);
2105 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2107 /* tried to restart and config the device for as long as our
2108 * patience could withstand */
2109 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2114 /*****************************************************************************
2116 * Workqueue callbacks
2118 *****************************************************************************/
2120 static void iwl_bg_init_alive_start(struct work_struct *data)
2122 struct iwl_priv *priv =
2123 container_of(data, struct iwl_priv, init_alive_start.work);
2125 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2128 mutex_lock(&priv->mutex);
2129 priv->cfg->ops->lib->init_alive_start(priv);
2130 mutex_unlock(&priv->mutex);
2133 static void iwl_bg_alive_start(struct work_struct *data)
2135 struct iwl_priv *priv =
2136 container_of(data, struct iwl_priv, alive_start.work);
2138 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2141 /* enable dram interrupt */
2142 iwl_reset_ict(priv);
2144 mutex_lock(&priv->mutex);
2145 iwl_alive_start(priv);
2146 mutex_unlock(&priv->mutex);
2149 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2151 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2152 run_time_calib_work);
2154 mutex_lock(&priv->mutex);
2156 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2157 test_bit(STATUS_SCANNING, &priv->status)) {
2158 mutex_unlock(&priv->mutex);
2162 if (priv->start_calib) {
2163 iwl_chain_noise_calibration(priv, &priv->statistics);
2165 iwl_sensitivity_calibration(priv, &priv->statistics);
2168 mutex_unlock(&priv->mutex);
2172 static void iwl_bg_up(struct work_struct *data)
2174 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2176 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2179 mutex_lock(&priv->mutex);
2181 mutex_unlock(&priv->mutex);
2184 static void iwl_bg_restart(struct work_struct *data)
2186 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2188 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2191 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2192 mutex_lock(&priv->mutex);
2195 mutex_unlock(&priv->mutex);
2197 ieee80211_restart_hw(priv->hw);
2200 queue_work(priv->workqueue, &priv->up);
2204 static void iwl_bg_rx_replenish(struct work_struct *data)
2206 struct iwl_priv *priv =
2207 container_of(data, struct iwl_priv, rx_replenish);
2209 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2212 mutex_lock(&priv->mutex);
2213 iwl_rx_replenish(priv);
2214 mutex_unlock(&priv->mutex);
2217 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2219 void iwl_post_associate(struct iwl_priv *priv)
2221 struct ieee80211_conf *conf = NULL;
2223 unsigned long flags;
2225 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2226 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2230 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2231 priv->assoc_id, priv->active_rxon.bssid_addr);
2234 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2238 if (!priv->vif || !priv->is_open)
2241 iwl_scan_cancel_timeout(priv, 200);
2243 conf = ieee80211_get_hw_conf(priv->hw);
2245 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2246 iwlcore_commit_rxon(priv);
2248 iwl_setup_rxon_timing(priv);
2249 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2250 sizeof(priv->rxon_timing), &priv->rxon_timing);
2252 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2253 "Attempting to continue.\n");
2255 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2257 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2259 if (priv->cfg->ops->hcmd->set_rxon_chain)
2260 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2262 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2264 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2265 priv->assoc_id, priv->beacon_int);
2267 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2268 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2270 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2272 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2273 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2274 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2276 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2278 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2279 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2283 iwlcore_commit_rxon(priv);
2285 switch (priv->iw_mode) {
2286 case NL80211_IFTYPE_STATION:
2289 case NL80211_IFTYPE_ADHOC:
2291 /* assume default assoc id */
2294 iwl_rxon_add_station(priv, priv->bssid, 0);
2295 iwl_send_beacon_cmd(priv);
2300 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2301 __func__, priv->iw_mode);
2305 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2306 priv->assoc_station_added = 1;
2308 spin_lock_irqsave(&priv->lock, flags);
2309 iwl_activate_qos(priv, 0);
2310 spin_unlock_irqrestore(&priv->lock, flags);
2312 /* the chain noise calibration will enabled PM upon completion
2313 * If chain noise has already been run, then we need to enable
2314 * power management here */
2315 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2316 iwl_power_update_mode(priv, false);
2318 /* Enable Rx differential gain and sensitivity calibrations */
2319 iwl_chain_noise_reset(priv);
2320 priv->start_calib = 1;
2324 /*****************************************************************************
2326 * mac80211 entry point functions
2328 *****************************************************************************/
2330 #define UCODE_READY_TIMEOUT (4 * HZ)
2333 * Not a mac80211 entry point function, but it fits in with all the
2334 * other mac80211 functions grouped here.
2336 static int iwl_setup_mac(struct iwl_priv *priv)
2339 struct ieee80211_hw *hw = priv->hw;
2340 hw->rate_control_algorithm = "iwl-agn-rs";
2342 /* Tell mac80211 our characteristics */
2343 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2344 IEEE80211_HW_NOISE_DBM |
2345 IEEE80211_HW_AMPDU_AGGREGATION |
2346 IEEE80211_HW_SPECTRUM_MGMT;
2348 if (!priv->cfg->broken_powersave)
2349 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2350 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2352 hw->sta_data_size = sizeof(struct iwl_station_priv);
2353 hw->wiphy->interface_modes =
2354 BIT(NL80211_IFTYPE_STATION) |
2355 BIT(NL80211_IFTYPE_ADHOC);
2357 hw->wiphy->custom_regulatory = true;
2359 /* Firmware does not support this */
2360 hw->wiphy->disable_beacon_hints = true;
2363 * For now, disable PS by default because it affects
2364 * RX performance significantly.
2366 hw->wiphy->ps_default = false;
2368 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2369 /* we create the 802.11 header and a zero-length SSID element */
2370 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2372 /* Default value; 4 EDCA QOS priorities */
2375 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2377 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2378 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2379 &priv->bands[IEEE80211_BAND_2GHZ];
2380 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2381 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2382 &priv->bands[IEEE80211_BAND_5GHZ];
2384 ret = ieee80211_register_hw(priv->hw);
2386 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2389 priv->mac80211_registered = 1;
2395 static int iwl_mac_start(struct ieee80211_hw *hw)
2397 struct iwl_priv *priv = hw->priv;
2400 IWL_DEBUG_MAC80211(priv, "enter\n");
2402 /* we should be verifying the device is ready to be opened */
2403 mutex_lock(&priv->mutex);
2405 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2406 * ucode filename and max sizes are card-specific. */
2408 if (!priv->ucode_code.len) {
2409 ret = iwl_read_ucode(priv);
2411 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2412 mutex_unlock(&priv->mutex);
2417 ret = __iwl_up(priv);
2419 mutex_unlock(&priv->mutex);
2424 if (iwl_is_rfkill(priv))
2427 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2429 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2430 * mac80211 will not be run successfully. */
2431 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2432 test_bit(STATUS_READY, &priv->status),
2433 UCODE_READY_TIMEOUT);
2435 if (!test_bit(STATUS_READY, &priv->status)) {
2436 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2437 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2442 iwl_led_start(priv);
2446 IWL_DEBUG_MAC80211(priv, "leave\n");
2450 static void iwl_mac_stop(struct ieee80211_hw *hw)
2452 struct iwl_priv *priv = hw->priv;
2454 IWL_DEBUG_MAC80211(priv, "enter\n");
2461 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2462 /* stop mac, cancel any scan request and clear
2463 * RXON_FILTER_ASSOC_MSK BIT
2465 mutex_lock(&priv->mutex);
2466 iwl_scan_cancel_timeout(priv, 100);
2467 mutex_unlock(&priv->mutex);
2472 flush_workqueue(priv->workqueue);
2474 /* enable interrupts again in order to receive rfkill changes */
2475 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2476 iwl_enable_interrupts(priv);
2478 IWL_DEBUG_MAC80211(priv, "leave\n");
2481 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2483 struct iwl_priv *priv = hw->priv;
2485 IWL_DEBUG_MACDUMP(priv, "enter\n");
2487 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2488 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2490 if (iwl_tx_skb(priv, skb))
2491 dev_kfree_skb_any(skb);
2493 IWL_DEBUG_MACDUMP(priv, "leave\n");
2494 return NETDEV_TX_OK;
2497 void iwl_config_ap(struct iwl_priv *priv)
2500 unsigned long flags;
2502 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2505 /* The following should be done only at AP bring up */
2506 if (!iwl_is_associated(priv)) {
2508 /* RXON - unassoc (to set timing command) */
2509 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2510 iwlcore_commit_rxon(priv);
2513 iwl_setup_rxon_timing(priv);
2514 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2515 sizeof(priv->rxon_timing), &priv->rxon_timing);
2517 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2518 "Attempting to continue.\n");
2520 if (priv->cfg->ops->hcmd->set_rxon_chain)
2521 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2523 /* FIXME: what should be the assoc_id for AP? */
2524 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2525 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2526 priv->staging_rxon.flags |=
2527 RXON_FLG_SHORT_PREAMBLE_MSK;
2529 priv->staging_rxon.flags &=
2530 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2532 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2533 if (priv->assoc_capability &
2534 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2535 priv->staging_rxon.flags |=
2536 RXON_FLG_SHORT_SLOT_MSK;
2538 priv->staging_rxon.flags &=
2539 ~RXON_FLG_SHORT_SLOT_MSK;
2541 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2542 priv->staging_rxon.flags &=
2543 ~RXON_FLG_SHORT_SLOT_MSK;
2545 /* restore RXON assoc */
2546 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2547 iwlcore_commit_rxon(priv);
2548 spin_lock_irqsave(&priv->lock, flags);
2549 iwl_activate_qos(priv, 1);
2550 spin_unlock_irqrestore(&priv->lock, flags);
2551 iwl_add_bcast_station(priv);
2553 iwl_send_beacon_cmd(priv);
2555 /* FIXME - we need to add code here to detect a totally new
2556 * configuration, reset the AP, unassoc, rxon timing, assoc,
2557 * clear sta table, add BCAST sta... */
2560 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2561 struct ieee80211_key_conf *keyconf, const u8 *addr,
2562 u32 iv32, u16 *phase1key)
2565 struct iwl_priv *priv = hw->priv;
2566 IWL_DEBUG_MAC80211(priv, "enter\n");
2568 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2570 IWL_DEBUG_MAC80211(priv, "leave\n");
2573 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2574 struct ieee80211_vif *vif,
2575 struct ieee80211_sta *sta,
2576 struct ieee80211_key_conf *key)
2578 struct iwl_priv *priv = hw->priv;
2582 bool is_default_wep_key = false;
2584 IWL_DEBUG_MAC80211(priv, "enter\n");
2586 if (priv->cfg->mod_params->sw_crypto) {
2587 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2590 addr = sta ? sta->addr : iwl_bcast_addr;
2591 sta_id = iwl_find_station(priv, addr);
2592 if (sta_id == IWL_INVALID_STATION) {
2593 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2599 mutex_lock(&priv->mutex);
2600 iwl_scan_cancel_timeout(priv, 100);
2601 mutex_unlock(&priv->mutex);
2603 /* If we are getting WEP group key and we didn't receive any key mapping
2604 * so far, we are in legacy wep mode (group key only), otherwise we are
2606 * In legacy wep mode, we use another host command to the uCode */
2607 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2608 priv->iw_mode != NL80211_IFTYPE_AP) {
2610 is_default_wep_key = !priv->key_mapping_key;
2612 is_default_wep_key =
2613 (key->hw_key_idx == HW_KEY_DEFAULT);
2618 if (is_default_wep_key)
2619 ret = iwl_set_default_wep_key(priv, key);
2621 ret = iwl_set_dynamic_key(priv, key, sta_id);
2623 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2626 if (is_default_wep_key)
2627 ret = iwl_remove_default_wep_key(priv, key);
2629 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2631 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2637 IWL_DEBUG_MAC80211(priv, "leave\n");
2642 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2643 enum ieee80211_ampdu_mlme_action action,
2644 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2646 struct iwl_priv *priv = hw->priv;
2649 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2652 if (!(priv->cfg->sku & IWL_SKU_N))
2656 case IEEE80211_AMPDU_RX_START:
2657 IWL_DEBUG_HT(priv, "start Rx\n");
2658 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2659 case IEEE80211_AMPDU_RX_STOP:
2660 IWL_DEBUG_HT(priv, "stop Rx\n");
2661 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2662 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2666 case IEEE80211_AMPDU_TX_START:
2667 IWL_DEBUG_HT(priv, "start Tx\n");
2668 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2669 case IEEE80211_AMPDU_TX_STOP:
2670 IWL_DEBUG_HT(priv, "stop Tx\n");
2671 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2672 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2677 IWL_DEBUG_HT(priv, "unknown\n");
2684 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2685 struct ieee80211_low_level_stats *stats)
2687 struct iwl_priv *priv = hw->priv;
2690 IWL_DEBUG_MAC80211(priv, "enter\n");
2691 IWL_DEBUG_MAC80211(priv, "leave\n");
2696 /*****************************************************************************
2700 *****************************************************************************/
2702 #ifdef CONFIG_IWLWIFI_DEBUG
2705 * The following adds a new attribute to the sysfs representation
2706 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2707 * used for controlling the debug level.
2709 * See the level definitions in iwl for details.
2711 * The debug_level being managed using sysfs below is a per device debug
2712 * level that is used instead of the global debug level if it (the per
2713 * device debug level) is set.
2715 static ssize_t show_debug_level(struct device *d,
2716 struct device_attribute *attr, char *buf)
2718 struct iwl_priv *priv = dev_get_drvdata(d);
2719 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2721 static ssize_t store_debug_level(struct device *d,
2722 struct device_attribute *attr,
2723 const char *buf, size_t count)
2725 struct iwl_priv *priv = dev_get_drvdata(d);
2729 ret = strict_strtoul(buf, 0, &val);
2731 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2733 priv->debug_level = val;
2734 if (iwl_alloc_traffic_mem(priv))
2736 "Not enough memory to generate traffic log\n");
2738 return strnlen(buf, count);
2741 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2742 show_debug_level, store_debug_level);
2745 #endif /* CONFIG_IWLWIFI_DEBUG */
2748 static ssize_t show_temperature(struct device *d,
2749 struct device_attribute *attr, char *buf)
2751 struct iwl_priv *priv = dev_get_drvdata(d);
2753 if (!iwl_is_alive(priv))
2756 return sprintf(buf, "%d\n", priv->temperature);
2759 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2761 static ssize_t show_tx_power(struct device *d,
2762 struct device_attribute *attr, char *buf)
2764 struct iwl_priv *priv = dev_get_drvdata(d);
2766 if (!iwl_is_ready_rf(priv))
2767 return sprintf(buf, "off\n");
2769 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2772 static ssize_t store_tx_power(struct device *d,
2773 struct device_attribute *attr,
2774 const char *buf, size_t count)
2776 struct iwl_priv *priv = dev_get_drvdata(d);
2780 ret = strict_strtoul(buf, 10, &val);
2782 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2784 ret = iwl_set_tx_power(priv, val, false);
2786 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2794 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2796 static ssize_t show_flags(struct device *d,
2797 struct device_attribute *attr, char *buf)
2799 struct iwl_priv *priv = dev_get_drvdata(d);
2801 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2804 static ssize_t store_flags(struct device *d,
2805 struct device_attribute *attr,
2806 const char *buf, size_t count)
2808 struct iwl_priv *priv = dev_get_drvdata(d);
2811 int ret = strict_strtoul(buf, 0, &val);
2816 mutex_lock(&priv->mutex);
2817 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2818 /* Cancel any currently running scans... */
2819 if (iwl_scan_cancel_timeout(priv, 100))
2820 IWL_WARN(priv, "Could not cancel scan.\n");
2822 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2823 priv->staging_rxon.flags = cpu_to_le32(flags);
2824 iwlcore_commit_rxon(priv);
2827 mutex_unlock(&priv->mutex);
2832 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2834 static ssize_t show_filter_flags(struct device *d,
2835 struct device_attribute *attr, char *buf)
2837 struct iwl_priv *priv = dev_get_drvdata(d);
2839 return sprintf(buf, "0x%04X\n",
2840 le32_to_cpu(priv->active_rxon.filter_flags));
2843 static ssize_t store_filter_flags(struct device *d,
2844 struct device_attribute *attr,
2845 const char *buf, size_t count)
2847 struct iwl_priv *priv = dev_get_drvdata(d);
2850 int ret = strict_strtoul(buf, 0, &val);
2853 filter_flags = (u32)val;
2855 mutex_lock(&priv->mutex);
2856 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2857 /* Cancel any currently running scans... */
2858 if (iwl_scan_cancel_timeout(priv, 100))
2859 IWL_WARN(priv, "Could not cancel scan.\n");
2861 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2862 "0x%04X\n", filter_flags);
2863 priv->staging_rxon.filter_flags =
2864 cpu_to_le32(filter_flags);
2865 iwlcore_commit_rxon(priv);
2868 mutex_unlock(&priv->mutex);
2873 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2874 store_filter_flags);
2877 static ssize_t show_statistics(struct device *d,
2878 struct device_attribute *attr, char *buf)
2880 struct iwl_priv *priv = dev_get_drvdata(d);
2881 u32 size = sizeof(struct iwl_notif_statistics);
2882 u32 len = 0, ofs = 0;
2883 u8 *data = (u8 *)&priv->statistics;
2886 if (!iwl_is_alive(priv))
2889 mutex_lock(&priv->mutex);
2890 rc = iwl_send_statistics_request(priv, 0);
2891 mutex_unlock(&priv->mutex);
2895 "Error sending statistics request: 0x%08X\n", rc);
2899 while (size && (PAGE_SIZE - len)) {
2900 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2901 PAGE_SIZE - len, 1);
2903 if (PAGE_SIZE - len)
2907 size -= min(size, 16U);
2913 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2915 static ssize_t show_rts_ht_protection(struct device *d,
2916 struct device_attribute *attr, char *buf)
2918 struct iwl_priv *priv = dev_get_drvdata(d);
2920 return sprintf(buf, "%s\n",
2921 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2924 static ssize_t store_rts_ht_protection(struct device *d,
2925 struct device_attribute *attr,
2926 const char *buf, size_t count)
2928 struct iwl_priv *priv = dev_get_drvdata(d);
2932 ret = strict_strtoul(buf, 10, &val);
2934 IWL_INFO(priv, "Input is not in decimal form.\n");
2936 if (!iwl_is_associated(priv))
2937 priv->cfg->use_rts_for_ht = val ? true : false;
2939 IWL_ERR(priv, "Sta associated with AP - "
2940 "Change protection mechanism is not allowed\n");
2946 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2947 show_rts_ht_protection, store_rts_ht_protection);
2950 /*****************************************************************************
2952 * driver setup and teardown
2954 *****************************************************************************/
2956 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2958 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2960 init_waitqueue_head(&priv->wait_command_queue);
2962 INIT_WORK(&priv->up, iwl_bg_up);
2963 INIT_WORK(&priv->restart, iwl_bg_restart);
2964 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2965 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2966 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2967 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2968 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2970 iwl_setup_scan_deferred_work(priv);
2972 if (priv->cfg->ops->lib->setup_deferred_work)
2973 priv->cfg->ops->lib->setup_deferred_work(priv);
2975 init_timer(&priv->statistics_periodic);
2976 priv->statistics_periodic.data = (unsigned long)priv;
2977 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2979 if (!priv->cfg->use_isr_legacy)
2980 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2981 iwl_irq_tasklet, (unsigned long)priv);
2983 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2984 iwl_irq_tasklet_legacy, (unsigned long)priv);
2987 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2989 if (priv->cfg->ops->lib->cancel_deferred_work)
2990 priv->cfg->ops->lib->cancel_deferred_work(priv);
2992 cancel_delayed_work_sync(&priv->init_alive_start);
2993 cancel_delayed_work(&priv->scan_check);
2994 cancel_delayed_work(&priv->alive_start);
2995 cancel_work_sync(&priv->beacon_update);
2996 del_timer_sync(&priv->statistics_periodic);
2999 static void iwl_init_hw_rates(struct iwl_priv *priv,
3000 struct ieee80211_rate *rates)
3004 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3005 rates[i].bitrate = iwl_rates[i].ieee * 5;
3006 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3007 rates[i].hw_value_short = i;
3009 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3011 * If CCK != 1M then set short preamble rate flag.
3014 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3015 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3020 static int iwl_init_drv(struct iwl_priv *priv)
3024 priv->ibss_beacon = NULL;
3026 spin_lock_init(&priv->lock);
3027 spin_lock_init(&priv->sta_lock);
3028 spin_lock_init(&priv->hcmd_lock);
3030 INIT_LIST_HEAD(&priv->free_frames);
3032 mutex_init(&priv->mutex);
3034 /* Clear the driver's (not device's) station table */
3035 iwl_clear_stations_table(priv);
3037 priv->ieee_channels = NULL;
3038 priv->ieee_rates = NULL;
3039 priv->band = IEEE80211_BAND_2GHZ;
3041 priv->iw_mode = NL80211_IFTYPE_STATION;
3042 if (priv->cfg->support_sm_ps)
3043 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DYNAMIC;
3045 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
3047 /* Choose which receivers/antennas to use */
3048 if (priv->cfg->ops->hcmd->set_rxon_chain)
3049 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3051 iwl_init_scan_params(priv);
3053 iwl_reset_qos(priv);
3055 priv->qos_data.qos_active = 0;
3056 priv->qos_data.qos_cap.val = 0;
3058 priv->rates_mask = IWL_RATES_MASK;
3059 /* Set the tx_power_user_lmt to the lowest power level
3060 * this value will get overwritten by channel max power avg
3062 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3064 ret = iwl_init_channel_map(priv);
3066 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3070 ret = iwlcore_init_geos(priv);
3072 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3073 goto err_free_channel_map;
3075 iwl_init_hw_rates(priv, priv->ieee_rates);
3079 err_free_channel_map:
3080 iwl_free_channel_map(priv);
3085 static void iwl_uninit_drv(struct iwl_priv *priv)
3087 iwl_calib_free_results(priv);
3088 iwlcore_free_geos(priv);
3089 iwl_free_channel_map(priv);
3093 static struct attribute *iwl_sysfs_entries[] = {
3094 &dev_attr_flags.attr,
3095 &dev_attr_filter_flags.attr,
3096 &dev_attr_statistics.attr,
3097 &dev_attr_temperature.attr,
3098 &dev_attr_tx_power.attr,
3099 &dev_attr_rts_ht_protection.attr,
3100 #ifdef CONFIG_IWLWIFI_DEBUG
3101 &dev_attr_debug_level.attr,
3106 static struct attribute_group iwl_attribute_group = {
3107 .name = NULL, /* put in device directory */
3108 .attrs = iwl_sysfs_entries,
3111 static struct ieee80211_ops iwl_hw_ops = {
3113 .start = iwl_mac_start,
3114 .stop = iwl_mac_stop,
3115 .add_interface = iwl_mac_add_interface,
3116 .remove_interface = iwl_mac_remove_interface,
3117 .config = iwl_mac_config,
3118 .configure_filter = iwl_configure_filter,
3119 .set_key = iwl_mac_set_key,
3120 .update_tkip_key = iwl_mac_update_tkip_key,
3121 .get_stats = iwl_mac_get_stats,
3122 .get_tx_stats = iwl_mac_get_tx_stats,
3123 .conf_tx = iwl_mac_conf_tx,
3124 .reset_tsf = iwl_mac_reset_tsf,
3125 .bss_info_changed = iwl_bss_info_changed,
3126 .ampdu_action = iwl_mac_ampdu_action,
3127 .hw_scan = iwl_mac_hw_scan
3130 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3133 struct iwl_priv *priv;
3134 struct ieee80211_hw *hw;
3135 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3136 unsigned long flags;
3139 /************************
3140 * 1. Allocating HW data
3141 ************************/
3143 /* Disabling hardware scan means that mac80211 will perform scans
3144 * "the hard way", rather than using device's scan. */
3145 if (cfg->mod_params->disable_hw_scan) {
3146 if (iwl_debug_level & IWL_DL_INFO)
3147 dev_printk(KERN_DEBUG, &(pdev->dev),
3148 "Disabling hw_scan\n");
3149 iwl_hw_ops.hw_scan = NULL;
3152 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3158 /* At this point both hw and priv are allocated. */
3160 SET_IEEE80211_DEV(hw, &pdev->dev);
3162 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3164 priv->pci_dev = pdev;
3165 priv->inta_mask = CSR_INI_SET_MASK;
3167 #ifdef CONFIG_IWLWIFI_DEBUG
3168 atomic_set(&priv->restrict_refcnt, 0);
3170 if (iwl_alloc_traffic_mem(priv))
3171 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3173 /**************************
3174 * 2. Initializing PCI bus
3175 **************************/
3176 if (pci_enable_device(pdev)) {
3178 goto out_ieee80211_free_hw;
3181 pci_set_master(pdev);
3183 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3185 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3187 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3189 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3190 /* both attempts failed: */
3192 IWL_WARN(priv, "No suitable DMA available.\n");
3193 goto out_pci_disable_device;
3197 err = pci_request_regions(pdev, DRV_NAME);
3199 goto out_pci_disable_device;
3201 pci_set_drvdata(pdev, priv);
3204 /***********************
3205 * 3. Read REV register
3206 ***********************/
3207 priv->hw_base = pci_iomap(pdev, 0, 0);
3208 if (!priv->hw_base) {
3210 goto out_pci_release_regions;
3213 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3214 (unsigned long long) pci_resource_len(pdev, 0));
3215 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3217 /* this spin lock will be used in apm_ops.init and EEPROM access
3218 * we should init now
3220 spin_lock_init(&priv->reg_lock);
3221 iwl_hw_detect(priv);
3222 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3223 priv->cfg->name, priv->hw_rev);
3225 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3226 * PCI Tx retries from interfering with C3 CPU state */
3227 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3229 iwl_prepare_card_hw(priv);
3230 if (!priv->hw_ready) {
3231 IWL_WARN(priv, "Failed, HW not ready\n");
3238 /* Read the EEPROM */
3239 err = iwl_eeprom_init(priv);
3241 IWL_ERR(priv, "Unable to init EEPROM\n");
3244 err = iwl_eeprom_check_version(priv);
3246 goto out_free_eeprom;
3248 /* extract MAC Address */
3249 iwl_eeprom_get_mac(priv, priv->mac_addr);
3250 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3251 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3253 /************************
3254 * 5. Setup HW constants
3255 ************************/
3256 if (iwl_set_hw_params(priv)) {
3257 IWL_ERR(priv, "failed to set hw parameters\n");
3258 goto out_free_eeprom;
3261 /*******************
3263 *******************/
3265 err = iwl_init_drv(priv);
3267 goto out_free_eeprom;
3268 /* At this point both hw and priv are initialized. */
3270 /********************
3272 ********************/
3273 spin_lock_irqsave(&priv->lock, flags);
3274 iwl_disable_interrupts(priv);
3275 spin_unlock_irqrestore(&priv->lock, flags);
3277 pci_enable_msi(priv->pci_dev);
3279 iwl_alloc_isr_ict(priv);
3280 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3281 IRQF_SHARED, DRV_NAME, priv);
3283 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3284 goto out_disable_msi;
3286 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3288 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3292 iwl_setup_deferred_work(priv);
3293 iwl_setup_rx_handlers(priv);
3295 /**********************************
3296 * 8. Setup and register mac80211
3297 **********************************/
3299 /* enable interrupts if needed: hw bug w/a */
3300 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3301 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3302 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3303 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3306 iwl_enable_interrupts(priv);
3308 err = iwl_setup_mac(priv);
3310 goto out_remove_sysfs;
3312 err = iwl_dbgfs_register(priv, DRV_NAME);
3314 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3316 /* If platform's RF_KILL switch is NOT set to KILL */
3317 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3318 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3320 set_bit(STATUS_RF_KILL_HW, &priv->status);
3322 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3323 test_bit(STATUS_RF_KILL_HW, &priv->status));
3325 iwl_power_initialize(priv);
3326 iwl_tt_initialize(priv);
3330 destroy_workqueue(priv->workqueue);
3331 priv->workqueue = NULL;
3332 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3334 free_irq(priv->pci_dev->irq, priv);
3335 iwl_free_isr_ict(priv);
3337 pci_disable_msi(priv->pci_dev);
3338 iwl_uninit_drv(priv);
3340 iwl_eeprom_free(priv);
3342 pci_iounmap(pdev, priv->hw_base);
3343 out_pci_release_regions:
3344 pci_set_drvdata(pdev, NULL);
3345 pci_release_regions(pdev);
3346 out_pci_disable_device:
3347 pci_disable_device(pdev);
3348 out_ieee80211_free_hw:
3349 iwl_free_traffic_mem(priv);
3350 ieee80211_free_hw(priv->hw);
3355 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3357 struct iwl_priv *priv = pci_get_drvdata(pdev);
3358 unsigned long flags;
3363 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3365 iwl_dbgfs_unregister(priv);
3366 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3368 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3369 * to be called and iwl_down since we are removing the device
3370 * we need to set STATUS_EXIT_PENDING bit.
3372 set_bit(STATUS_EXIT_PENDING, &priv->status);
3373 if (priv->mac80211_registered) {
3374 ieee80211_unregister_hw(priv->hw);
3375 priv->mac80211_registered = 0;
3381 * Make sure device is reset to low power before unloading driver.
3382 * This may be redundant with iwl_down(), but there are paths to
3383 * run iwl_down() without calling apm_ops.stop(), and there are
3384 * paths to avoid running iwl_down() at all before leaving driver.
3385 * This (inexpensive) call *makes sure* device is reset.
3387 priv->cfg->ops->lib->apm_ops.stop(priv);
3391 /* make sure we flush any pending irq or
3392 * tasklet for the driver
3394 spin_lock_irqsave(&priv->lock, flags);
3395 iwl_disable_interrupts(priv);
3396 spin_unlock_irqrestore(&priv->lock, flags);
3398 iwl_synchronize_irq(priv);
3400 iwl_dealloc_ucode_pci(priv);
3403 iwl_rx_queue_free(priv, &priv->rxq);
3404 iwl_hw_txq_ctx_free(priv);
3406 iwl_clear_stations_table(priv);
3407 iwl_eeprom_free(priv);
3410 /*netif_stop_queue(dev); */
3411 flush_workqueue(priv->workqueue);
3413 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3414 * priv->workqueue... so we can't take down the workqueue
3416 destroy_workqueue(priv->workqueue);
3417 priv->workqueue = NULL;
3418 iwl_free_traffic_mem(priv);
3420 free_irq(priv->pci_dev->irq, priv);
3421 pci_disable_msi(priv->pci_dev);
3422 pci_iounmap(pdev, priv->hw_base);
3423 pci_release_regions(pdev);
3424 pci_disable_device(pdev);
3425 pci_set_drvdata(pdev, NULL);
3427 iwl_uninit_drv(priv);
3429 iwl_free_isr_ict(priv);
3431 if (priv->ibss_beacon)
3432 dev_kfree_skb(priv->ibss_beacon);
3434 ieee80211_free_hw(priv->hw);
3438 /*****************************************************************************
3440 * driver and module entry point
3442 *****************************************************************************/
3444 /* Hardware specific file defines the PCI IDs table for that hardware module */
3445 static struct pci_device_id iwl_hw_card_ids[] = {
3446 #ifdef CONFIG_IWL4965
3447 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3448 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3449 #endif /* CONFIG_IWL4965 */
3450 #ifdef CONFIG_IWL5000
3451 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3452 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3453 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3454 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3455 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3456 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3457 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3458 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3459 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3460 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3461 /* 5350 WiFi/WiMax */
3462 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3463 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3464 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3465 /* 5150 Wifi/WiMax */
3466 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3467 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3470 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3471 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3472 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3473 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3474 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3475 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3476 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3477 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3478 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3479 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3481 /* 6x50 WiFi/WiMax Series */
3482 {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3483 {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3484 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3485 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3486 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3487 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3488 {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3489 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3490 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3492 /* 1000 Series WiFi */
3493 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3494 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3495 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3496 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3497 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3498 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3499 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3500 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3501 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3502 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3503 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3504 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3505 #endif /* CONFIG_IWL5000 */
3509 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3511 static struct pci_driver iwl_driver = {
3513 .id_table = iwl_hw_card_ids,
3514 .probe = iwl_pci_probe,
3515 .remove = __devexit_p(iwl_pci_remove),
3517 .suspend = iwl_pci_suspend,
3518 .resume = iwl_pci_resume,
3522 static int __init iwl_init(void)
3526 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3527 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3529 ret = iwlagn_rate_control_register();
3531 printk(KERN_ERR DRV_NAME
3532 "Unable to register rate control algorithm: %d\n", ret);
3536 ret = pci_register_driver(&iwl_driver);
3538 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3539 goto error_register;
3545 iwlagn_rate_control_unregister();
3549 static void __exit iwl_exit(void)
3551 pci_unregister_driver(&iwl_driver);
3552 iwlagn_rate_control_unregister();
3555 module_exit(iwl_exit);
3556 module_init(iwl_init);
3558 #ifdef CONFIG_IWLWIFI_DEBUG
3559 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3560 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3561 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3562 MODULE_PARM_DESC(debug, "debug output mask");